CN205453541U - Intelligence power module and air conditioner - Google Patents
Intelligence power module and air conditioner Download PDFInfo
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- CN205453541U CN205453541U CN201620177059.2U CN201620177059U CN205453541U CN 205453541 U CN205453541 U CN 205453541U CN 201620177059 U CN201620177059 U CN 201620177059U CN 205453541 U CN205453541 U CN 205453541U
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- 238000005070 sampling Methods 0.000 claims abstract description 8
- 230000003044 adaptive effect Effects 0.000 claims description 51
- GOLXNESZZPUPJE-UHFFFAOYSA-N spiromesifen Chemical compound CC1=CC(C)=CC(C)=C1C(C(O1)=O)=C(OC(=O)CC(C)(C)C)C11CCCC1 GOLXNESZZPUPJE-UHFFFAOYSA-N 0.000 claims description 3
- 239000003990 capacitor Substances 0.000 claims description 2
- 238000001514 detection method Methods 0.000 abstract description 3
- 238000000034 method Methods 0.000 description 8
- 230000004224 protection Effects 0.000 description 7
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- 101100181929 Caenorhabditis elegans lin-3 gene Proteins 0.000 description 5
- 238000004378 air conditioning Methods 0.000 description 4
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The utility model provides an intelligence power module and air conditioner is provided with the wiring end that is connected to on the three -phase bridge arm signal input part under bridge arm signal input part and the three -phase respectively on the HVIC pipe in the intelligent power module to it corresponds first port and the second port that is connected to current detection terminal and PFC control input end, the intraductal PFC drive circuit that is provided with of HVIC respectively to reach, low voltage reference end of three -phase and current detection terminal all are connected to the first end of sampling resistor, and the second end of sampling resistor is connected to IPM's low -pressure area power supply negative terminal, self -adaptive circuit's first input end and second input correspond respectively and are connected to first port and second port, and its first output can be held as the messenger that HVIC managed, and its second output is connected to PFC drive circuit's signal input part, wherein, self -adaptive circuit is according to the incoming signal's of first input end size, through the enable signal of the corresponding level of its first output to control signal through its second output output control PFC drive circuit.
Description
Technical field
This utility model relates to SPM technical field, in particular to a kind of SPM and a kind of air-conditioner.
Background technology
SPM (IntelligentPowerModule, it is called for short IPM) it is a kind of analog line driver that power electronics discrete device and integrated circuit technique are integrated, SPM comprises device for power switching and high-voltage driving circuit, and with overvoltage, overcurrent and the failure detector circuit such as overheated.The logic input terminal of SPM receives the control signal of master controller, and outfan drives compressor or subsequent conditioning circuit work, sends the system status signal detected back to master controller simultaneously.Relative to traditional discrete scheme; SPM has the advantages such as high integration, high reliability, self-inspection and protection circuit; it is particularly suitable for driving the converter of motor and various inverter, is the desired power level electronic device of frequency control, metallurgical machinery, electric propulsion, servo-drive, frequency-conversion domestic electric appliances.
The structural representation of existing Intelligent power module circuit is as it is shown in figure 1, MTRIP port is as current detecting end, to protect SPM 100 according to the size of current detected.PFCIN port controls input as the PFC (PowerFactorCorrection, PFC) of SPM.
In SPM work process, PFCINP end is frequently switched between low and high level by certain frequency, make that IGBT pipe 127 is continuously on off state and FRD pipe 131 is continuously in freewheeling state, this frequency be generally LIN1～LIN3,2～4 times of HIN1～HIN3 switching frequency, and the most directly contact with the switching frequency of LIN1～LIN3, HIN1～HIN3.
As shown in Figure 2, UN, VN, WN connect one end of milliohm resistance 138, another termination GND, MTRIP of milliohm resistance 138 are current detecting pins, connect one end of milliohm resistance 138, by the pressure drop measuring and calculating electric current of detection milliohm resistance, as it is shown on figure 3, when current is excessive, SPM 100 is made to quit work, after avoiding because miscarriage life is overheated excessively, SPM 100 is produced permanent damage.
-VP, COM, UN, VN, WN have electrical connection in actual use.Therefore, current noise when voltage noise when IGBT pipe 121～IGBT pipe 127 switchs and FRD pipe 111～FRD pipe 116, FRD pipe 131 afterflow all can intercouple, and impacts the input pin of each low-voltage area.
In each input pin, HIN1～HIN3, LIN1～LIN3, PFCINP threshold value typically at about 2.3V, and the threshold voltage of ITRIP typically only have below 0.5V, therefore, ITRIP be most susceptible to interference pin.When ITRIP is toggled, SPM 100 will quit work, and because the most really there is stream, so the triggering that ITRIP is now belongs to false triggering.As shown in Figure 4, being high level at PFCIN, when moment opened by IGBT pipe 127, because the existence of the reverse recovery current of FRD pipe 131, superposition goes out I131Current waveform, this electric current has bigger concussion noise, passes through-VP, COM, UN, VN, WN electrical connection in peripheral circuit, and concussion noise can close out certain voltage and raise by Rhizoma Nelumbinis at MTRIP end.If the condition making MTRIP trigger is: voltage > Vth, and the persistent period > Tth；In the diagram, if Ta < Tth < Tb, then first three cycle the highest deficiency of voltage so that MTRIP produce false triggering, to the 4th cycle, MTRIP will produce false triggering.
It is true that because the reverse recovery time of FRD pipe and reverse recovery current are positive temperature coefficients, temperature is the highest, reverse recovery time is the longest, therefore along with the continuous firing of system, the constant temperature of SPM 100 rises, and the probability that MTRIP is triggered is increasing.As it is shown in figure 5, at 25 DEG C, the voltage pulsation that the Reverse recovery effect of FRD causes is not enough to cause MTRIP to trigger, and along with temperature raises, when 75 DEG C, MTRIP is triggered, and makes system stalls.Although this false triggering can recover to destroy without forming system over time, but user can be caused puzzlement undoubtedly.Such as the application scenario for transducer air conditioning, the when that the highest user just of ambient temperature more needing air conditioning system continuous firing, but the reverse recovery time that high ambient temperature can make FRD pipe increases, MTRIP is improved by the probability of false triggering, once MTRIP is by false triggering, air conditioning system can quit work 3～5 minutes because being mistakenly considered to occur to flow, and makes user during this period of time cannot obtain cold wind, and this is to cause air conditioning system because of the not enough one of the main reasons by customer complaint of refrigerating capacity.The work of pfc circuit it is not necessary to, in the occasion that the wiring of some application circuit is inconsiderate, the SPM of current art will not be automatically stopped the work of pfc circuit to reduce the use puzzlement of user, improve the use threshold of SPM undoubtedly, have impact on the universal of SPM.
Therefore, how can improve the adaptability of SPM, with the wiring environment by judging application circuit voluntarily, control whether pfc circuit gets involved work, it is achieved while guaranteed efficiency, improve the technical problem that the availability of SPM becomes urgently to be resolved hurrily.
Utility model content
This utility model is intended at least to solve one of technical problem present in prior art or correlation technique.
For this, a purpose of the present utility model is to propose a kind of new SPM, can control whether pfc circuit gets involved work, it is achieved that while guaranteed efficiency, improve availability and the adaptability of SPM by judging the wiring environment of application circuit voluntarily.
Another purpose of the present utility model is to propose a kind of air-conditioner.
For achieving the above object, embodiment according to first aspect of the present utility model, propose a kind of SPM, including: on three-phase, under brachium pontis signal input part, three-phase, brachium pontis signal input part, three-phase low reference voltage end, current detecting end and PFC control input；HVIC (HighVoltageIntegratedCircuit, high voltage integrated circuit) pipe, it is provided with on described HVIC pipe and is respectively connecting on described three-phase the terminals of brachium pontis signal input part under brachium pontis signal input part and described three-phase, and be connected respectively and control the first port and second port of input to described current detecting end and described PFC, it is provided with PFC drive circuit in described HVIC pipe；Sampling resistor, described three-phase low reference voltage end and described current detecting end be connected to the first end of described sampling resistor, and the second end of described sampling resistor is connected to the low-pressure area power supply negative terminal of described SPM；Adaptive circuit, the first input end of described adaptive circuit and the second input are connected respectively to described first port and described second port, first outfan of described adaptive circuit is connected to the signal input part of described PFC drive circuit as the Enable Pin of described HVIC pipe, the second outfan of described adaptive circuit；
Wherein, described adaptive circuit is according to the size of the input signal of described first input end, the first outfan by described adaptive circuit exports the enable signal of corresponding level, and is controlled the control signal of described PFC drive circuit by the second outfan output of described adaptive circuit.
SPM according to embodiment of the present utility model; adaptive circuit is by according to its first input end (the i.e. first port; namely current detecting end) the size of input signal; the enable signal of corresponding level is exported, it is ensured that SPM realizes overcurrent protection by its first outfan；Simultaneously, size by the input signal according to its first input end, the control signal of PFC drive circuit is controlled by the output of its second outfan, make adaptive circuit can determine the wiring environment of application circuit according to the input signal of its first input end, and then control whether pfc circuit gets involved work, to improve the availability of SPM while guaranteed efficiency.
SPM according to above-described embodiment of the present utility model, it is also possible to there is techniques below feature:
According to an embodiment of the present utility model, described adaptive circuit is when the value of the input signal of described first input end is less than the first setting value, the enable signal of the first level is exported by described first outfan, to allow the work of described HVIC pipe, and control, by described second outfan output, the control signal that described PFC drive circuit normally works；
Described adaptive circuit is when the value of the input signal of described first input end is more than or equal to described first setting value and is less than the second setting value, the enable signal of described first level, and the control signal of the scheduled duration that quit work by the described second outfan output described PFC drive circuit of control is exported by described first outfan；
Described adaptive circuit is when the value of the input signal of described first input end is more than or equal to described second setting value, by the enable signal of described first outfan output second electrical level, to forbid that described HVIC pipe works.
SPM according to embodiment of the present utility model, when the value of the input signal of the first input end of adaptive circuit is less than the first setting value, illustrate that the current value in the application circuit of SPM was in normal range, therefore the enable signal of the first level can be exported by the first outfan, to allow the work of HVIC pipe, and control the control signal that PFC drive circuit normally works, to ensure that system has higher efficiency by the second outfan output.
When the value of the input signal of the first input end of adaptive circuit is more than or equal to described first setting value and is less than the second setting value; illustrate that the current value in the application circuit of SPM is bigger; but still in triggering in the range of overcurrent protection; therefore the enable signal of the first level can be exported by the first outfan; and the control signal of the scheduled duration that quit work by the second outfan output control PFC drive circuit, the stability of SPM can be ensured by indirectly controlling pfc circuit service intermittent.
When the value of the input signal of the first input end of adaptive circuit is more than or equal to the second setting value; illustrate that the current value in the application circuit of SPM has reached to trigger the scope of overcurrent protection; therefore can be by the enable signal of the first outfan output second electrical level; to forbid that HVIC pipe works, it is ensured that the safety of SPM.
According to an embodiment of the present utility model, described adaptive circuit includes:
First voltage comparator, the positive input terminal of described first voltage comparator is as the first input end of described adaptive circuit, the negative input end of described first voltage comparator is connected to the positive pole of the first voltage source, the negative pole of described first voltage source is connected to the power supply negative pole of described adaptive circuit, the outfan of described first voltage comparator is connected to the first input end of the first NAND gate, and the power supply positive pole of described adaptive circuit and negative pole are connected respectively the low-pressure area power supply anode to described SPM and negative terminal；
Second voltage comparator, the positive input terminal of described second voltage comparator is connected to the positive input terminal of described first voltage comparator, the negative input end of described second voltage comparator is connected to the positive pole of the second voltage source, the negative pole of described second voltage source is connected to the power supply negative pole of described adaptive circuit, the outfan of described second voltage comparator is connected to the second input of described first NAND gate, the outfan of described first NAND gate is connected to the input of the first not gate, and the outfan of described first not gate is as the first outfan of described adaptive circuit；
Second NAND gate, the first input end of described second NAND gate is as the second input of described adaptive circuit, second input of described second NAND gate is connected to the outfan of enumerator, the input of described enumerator is connected to the outfan of described first voltage comparator, the outfan of described second NAND gate is connected to the input of the second not gate, and the outfan of described second not gate is as the second outfan of described adaptive circuit.
nullAccording to an embodiment of the present utility model，The signal output part of PFC drive circuit it is additionally provided with on described HVIC pipe，Described SPM also includes: the first power switch pipe and the first diode，The anode of described first diode is connected to the emitter stage of described first power switch pipe，The negative electrode of described first diode is connected to the colelctor electrode of described first power switch pipe，The colelctor electrode of described first power switch pipe is connected to the anode of the second diode，The negative electrode of described second diode is connected to the high voltage input of described SPM，The base stage of described first power switch pipe is connected to the signal output part of described PFC drive circuit，The emitter stage of described first power switch pipe is as the PFC low reference voltage end of described SPM，The colelctor electrode of described first power switch pipe is as the PFC end of described SPM.
Wherein, the first power switch pipe can be IGBT (InsulatedGateBipolarTransistor, insulated gate bipolar transistor).
According to an embodiment of the present utility model, also include: boostrap circuit, described boostrap circuit includes: the first bootstrap diode, the anode of described first bootstrap diode is connected to the low-pressure area power supply anode of described SPM, and the negative electrode of described first bootstrap diode is connected to the U phase higher-pressure region power supply anode of described SPM；Second bootstrap diode, the anode of described second bootstrap diode is connected to the low-pressure area power supply anode of described SPM, and the negative electrode of described second bootstrap diode is connected to the V phase higher-pressure region power supply anode of described SPM；3rd bootstrap diode, the anode of described 3rd bootstrap diode is connected to the low-pressure area power supply anode of described SPM, and the negative electrode of described 3rd bootstrap diode is connected to the W phase higher-pressure region power supply anode of described SPM.
According to an embodiment of the present utility model, also include: bridge arm circuit on three-phase, the signal output part of corresponding phase during the input of bridge arm circuit is connected to the three-phase high-voltage district of described HVIC pipe in each phase in bridge arm circuit on described three-phase；Bridge arm circuit under three-phase, the signal output part of corresponding phase during the input of bridge arm circuit is connected to the three-phase low-voltage district of described HVIC pipe under each phase in bridge arm circuit under described three-phase.Wherein, on three-phase, bridge arm circuit includes: bridge arm circuit in bridge arm circuit, W phase in bridge arm circuit, V phase in U phase；Under three-phase, bridge arm circuit includes: the lower bridge arm circuit of the lower bridge arm circuit of U phase, V phase, the lower bridge arm circuit of W phase.
According to an embodiment of the present utility model, in described each phase, bridge arm circuit includes: the second power switch pipe and the 3rd diode, the anode of described 3rd diode is connected to the emitter stage of described second power switch pipe, the negative electrode of described 3rd diode is connected to the colelctor electrode of described second power switch pipe, the colelctor electrode of described second power switch pipe is connected to the high voltage input of described SPM, the base stage of described second power switch pipe is as the input of bridge arm circuit in described each phase, the emitter stage of described second power switch pipe is connected to the higher-pressure region power supply negative terminal of described SPM correspondence phase.Wherein, the second power switch pipe can be IGBT.
According to an embodiment of the present utility model, under described each phase, bridge arm circuit includes: the 3rd power switch pipe and the 4th diode, the anode of described 4th diode is connected to the emitter stage of described 3rd power switch pipe, the negative electrode of described 4th diode is connected to the colelctor electrode of described 3rd power switch pipe, the colelctor electrode of described 3rd power switch pipe is connected to the anode of described 3rd diode in the upper bridge arm circuit of correspondence, the base stage of described 3rd power switch pipe is as the input of bridge arm circuit under described each phase, the emitter stage of described 3rd power switch pipe is as the low reference voltage end of the corresponding phase of described SPM.Wherein, the 3rd power switch pipe can be IGBT.
According to an embodiment of the present utility model, the voltage of the high voltage input of described SPM is 300V.
According to an embodiment of the present utility model, connect between anode and the negative terminal of each phase higher-pressure region power supply of described SPM and have filter capacitor.
Embodiment according to this utility model second aspect, it is also proposed that a kind of air-conditioner, including: the SPM as described in above-mentioned any one embodiment.
Additional aspect of the present utility model and advantage will part be given in the following description, and part will become apparent from the description below, or is recognized by practice of the present utility model.
Accompanying drawing explanation
Above-mentioned and/or additional aspect of the present utility model and advantage will be apparent from easy to understand, wherein from combining the accompanying drawings below description to embodiment:
Fig. 1 shows the structural representation of the SPM in correlation technique；
Fig. 2 shows the external circuit schematic diagram of SPM；
Fig. 3 shows that current signal triggers the out-of-work waveform diagram of SPM；
Fig. 4 shows a kind of waveform diagram of the noise of the SPM generation in correlation technique；
Fig. 5 shows the another kind of waveform diagram of the noise of the SPM generation in correlation technique；
Fig. 6 shows the structural representation of the SPM according to embodiment of the present utility model；
Fig. 7 shows the internal structure schematic diagram of the adaptive circuit according to embodiment of the present utility model.
Detailed description of the invention
In order to be more clearly understood that above-mentioned purpose of the present utility model, feature and advantage, with detailed description of the invention, this utility model is further described in detail below in conjunction with the accompanying drawings.It should be noted that in the case of not conflicting, the feature in embodiments herein and embodiment can be mutually combined.
Elaborate a lot of detail in the following description so that fully understanding this utility model; but; this utility model can be implemented to use other to be different from other modes described here, and therefore, protection domain of the present utility model is not limited by following public specific embodiment.
Fig. 6 shows the structural representation of the SPM according to embodiment of the present utility model.
As shown in Figure 6, according to the SPM of embodiment of the present utility model, including: HVIC pipe 1101 and adaptive circuit 1105.
The VCC end of HVIC pipe 1101 is as the low-pressure area power supply anode VDD of SPM 1100, and VDD is generally 15V；
Inside HVIC pipe 1101:
ITRIP end connects the first input end of adaptive circuit 1105；PFCINP end connects the second input of adaptive circuit 1105；VCC end connects the power supply anode of adaptive circuit 1105；GND end connects the power supply negative terminal of adaptive circuit 1105；The outfan of adaptive circuit 1105 is designated as ICON, for controlling HIN1～HIN3, LIN1～LIN3, the effectiveness of PFCINP signal.
HVIC pipe 1101 is internal also has boostrap circuit structure as follows:
VCC end is connected with bootstrap diode 1102, bootstrap diode 1103, the anode of bootstrap diode 1104；The negative electrode of bootstrap diode 1102 is connected with the VB1 of HVIC pipe 1101；The negative electrode of bootstrap diode 1103 is connected with the VB2 of HVIC pipe 1101；The negative electrode of bootstrap diode 1104 is connected with the VB3 of HVIC pipe 1101.
Brachium pontis signal input part UHIN in the U phase that HIN1 end is SPM 1100 of HVIC pipe 1101；Brachium pontis signal input part VHIN in the V phase that HIN2 end is SPM 1100 of HVIC pipe 1101；Brachium pontis signal input part WHIN in the W phase that HIN3 end is SPM 1100 of HVIC pipe 1101；The lower brachium pontis signal input part ULIN of the U phase that LIN1 end is SPM 1100 of HVIC pipe 1101；The lower brachium pontis signal input part VLIN of the V phase that LIN2 end is SPM 1100 of HVIC pipe 1101；The lower brachium pontis signal input part WLIN of the W phase that LIN3 end is SPM 1100 of HVIC pipe 1101；The MTRIP end that ITRIP end is SPM 1100 of HVIC pipe 1101；The PFCINP end of HVIC pipe 1101 controls input PFCIN as the PFC of SPM 100；The GND end of HVIC pipe 1101 is as the low-pressure area power supply negative terminal COM of SPM 1100.Wherein, SPM 1100 UHIN, VHIN, WHIN, ULIN, VLIN, WLIN six tunnel input and PFCIN end receive 0V or 5V input signal.
The VB1 end of HVIC pipe 1101 connects one end of electric capacity 1131, and as the U phase higher-pressure region power supply anode UVB of SPM 1100；The HO1 end of HVIC pipe 1101 is connected with the grid of brachium pontis IGBT pipe 1121 in U phase；The VS1 end of HVIC pipe 1101 is connected with the emitter-base bandgap grading of IGBT pipe 1121, the anode of FRD pipe 1111, the lower colelctor electrode of brachium pontis IGBT pipe 1124 of U phase, the negative electrode of FRD pipe 1114, the other end of electric capacity 1131, and as the U phase higher-pressure region power supply negative terminal UVS of SPM 1100.
The VB2 end of HVIC pipe 1101 connects one end of electric capacity 1132, and as the V phase higher-pressure region power supply anode VVB of SPM 1100；The HO2 end of HVIC pipe 1101 is connected with the grid of brachium pontis IGBT pipe 1123 in V phase；The VS2 end of HVIC pipe 1101 is connected with the emitter-base bandgap grading of IGBT pipe 1122, the anode of FRD pipe 1112, the lower colelctor electrode of brachium pontis IGBT pipe 1125 of V phase, the negative electrode of FRD pipe 1115, the other end of electric capacity 1132, and as the V phase higher-pressure region power supply negative terminal VVS of SPM 1100.
The VB3 end of HVIC pipe 1101 connects one end of electric capacity 1133, as the W phase higher-pressure region power supply anode WVB of SPM 1100；The HO3 end of HVIC pipe 1101 is connected with the grid of brachium pontis IGBT pipe 1123 in W phase；The VS3 end of HVIC pipe 1101 is connected with the emitter-base bandgap grading of IGBT pipe 1123, the anode of FRD pipe 1113, the lower colelctor electrode of brachium pontis IGBT pipe 1126 of W phase, the negative electrode of FRD pipe 1116, the other end of electric capacity 1133, and as the W phase higher-pressure region power supply negative terminal WVS of SPM 1100.
The LO1 end of HVIC pipe 1101 is connected with the grid of IGBT pipe 1124；The LO2 end of HVIC pipe 1101 is connected with the grid of IGBT pipe 1125；The LO3 end of HVIC pipe 1101 is connected with the grid of IGBT pipe 1126；The emitter-base bandgap grading of IGBT pipe 1124 is connected with the anode of FRD pipe 1114, and as the U phase low reference voltage end UN of SPM 1100；The emitter-base bandgap grading of IGBT pipe 1125 is connected with the anode of FRD pipe 1115, and as the V phase low reference voltage end VN of SPM 1100；The emitter-base bandgap grading of IGBT pipe 1126 is connected with the anode of FRD pipe 1116, and as the W phase low reference voltage end WN of SPM 1100.
VDD is HVIC pipe 1101 power supply anode, and GND is the power supply negative terminal of HVIC pipe 1101；VDD-GND voltage is generally 15V；VB1 and VS1 is respectively positive pole and the negative pole of the power supply of U phase higher-pressure region, and HO1 is the outfan of U phase higher-pressure region；VB2 and VS2 is respectively positive pole and the negative pole of the power supply of V phase higher-pressure region, and HO2 is the outfan of V phase higher-pressure region；VB3 and VS3 is respectively positive pole and the negative pole of the power supply of U phase higher-pressure region, and HO3 is the outfan of W phase higher-pressure region；LO1, LO2, LO3 are respectively U phase, V phase, the outfan of W phase low-pressure area.
The PFCO end of HVIC pipe 1101 is connected with the grid of IGBT pipe 1127；The emitter-base bandgap grading of IGBT pipe 1127 is connected with the anode of FRD pipe 1117, and as the PFC low reference voltage end-VP of SPM 1100；The colelctor electrode of IGBT pipe 1127 is connected with negative electrode, the anode of FRD pipe 1141 of FRD pipe 1117, and as the PFC end of SPM 1100.
The negative electrode of FRD pipe 1141, the colelctor electrode of IGBT pipe 1121, the negative electrode of FRD pipe 1111, the colelctor electrode of IGBT pipe 1122, the negative electrode of FRD pipe 1112, the colelctor electrode of IGBT pipe 1123, the negative electrode of FRD pipe 1113 are connected, and the high voltage input P, P as SPM 1100 typically meets 300V.
The effect of HVIC pipe 1101 is:
When ICON is low level, the logic input signal of the 0 or 5V of input HIN1, HIN2, HIN3 is passed to outfan HO1, HO2, HO3 respectively, the signal of LIN1, LIN2, LIN3 is passed to outfan LO1, LO2, LO3 respectively, the signal of PFCINP is passed to outfan PFCO, wherein HO1 be the logic output signal of VS1 or VS1+15V, HO2 be the logic output signal of VS2 or VS2+15V, HO3 be the logic output signal of VS3 or VS3+15V, LO1, LO2, LO3, PFCO are the logic output signals of 0 or 15V；
When ICON is high level, HO1, HO2, HO3, LO1, LO2, LO3, PFCO are all set to low level.
The effect of adaptive circuit 1105 is:
When real time value ITRIP being detected is less than a certain particular voltage level V1, ICON output low level, the signal normal transmission of PFCINP to PFCO；
When real time value ITRIP being detected is less than a certain particular voltage level V2 more than or equal to V1, ICON output low level, the signal of PFCINP stops being transferred to PFCO a period of time, if the real time value of ITRIP is no larger than V1, the most again allows the signal normal transmission of PFCINP to PFCO；
When real time value ITRIP being detected is more than V2, ICON exports high level；Here, V2 > V1.
As it has been described above, ICON is as the control signal of HVIC pipe 1101, when ICON is low level, HVIC pipe 1101 normally works, and when ICON is high level, HVIC pipe 1101 quits work.
In an embodiment of the present utility model, the particular circuit configurations of adaptive circuit 1105 as it is shown in fig. 7, particularly as follows:
ITRIP connects the positive input terminal of voltage comparator 2010, the positive input terminal of voltage comparator 2014；The anode of the negative input termination voltage source 2018 of voltage comparator 2010；The negative terminal of voltage source 2018 meets GND；The anode of the negative input termination voltage source 2019 of voltage comparator 2014；The negative terminal of voltage source 2019 meets GND；
The triggering end of one of them input sum counter 2011 of the output termination NAND gate 2015 of voltage comparator 2010；One of them input of the output termination NAND gate 2012 of enumerator 2011；PFCINP connects another input of NAND gate 2012；The input of the output termination not gate 2013 of NAND gate 2012；The signal input part of the output termination PFC drive circuit of not gate 2013, the signal output part of PFC drive circuit connects PFCO end；
Another input of the output termination NAND gate 2015 of voltage comparator 2014；The input of the output termination not gate 2016 of NAND gate 2015；The outfan of not gate 2016 is the ICON end of adaptive circuit 1105.
The operation principle of following description above-described embodiment and key parameter value:
The outfan of enumerator 2011 is initiated with high level, it is triggered when triggering end and being high level, outfan output low level after starting counting up, it count down to certain value, the outfan of enumerator 2011 exports high level again, by the setting of this count value, i.e. can regulate the counter output low level persistent period, it is contemplated that this time is adjusted to 5 μ s；Voltage source 2018 is it is contemplated that be designed as 0.5V, and voltage source 2019 is it is contemplated that be designed as 0.6V；
On the basis of above-mentioned parameter, the SPM that the utility model proposes when real work it is possible that situations below:
Situation 1: when ITRIP voltage is < during 0.5V, voltage comparator 2010 output low level, the triggering end of enumerator 2011 is low level, and the outfan of enumerator 2011 keeps high level constant, the outfan level of NAND gate 2012 is anti-phase with PFCINP, the outfan level of not gate 2013 and PFCINP homophase；Further, NAND gate 2015 exports high level, thus not gate 2016 output low level makes ICON output low level.
Situation 2: when ITRIP voltage > 0.6V time, voltage comparator 2010 exports high level, and; voltage comparator 2014 exports high level; NAND gate 2015 output low level, thus not gate 2016 exports high level and makes ICON export high level, SPM 1100 enters guard mode and quits work.
Situation 3: when 0.5V < ITIRP voltage is < during 0.6V, voltage comparator 2010 exports high level, the triggering end of enumerator 2011 is high level, the outfan of enumerator 2011 becomes low level, the outfan high level of NAND gate 2012, the outfan output high level of not gate 2013, thus PFCO is low level；Further, voltage comparator 2014 output low level, thus not gate 2016 output low level makes ICON output low level；
Wherein, within 0.5 μ s time, if ITIRP voltage continue < 0.5V, device 2011 the most to be counted counting terminates, and the outfan of enumerator 2011 recovers high level, recovery situation 1,
Or, within 0.5 μ s time, ITIRP voltage is improved, and all or part of time still has more than 0.5V and the situation less than 0.6V, then PFCO keeps low level, makes PFC part continue to quit work,
Or, within 0.5 μ s time, ITIRP voltage continues to increase to more than 0.6V, then enter the processing procedure of situation 2.
From the technical scheme of above-described embodiment, the SPM that the utility model proposes is completely compatible with existing SPM, can directly be replaced with existing SPM.ITRIP is first with a relatively low voltage ratio relatively, it is ensured that on the premise of the sensitivity to SPM overcurrent protection, stops PFC work by intermittence and takes into account the stability of SPM work；And when ITRIP is higher than a higher voltage, stop SPM work for ensureing the safety of SPM；So that SPM of the present utility model is on the premise of normal protective mechanisms persistently comes into force, maintain the stability of system, availability and vigorousness, improve the user satisfaction of product.
The technical solution of the utility model is described in detail above in association with accompanying drawing, the utility model proposes a kind of new SPM, can be by judging the wiring environment of application circuit voluntarily, control whether pfc circuit gets involved work, it is achieved that while guaranteed efficiency, improve availability and the adaptability of SPM.
The foregoing is only preferred embodiment of the present utility model, be not limited to this utility model, for a person skilled in the art, this utility model can have various modifications and variations.All within spirit of the present utility model and principle, any modification, equivalent substitution and improvement etc. made, within should be included in protection domain of the present utility model.
Claims (10)
1. a SPM, it is characterised in that including:
On three-phase, under brachium pontis signal input part, three-phase, brachium pontis signal input part, three-phase low reference voltage end, current detecting end and PFC control input；
HVIC manages, it is provided with on described HVIC pipe and is respectively connecting on described three-phase the terminals of brachium pontis signal input part under brachium pontis signal input part and described three-phase, and be connected respectively and control the first port and second port of input to described current detecting end and described PFC, it is provided with PFC drive circuit in described HVIC pipe；
Sampling resistor, described three-phase low reference voltage end and described current detecting end be connected to the first end of described sampling resistor, and the second end of described sampling resistor is connected to the low-pressure area power supply negative terminal of described SPM；
Adaptive circuit, the first input end of described adaptive circuit and the second input are connected respectively to described first port and described second port, first outfan of described adaptive circuit is connected to the signal input part of described PFC drive circuit as the Enable Pin of described HVIC pipe, the second outfan of described adaptive circuit；
Wherein, described adaptive circuit is according to the size of the input signal of described first input end, the first outfan by described adaptive circuit exports the enable signal of corresponding level, and is controlled the control signal of described PFC drive circuit by the second outfan output of described adaptive circuit.
SPM the most according to claim 1, it is characterised in that:
Described adaptive circuit is when the value of the input signal of described first input end is less than the first setting value, the enable signal of the first level is exported by described first outfan, to allow the work of described HVIC pipe, and control, by described second outfan output, the control signal that described PFC drive circuit normally works；
Described adaptive circuit is when the value of the input signal of described first input end is more than or equal to described first setting value and is less than the second setting value, the enable signal of described first level, and the control signal of the scheduled duration that quit work by the described second outfan output described PFC drive circuit of control is exported by described first outfan；
Described adaptive circuit is when the value of the input signal of described first input end is more than or equal to described second setting value, by the enable signal of described first outfan output second electrical level, to forbid that described HVIC pipe works.
SPM the most according to claim 1, it is characterised in that described adaptive circuit includes:
First voltage comparator, the positive input terminal of described first voltage comparator is as the first input end of described adaptive circuit, the negative input end of described first voltage comparator is connected to the positive pole of the first voltage source, the negative pole of described first voltage source is connected to the power supply negative pole of described adaptive circuit, the outfan of described first voltage comparator is connected to the first input end of the first NAND gate, and the power supply positive pole of described adaptive circuit and negative pole are connected respectively the low-pressure area power supply anode to described SPM and negative terminal；
Second voltage comparator, the positive input terminal of described second voltage comparator is connected to the positive input terminal of described first voltage comparator, the negative input end of described second voltage comparator is connected to the positive pole of the second voltage source, the negative pole of described second voltage source is connected to the power supply negative pole of described adaptive circuit, the outfan of described second voltage comparator is connected to the second input of described first NAND gate, the outfan of described first NAND gate is connected to the input of the first not gate, and the outfan of described first not gate is as the first outfan of described adaptive circuit；
Second NAND gate, the first input end of described second NAND gate is as the second input of described adaptive circuit, second input of described second NAND gate is connected to the outfan of enumerator, the input of described enumerator is connected to the outfan of described first voltage comparator, the outfan of described second NAND gate is connected to the input of the second not gate, and the outfan of described second not gate is as the second outfan of described adaptive circuit.
SPM the most according to claim 1, it is characterised in that be additionally provided with the signal output part of PFC drive circuit on described HVIC pipe, described SPM also includes:
First power switch pipe and the first diode, the anode of described first diode is connected to the emitter stage of described first power switch pipe, the negative electrode of described first diode is connected to the colelctor electrode of described first power switch pipe, the colelctor electrode of described first power switch pipe is connected to the anode of the second diode, the negative electrode of described second diode is connected to the high voltage input of described SPM, the base stage of described first power switch pipe is connected to the signal output part of described PFC drive circuit, the emitter stage of described first power switch pipe is as the PFC low reference voltage end of described SPM, the colelctor electrode of described first power switch pipe is as the PFC end of described SPM.
SPM the most according to any one of claim 1 to 4, it is characterised in that also include: boostrap circuit, described boostrap circuit includes:
First bootstrap diode, the anode of described first bootstrap diode is connected to the low-pressure area power supply anode of described SPM, and the negative electrode of described first bootstrap diode is connected to the U phase higher-pressure region power supply anode of described SPM；
Second bootstrap diode, the anode of described second bootstrap diode is connected to the low-pressure area power supply anode of described SPM, and the negative electrode of described second bootstrap diode is connected to the V phase higher-pressure region power supply anode of described SPM；
3rd bootstrap diode, the anode of described 3rd bootstrap diode is connected to the low-pressure area power supply anode of described SPM, and the negative electrode of described 3rd bootstrap diode is connected to the W phase higher-pressure region power supply anode of described SPM.
SPM the most according to any one of claim 1 to 4, it is characterised in that also include:
Bridge arm circuit on three-phase, the signal output part of corresponding phase during the input of bridge arm circuit is connected to the three-phase high-voltage district of described HVIC pipe in each phase in bridge arm circuit on described three-phase；
Bridge arm circuit under three-phase, the signal output part of corresponding phase during the input of bridge arm circuit is connected to the three-phase low-voltage district of described HVIC pipe under each phase in bridge arm circuit under described three-phase.
SPM the most according to claim 6, it is characterised in that in described each phase, bridge arm circuit includes:
Second power switch pipe and the 3rd diode, the anode of described 3rd diode is connected to the emitter stage of described second power switch pipe, the negative electrode of described 3rd diode is connected to the colelctor electrode of described second power switch pipe, the colelctor electrode of described second power switch pipe is connected to the high voltage input of described SPM, the base stage of described second power switch pipe is as the input of bridge arm circuit in described each phase, and the emitter stage of described second power switch pipe is connected to the higher-pressure region power supply negative terminal of described SPM correspondence phase.
SPM the most according to claim 7, it is characterised in that under described each phase, bridge arm circuit includes:
3rd power switch pipe and the 4th diode, the anode of described 4th diode is connected to the emitter stage of described 3rd power switch pipe, the negative electrode of described 4th diode is connected to the colelctor electrode of described 3rd power switch pipe, the colelctor electrode of described 3rd power switch pipe is connected to the anode of described 3rd diode in the upper bridge arm circuit of correspondence, the base stage of described 3rd power switch pipe is as the input of bridge arm circuit under described each phase, and the emitter stage of described 3rd power switch pipe is as the low reference voltage end of the corresponding phase of described SPM.
9., according to the SPM described in claim 7 or 8, it is characterised in that the voltage of the high voltage input of described SPM is 300V, connect between anode and the negative terminal of each phase higher-pressure region power supply of described SPM and have filter capacitor.
10. an air-conditioner, it is characterised in that including: SPM as claimed in any one of claims 1-9 wherein.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620177059.2U CN205453541U (en) | 2016-03-08 | 2016-03-08 | Intelligence power module and air conditioner |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620177059.2U CN205453541U (en) | 2016-03-08 | 2016-03-08 | Intelligence power module and air conditioner |
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| Publication Number | Publication Date |
|---|---|
| CN205453541U true CN205453541U (en) | 2016-08-10 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
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| CN201620177059.2U Withdrawn - After Issue CN205453541U (en) | 2016-03-08 | 2016-03-08 | Intelligence power module and air conditioner |
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| CN (1) | CN205453541U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105577019A (en) * | 2016-03-08 | 2016-05-11 | 广东美的制冷设备有限公司 | Intelligent power module and air conditioner |
| CN110601602A (en) * | 2018-06-13 | 2019-12-20 | 重庆美的制冷设备有限公司 | Drive IC circuit of intelligent power module, intelligent power module and air conditioner |
-
2016
- 2016-03-08 CN CN201620177059.2U patent/CN205453541U/en not_active Withdrawn - After Issue
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105577019A (en) * | 2016-03-08 | 2016-05-11 | 广东美的制冷设备有限公司 | Intelligent power module and air conditioner |
| CN105577019B (en) * | 2016-03-08 | 2018-02-02 | 广东美的制冷设备有限公司 | SPM and air conditioner |
| CN110601602A (en) * | 2018-06-13 | 2019-12-20 | 重庆美的制冷设备有限公司 | Drive IC circuit of intelligent power module, intelligent power module and air conditioner |
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