CN105577016A - Intelligent power module and air conditioner - Google Patents
Intelligent power module and air conditioner Download PDFInfo
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- CN105577016A CN105577016A CN201610126189.8A CN201610126189A CN105577016A CN 105577016 A CN105577016 A CN 105577016A CN 201610126189 A CN201610126189 A CN 201610126189A CN 105577016 A CN105577016 A CN 105577016A
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- 230000000630 rising effect Effects 0.000 claims abstract description 14
- 230000003044 adaptive effect Effects 0.000 claims description 51
- 230000000087 stabilizing effect Effects 0.000 claims description 11
- 238000005070 sampling Methods 0.000 claims description 6
- GOLXNESZZPUPJE-UHFFFAOYSA-N spiromesifen Chemical compound CC1=CC(C)=CC(C)=C1C(C(O1)=O)=C(OC(=O)CC(C)(C)C)C11CCCC1 GOLXNESZZPUPJE-UHFFFAOYSA-N 0.000 claims description 2
- 238000001514 detection method Methods 0.000 abstract description 2
- 238000000034 method Methods 0.000 description 8
- 238000011084 recovery Methods 0.000 description 8
- 238000010586 diagram Methods 0.000 description 7
- 102100027206 CD2 antigen cytoplasmic tail-binding protein 2 Human genes 0.000 description 6
- 101000914505 Homo sapiens CD2 antigen cytoplasmic tail-binding protein 2 Proteins 0.000 description 6
- 101000739160 Homo sapiens Secretoglobin family 3A member 1 Proteins 0.000 description 6
- 102100037268 Secretoglobin family 3A member 1 Human genes 0.000 description 6
- 101100181929 Caenorhabditis elegans lin-3 gene Proteins 0.000 description 5
- 238000004378 air conditioning Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 230000001960 triggered effect Effects 0.000 description 3
- 240000003550 Eusideroxylon zwageri Species 0.000 description 2
- 101000922137 Homo sapiens Peripheral plasma membrane protein CASK Proteins 0.000 description 2
- 102100031166 Peripheral plasma membrane protein CASK Human genes 0.000 description 2
- 240000003864 Ulex europaeus Species 0.000 description 2
- 235000010730 Ulex europaeus Nutrition 0.000 description 2
- 230000009514 concussion Effects 0.000 description 2
- 230000006378 damage Effects 0.000 description 2
- 238000010304 firing Methods 0.000 description 2
- 240000002853 Nelumbo nucifera Species 0.000 description 1
- 235000006508 Nelumbo nucifera Nutrition 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000003750 conditioning effect Effects 0.000 description 1
- 238000012937 correction Methods 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 230000002045 lasting effect Effects 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 238000003672 processing method Methods 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
- H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Inverter Devices (AREA)
- Power Conversion In General (AREA)
Abstract
The invention provides an intelligent power module and an air conditioner. An HVIC transistor in the intelligent power module is provided with wiring terminals connected to three-phase upper bridge arm signal input ends and three-phase lower bridge arm signal input ends respectively, and a first port corresponding to a current detection end and a second port corresponding to a PFC control input end; a first input end and a second input end of a self-adaption circuit are connected to the first port and the second port respectively, and an output end of the self-adaption circuit serves as an enablement end of the HVIC transistor; the self-adaption circuit outputs corresponding level enablement signals according to the relation between the value of the input signal of the first input end and a first preset value when the temperature of the IPM is lower than a preset temperature value; and the self-adaption circuit outputs corresponding level enablement signals according to information of whether the input signal of the second input end is in a rising edge, and the relation between the value of the input signal of the first input end and a second preset value or the first preset value when the temperature of the IPM is larger than the preset temperature value, wherein the second preset value is larger than the first preset value.
Description
Technical field
The present invention relates to Intelligent Power Module technical field, in particular to a kind of Intelligent Power Module and a kind of air conditioner.
Background technology
Intelligent Power Module (IntelligentPowerModule, be called for short IPM) be a kind of analog line driver that power electronics discrete device and integrated circuit technique are integrated, Intelligent Power Module comprises device for power switching and high-voltage driving circuit, and with overvoltage, overcurrent and the failure detector circuit such as overheated.The logic input terminal of Intelligent Power Module receives the control signal of master controller, and output drives compressor or subsequent conditioning circuit work, sends the system status signal detected back to master controller simultaneously.Relative to traditional discrete scheme; Intelligent Power Module has the advantages such as high integration, high reliability, self-inspection and protective circuit; being particularly suitable for the frequency converter of drive motors and various inverter, is the desired power level electronic device of frequency control, metallurgical machinery, electric traction, servo-drive, frequency-conversion domestic electric appliances.
The structural representation of existing Intelligent power module circuit as shown in Figure 1, as current detecting end, protect Intelligent Power Module 100 with the size of current that basis detects by MTRIP port.PFCIN port is as PFC (PowerFactorCorrection, the power factor correction) control input end of Intelligent Power Module.
In the Intelligent Power Module course of work, PFCINP end frequently switches between low and high level by certain frequency, make that IGBT pipe 127 continues to be on off state and FRD pipe 141 continues to be in freewheeling state, this frequency be generally LIN1 ~ LIN3,2 ~ 4 times of HIN1 ~ HIN3 switching frequency, and not contact directly with the switching frequency of LIN1 ~ LIN3, HIN1 ~ HIN3.
As shown in Figure 2, UN, VN, WN connect one end of milliohm resistance 138, another termination GND, MTRIP of milliohm resistance 138 are current detecting pins, connect one end of milliohm resistance 138, by detecting the pressure drop measuring and calculating electric current of milliohm resistance, as shown in Figure 3, when current is excessive, Intelligent Power Module 100 is made to quit work, avoid because of overcurrent produce overheated after, permanent damage is produced to Intelligent Power Module 100.
-VP, COM, UN, VN, WN have electrical connection in actual use.Therefore, current noise when voltage noise during IGBT pipe 121 ~ IGBT pipe 127 switch and FRD pipe 111 ~ FRD pipe 116,131 afterflow of FRD pipe all can intercouple, and impacts the input pin of each low-voltage area.
In each input pin, the threshold value of HIN1 ~ HIN3, LIN1 ~ LIN3, PFCINP is generally at about 2.3V, and the threshold voltage of ITRIP generally only has below 0.5V, and therefore, ITRIP is the pin be the most easily interfered.When ITRIP is triggered, Intelligent Power Module 100 will quit work, and because now really there is not overcurrent, so ITRIP triggering now belongs to false triggering.As shown in Figure 4, be high level at PFCIN, when moment opened by IGBT pipe 127, because the existence of the reverse recovery current of FRD pipe 131, superpose out I
131current waveform, this electric current has larger concussion noise, passes through-VP, COM, UN, VN, WN electrical connection in peripheral circuit, and concussion noise can close out certain voltage and raise by lotus root at MTRIP end.If the condition making MTRIP trigger is: voltage >Vth, and duration >Tth; In the diagram, if Ta<Tth<Tb, then make MTRIP produce false triggering too high being not enough to of the voltage in first three cycle, to the 4th cycle, MTRIP will produce false triggering.
In fact, because the reverse recovery time of FRD pipe and reverse recovery current are positive temperature coefficients, temperature is higher, reverse recovery time is longer, so, along with the continuous firing of system, the constant temperature of Intelligent Power Module 100 rises, and the probability that MTRIP is triggered is increasing, as shown in Figure 5, at 25 DEG C, the voltage fluctuation that the Reverse recovery effect of FRD causes is not enough to cause MTRIP to trigger, and along with temperature rising, 75 DEG C time, MTRIP is triggered, and makes system stalls.Although this false triggering can recover over time and can not form destruction to system, puzzlement can be caused to user undoubtedly.As the application scenario for transducer air conditioning, time the higher user just of ambient temperature more needs air-conditioning system continuous firing, but high ambient temperature can make increase the reverse recovery time of FRD pipe, MTRIP improves by the probability of false triggering, once MTRIP is by false triggering, air-conditioning system can quit work 3 ~ 5 minutes because thinking generation overcurrent by mistake, makes user during this period of time cannot obtain cold wind, and this causes air-conditioning system because refrigerating capacity deficiency is by the one of the main reasons of customer complaint.
Therefore, how to guarantee under the prerequisite that Intelligent Power Module can normally work at normal temperatures, effectively reducing Intelligent Power Module and at high temperature become technical problem urgently to be resolved hurrily by the probability of false triggering.
Summary of the invention
The present invention is intended at least to solve one of technical problem existed in prior art or correlation technique.
For this reason, one object of the present invention is to propose a kind of new Intelligent Power Module, can guarantee under the prerequisite that Intelligent Power Module can normally work at normal temperatures, effectively reduces Intelligent Power Module at high temperature by the probability of false triggering.
Another object of the present invention is to propose a kind of air conditioner.
For achieving the above object, embodiment according to a first aspect of the invention, propose a kind of Intelligent Power Module, comprising: brachium pontis signal input part, three-phase low reference voltage end, current detecting end and PFC control input end under brachium pontis signal input part, three-phase on three-phase; HVIC (HighVoltageIntegratedCircuit, high voltage integrated circuit) pipe, described HVIC pipe is provided with the terminals being connected to brachium pontis signal input part under brachium pontis signal input part and described three-phase on described three-phase respectively, and correspond to the first port of described current detecting end and correspond to the second port of described PFC control input end, described first port is connected with described current detecting end by connecting line, and described second port is connected with described PFC control input end by connecting line; Sampling resistor, described three-phase low reference voltage end and described current detecting end are all connected to the first end of described sampling resistor, and the second end of described sampling resistor is connected to the low-pressure area power supply negative terminal of described Intelligent Power Module; Adaptive circuit, the power supply positive pole of described adaptive circuit and negative pole are connected to low-pressure area power supply anode and the negative terminal of described Intelligent Power Module respectively, the first input end of described adaptive circuit is connected to described first port, second input of described adaptive circuit is connected to described second port, and the output of described adaptive circuit is as the Enable Pin of described HVIC pipe;
Wherein, described adaptive circuit, when the temperature of described Intelligent Power Module is lower than predetermined temperature value, exports the enable signal of corresponding level according to the magnitude relationship between the value of the input signal of described first input end and the first set point; Described adaptive circuit is when the temperature of described Intelligent Power Module is higher than described predetermined temperature value, whether the input signal according to described second input is in rising edge, and the magnitude relationship between the value of the input signal of described first input end and the second set point or described first set point exports the enable signal of corresponding level, described second set point is greater than described first set point.
Intelligent Power Module according to an embodiment of the invention, when the temperature of Intelligent Power Module is lower than predetermined temperature value, by input signal (i.e. first port of the first input end according to adaptive circuit, also i.e. current detecting end) value and the first set point between magnitude relationship export the enable signal of corresponding level, make when the temperature of Intelligent Power Module is lower, the signal value that adaptive circuit can detect according to current detecting end is made a response, namely when the signal value that detects of current detecting end is larger, timely output control HVIC manages out-of-work enable signal, when the signal value that current detecting end detects is less, export the enable signal of control HVIC pipe work, to guarantee that Intelligent Power Module can normally work under normal temperature (time namely lower than predetermined temperature value), and carry out overcurrent protection.
When the temperature of Intelligent Power Module is higher than predetermined temperature value, by according to the second input (i.e. the second port, also i.e. PFC control input end) input signal whether be in rising edge, and the magnitude relationship between the value of the input signal of first input end and the second set point or the first set point exports the enable signal of corresponding level, make when the temperature of Intelligent Power Module is higher, the circuit noise that the signal that PFC control input end inputs produces at rising edge can be considered, when the signal that simultaneously can input in PFC control input end is at rising edge, determine whether that exporting control HVIC manages out-of-work enable signal by larger the second set point (compared to the first set point) as standard, and then can effectively reduce when Intelligent Power Module at high temperature works by the probability of false triggering.
Intelligent Power Module according to the abovementioned embodiments of the present invention, can also have following technical characteristic:
According to one embodiment of present invention, described adaptive circuit when the temperature of described Intelligent Power Module is lower than described predetermined temperature value,
If the value of the input signal of described first input end is more than or equal to described first set point, then export the enable signal of the first level, to forbid the work of described HVIC pipe, and
If the value of the input signal of described first input end is less than described first set point, then export the enable signal of second electrical level, to allow the work of described HVIC pipe.
Wherein, the enable signal of the first level can be low level signal, and the enable signal of second electrical level can be high level signal.
According to one embodiment of present invention, described adaptive circuit when the temperature of described Intelligent Power Module is higher than described predetermined temperature value,
When the input signal of described second input be in non-increasing along time, if the value of the input signal of described first input end is more than or equal to described first set point, then export the enable signal of described first level; Otherwise, export the enable signal of described second electrical level, and
When the input signal of described second input is in rising edge, if the value of the input signal of described first input end is more than or equal to described second set point and continue scheduled duration, then export the enable signal of described first level; Otherwise, export the enable signal of described second electrical level.
According to one embodiment of present invention, described adaptive circuit comprises:
The first not gate be connected in series and the second not gate, the input of described first not gate is as the second input of described adaptive circuit, and the output of described second not gate is connected to the first input end of the first NAND gate;
The 3rd not gate be connected in series, the 4th not gate and the 5th not gate, the input of described 3rd not gate is connected to the input of described first not gate, the output of described 5th not gate is connected to the second input of described first NAND gate, the output of described first NAND gate is connected to the input of the 6th not gate, and the output of described 6th not gate is connected to the first input end of the second NAND gate;
First electric capacity, between the input being connected to described 4th not gate and the power supply negative pole of described adaptive circuit;
Second electric capacity, between the input being connected to described 5th not gate and the power supply negative pole of described adaptive circuit;
First resistance, the first end of described first resistance is connected to the power supply positive pole of described adaptive circuit, second end of described first resistance is connected to the negative electrode of voltage stabilizing didoe, and the anode of described voltage stabilizing didoe is connected to the power supply negative pole of described adaptive circuit;
Second resistance, the first end of described second resistance is connected to the second end of described first resistance, and the second end of described second resistance is connected to the positive input terminal of the first voltage comparator;
Thermistor, the first end of described thermistor is connected to the second end of described second resistance, and the second end of described thermistor is connected to the anode of described voltage stabilizing didoe;
First voltage source, the negative pole of described first voltage source is connected to the anode of described voltage stabilizing didoe, the positive pole of described first voltage source is connected to the negative input end of described first voltage comparator, the output of described first voltage comparator is connected to the second input of described second NAND gate, the output of described second NAND gate is connected to the input of the 7th not gate, and the output of described 7th not gate is connected to the control end of analog switch;
Second voltage comparator, the positive input terminal of described second voltage comparator is as the first input end of described adaptive circuit, the negative input end of described second voltage comparator is connected to the positive pole of the second voltage source, the negative pole of described second voltage source is connected to the power supply negative pole of described adaptive circuit, and the output of described second voltage comparator is connected to the first selecting side of described analog switch and the first input end of the 3rd NAND gate;
Tertiary voltage comparator, the positive input terminal of described tertiary voltage comparator is connected to the positive input terminal of described second voltage comparator, the negative input end of described tertiary voltage comparator is connected to the positive pole in tertiary voltage source, the negative pole in described tertiary voltage source is connected to the power supply negative pole of described adaptive circuit, and the output of described tertiary voltage comparator is connected to the second input of described 3rd NAND gate;
4th voltage comparator, the positive input terminal of described 4th voltage comparator is connected to the positive input terminal of described second voltage comparator, the negative input end of described 4th voltage comparator is connected to the positive pole of the 4th voltage source, the negative pole of described 4th voltage source is connected to the power supply negative pole of described adaptive circuit, the output of described 4th voltage comparator is connected to the 3rd input of described 3rd NAND gate, the output of described 3rd NAND gate is connected to the input of the 8th not gate, the output of described 8th not gate is connected to the second selecting side of described analog switch, the stiff end of described analog switch is connected to the input of the 9th not gate, the output of described 9th not gate is as the output of described adaptive circuit.
According to one embodiment of present invention, described HVIC pipe is also provided with the signal output part of PFC drive circuit, described Intelligent Power Module also comprises:
First power switch pipe and the first diode, the anode of described first diode is connected to the emitter of described first power switch pipe, the negative electrode of described first diode is connected to the collector electrode of described first power switch pipe, the collector electrode of described first power switch pipe is connected to the anode of the second diode, the negative electrode of described second diode is connected to the high voltage input of described Intelligent Power Module, the base stage of described first power switch pipe is connected to the signal output part of described PFC drive circuit, the emitter of described first power switch pipe is as the PFC low reference voltage end of described Intelligent Power Module, the collector electrode of described first power switch pipe is held as the PFC of described Intelligent Power Module.
Wherein, the first power switch pipe can be IGBT (InsulatedGateBipolarTransistor, insulated gate bipolar transistor).
According to one embodiment of present invention, also comprise: boostrap circuit, described boostrap circuit comprises:
First bootstrap diode, the anode of described first bootstrap diode is connected to the low-pressure area power supply anode of described Intelligent Power Module, and the negative electrode of described first bootstrap diode is connected to the U phase higher-pressure region power supply anode of described Intelligent Power Module; Second bootstrap diode, the anode of described second bootstrap diode is connected to the low-pressure area power supply anode of described Intelligent Power Module, and the negative electrode of described second bootstrap diode is connected to the V phase higher-pressure region power supply anode of described Intelligent Power Module; 3rd bootstrap diode, the anode of described 3rd bootstrap diode is connected to the low-pressure area power supply anode of described Intelligent Power Module, and the negative electrode of described 3rd bootstrap diode is connected to the W phase higher-pressure region power supply anode of described Intelligent Power Module.
According to one embodiment of present invention, also comprise: bridge arm circuit on three-phase, in each phase on described three-phase in bridge arm circuit, the input of bridge arm circuit is connected to the signal output part of corresponding phase in the three-phase high-voltage district of described HVIC pipe; Bridge arm circuit under three-phase, under each phase under described three-phase in bridge arm circuit, the input of bridge arm circuit is connected to the signal output part of corresponding phase in the three-phase low-voltage district of described HVIC pipe.
Wherein, on three-phase, bridge arm circuit comprises: bridge arm circuit in bridge arm circuit, W phase in bridge arm circuit, V phase in U phase; Under three-phase, bridge arm circuit comprises: the lower bridge arm circuit of the lower bridge arm circuit of U phase, V phase, the lower bridge arm circuit of W phase.
According to one embodiment of present invention, in each phase described, bridge arm circuit comprises: the second power switch pipe and the 3rd diode, the anode of described 3rd diode is connected to the emitter of described second power switch pipe, the negative electrode of described 3rd diode is connected to the collector electrode of described second power switch pipe, the collector electrode of described second power switch pipe is connected to the high voltage input of described Intelligent Power Module, the base stage of described second power switch pipe is as the input of bridge arm circuit in each phase described, the emitter of described second power switch pipe is connected to the higher-pressure region power supply negative terminal of the corresponding phase of described Intelligent Power Module.Wherein, the second power switch pipe can be IGBT.
According to one embodiment of present invention, under each phase described, bridge arm circuit comprises: the 3rd power switch pipe and the 4th diode, the anode of described 4th diode is connected to the emitter of described 3rd power switch pipe, the negative electrode of described 4th diode is connected to the collector electrode of described 3rd power switch pipe, the collector electrode of described 3rd power switch pipe is connected to the anode of described 3rd diode in corresponding upper bridge arm circuit, the base stage of described 3rd power switch pipe is as the input of bridge arm circuit under each phase described, the emitter of described 3rd power switch pipe is as the low reference voltage end of the corresponding phase of described Intelligent Power Module.Wherein, the 3rd power switch pipe can be IGBT.
According to one embodiment of present invention, the voltage of the high voltage input of described Intelligent Power Module is 300V.
According to one embodiment of present invention, filter capacitor is connected with between the anode of each phase higher-pressure region power supply of described Intelligent Power Module and negative terminal.
Embodiment according to a second aspect of the present invention, also proposed a kind of air conditioner, comprising: as the Intelligent Power Module described in above-mentioned any one embodiment.
Additional aspect of the present invention and advantage will part provide in the following description, and part will become obvious from the following description, or be recognized by practice of the present invention.
Accompanying drawing explanation
Above-mentioned and/or additional aspect of the present invention and advantage will become obvious and easy understand from accompanying drawing below combining to the description of embodiment, wherein:
Fig. 1 shows the structural representation of the Intelligent Power Module in correlation technique;
Fig. 2 shows the external circuit schematic diagram of Intelligent Power Module;
Fig. 3 shows current signal and triggers the out-of-work waveform schematic diagram of Intelligent Power Module;
Fig. 4 shows a kind of waveform schematic diagram of the noise that the Intelligent Power Module in correlation technique produces;
Fig. 5 shows the another kind of waveform schematic diagram of the noise that the Intelligent Power Module in correlation technique produces;
Fig. 6 shows the structural representation of Intelligent Power Module according to an embodiment of the invention;
Fig. 7 shows the internal structure schematic diagram of adaptive circuit according to an embodiment of the invention.
Embodiment
In order to more clearly understand above-mentioned purpose of the present invention, feature and advantage, below in conjunction with the drawings and specific embodiments, the present invention is further described in detail.It should be noted that, when not conflicting, the feature in the embodiment of the application and embodiment can combine mutually.
Set forth a lot of detail in the following description so that fully understand the present invention; but; the present invention can also adopt other to be different from other modes described here and implement, and therefore, protection scope of the present invention is not by the restriction of following public specific embodiment.
Fig. 6 shows the structural representation of Intelligent Power Module according to an embodiment of the invention.
As shown in Figure 6, Intelligent Power Module according to an embodiment of the invention, comprising: HVIC pipe 1101 and adaptive circuit 1105.
The VCC of HVIC pipe 1101 holds the low-pressure area power supply anode VDD as Intelligent Power Module 1100, and VDD is generally 15V;
Inner at HVIC pipe 1101:
ITRIP end connects the first input end of adaptive circuit 1105; PININP end connects the second input of adaptive circuit 1105; VCC end connects the power supply anode of adaptive circuit 1105; GND end connects the power supply negative terminal of adaptive circuit 1105; The output of adaptive circuit 1105 is designated as ICON, for the validity of control HIN1 ~ HIN3, LIN1 ~ LIN3, PFCINP signal.
HVIC pipe 1101 inside also has boostrap circuit structure as follows:
VCC end is connected with the anode of bootstrap diode 1102, bootstrap diode 1103, bootstrap diode 1104; The negative electrode of bootstrap diode 1102 is connected with the VB1 of HVIC pipe 1101; The negative electrode of bootstrap diode 1103 is connected with the VB2 of HVIC pipe 1101; The negative electrode of bootstrap diode 1104 is connected with the VB3 of HVIC pipe 1101.
HVIC pipe 1101 HIN1 end for Intelligent Power Module 1100 U phase on brachium pontis signal input part UHIN; HVIC pipe 1101 HIN2 end for Intelligent Power Module 1100 V phase on brachium pontis signal input part VHIN; HVIC pipe 1101 HIN3 end for Intelligent Power Module 1100 W phase on brachium pontis signal input part WHIN; The LIN1 end of HVIC pipe 1101 is the lower brachium pontis signal input part ULIN of U phase of Intelligent Power Module 1100; The LIN2 end of HVIC pipe 1101 is the lower brachium pontis signal input part VLIN of V phase of Intelligent Power Module 1100; The LIN3 end of HVIC pipe 1101 is the lower brachium pontis signal input part WLIN of W phase of Intelligent Power Module 1100; The ITRIP of HVIC pipe 1101 holds as the MTRIP of Intelligent Power Module 1100 holds; The PFCINP of HVIC pipe 1101 holds the PFC control input end PFCIN as Intelligent Power Module 100; The GND of HVIC pipe 1101 holds the low-pressure area power supply negative terminal COM as Intelligent Power Module 1100.Wherein, Intelligent Power Module 1100 UHIN, VHIN, WHIN, ULIN, VLIN, WLIN six tunnel input and PFCIN termination receive the input signal of 0V or 5V.
The VB1 end of HVIC pipe 1101 connects one end of electric capacity 1131, and as the U phase higher-pressure region power supply anode UVB of Intelligent Power Module 1100; The HO1 end of HVIC pipe 1101 is connected with the grid of brachium pontis IGBT pipe 1121 in U phase; The VS1 end of HVIC pipe 1101 is connected with the anode of the emitter-base bandgap grading of IGBT pipe 1121, FRD pipe 1111, the collector electrode of the lower brachium pontis IGBT pipe 1124 of U phase, the negative electrode of FRD pipe 1114, the other end of electric capacity 1131, and as the U phase higher-pressure region power supply negative terminal UVS of Intelligent Power Module 1100.
The VB2 end of HVIC pipe 1101 connects one end of electric capacity 1132, and as the V phase higher-pressure region power supply anode VVB of Intelligent Power Module 1100; The HO2 end of HVIC pipe 1101 is connected with the grid of brachium pontis IGBT pipe 1123 in V phase; The VS2 end of HVIC pipe 1101 is connected with the anode of the emitter-base bandgap grading of IGBT pipe 1122, FRD pipe 1112, the collector electrode of the lower brachium pontis IGBT pipe 1125 of V phase, the negative electrode of FRD pipe 1115, the other end of electric capacity 1132, and as the V phase higher-pressure region power supply negative terminal VVS of Intelligent Power Module 1100.
The VB3 end of HVIC pipe 1101 connects one end of electric capacity 1133, as the W phase higher-pressure region power supply anode WVB of Intelligent Power Module 1100; The HO3 end of HVIC pipe 1101 is connected with the grid of brachium pontis IGBT pipe 1123 in W phase; The VS3 end of HVIC pipe 1101 is connected with the anode of the emitter-base bandgap grading of IGBT pipe 1123, FRD pipe 1113, the collector electrode of the lower brachium pontis IGBT pipe 1126 of W phase, the negative electrode of FRD pipe 1116, the other end of electric capacity 1133, and as the W phase higher-pressure region power supply negative terminal WVS of Intelligent Power Module 1100.
The LO1 end of HVIC pipe 1101 is connected with the grid of IGBT pipe 1124; The LO2 end of HVIC pipe 1101 is connected with the grid of IGBT pipe 1125; The LO3 end of HVIC pipe 1101 is connected with the grid of IGBT pipe 1126; The emitter-base bandgap grading of IGBT pipe 1124 is connected with the anode of FRD pipe 1114, and as the U phase low reference voltage end UN of Intelligent Power Module 1100; The emitter-base bandgap grading of IGBT pipe 1125 is connected with the anode of FRD pipe 1115, and as the V phase low reference voltage end VN of Intelligent Power Module 1100; The emitter-base bandgap grading of IGBT pipe 1126 is connected with the anode of FRD pipe 1116, and as the W phase low reference voltage end WN of Intelligent Power Module 1100.
VDD is HVIC pipe 1101 power supply anode, and GND is the power supply negative terminal of HVIC pipe 1101; VDD-GND voltage is generally 15V; VB1 and VS1 is respectively positive pole and the negative pole of the power supply of U phase higher-pressure region, and HO1 is the output of U phase higher-pressure region; VB2 and VS2 is respectively positive pole and the negative pole of the power supply of V phase higher-pressure region, and HO2 is the output of V phase higher-pressure region; VB3 and VS3 is respectively positive pole and the negative pole of the power supply of U phase higher-pressure region, and HO3 is the output of W phase higher-pressure region; LO1, LO2, LO3 are respectively the output of U phase, V phase, W phase low-pressure area.
The PFCO end of HVIC pipe 1101 is connected with the grid of IGBT pipe 1127; The emitter-base bandgap grading of IGBT pipe 1127 is connected with the anode of FRD pipe 1117, and as the PFC low reference voltage end-VP of Intelligent Power Module 1100; The collector electrode of IGBT pipe 1127 is connected with the anode of the negative electrode of FRD pipe 1117, FRD pipe 1141, and holds as the PFC of Intelligent Power Module 1100;
The negative electrode of the collector electrode of the collector electrode of the collector electrode of IGBT pipe 1121, the negative electrode of FRD pipe 1111, IGBT pipe 1122, the negative electrode of FRD pipe 1112, IGBT pipe 1123, the negative electrode of FRD pipe 1113, FRD pipe 1141 is connected, and as the high voltage input P of Intelligent Power Module 1100, P generally meets 300V.
The effect of HVIC pipe 1101 is:
When ICON is high level, the logic input signal of 0 of input HIN1, HIN2, HIN3 or 5V is passed to output HO1, HO2, HO3 respectively, the signal of LIN1, LIN2, LIN3 is passed to output LO1, LO2, LO3 respectively, the signal of PFCINP is passed to output PFCO, wherein HO1 be the logic output signal of VS1 or VS1+15V, the HO2 logic output signal that is VS2 or VS2+15V, the HO3 logic output signal that is VS3 or VS3+15V, LO1, LO2, LO3, PFCO are the logic output signals of 0 or 15V;
When ICON is low level, HO1, HO2, HO3, LO1, LO2, LO3, PFCO are all set to low level.
The effect of adaptive circuit 1105 is:
When temperature is lower than a certain particular temperature value T1, if the real time value of ITRIP is more than or equal to a certain at particular voltage level V1, then ICON output low level, otherwise ICON exports high level;
When temperature is higher than a certain particular temperature value T1, at these two different conditions of rising edge of the non-increasing edge of PFCINP and PFCINP, different to the processing method of ITRIP live signal, particularly: on the non-increasing edge of PFCINP, if the real time value of ITRIP is more than or equal to a certain at particular voltage level V1, then ICON output low level, otherwise ICON exports high level; At the rising edge of PFCINP, if the real time value of ITRIP is more than or equal to the at particular voltage level V2 of a certain V1 of being greater than and continues for some time t1, then ICON output low level, otherwise ICON exports high level.
In one embodiment of the invention, the particular circuit configurations schematic diagram of adaptive circuit 1105 as shown in Figure 7, is specially:
PFCINP connects the input of not gate 2001 and not gate 2003; The output of not gate 2001 connects the input of not gate 2002; The output of not gate 2003 connects one end of electric capacity 2008 and the input of not gate 2004; The output of not gate 2004 connects one end of electric capacity 2009 and the input of not gate 2005; Another termination GND of electric capacity 2008; Another termination GND of electric capacity 2009;
One of them input of the output termination NAND gate 2006 of not gate 2002; Another input of the output termination NAND gate 2006 of not gate 2005; The input of the output NAND gate 2007 of NAND gate 2006 is connected; One of them input of the output termination NAND gate 2017 of not gate 2007;
One termination VCC of resistance 2016; One end of the other end connecting resistance 2013 of resistance 2016 and the negative electrode of voltage stabilizing didoe 2011; One end of another termination PTC (PositiveTemperatureCoefficient, positive temperature coefficient) resistance 2012 of resistance 2013, the positive input terminal of voltage comparator 2015; Another termination GND of voltage stabilizing didoe 2011; Another termination GND of PTC resistance 2012; The anode of the negative input termination voltage source 2014 of voltage comparator 2015; The negative terminal of voltage source 2014 meets GND; Another input of the output termination NAND gate 2017 of voltage comparator 2015; The input of the output termination not gate 2027 of NAND gate 2017; The control end of the output termination analog switch 2022 of not gate 2027;
ITRIP connects positive input terminal, the positive input terminal of voltage comparator 2023, the positive input terminal of voltage comparator 2024 of voltage comparator 2010; The anode of the negative input termination voltage source 2018 of voltage comparator 2010; The negative terminal of voltage source 2018 meets GND;
The anode of the negative input termination voltage source 2019 of voltage comparator 2023; The negative terminal of voltage source 2019 meets GND; The anode of the negative input termination voltage source 2021 of voltage comparator 2024; The negative terminal of voltage source 2021 meets GND;
One of them input of output termination NAND gate 2025 of voltage comparator 2010 and 0 selecting side of analog switch 2022; One of them input of the output termination NAND gate 2025 of voltage comparator 2023; Last input of the output termination NAND gate 2025 of voltage comparator 2024;
The input of the output termination not gate 2026 of NAND gate 2025; 1 selecting side of the output termination analog switch 2022 of not gate 2026; The input of the fixing termination not gate 2020 of analog switch 2022; The output of not gate 2020 is as ICON.
Operation principle and the key parameter value of above-described embodiment are below described:
At the rising edge of PFCINP, A point generation pulse, the width of this pulse is determined by the value of not gate 2003, not gate 2004, not gate 2005 and electric capacity 2008, electric capacity 2009.
Wherein, not gate 2003 can choose the minimum dimension that technique allows, and not gate 2004, not gate 2005 can consider 2 times that choose the minimum dimension that technique allows, and the value of electric capacity 2008 and electric capacity 2009 is at 10pF ~ 20pF, like this, the pulse duration of pulse produced at A point is 400ns ~ 550ns.
The clamping voltage of voltage stabilizing didoe 2011 is designed to 6.4V, and resistance 2016 is designed to 20k Ω, then B point generation one stable not with VCC voltage fluctuation impact 6.4V voltage; 10k Ω, 20k Ω when 100 DEG C when PTC resistance 2012 is designed to 25 DEG C; Resistance 2013 is designed to 44k Ω, and voltage source 2014 is designed to 2V, then, below 100 DEG C, voltage comparator 2015 output low level, more than 100 DEG C, voltage comparator 2015 exports high level.
Thus and if only if temperature is greater than 100 DEG C and before PFCINP rising edge arrives 400ns ~ 550ns, not gate 2027 exports high level, otherwise not gate 2027 output low level.
Voltage source 2018 is designed to 0.5V, and voltage source 2019 is designed to 0.6V, and voltage source 2021 is designed to 0.7V;
When not gate 2027 output low level, the voltage of ITRIP and the voltage compare of voltage source 2018, as ITIRP voltage >0.5V, voltage comparator 2010 exports high level and makes ICON produce low level control Intelligent Power Module and quits work;
When not gate 2027 exports high level, with the voltage compare of 0.5V, 0.6V, 0.7V the while of ITRIP, because voltage is increasing progressively, the voltage of ITRIP reaches 0.5V, need lasting a period of time of rising just can reach 0.7V, therefore, even if the voltage >0.5V of ITRIP, also will continue for some time and voltage comparator 2010, voltage comparator 2023, voltage comparator 2024 just can be made all to export high level make NAND gate 2025 output low level, this duration determines according to the rate of rise of ITRIP.4 times of the minimum dimension that NAND gate 2025 and not gate 2026 taking technique allow, can produce the time delay of 60 ~ 100ns, thus add the response time of ICON to ITRIP.
From the technical scheme of above-described embodiment, Intelligent Power Module of the present invention and existing Intelligent Power Module completely compatible, can directly replace with existing Intelligent Power Module.When normal temperature, because the reverse recovery time of FRD pipe 1117 (as shown in Figure 6) is limited, the monitoring voltage of ITRIP is more much bigger than noise voltage, and signal to noise ratio is enough large, the voltage of ICON to ITRIP is made a response in real time, is conducive to protecting Intelligent Power Module; When module is in high temperature, along with the reverse recovery time of FRD pipe 1117 increases, the voltage noise of ITRIP and the detection voltage superposition of ITRIP is coupled to from ground wire, a larger voltage is detected and after the longer duration at ITRIP end, ICON just makes a response and greatly can reduce the probability of Intelligent Power Module generation misoperation, ensure that Intelligent Power Module normally works, this is for the maintenance stability of a system and provide the user satisfaction of product to have great facilitation.
More than be described with reference to the accompanying drawings technical scheme of the present invention, the present invention proposes a kind of new Intelligent Power Module, can guarantee under the prerequisite that Intelligent Power Module can normally work at normal temperatures, effectively reduce Intelligent Power Module at high temperature by the probability of false triggering.
The foregoing is only the preferred embodiments of the present invention, be not limited to the present invention, for a person skilled in the art, the present invention can have various modifications and variations.Within the spirit and principles in the present invention all, any amendment done, equivalent replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (10)
1. an Intelligent Power Module, is characterized in that, comprising:
Brachium pontis signal input part, three-phase low reference voltage end, current detecting end and PFC control input end under brachium pontis signal input part, three-phase on three-phase;
HVIC manages, described HVIC pipe is provided with the terminals being connected to brachium pontis signal input part under brachium pontis signal input part and described three-phase on described three-phase respectively, and correspond to the first port of described current detecting end and correspond to the second port of described PFC control input end, described first port is connected with described current detecting end by connecting line, and described second port is connected with described PFC control input end by connecting line;
Sampling resistor, described three-phase low reference voltage end and described current detecting end are all connected to the first end of described sampling resistor, and the second end of described sampling resistor is connected to the low-pressure area power supply negative terminal of described Intelligent Power Module;
Adaptive circuit, the power supply positive pole of described adaptive circuit and negative pole are connected to low-pressure area power supply anode and the negative terminal of described Intelligent Power Module respectively, the first input end of described adaptive circuit is connected to described first port, second input of described adaptive circuit is connected to described second port, and the output of described adaptive circuit is as the Enable Pin of described HVIC pipe;
Wherein, described adaptive circuit, when the temperature of described Intelligent Power Module is lower than predetermined temperature value, exports the enable signal of corresponding level according to the magnitude relationship between the value of the input signal of described first input end and the first set point; Described adaptive circuit is when the temperature of described Intelligent Power Module is higher than described predetermined temperature value, whether the input signal according to described second input is in rising edge, and the magnitude relationship between the value of the input signal of described first input end and the second set point or described first set point exports the enable signal of corresponding level, described second set point is greater than described first set point.
2. Intelligent Power Module according to claim 1, is characterized in that, described adaptive circuit when the temperature of described Intelligent Power Module is lower than described predetermined temperature value,
If the value of the input signal of described first input end is more than or equal to described first set point, then export the enable signal of the first level, to forbid the work of described HVIC pipe, and
If the value of the input signal of described first input end is less than described first set point, then export the enable signal of second electrical level, to allow the work of described HVIC pipe.
3. Intelligent Power Module according to claim 1, is characterized in that, described adaptive circuit when the temperature of described Intelligent Power Module is higher than described predetermined temperature value,
When the input signal of described second input be in non-increasing along time, if the value of the input signal of described first input end is more than or equal to described first set point, then export the enable signal of described first level; Otherwise, export the enable signal of described second electrical level, and
When the input signal of described second input is in rising edge, if the value of the input signal of described first input end is more than or equal to described second set point and continue scheduled duration, then export the enable signal of described first level; Otherwise, export the enable signal of described second electrical level.
4. Intelligent Power Module according to claim 1, is characterized in that, described adaptive circuit comprises:
The first not gate be connected in series and the second not gate, the input of described first not gate is as the second input of described adaptive circuit, and the output of described second not gate is connected to the first input end of the first NAND gate;
The 3rd not gate be connected in series, the 4th not gate and the 5th not gate, the input of described 3rd not gate is connected to the input of described first not gate, the output of described 5th not gate is connected to the second input of described first NAND gate, the output of described first NAND gate is connected to the input of the 6th not gate, and the output of described 6th not gate is connected to the first input end of the second NAND gate;
First electric capacity, between the input being connected to described 4th not gate and the power supply negative pole of described adaptive circuit;
Second electric capacity, between the input being connected to described 5th not gate and the power supply negative pole of described adaptive circuit;
First resistance, the first end of described first resistance is connected to the power supply positive pole of described adaptive circuit, second end of described first resistance is connected to the negative electrode of voltage stabilizing didoe, and the anode of described voltage stabilizing didoe is connected to the power supply negative pole of described adaptive circuit;
Second resistance, the first end of described second resistance is connected to the second end of described first resistance, and the second end of described second resistance is connected to the positive input terminal of the first voltage comparator;
Thermistor, the first end of described thermistor is connected to the second end of described second resistance, and the second end of described thermistor is connected to the anode of described voltage stabilizing didoe;
First voltage source, the negative pole of described first voltage source is connected to the anode of described voltage stabilizing didoe, the positive pole of described first voltage source is connected to the negative input end of described first voltage comparator, the output of described first voltage comparator is connected to the second input of described second NAND gate, the output of described second NAND gate is connected to the input of the 7th not gate, and the output of described 7th not gate is connected to the control end of analog switch;
Second voltage comparator, the positive input terminal of described second voltage comparator is as the first input end of described adaptive circuit, the negative input end of described second voltage comparator is connected to the positive pole of the second voltage source, the negative pole of described second voltage source is connected to the power supply negative pole of described adaptive circuit, and the output of described second voltage comparator is connected to the first selecting side of described analog switch and the first input end of the 3rd NAND gate;
Tertiary voltage comparator, the positive input terminal of described tertiary voltage comparator is connected to the positive input terminal of described second voltage comparator, the negative input end of described tertiary voltage comparator is connected to the positive pole in tertiary voltage source, the negative pole in described tertiary voltage source is connected to the power supply negative pole of described adaptive circuit, and the output of described tertiary voltage comparator is connected to the second input of described 3rd NAND gate;
4th voltage comparator, the positive input terminal of described 4th voltage comparator is connected to the positive input terminal of described second voltage comparator, the negative input end of described 4th voltage comparator is connected to the positive pole of the 4th voltage source, the negative pole of described 4th voltage source is connected to the power supply negative pole of described adaptive circuit, the output of described 4th voltage comparator is connected to the 3rd input of described 3rd NAND gate, the output of described 3rd NAND gate is connected to the input of the 8th not gate, the output of described 8th not gate is connected to the second selecting side of described analog switch, the stiff end of described analog switch is connected to the input of the 9th not gate, the output of described 9th not gate is as the output of described adaptive circuit.
5. Intelligent Power Module according to claim 1, is characterized in that, described HVIC pipe is also provided with the signal output part of PFC drive circuit, described Intelligent Power Module also comprises:
First power switch pipe and the first diode, the anode of described first diode is connected to the emitter of described first power switch pipe, the negative electrode of described first diode is connected to the collector electrode of described first power switch pipe, the collector electrode of described first power switch pipe is connected to the anode of the second diode, the negative electrode of described second diode is connected to the high voltage input of described Intelligent Power Module, the base stage of described first power switch pipe is connected to the signal output part of described PFC drive circuit, the emitter of described first power switch pipe is as the PFC low reference voltage end of described Intelligent Power Module, the collector electrode of described first power switch pipe is held as the PFC of described Intelligent Power Module.
6. Intelligent Power Module according to any one of claim 1 to 5, is characterized in that, also comprises: boostrap circuit, and described boostrap circuit comprises:
First bootstrap diode, the anode of described first bootstrap diode is connected to the low-pressure area power supply anode of described Intelligent Power Module, and the negative electrode of described first bootstrap diode is connected to the U phase higher-pressure region power supply anode of described Intelligent Power Module;
Second bootstrap diode, the anode of described second bootstrap diode is connected to the low-pressure area power supply anode of described Intelligent Power Module, and the negative electrode of described second bootstrap diode is connected to the V phase higher-pressure region power supply anode of described Intelligent Power Module;
3rd bootstrap diode, the anode of described 3rd bootstrap diode is connected to the low-pressure area power supply anode of described Intelligent Power Module, and the negative electrode of described 3rd bootstrap diode is connected to the W phase higher-pressure region power supply anode of described Intelligent Power Module.
7. Intelligent Power Module according to any one of claim 1 to 5, is characterized in that, also comprises:
Bridge arm circuit on three-phase, in each phase on described three-phase in bridge arm circuit, the input of bridge arm circuit is connected to the signal output part of corresponding phase in the three-phase high-voltage district of described HVIC pipe;
Bridge arm circuit under three-phase, under each phase under described three-phase in bridge arm circuit, the input of bridge arm circuit is connected to the signal output part of corresponding phase in the three-phase low-voltage district of described HVIC pipe.
8. Intelligent Power Module according to claim 7, is characterized in that, in each phase described, bridge arm circuit comprises:
Second power switch pipe and the 3rd diode, the anode of described 3rd diode is connected to the emitter of described second power switch pipe, the negative electrode of described 3rd diode is connected to the collector electrode of described second power switch pipe, the collector electrode of described second power switch pipe is connected to the high voltage input of described Intelligent Power Module, the base stage of described second power switch pipe is as the input of bridge arm circuit in each phase described, and the emitter of described second power switch pipe is connected to the higher-pressure region power supply negative terminal of the corresponding phase of described Intelligent Power Module.
9. Intelligent Power Module according to claim 8, is characterized in that, under each phase described, bridge arm circuit comprises:
3rd power switch pipe and the 4th diode, the anode of described 4th diode is connected to the emitter of described 3rd power switch pipe, the negative electrode of described 4th diode is connected to the collector electrode of described 3rd power switch pipe, the collector electrode of described 3rd power switch pipe is connected to the anode of described 3rd diode in corresponding upper bridge arm circuit, the base stage of described 3rd power switch pipe is as the input of bridge arm circuit under each phase described, and the emitter of described 3rd power switch pipe is as the low reference voltage end of the corresponding phase of described Intelligent Power Module.
10. an air conditioner, is characterized in that, comprising: Intelligent Power Module as claimed in any one of claims 1-9 wherein.
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| CN201610126189.8A CN105577016B (en) | 2016-03-04 | 2016-03-04 | SPM and air conditioner |
| PCT/CN2016/097729 WO2017092448A1 (en) | 2015-11-30 | 2016-08-31 | Intelligent power module and air conditioner |
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| CN105896954A (en) * | 2016-05-24 | 2016-08-24 | 深圳市鑫宇鹏电子科技有限公司 | Adaptive antistatic property-enhanced intelligent power module |
| WO2017092448A1 (en) * | 2015-11-30 | 2017-06-08 | 广东美的制冷设备有限公司 | Intelligent power module and air conditioner |
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