CN205453537U - Intelligence power module and air conditioner - Google Patents
Intelligence power module and air conditioner Download PDFInfo
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- CN205453537U CN205453537U CN201620169863.6U CN201620169863U CN205453537U CN 205453537 U CN205453537 U CN 205453537U CN 201620169863 U CN201620169863 U CN 201620169863U CN 205453537 U CN205453537 U CN 205453537U
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Abstract
The utility model provides an intelligence power module and air conditioner is provided with the first port corresponding to current detection terminal on the HVIC pipe in the intelligent power module, self -adaptive circuit's first input end is connected to first port, and the output can be held as the messenger of HVIC pipe, PFC freewheeling circuit 's input/output end, the 2nd input/output end and output be the corresponding PFC end that is connected to respectively, IPM's high voltage input terminal and self -adaptive circuit's second input, PFC freewheeling circuit is according to IPM's temperature, the long function that is less than predetermined duration's freewheeling diode when realization forward conduction voltage drop is less than the freewheeling diode's of predetermined pressure drop value function or realizes the backward recovery, and when IPM's temperature is less than predetermined temperature value, export the signal of first level, when IPM's temperature is higher than predetermined temperature value, the signal of output second level, wherein, level signal that self -adaptive circuit inputed according to the incoming signal's of first input end size and second input exports the enable signal of corresponding level.
Description
Technical field
This utility model relates to SPM technical field, in particular to a kind of SPM and a kind of air-conditioner.
Background technology
SPM (IntelligentPowerModule, it is called for short IPM) it is a kind of analog line driver that power electronics discrete device and integrated circuit technique are integrated, SPM comprises device for power switching and high-voltage driving circuit, and with overvoltage, overcurrent and the failure detector circuit such as overheated.The logic input terminal of SPM receives the control signal of master controller, and outfan drives compressor or subsequent conditioning circuit work, sends the system status signal detected back to master controller simultaneously.Relative to traditional discrete scheme; SPM has the advantages such as high integration, high reliability, self-inspection and protection circuit; it is particularly suitable for driving the converter of motor and various inverter, is the desired power level electronic device of frequency control, metallurgical machinery, electric propulsion, servo-drive, frequency-conversion domestic electric appliances.
The structural representation of existing Intelligent power module circuit is as it is shown in figure 1, MTRIP port is as current detecting end, to protect SPM 100 according to the size of current detected.PFCIN port controls input as the PFC (PowerFactorCorrection, PFC) of SPM.
In SPM work process, PFCINP end is frequently switched between low and high level by certain frequency, make that IGBT pipe 127 is continuously on off state and FRD pipe 131 is continuously in freewheeling state, this frequency be generally LIN1～LIN3,2～4 times of HIN1～HIN3 switching frequency, and the most directly contact with the switching frequency of LIN1～LIN3, HIN1～HIN3.
As shown in Figure 2, UN, VN, WN connect one end of milliohm resistance 138, another termination GND, MTRIP of milliohm resistance 138 are current detecting pins, connect one end of milliohm resistance 138, by the pressure drop measuring and calculating electric current of detection milliohm resistance, as it is shown on figure 3, when current is excessive, SPM 100 is made to quit work, after avoiding because miscarriage life is overheated excessively, SPM 100 is produced permanent damage.
-VP, COM, UN, VN, WN have electrical connection in actual use.Therefore, current noise when voltage noise when IGBT pipe 121～IGBT pipe 127 switchs and FRD pipe 111～FRD pipe 116, FRD pipe 131 afterflow all can intercouple, and impacts the input pin of each low-voltage area.
In each input pin, HIN1～HIN3, LIN1～LIN3, PFCINP threshold value typically at about 2.3V, and the threshold voltage of ITRIP typically only have below 0.5V, therefore, ITRIP be most susceptible to interference pin.When ITRIP is toggled, SPM 100 will quit work, and because the most really there is stream, so the triggering that ITRIP is now belongs to false triggering.As shown in Figure 4, being high level at PFCIN, when moment opened by IGBT pipe 127, because the existence of the reverse recovery current of FRD pipe 131, superposition goes out I131Current waveform, this electric current has bigger concussion noise, passes through-VP, COM, UN, VN, WN electrical connection in peripheral circuit, and concussion noise can close out certain voltage and raise by Rhizoma Nelumbinis at MTRIP end.If the condition making MTRIP trigger is: voltage > Vth, and the persistent period > Tth；In the diagram, if Ta < Tth < Tb, then first three cycle the highest deficiency of voltage so that MTRIP produce false triggering, to the 4th cycle, MTRIP will produce false triggering.
It is true that because the reverse recovery time of FRD pipe and reverse recovery current are positive temperature coefficients, temperature is the highest, reverse recovery time is the longest, therefore along with the continuous firing of system, the constant temperature of SPM 100 rises, and the probability that MTRIP is triggered is increasing.As it is shown in figure 5, at 25 DEG C, the voltage pulsation that the Reverse recovery effect of FRD causes is not enough to cause MTRIP to trigger, and along with temperature raises, when 75 DEG C, MTRIP is triggered, and makes system stalls.Although this false triggering can recover to destroy without forming system over time, but user can be caused puzzlement undoubtedly.Such as the application scenario for transducer air conditioning, the when that the highest user just of ambient temperature more needing air conditioning system continuous firing, but the reverse recovery time that high ambient temperature can make FRD pipe increases, MTRIP is improved by the probability of false triggering, once MTRIP is by false triggering, air conditioning system can quit work 3～5 minutes because being mistakenly considered to occur to flow, and makes user during this period of time cannot obtain cold wind, and this is to cause air conditioning system because of the not enough one of the main reasons by customer complaint of refrigerating capacity.
Therefore, how to guarantee that SPM can effectively reduce SPM and at high temperature become technical problem urgently to be resolved hurrily by the probability of false triggering on the premise of low-power consumption normally works at normal temperatures.
Utility model content
This utility model is intended at least to solve one of technical problem present in prior art or correlation technique.
To this end, a purpose of the present utility model is to propose a kind of new SPM, can guarantee that SPM can effectively reduce SPM at high temperature by the probability of false triggering on the premise of low-power consumption normally works at normal temperatures.
Another purpose of the present utility model is to propose a kind of air-conditioner.
For achieving the above object, according to the embodiment of first aspect of the present utility model, it is proposed that a kind of SPM, including: brachium pontis signal input part, three-phase low reference voltage end, current detecting end and PFC end under brachium pontis signal input part, three-phase on three-phase；HVIC (HighVoltageIntegratedCircuit, high voltage integrated circuit) pipe, it is provided with on described HVIC pipe and is respectively connecting on described three-phase the terminals of brachium pontis signal input part under brachium pontis signal input part and described three-phase, and the first port corresponding to described current detecting end, described first port is connected with described current detecting end by connecting line；Sampling resistor, described three-phase low reference voltage end and described current detecting end be connected to the first end of described sampling resistor, and the second end of described sampling resistor is connected to the low-pressure area power supply negative terminal of described SPM；Adaptive circuit, the first input end of described adaptive circuit is connected to described first port, and the outfan of described adaptive circuit is as the Enable Pin of described HVIC pipe；PFC freewheeling circuit, first input/output terminal of described PFC freewheeling circuit, second input/output terminal and outfan are connected respectively to described PFC end, the high voltage input of described SPM and the second input of described adaptive circuit, described PFC freewheeling circuit is according to the temperature of described SPM, realize forward conduction voltage drop and less than the function of the fly-wheel diode of predetermined pressure drop value or realize the Reverse recovery duration function less than the fly-wheel diode of scheduled duration, and when the temperature of described SPM is less than predetermined temperature value, the signal of the first level is exported by the outfan of described PFC freewheeling circuit, when the temperature of described SPM is higher than described predetermined temperature value, the signal of second electrical level is exported by the outfan of described PFC freewheeling circuit；
Wherein, the level signal that described adaptive circuit inputs according to size and described second input of the input signal of described first input end, the enable signal of corresponding level is exported by the outfan of described adaptive circuit.
SPM according to embodiment of the present utility model, PFC freewheeling circuit is by the temperature according to SPM, realize forward conduction voltage drop and less than the function of the fly-wheel diode of predetermined pressure drop value or realize the Reverse recovery duration function less than the fly-wheel diode of scheduled duration, make when the temperature of SPM is less than predetermined temperature value, the forward conduction voltage drop function less than the fly-wheel diode of predetermined pressure drop value can be realized, to reduce power consumption when SPM works at normal temperatures；Simultaneously can be when the temperature of SPM be higher than predetermined temperature value, the Reverse recovery duration function less than the fly-wheel diode of scheduled duration can be realized, to reduce the circuit noise that SPM produces when temperature is higher, to reduce when SPM at high temperature works by the probability of false triggering.
Adaptive circuit is by according to its first input end (the i.e. first port; namely current detecting end) the size of input signal and the level signal of the second input input; export the enable signal of corresponding level; make when the temperature of SPM is relatively low; adaptive circuit can be made a response according to the signal value that current detecting end detects; to guarantee that SPM can normally work under room temperature (time i.e. less than predetermined temperature value), and carry out overcurrent protection.And when the temperature of SPM is higher than predetermined temperature value, can determine whether that output controls HVIC and manages out-of-work enable signal by bigger standard value (more than temperature standard value time relatively low), and then can effectively reduce when SPM at high temperature works by the probability of false triggering.
SPM according to above-described embodiment of the present utility model, it is also possible to there is techniques below feature:
According to an embodiment of the present utility model, described adaptive circuit is when described second input inputs the signal of described first level, if the value of the input signal of described first input end is more than or equal to the first setting value, then exported the enable signal of described first level by the outfan of described adaptive circuit, to forbid that described HVIC pipe works；Otherwise, the enable signal of described second electrical level is exported by the outfan of described adaptive circuit, to allow described HVIC pipe to work；
Described adaptive circuit is when described second input inputs the signal of described second electrical level, if the value of the input signal of described first input end is more than or equal to the second setting value, then exported the enable signal of described first level by the outfan of described adaptive circuit；Otherwise, the enable signal of described second electrical level is exported by the outfan of described adaptive circuit；
Wherein, described second setting value is more than described first setting value.
According to an embodiment of the present utility model, described adaptive circuit includes:
First voltage comparator, the positive input terminal of described first voltage comparator is as the first input end of described adaptive circuit, the negative input end of described first voltage comparator is connected to the positive pole of the first voltage source, the negative pole of described first voltage source is connected to the power supply negative pole of described adaptive circuit, the outfan of described first voltage comparator is connected to the first selection end and first input end of the first NAND gate of the first analog switch, the power supply positive pole of described adaptive circuit and negative pole are connected respectively the low-pressure area power supply anode to described SPM and negative terminal；
Second voltage comparator, the positive input terminal of described second voltage comparator is connected to the positive input terminal of described first voltage comparator, the negative input end of described second voltage comparator is connected to the positive pole of the second voltage source, the negative pole of described second voltage source is connected to the power supply negative pole of described adaptive circuit, the outfan of described second voltage comparator is connected to the second input of described first NAND gate, the outfan of described first NAND gate is connected to the input of the first not gate, the outfan of described first not gate is connected to the second selection end of described first analog switch, the control end of described first analog switch is as the second input of described adaptive circuit, the fixing end of described first analog switch is connected to the input of the second not gate, the outfan of described second not gate is as the outfan of described adaptive circuit.
According to an embodiment of the present utility model, described PFC freewheeling circuit is when the temperature of described SPM is less than predetermined temperature value, it is achieved forward conduction voltage drop is less than the function of the fly-wheel diode of predetermined pressure drop value；And described PFC freewheeling circuit is when the temperature of described SPM is higher than described predetermined temperature value, it is achieved Reverse recovery duration is less than the function of the fly-wheel diode of scheduled duration.
According to an embodiment of the present utility model, described PFC freewheeling circuit includes: the first resistance, first end of described first resistance is connected to the power supply positive pole of described PFC freewheeling circuit, second end of described first resistance is connected to the negative electrode of Zener diode, the anode of described Zener diode is connected to the power supply negative pole of described PFC freewheeling circuit, and the power supply positive pole of described PFC freewheeling circuit and negative pole are respectively connecting to low-pressure area power supply anode and the negative terminal of described SPM；
Second resistance, the first end of described second resistance is connected to the second end of described first resistance, and the second end of described second resistance is connected to the positive input terminal of tertiary voltage comparator；
Critesistor, the first end of described critesistor is connected to the second end of described second resistance, and the second end of described critesistor is connected to the anode of described Zener diode；
Tertiary voltage source, the negative pole in described tertiary voltage source is connected to the anode of described Zener diode, the positive pole in described tertiary voltage source is connected to the negative input end of described tertiary voltage comparator, the outfan of described tertiary voltage comparator is connected to the input of the 3rd not gate, the outfan of described 3rd not gate is connected to the input of the 4th not gate, and the outfan of described 4th not gate is as the outfan of described PFC freewheeling circuit；
Second analog switch, the fixing end of described second analog switch is as the first input/output terminal of described PFC freewheeling circuit, first selection end of described second analog switch is connected to the negative electrode of the first fly-wheel diode, second selection end of described second analog switch is connected to the negative electrode of the second fly-wheel diode, and the end that controls of described second analog switch is connected to the outfan of described 4th not gate；
3rd analog switch, the fixing end of described 3rd analog switch is as the second input/output terminal of described PFC freewheeling circuit, first selection end of described 3rd analog switch is connected to the anode of described first fly-wheel diode, second selection end of described 3rd analog switch is connected to the anode of described second fly-wheel diode, and the end that controls of described 3rd analog switch is connected to the outfan of described 4th not gate；
Wherein, the forward conduction voltage drop of described first fly-wheel diode is less than predetermined pressure drop value, the Reverse recovery duration of described second fly-wheel diode is less than scheduled duration, and described critesistor is arranged on described first fly-wheel diode and the position at described second fly-wheel diode place.
According to an embodiment of the present utility model, the signal output part of PFC drive circuit it is additionally provided with on described HVIC pipe, described SPM also includes: the first power switch pipe and the first diode, the anode of described first diode is connected to the emitter stage of described first power switch pipe, the negative electrode of described first diode is connected to the colelctor electrode of described first power switch pipe, the base stage of described first power switch pipe is connected to the signal output part of described PFC drive circuit, the emitter stage of described first power switch pipe is as the PFC low reference voltage end of described SPM, the colelctor electrode of described first power switch pipe is as described PFC end.
Wherein, the first power switch pipe can be IGBT (InsulatedGateBipolarTransistor, insulated gate bipolar transistor).
According to an embodiment of the present utility model, also including: boostrap circuit, described boostrap circuit includes:
First bootstrap diode, the anode of described first bootstrap diode is connected to the low-pressure area power supply anode of described SPM, and the negative electrode of described first bootstrap diode is connected to the U phase higher-pressure region power supply anode of described SPM；Second bootstrap diode, the anode of described second bootstrap diode is connected to the low-pressure area power supply anode of described SPM, and the negative electrode of described second bootstrap diode is connected to the V phase higher-pressure region power supply anode of described SPM；3rd bootstrap diode, the anode of described 3rd bootstrap diode is connected to the low-pressure area power supply anode of described SPM, and the negative electrode of described 3rd bootstrap diode is connected to the W phase higher-pressure region power supply anode of described SPM.
According to an embodiment of the present utility model, also include: bridge arm circuit on three-phase, the signal output part of corresponding phase during the input of bridge arm circuit is connected to the three-phase high-voltage district of described HVIC pipe in each phase in bridge arm circuit on described three-phase；Bridge arm circuit under three-phase, the signal output part of corresponding phase during the input of bridge arm circuit is connected to the three-phase low-voltage district of described HVIC pipe under each phase in bridge arm circuit under described three-phase.Wherein, on three-phase, bridge arm circuit includes: bridge arm circuit in bridge arm circuit, W phase in bridge arm circuit, V phase in U phase；Under three-phase, bridge arm circuit includes: the lower bridge arm circuit of the lower bridge arm circuit of U phase, V phase, the lower bridge arm circuit of W phase.
According to an embodiment of the present utility model, in described each phase, bridge arm circuit includes: the second power switch pipe and the second diode, the anode of described second diode is connected to the emitter stage of described second power switch pipe, the negative electrode of described second diode is connected to the colelctor electrode of described second power switch pipe, the colelctor electrode of described second power switch pipe is connected to the high voltage input of described SPM, the base stage of described second power switch pipe is as the input of bridge arm circuit in described each phase, the emitter stage of described second power switch pipe is connected to the higher-pressure region power supply negative terminal of described SPM correspondence phase.Wherein, the second power switch pipe can be IGBT.
According to an embodiment of the present utility model, under described each phase, bridge arm circuit includes: the 3rd power switch pipe and the 3rd diode, the anode of described 3rd diode is connected to the emitter stage of described 3rd power switch pipe, the negative electrode of described 3rd diode is connected to the colelctor electrode of described 3rd power switch pipe, the colelctor electrode of described 3rd power switch pipe is connected to the anode of described second diode in the upper bridge arm circuit of correspondence, the base stage of described 3rd power switch pipe is as the input of bridge arm circuit under described each phase, the emitter stage of described 3rd power switch pipe is as the low reference voltage end of the corresponding phase of described SPM.Wherein, the 3rd power switch pipe can be IGBT.
According to an embodiment of the present utility model, the voltage of the high voltage input of described SPM is 300V.
According to an embodiment of the present utility model, connect between anode and the negative terminal of each phase higher-pressure region power supply of described SPM and have filter capacitor.
Embodiment according to this utility model second aspect, it is also proposed that a kind of air-conditioner, including: the SPM as described in above-mentioned any one embodiment.
Additional aspect of the present utility model and advantage will part be given in the following description, and part will become apparent from the description below, or is recognized by practice of the present utility model.
Accompanying drawing explanation
Above-mentioned and/or additional aspect of the present utility model and advantage will be apparent from easy to understand, wherein from combining the accompanying drawings below description to embodiment:
Fig. 1 shows the structural representation of the SPM in correlation technique；
Fig. 2 shows the external circuit schematic diagram of SPM；
Fig. 3 shows that current signal triggers the out-of-work waveform diagram of SPM；
Fig. 4 shows a kind of waveform diagram of the noise of the SPM generation in correlation technique；
Fig. 5 shows the another kind of waveform diagram of the noise of the SPM generation in correlation technique；
Fig. 6 shows the structural representation of the SPM according to embodiment of the present utility model；
Fig. 7 shows the internal structure schematic diagram of the adaptive circuit according to embodiment of the present utility model；
Fig. 8 shows the internal structure schematic diagram of the PFC freewheeling circuit according to embodiment of the present utility model.
Detailed description of the invention
In order to be more clearly understood that above-mentioned purpose of the present utility model, feature and advantage, with detailed description of the invention, this utility model is further described in detail below in conjunction with the accompanying drawings.It should be noted that in the case of not conflicting, the feature in embodiments herein and embodiment can be mutually combined.
Elaborate a lot of detail in the following description so that fully understanding this utility model; but; this utility model can be implemented to use other to be different from other modes described here, and therefore, protection domain of the present utility model is not limited by following public specific embodiment.
Fig. 6 shows the structural representation of the SPM according to embodiment of the present utility model.
As shown in Figure 6, according to the SPM of embodiment of the present utility model, including: HVIC pipe 1101 and adaptive circuit 1105.
The VCC end of HVIC pipe 1101 is as the low-pressure area power supply anode VDD of SPM 1100, and VDD is generally 15V；
Inside HVIC pipe 1101:
ITRIP end connects the first input end of adaptive circuit 1105；VCC end connects the power supply anode of adaptive circuit 1105；GND end connects the power supply negative terminal of adaptive circuit 1105；The outfan of adaptive circuit 1105 is designated as ICON, for controlling HIN1～HIN3, LIN1～LIN3, the effectiveness of PFCINP signal；Second input of adaptive circuit 1105 is connected to the PFCC end of HVIC pipe 1101.
HVIC pipe 1101 is internal also has boostrap circuit structure as follows:
VCC end is connected with bootstrap diode 1102, bootstrap diode 1103, the anode of bootstrap diode 1104；The negative electrode of bootstrap diode 1102 is connected with the VB1 of HVIC pipe 1101；The negative electrode of bootstrap diode 1103 is connected with the VB2 of HVIC pipe 1101；The negative electrode of bootstrap diode 1104 is connected with the VB3 of HVIC pipe 1101.
Brachium pontis signal input part UHIN in the U phase that HIN1 end is SPM 1100 of HVIC pipe 1101；Brachium pontis signal input part VHIN in the V phase that HIN2 end is SPM 1100 of HVIC pipe 1101；Brachium pontis signal input part WHIN in the W phase that HIN3 end is SPM 1100 of HVIC pipe 1101；The lower brachium pontis signal input part ULIN of the U phase that LIN1 end is SPM 1100 of HVIC pipe 1101；The lower brachium pontis signal input part VLIN of the V phase that LIN2 end is SPM 1100 of HVIC pipe 1101；The lower brachium pontis signal input part WLIN of the W phase that LIN3 end is SPM 1100 of HVIC pipe 1101；The MTRIP end that ITRIP end is SPM 1100 of HVIC pipe 1101；The PFCINP end of HVIC pipe 1101 controls input PFCIN as the PFC of SPM 100；The GND end of HVIC pipe 1101 is as the low-pressure area power supply negative terminal COM of SPM 1100.Wherein, SPM 1100 UHIN, VHIN, WHIN, ULIN, VLIN, WLIN six tunnel input and PFCIN end receive 0V or 5V input signal.
The VB1 end of HVIC pipe 1101 connects one end of electric capacity 1131, and as the U phase higher-pressure region power supply anode UVB of SPM 1100；The HO1 end of HVIC pipe 1101 is connected with the grid of brachium pontis IGBT pipe 1121 in U phase；The VS1 end of HVIC pipe 1101 is connected with the emitter-base bandgap grading of IGBT pipe 1121, the anode of FRD pipe 1111, the lower colelctor electrode of brachium pontis IGBT pipe 1124 of U phase, the negative electrode of FRD pipe 1114, the other end of electric capacity 1131, and as the U phase higher-pressure region power supply negative terminal UVS of SPM 1100.
The VB2 end of HVIC pipe 1101 connects one end of electric capacity 1132, and as the V phase higher-pressure region power supply anode VVB of SPM 1100；The HO2 end of HVIC pipe 1101 is connected with the grid of brachium pontis IGBT pipe 1123 in V phase；The VS2 end of HVIC pipe 1101 is connected with the emitter-base bandgap grading of IGBT pipe 1122, the anode of FRD pipe 1112, the lower colelctor electrode of brachium pontis IGBT pipe 1125 of V phase, the negative electrode of FRD pipe 1115, the other end of electric capacity 1132, and as the V phase higher-pressure region power supply negative terminal VVS of SPM 1100.
The VB3 end of HVIC pipe 1101 connects one end of electric capacity 1133, as the W phase higher-pressure region power supply anode WVB of SPM 1100；The HO3 end of HVIC pipe 1101 is connected with the grid of brachium pontis IGBT pipe 1123 in W phase；The VS3 end of HVIC pipe 1101 is connected with the emitter-base bandgap grading of IGBT pipe 1123, the anode of FRD pipe 1113, the lower colelctor electrode of brachium pontis IGBT pipe 1126 of W phase, the negative electrode of FRD pipe 1116, the other end of electric capacity 1133, and as the W phase higher-pressure region power supply negative terminal WVS of SPM 1100.
The LO1 end of HVIC pipe 1101 is connected with the grid of IGBT pipe 1124；The LO2 end of HVIC pipe 1101 is connected with the grid of IGBT pipe 1125；The LO3 end of HVIC pipe 1101 is connected with the grid of IGBT pipe 1126；The emitter-base bandgap grading of IGBT pipe 1124 is connected with the anode of FRD pipe 1114, and as the U phase low reference voltage end UN of SPM 1100；The emitter-base bandgap grading of IGBT pipe 1125 is connected with the anode of FRD pipe 1115, and as the V phase low reference voltage end VN of SPM 1100；The emitter-base bandgap grading of IGBT pipe 1126 is connected with the anode of FRD pipe 1116, and as the W phase low reference voltage end WN of SPM 1100.
VDD is HVIC pipe 1101 power supply anode, and GND is the power supply negative terminal of HVIC pipe 1101；VDD-GND voltage is generally 15V；VB1 and VS1 is respectively positive pole and the negative pole of the power supply of U phase higher-pressure region, and HO1 is the outfan of U phase higher-pressure region；VB2 and VS2 is respectively positive pole and the negative pole of the power supply of V phase higher-pressure region, and HO2 is the outfan of V phase higher-pressure region；VB3 and VS3 is respectively positive pole and the negative pole of the power supply of U phase higher-pressure region, and HO3 is the outfan of W phase higher-pressure region；LO1, LO2, LO3 are respectively U phase, V phase, the outfan of W phase low-pressure area.
The PFCO end of HVIC pipe 1101 is connected with the grid of IGBT pipe 1127；The emitter-base bandgap grading of IGBT pipe 1127 is connected with the anode of FRD pipe 1117, and as the PFC low reference voltage end-VP of SPM 1100；The colelctor electrode of IGBT pipe 1127 is connected with the negative electrode of FRD pipe 1117, the first input/output terminal of self adaptation PFC freewheeling circuit 1141, and as the PFC end of SPM 1100, PFCC end connects the outfan of self adaptation PFC freewheeling circuit 1141.
Second input/output terminal of self adaptation PFC freewheeling circuit 1141, the colelctor electrode of IGBT pipe 1121, the negative electrode of FRD pipe 1111, the colelctor electrode of IGBT pipe 1122, the negative electrode of FRD pipe 1112, the colelctor electrode of IGBT pipe 1123, the negative electrode of FRD pipe 1113 are connected, and the high voltage input P, P as SPM 1100 typically meets 300V.
The effect of HVIC pipe 1101 is:
When ICON is high level, the logic input signal of the 0 or 5V of input HIN1, HIN2, HIN3 is passed to outfan HO1, HO2, HO3 respectively, the signal of LIN1, LIN2, LIN3 is passed to outfan LO1, LO2, LO3 respectively, the signal of PFCINP is passed to outfan PFCO, wherein HO1 be the logic output signal of VS1 or VS1+15V, HO2 be the logic output signal of VS2 or VS2+15V, HO3 be the logic output signal of VS3 or VS3+15V, LO1, LO2, LO3, PFCO are the logic output signals of 0 or 15V；
When ICON is low level, HO1, HO2, HO3, LO1, LO2, LO3, PFCO are all set to low level.
The effect of self adaptation PFC freewheeling circuit 1141 is:
When temperature is less than a certain particular temperature value T1, PFCC is low level；Self adaptation PFC freewheeling circuit 1141 be one forward conduction voltage drop is the lowest and FRD that reverse recovery time is slower pipe；
When temperature is higher than a certain particular temperature value T1, PFCC is high level；Self adaptation PFC freewheeling circuit 1141 is that forward conduction voltage drop is higher and the reverse recovery time of FRD pipe quickly.
The effect of adaptive circuit 1105 is:
When PFCC is low level, if the real time value of ITRIP is more than a certain particular voltage level V1, then ICON output low level, otherwise ICON exports high level；
When PFCC is high level, if the real time value of ITRIP is more than a certain particular voltage level V2, then ICON output low level, otherwise ICON exports high level；Wherein, V2 > V1.
In an embodiment of the present utility model, the particular circuit configurations of adaptive circuit 1105 as it is shown in fig. 7, particularly as follows:
ITRIP (i.e. the first input end of adaptive circuit 1105) connects the positive input terminal of voltage comparator 2010, the positive input terminal of voltage comparator 2023；The anode of the negative input termination voltage source 2018 of voltage comparator 2010；The negative terminal of voltage source 2018 meets GND；
The anode of the negative input termination voltage source 2019 of voltage comparator 2023；The negative terminal of voltage source 2019 meets GND；
One of them input of the output termination NAND gate 2025 of voltage comparator 2010 and 0 selection end of analog switch 2022；
One of them input of the output termination NAND gate 2025 of voltage comparator 2023；The input of the output termination not gate 2026 of NAND gate 2025；1 selection end of the output termination analog switch 2022 of not gate 2026；The input of the fixing termination not gate 2020 of analog switch 2022；The outfan of not gate 2020 is as ICON；The end that controls of analog switch 2022 is the second input of adaptive circuit 1105, is connected with the outfan of self adaptation PFC freewheeling circuit 1141.
In an embodiment of the present utility model, the particular circuit configurations of PFC freewheeling circuit 1141 as shown in Figure 8, particularly as follows:
One termination VCC of resistance 2016；One end of the other end connecting resistance 2013 of resistance 2016 and the negative electrode of Zener diode 2011；Another termination PTC (PositiveTemperatureCoefficient, positive temperature coefficient) one end of resistance 2012, positive input terminal of voltage comparator 2015 of resistance 2013；Another termination GND of Zener diode 2011；Another termination GND of PTC resistor 2012；
The anode of the negative input termination voltage source 2014 of voltage comparator 2015；The negative terminal of voltage source 2014 meets GND；The input of the output termination not gate 2017 of voltage comparator 2015；The input of the output termination not gate 2027 of not gate 2017；The control end of the output termination analog switch 2003 of not gate 2027 and the control end of analog switch 2004, and as the outfan of self adaptation PFC freewheeling circuit 1141；
The negative electrode of 1 selection termination FRD pipe 2001 of analog switch 2003；The negative electrode of 0 selection termination FRD pipe 2002 of analog switch 2003；The anode of 1 selection termination FRD pipe 2001 of analog switch 2004；The anode of 1 selection termination FRD pipe 2002 of analog switch 2004；
The fixing end of analog switch 2003 is the first input/output terminal of self adaptation PFC freewheeling circuit 1141；The fixing end of analog switch 2004 is the second input/output terminal of self adaptation PFC freewheeling circuit 1141.
The operation principle of following description above-described embodiment and key parameter value:
The clamp voltage design of Zener diode 2011 is 6.4V, and resistance 2016 is designed as 20k Ω, then produce the stable 6.4V voltage not affected with VCC voltage pulsation at B point；PTC resistor 2012 is arranged near FRD pipe 2001 and FRD pipe 2002, and PTC resistor 2012 can consider to be designed as 10k Ω when 25 DEG C, 20k Ω when 100 DEG C；Resistance 2013 is designed as 44k Ω, voltage source 2014 is designed as 2V, then below 100 DEG C, voltage comparator 2015 output low level, output low level after not gate 2017 and not gate 2027, more than 100 DEG C, voltage comparator 2015 exports high level, exports high level after not gate 2017 and not gate 2027.The metal-oxide-semiconductor size of not gate 2017 is it is contemplated that be designed as 1.5 times of the minimum dimension that technique allows, and the metal-oxide-semiconductor size of not gate 2027 is it is contemplated that be designed as 2 times of the metal-oxide-semiconductor size of not gate 2017.
When the temperature of PTC resistor 2012 is more than 100 DEG C, not gate 2027 exports high level, the negative electrode of FRD pipe 2001 is the first input/output terminal of self adaptation PFC freewheeling circuit 1141, and the anode of FRD pipe 2001 is the second input/output terminal of self adaptation PFC freewheeling circuit 1141；
When the temperature of PTC resistor 2012 is less than 100 DEG C, not gate 2027 output low level, the negative electrode of FRD pipe 2002 is the first input/output terminal of self adaptation PFC freewheeling circuit 1141, and the anode of FRD pipe 2002 is the second input/output terminal of self adaptation PFC freewheeling circuit 1141.
Under same process, by regulation ginseng platinum concentration, regulation FRD pipe reverse recovery time and the relation of forward conduction voltage drop, obtain FRD pipe 2001 and FRD pipe 2002, FRD pipe 2001 may select reverse recovery time shorter FRD pipe, self adaptation PFC freewheeling circuit 1141 is made at high temperature to remain to keep shorter reverse recovery time, reduce the voltage disturbance to circuit, FRD pipe 2002 selects the FRD pipe that forward conduction voltage drop is less, self adaptation PFC freewheeling circuit 1141 is made to have low forward conduction voltage drop at low temperatures, preferable balance is obtained in reverse recovery time and forward conduction voltage drop.
Voltage source 2018 is designed as 0.5V, and voltage source 2019 is designed as 0.6V, and voltage source 2021 is designed as 0.7V；
When not gate 2027 output low level, the voltage ratio of the voltage of ITRIP and voltage source 2018 relatively, when ITIRP voltage > 0.5V time, voltage comparator 2010 exports high level and makes ICON produce low level to make module from service；
When not gate 2027 exports high level, ITRIP is simultaneously with the voltage ratio of 0.5V, 0.6V, 0.7V relatively, because voltage is being incremented by, the voltage of ITRIP reaches 0.5V, needs persistently to rise a period of time and can be only achieved 0.7V, therefore, even if the voltage of ITRIP > 0.5V, also to continue for some time and voltage comparator 2010, voltage comparator 2019, voltage comparator 2021 just can be made all to export high level make NAND gate 2025 output low level, this persistent period is depending on the rate of rise of ITRIP.4 times of the minimum dimension that NAND gate 2025 and not gate 2026 taking technique allow, can produce the time delay of 60～100ns, thus add the ICON response time to ITRIP.
From the technical scheme of above-described embodiment, the SPM that the utility model proposes is completely compatible with existing SPM, can directly be replaced with existing SPM.When temperature near FRD pipe is relatively low, ITRIP and a relatively low voltage ratio are relatively, it is ensured that the susceptiveness to SPM overcurrent protection, and when temperature is higher, ITRIP and a higher voltage ratio relatively, take into account the stability of SPM work；Further, when temperature is relatively low, pfc circuit uses the FRD pipe that forward conduction voltage drop is lower to obtain lower power consumption, and when temperature is higher, the FRD pipe that PFC uses reverse recovery time shorter reduces the voltage noise of circuit；So that SPM of the present utility model is on the premise of normal protective mechanisms persistently comes into force, maintains the stability of system, improve the user satisfaction of product simultaneously.
The technical solution of the utility model is described in detail above in association with accompanying drawing, the utility model proposes a kind of new SPM, can guarantee that SPM can effectively reduce SPM at high temperature by the probability of false triggering on the premise of low-power consumption normally works at normal temperatures.
The foregoing is only preferred embodiment of the present utility model, be not limited to this utility model, for a person skilled in the art, this utility model can have various modifications and variations.All within spirit of the present utility model and principle, any modification, equivalent substitution and improvement etc. made, within should be included in protection domain of the present utility model.
Claims (10)
1. a SPM, it is characterised in that including:
Brachium pontis signal input part, three-phase low reference voltage end, current detecting end and PFC end under brachium pontis signal input part, three-phase on three-phase；
HVIC manages, it is provided with on described HVIC pipe and is respectively connecting on described three-phase the terminals of brachium pontis signal input part under brachium pontis signal input part and described three-phase, and the first port corresponding to described current detecting end, described first port is connected with described current detecting end by connecting line；
Sampling resistor, described three-phase low reference voltage end and described current detecting end be connected to the first end of described sampling resistor, and the second end of described sampling resistor is connected to the low-pressure area power supply negative terminal of described SPM；
Adaptive circuit, the first input end of described adaptive circuit is connected to described first port, and the outfan of described adaptive circuit is as the Enable Pin of described HVIC pipe；
PFC freewheeling circuit, first input/output terminal of described PFC freewheeling circuit, second input/output terminal and outfan are connected respectively to described PFC end, the high voltage input of described SPM and the second input of described adaptive circuit, described PFC freewheeling circuit is according to the temperature of described SPM, realize forward conduction voltage drop and less than the function of the fly-wheel diode of predetermined pressure drop value or realize the Reverse recovery duration function less than the fly-wheel diode of scheduled duration, and when the temperature of described SPM is less than predetermined temperature value, the signal of the first level is exported by the outfan of described PFC freewheeling circuit, when the temperature of described SPM is higher than described predetermined temperature value, the signal of second electrical level is exported by the outfan of described PFC freewheeling circuit；
Wherein, the level signal that described adaptive circuit inputs according to size and described second input of the input signal of described first input end, the enable signal of corresponding level is exported by the outfan of described adaptive circuit.
SPM the most according to claim 1, it is characterised in that:
Described adaptive circuit is when described second input inputs the signal of described first level, if the value of the input signal of described first input end is more than or equal to the first setting value, then exported the enable signal of described first level by the outfan of described adaptive circuit, to forbid that described HVIC pipe works；Otherwise, the enable signal of described second electrical level is exported by the outfan of described adaptive circuit, to allow described HVIC pipe to work；
Described adaptive circuit is when described second input inputs the signal of described second electrical level, if the value of the input signal of described first input end is more than or equal to the second setting value, then exported the enable signal of described first level by the outfan of described adaptive circuit；Otherwise, the enable signal of described second electrical level is exported by the outfan of described adaptive circuit；
Wherein, described second setting value is more than described first setting value.
SPM the most according to claim 1, it is characterised in that described adaptive circuit includes:
First voltage comparator, the positive input terminal of described first voltage comparator is as the first input end of described adaptive circuit, the negative input end of described first voltage comparator is connected to the positive pole of the first voltage source, the negative pole of described first voltage source is connected to the power supply negative pole of described adaptive circuit, the outfan of described first voltage comparator is connected to the first selection end and first input end of the first NAND gate of the first analog switch, the power supply positive pole of described adaptive circuit and negative pole are connected respectively the low-pressure area power supply anode to described SPM and negative terminal；
Second voltage comparator, the positive input terminal of described second voltage comparator is connected to the positive input terminal of described first voltage comparator, the negative input end of described second voltage comparator is connected to the positive pole of the second voltage source, the negative pole of described second voltage source is connected to the power supply negative pole of described adaptive circuit, the outfan of described second voltage comparator is connected to the second input of described first NAND gate, the outfan of described first NAND gate is connected to the input of the first not gate, the outfan of described first not gate is connected to the second selection end of described first analog switch, the control end of described first analog switch is as the second input of described adaptive circuit, the fixing end of described first analog switch is connected to the input of the second not gate, the outfan of described second not gate is as the outfan of described adaptive circuit.
SPM the most according to claim 1, it is characterised in that:
Described PFC freewheeling circuit is when the temperature of described SPM is less than predetermined temperature value, it is achieved forward conduction voltage drop is less than the function of the fly-wheel diode of predetermined pressure drop value；And
Described PFC freewheeling circuit is when the temperature of described SPM is higher than described predetermined temperature value, it is achieved Reverse recovery duration is less than the function of the fly-wheel diode of scheduled duration.
SPM the most according to claim 4, it is characterised in that described PFC freewheeling circuit includes:
First resistance, first end of described first resistance is connected to the power supply positive pole of described PFC freewheeling circuit, second end of described first resistance is connected to the negative electrode of Zener diode, the anode of described Zener diode is connected to the power supply negative pole of described PFC freewheeling circuit, and the power supply positive pole of described PFC freewheeling circuit and negative pole are respectively connecting to low-pressure area power supply anode and the negative terminal of described SPM；
Second resistance, the first end of described second resistance is connected to the second end of described first resistance, and the second end of described second resistance is connected to the positive input terminal of tertiary voltage comparator；
Critesistor, the first end of described critesistor is connected to the second end of described second resistance, and the second end of described critesistor is connected to the anode of described Zener diode；
Tertiary voltage source, the negative pole in described tertiary voltage source is connected to the anode of described Zener diode, the positive pole in described tertiary voltage source is connected to the negative input end of described tertiary voltage comparator, the outfan of described tertiary voltage comparator is connected to the input of the 3rd not gate, the outfan of described 3rd not gate is connected to the input of the 4th not gate, and the outfan of described 4th not gate is as the outfan of described PFC freewheeling circuit；
Second analog switch, the fixing end of described second analog switch is as the first input/output terminal of described PFC freewheeling circuit, first selection end of described second analog switch is connected to the negative electrode of the first fly-wheel diode, second selection end of described second analog switch is connected to the negative electrode of the second fly-wheel diode, and the end that controls of described second analog switch is connected to the outfan of described 4th not gate；
3rd analog switch, the fixing end of described 3rd analog switch is as the second input/output terminal of described PFC freewheeling circuit, first selection end of described 3rd analog switch is connected to the anode of described first fly-wheel diode, second selection end of described 3rd analog switch is connected to the anode of described second fly-wheel diode, and the end that controls of described 3rd analog switch is connected to the outfan of described 4th not gate；
Wherein, the forward conduction voltage drop of described first fly-wheel diode is less than predetermined pressure drop value, the Reverse recovery duration of described second fly-wheel diode is less than scheduled duration, and described critesistor is arranged on described first fly-wheel diode and the position at described second fly-wheel diode place.
SPM the most according to claim 1, it is characterised in that be additionally provided with the signal output part of PFC drive circuit on described HVIC pipe, described SPM also includes:
First power switch pipe and the first diode, the anode of described first diode is connected to the emitter stage of described first power switch pipe, the negative electrode of described first diode is connected to the colelctor electrode of described first power switch pipe, the base stage of described first power switch pipe is connected to the signal output part of described PFC drive circuit, the emitter stage of described first power switch pipe is as the PFC low reference voltage end of described SPM, and the colelctor electrode of described first power switch pipe is as described PFC end.
SPM the most according to any one of claim 1 to 6, it is characterised in that also include:
Bridge arm circuit on three-phase, the signal output part of corresponding phase during the input of bridge arm circuit is connected to the three-phase high-voltage district of described HVIC pipe in each phase in bridge arm circuit on described three-phase；
Bridge arm circuit under three-phase, the signal output part of corresponding phase during the input of bridge arm circuit is connected to the three-phase low-voltage district of described HVIC pipe under each phase in bridge arm circuit under described three-phase.
SPM the most according to claim 7, it is characterised in that in described each phase, bridge arm circuit includes:
Second power switch pipe and the second diode, the anode of described second diode is connected to the emitter stage of described second power switch pipe, the negative electrode of described second diode is connected to the colelctor electrode of described second power switch pipe, the colelctor electrode of described second power switch pipe is connected to the high voltage input of described SPM, the base stage of described second power switch pipe is as the input of bridge arm circuit in described each phase, and the emitter stage of described second power switch pipe is connected to the higher-pressure region power supply negative terminal of described SPM correspondence phase.
SPM the most according to claim 8, it is characterised in that under described each phase, bridge arm circuit includes:
3rd power switch pipe and the 3rd diode, the anode of described 3rd diode is connected to the emitter stage of described 3rd power switch pipe, the negative electrode of described 3rd diode is connected to the colelctor electrode of described 3rd power switch pipe, the colelctor electrode of described 3rd power switch pipe is connected to the anode of described second diode in the upper bridge arm circuit of correspondence, the base stage of described 3rd power switch pipe is as the input of bridge arm circuit under described each phase, and the emitter stage of described 3rd power switch pipe is as the low reference voltage end of the corresponding phase of described SPM.
10. an air-conditioner, it is characterised in that including: SPM as claimed in any one of claims 1-9 wherein.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620169863.6U CN205453537U (en) | 2016-03-04 | 2016-03-04 | Intelligence power module and air conditioner |
| PCT/CN2016/097742 WO2017148121A1 (en) | 2016-03-04 | 2016-08-31 | Intelligent power module and air conditioner |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620169863.6U CN205453537U (en) | 2016-03-04 | 2016-03-04 | Intelligence power module and air conditioner |
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| CN205453537U true CN205453537U (en) | 2016-08-10 |
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| CN201620169863.6U Expired - Fee Related CN205453537U (en) | 2016-03-04 | 2016-03-04 | Intelligence power module and air conditioner |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105703657A (en) * | 2016-03-04 | 2016-06-22 | 广东美的制冷设备有限公司 | Intelligent power module and air conditioner |
| WO2017148121A1 (en) * | 2016-03-04 | 2017-09-08 | 广东美的制冷设备有限公司 | Intelligent power module and air conditioner |
-
2016
- 2016-03-04 CN CN201620169863.6U patent/CN205453537U/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105703657A (en) * | 2016-03-04 | 2016-06-22 | 广东美的制冷设备有限公司 | Intelligent power module and air conditioner |
| WO2017148121A1 (en) * | 2016-03-04 | 2017-09-08 | 广东美的制冷设备有限公司 | Intelligent power module and air conditioner |
| CN105703657B (en) * | 2016-03-04 | 2018-03-27 | 广东美的制冷设备有限公司 | SPM and air conditioner |
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