CN105514157A - GaN-based double heterojunction HEMT (High Electron Mobility Transistor) device and manufacturing method thereof - Google Patents

GaN-based double heterojunction HEMT (High Electron Mobility Transistor) device and manufacturing method thereof Download PDF

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CN105514157A
CN105514157A CN201610019754.0A CN201610019754A CN105514157A CN 105514157 A CN105514157 A CN 105514157A CN 201610019754 A CN201610019754 A CN 201610019754A CN 105514157 A CN105514157 A CN 105514157A
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gan
layer
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grid
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陈效双
姚路驰
王林
胡伟达
陆卫
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Shanghai Institute of Technical Physics of CAS
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    • H01L29/7783—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET using III-V semiconductor material
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    • H01L29/66462—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT

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Abstract

The invention discloses a GaN-based double heterojunction HEMT (High Electron Mobility Transistor) device and a manufacturing method thereof. A structure of the device sequentially comprises a GaN buffer layer, an AlInN barrier layer, a GaN channel layer, an AlGaN isolation layer and an AlGaN barrier layer which are sequentially formed on a sapphire substrate, an AlGaN gate dielectric layer, a source electrode, a grid electrode and a drain electrode formed on the AlGaN gate dielectric layer, an Si3N4 source grid insulation layer formed between the source electrode and the grid electrode, and an Si3N4 drain grid insulation layer formed between the source electrode and the drain electrode. The manufacturing method is characterized by comprising the following steps of adding a layer of AlInN barrier layer between the GaN buffer layer and the GaN channel layer of a conventional GaN HEMT device, utilizing the piezoelectric polarization property of AlInN materials to reduce the current collapse of the device, and forming an AlGaN/GaN/AlInN quantum well structure, so that the binding force on two-dimension electron gas is further improved, and the current collapse is reduced.

Description

A kind of GaN base double heterojunction HEMT device and preparation method thereof
Technical field
The present invention relates to electronic component technology, specifically refers to a kind of GaN base double heterojunction HEMT device and preparation method thereof.
Technical background
AlGaN/GaN heterojunction High Electron Mobility Transistor (HEMT) is attracting the concern of the numerous researcher of semiconductor applications in the past in the more than ten years because of its excellent properties in the application of high power, high frequency and high temperature.But current collapse effect and self-heating effect seriously govern the Performance And Reliability of GaN device.In order to obtain more high-performance and more powerful AlGaN/GaNHEMT device, researcher has invented some optimizing structure based on AlGaN/GaN structure, as: the human hairs such as the W.Lanfort of the New York State University in 2004 understand AlGaN/InGaN/GaN double-heterostructure, the people such as the O.Katz of engineering institute of Israel in 2009 propose InAlN/GaN heterostructure, and the HEMT that two groups of researchers demonstrate these two kinds of structures respectively by experiment has stronger performance and larger power.The people such as the S.Zhang of Harbin Institute of Technology in 2009 propose AlN/GaN/AlN double-heterostructure, result proves at raceway groove and wears and insert AlN barrier layer between cushioning layer and add the binding force of two-dimensional electron gas in raceway groove, thus drastically increases performance and the power of device.
AlInN and GaN conduction band band jump is comparatively large, forms heterojunction and a day electronics can be stoped to go out raceway groove enter barrier layer and resilient coating, thus improves the current strength of HEMT device under high electric field and Linearity.Ultra-thin AlInN/GaN heterojunction has the two-dimensional electron gas of high mobility, high concentration, can be applicable to high transconductance, low threshold voltage HEMT, and Terahertz plasma wave launcher, high-power biology sensor etc.
Traditional GaN base HEMT device is generally realized by depositing Al N (or AlGaN or InAlN) barrier layer on GaN resilient coating.The structure of GaN raceway groove and GaN resilient coating one can cause some problems: under the first radio frequency operation condition, and surface trap and GaN resilient coating body internal trap can be captured the hot electron that raceway groove inscattering goes out and be caused current collapse, and microwave output current is declined; Under second DC condition, thermoelectronic effect can cause between the paddy of electronics and shifts, and causes device saturation voltage to decline.Therefore be necessary to propose a kind of new structure to avoid the problems referred to above.
Traditional AlGaN/GaNHEMT device architecture as shown in Figure 1.It is characterized in that forming GaN resilient coating, AlGaN separator, AlGaN potential barrier, AlGaN gate dielectric layer on a sapphire substrate successively, AlGaN separator is formed source electrode, drain and gate, wherein source electrode, drain electrode form ohmic contact with AlGaN gate dielectric layer respectively, and grid and AlGaN gate dielectric layer form Schottky contacts.Because polarization two-dimensional electron gas can interface aggregates between AlGaN and GaN, form raceway groove.This structure has mainly done the improvement in two on traditional GaN base HEMT basis: AlGaN separator and GaN buffering separate at the AlGaN separator adopting one deck deliberately not adulterate by () this knot layer by layer, the AlGaN potential barrier defect alleviated due to doping is captured the current collapse effect caused, and is enhanced the binding force to two-dimensional electron gas; (2) this structure adopts non-doped with Al GaN gate dielectric layer, reduces grid leakage current, improves devices switch ratio.But this structure also exists very large defect, one is that semi-insulated GaN resilient coating introduces parasite current, reduces device on-off ratio, reduces device performance; Two is that device occurs current collapse phenomenon when running under high electric field, and this is mainly buffered caused by a layer internal trap capture because two-dimensional electron gas accelerates to be formed hot electron overflow drain under high electric field.
Summary of the invention
The object of the invention is: provide a kind of GaN base double heterojunction HEMT device, reduce the thermoelectronic effect of existing device, the negative differential conductivity effect of abatement device improves the saturation current of device simultaneously.
GaN base double heterojunction HEMT device structure of the present invention as shown in Figure 2.Comprise: the GaN resilient coating 11 that Sapphire Substrate 12 is formed successively, AlInN barrier layer 10, GaN channel layer 9, AlGaN separator 8, AlGaN potential barrier 7, AlGaN gate dielectric layer 6, the source electrode 1 that AlGaN gate dielectric layer 6 is formed, grid 2 and drain electrode 3, and the Si formed between source electrode 1 and grid 2 3n 4source gate insulation layer 4, the Si formed between source electrode 2 and drain electrode 3 3n 4drain-gate insulating barrier 5.In this structure, GaN resilient coating 11 is involuntary doping, and thickness is 3 μm; AlInN barrier layer 10 is involuntary doping, and thickness is 3-5nm; The silicon ion back end doping content of GaN channel layer 9 is 3 × 10 18cm -3, thickness is 20nm; AlGaN separator 8 is involuntary doping, and thickness is 3nm; The phosphorus doping doping content of AlGaN potential barrier is 4 × 10 19cm -3, thickness is 15nm; AlGaN gate dielectric layer is involuntary doping, and thickness is 2nm; Si 3n 4source gate insulation layer 4 and Si 3n 4drain-gate insulating barrier 5 thickness is 20nm; Source electrode 1 and drain electrode 3 are metal ohmic contact Ti/Al/Ni/Au, Ti thickness be 20nm, Al thickness be 120nm, Ni thickness be 45nm, Au thickness is 55nm; Grid 2 is W metal/Au, Ni thickness be 20nm, Au thickness is 200nm.Source electrode 1, the length of grid 2 and drain electrode 3 is 1 μm; Si 3n 4source gate insulation layer 4 and Si 3n 4the length of drain-gate insulating barrier 5 is 1 μm.
The object of the present invention is achieved like this: the present invention adds one deck AlInN barrier layer between the GaN resilient coating and GaN channel layer of traditional HEMT device, the piezoelectric polarization character of AlInN material is utilized to reduce the current collapse effect of device, and form AlGaN/GaN/AlInN quantum well structure, further increase the binding force to two-dimensional electron gas, thus reduce current collapse effect.
The preparation of GaN base double heterojunction HEMT device is undertaken by following several step:
(1) in Sapphire Substrate 12 along departing from crystallographic axis 10 degree of directions, utilize metal organic chemical vapor deposition technique growing GaN resilient coating 11;
(2) on GaN resilient coating 11, growing AlInN barrier layer 10;
(3) on AlInN barrier layer 10, then growing GaN channel layer 9 adopts Si ion implantation technique to adulterate to GaN channel layer 9 back end;
(4) on GaN channel layer 9, grow AlGaN separator 8, AlGaN potential barrier 7, AlGaN gate dielectric layer 6, then adopt ion implantation technology to AlGaN potential barrier 7 phosphorus doping;
(5) in AlGaN potential barrier 7, atom layer deposition process growth Si is adopted 3n 4dielectric film;
(6) Si 3n 4after film is formed, by the window of photoetching process needed for source, leakage, area of grid formation etching, reactive ion etching process is adopted to remove the Si of source, drain region 3n 4film;
(7) after having etched, utilize photoetching process to obtain source, drain region window, then adopt electron beam evaporation process, source, drain region window evaporate metal ohmic contact Ti/Al/Ni/Au, form source electrode 1 and drain electrode 3.
(8), after source electrode 1 and drain electrode 3 are formed, utilize photoetching process to obtain area of grid window, then adopt electron beam evaporation process, area of grid window evaporates Schottky contact metal Ni/Au, form grid 2 and Si 3n 4source gate insulation layer 4, Si 3n 4drain-gate insulating barrier 5.So far device manufacture is completed.
The processing step of above-mentioned a kind of novel GaN base double heterojunction HEMT device, said growing GaN resilient coating 11, its growth conditions is: growth rate is 30nm/ minute, and thickness is 3 μm.
The processing step of above-mentioned a kind of novel GaN base double heterojunction HEMT device, said growing AlInN barrier layer 10, its growth conditions is: growth response temperature is 800 DEG C, and growth rate is 1nm/ minute, and thickness is 3-5nm.
The processing step of above-mentioned a kind of novel GaN base double heterojunction HEMT device, said growing GaN channel layer 9, its growth conditions is: growth response room temperature controls between 800 DEG C-950 DEG C, and growth rate is 5nm/ minute, thickness 20nm.
The processing step of above-mentioned a kind of novel GaN base double heterojunction HEMT device, said growth AlGaN separator 8, AlGaN potential barrier 7, AlGaN gate dielectric layer 6, its growth conditions is: growth response room temperature controls between 800 DEG C-950 DEG C, growth rate is 5nm/ minute, thickness 20nm.
The processing step of above-mentioned a kind of novel GaN base double heterojunction HEMT device, said growth Si 3n 4dielectric film, its growth conditions is: growth response temperature 700 DEG C, and thickness is 20nm.
The processing step of above-mentioned a kind of novel GaN base double heterojunction HEMT device, said GaN channel layer 9 back end to be adulterated, be exactly that make silicon ion mainly be distributed in the latter half of GaN channel layer 9, wherein silicon ion adulterates as alms giver by ion implantation technology.
The processing step of above-mentioned a kind of novel GaN base double heterojunction HEMT device, said to AlGaN potential barrier 7 phosphorus doping, be exactly that make phosphonium ion mainly be distributed in the mid portion of AlGaN potential barrier 9, wherein phosphonium ion adulterates as alms giver by ion implantation technology.
The present invention compared with prior art tool has the following advantages:
(1) method of the present invention's proposition, is extension one deck AlInN barrier layer and GaN channel layer on GaN resilient coating.Compared with traditional AlGaN/GaNHEMT device, the present invention adds an AlInN barrier layer between GaN resilient coating and GaN channel layer, define AlGaN/GaN/AlInN quantum well structure, thus greatly reduce parasitic conductance and the leakage current of GaN resilient coating, further increase the binding force of two-dimensional electron gas in raceway groove simultaneously, reduce current collapse effect.
(2) after epitaxial growth GaN channel layer, its back end is adulterated in the present invention, polarization charge the exhausting two-dimensional electron gas born to eliminate GaN/AlInN section, the electronics that alms giver is provided is assembled to raceway groove under polarization field effect, effectively improves two-dimensional electron gas.In addition owing to reducing interface roughness and mixed crystal scattering, in AlGaN/GaN/AlInN quantum well, two-dimensional electron gas has higher mobility (>=1700cm 2/ Vs), the channel conduction of the novel GaN base double heterojunction High Electron Mobility Transistor devices of therefore the present invention's proposition will double above than traditional AlGaN/GaNHEMT device.
(3) processing step of the present invention is all the relatively ripe technique of Present Domestic, and technical process is fairly simple, complete and traditional GaN base HEMT device preparation technology compatibility.
Accompanying drawing explanation
Accompanying drawing 1 is traditional AlGaN/GaNHEMT device architecture schematic diagram.
Accompanying drawing 2 is GaN base double heterojunction HEMT device structural representation of the present invention.
Accompanying drawing 3 is that the output characteristic of GaN base double heterojunction HEMT device of the present invention and traditional AlGaN/GaNHEMT device compares.
Accompanying drawing 4 is the differential conductance Property comparison of GaN base double heterojunction HEMT device of the present invention and traditional AlGaN/GaNHEMT device.
Embodiment
For making content of the present invention, technical scheme and advantage clearly understand, set forth the present invention further below in conjunction with specific embodiment, these embodiments are only for illustration of the present invention, and the present invention is not limited only to following examples.Below in conjunction with accompanying drawing, the specific embodiment of the present invention is elaborated:
Embodiment 1:
See Fig. 2, it is GaN base double heterojunction High Electron Mobility Transistor devices structural representation of the present invention.Be substrate with sapphire in preparation process, respectively using trimethyl gallium (TMGa), trimethyl aluminium (TMAl), trimethyl indium (TMIn) as gallium source, aluminium source and indium source, take high purity ammonia gas as nitrogenous source, hydrogen is carrier gas, and concrete preparation flow is as follows:
1. Sapphire Substrate is placed in the reative cell of metal organic chemical vapor deposition (MOCVD) equipment, the vacuum degree of reative cell is evacuated to 1 × 10 -2below Torr, carries out high-temperature heat treatment to Sapphire Substrate under the protection of hydrogen, and heating-up temperature is 1100 DEG C, heating time 5min, chamber pressure is 40Torr, and passing into hydrogen flowing quantity is 3000sccm;
2. underlayer temperature is reduced to 800 DEG C, maintenance growth pressure is 40Torr, and hydrogen flowing quantity is 1500sccm, and ammonia flow is 1500sccm, passes into the gallium source that flow is 50 μm of ol/min in reative cell, take epitaxial growth thickness as the GaN resilient coating of 3 μm;
3. in reative cell, pass into aluminium source and indium source, maintaining reaction temperature is 800 DEG C, controls flow well, and growth thickness is the AlInN barrier layer of 3nm simultaneously;
4. in reative cell, pass into gallium source, maintaining reaction temperature is 800 DEG C, controls flow well, and growth thickness is the GaN channel layer of 20nm;
5. control the injection degree of depth of silicon ion, the silicon ion of injection is mainly concentrated in the region of 10nm after GaN channel layer, and to realize the back end donor doping to channel layer, doping content is 3 × 10 18cm -3;
6. in reative cell, pass into aluminium source and gallium source, maintaining reaction temperature is 800 DEG C, controls flow well simultaneously, and growth thickness is the AlGaN separator of 20nm, AlGaN potential barrier and AlGaN gate dielectric layer;
7. control the injection degree of depth of phosphonium ion, in the region that the phosphonium ion of injection is mainly concentrated in the middle part of AlGaN potential barrier, doping content is 4 × 10 19cm -3;
8. form Si 3n 4film: adopt ALD technique to deposit Si at 700 DEG C 3n 4film, and then the 60s that anneals in ammonia atmosphere at 1000 DEG C, obtaining thickness is the Si of 20nm 3n 4film, then to sample surfaces positive-glue removing, rotating speed is 5000 turns/min, then is dry 10min in the baking oven of 80 DEG C in temperature, by photoetching and be developed in source, grid, drain region formed etching needed for window, adopt reactive ion etching process remove source, drain region Si 3n 4film;
9. photolithographic source, drain region: in order to stripping metal better, first on sample, adhesive is got rid of, rotating speed is 8000 turns/min, time is 30s, in the high temperature oven of temperature 160 DEG C, dry 20min, and then on sample positive-glue removing, rotating speed is 5000 turns/min, last is dry 10min in the baking oven of 80 DEG C in temperature, obtains source, drain region window by photoetching;
10. evaporation source, leakage metal: adopt electron beam evaporation process depositing Ti/Al/Ni/Au tetra-layers of metal;
11. peel off source, leakage metal and annealing: carry out ultrasonic process after soaking more than 20min in acetone, then dry up with nitrogen.Sample is put into quick anneal oven anneal: first pass into nitrogen about 7 minutes to annealing furnace, then in a nitrogen atmosphere, temperature is carry out 30s short annealing under 800 DEG C of conditions;
12. photoetched grid regions: in order to stripping metal better, first on sample, adhesive is got rid of, rotating speed is 8000 turns/min, time is 30s, in the high temperature oven of temperature 160 DEG C, dry 20min, and then on sample positive-glue removing, rotating speed is 5000 turns/min, last is dry 10min in the baking oven of 80 DEG C in temperature, obtains area of grid window by photoetching;
13. evaporation gate metals: adopt electron beam evaporation process deposition Ni/Au double layer of metal, to be immersed in stripper 2 minutes subsequently, to obtain grid by sample.So far device manufacture is completed.
14. embodiment performance tests.Fig. 1 is traditional AlGaN/GaNHEMT device architecture schematic diagram.Fig. 3 compared for the GaN base double heterojunction HEMT device of embodiment 1 and the output characteristic curve (source-drain current-source-drain voltage) of traditional AlGaN/GaNHEMT device, and wherein solid line is analogue data, and hollow dots is experimental data.Result under being presented at identical drain voltage the output current density of device of the present invention obviously large than traditional devices, this weakens cause because AlInN/GaN interface has larger polarization charge densities and self-heating effect, thus device of the present invention may be used for manufacturing high power device, Fig. 4 compares the GaN base double heterojunction High Electron Mobility Transistor devices of embodiment 1 and the differential conductance characteristic (differential conductance-source-drain voltage) of traditional AlGaN/GaNHEMT device.There is obvious negative differential conductivity phenomenon in result display traditional devices, and there is not negative differential conductivity phenomenon in device of the present invention, this is because AlGaN/GaN/AlInN quantum well structure obviously inhibits thermoelectronic effect, thus reduce current collapse effect, thus improve the linearity of device.
Embodiment 2:
See Fig. 2, it is GaN base double heterojunction High Electron Mobility Transistor devices structural representation of the present invention.Be substrate with sapphire in preparation process, respectively using trimethyl gallium (TMGa), trimethyl aluminium (TMAl), trimethyl indium (TMIn) as gallium source, aluminium source and indium source, take high purity ammonia gas as nitrogenous source, hydrogen is carrier gas, and concrete preparation flow is as follows:
1. Sapphire Substrate is placed in the reative cell of metal organic chemical vapor deposition (MOCVD) equipment, the vacuum degree of reative cell is evacuated to 1 × 10 -2below Torr, carries out high-temperature heat treatment to Sapphire Substrate under the protection of hydrogen, and heating-up temperature is 1100 DEG C, heating time 5min, chamber pressure is 40Torr, and passing into hydrogen flowing quantity is 3000sccm;
2. underlayer temperature is reduced to 800 DEG C, maintenance growth pressure is 40Torr, and hydrogen flowing quantity is 1500sccm, and ammonia flow is 1500sccm, passes into the gallium source that flow is 50 μm of ol/min in reative cell, take epitaxial growth thickness as the GaN resilient coating of 3 μm;
3. in reative cell, pass into aluminium source and indium source, maintaining reaction temperature is 800 DEG C, controls flow well, and growth thickness is the AlInN barrier layer of 4nm simultaneously;
4. in reative cell, pass into gallium source, maintaining reaction temperature is 800 DEG C, controls flow well, and growth thickness is the GaN channel layer of 20nm;
5. control the injection degree of depth of silicon ion, the silicon ion of injection is mainly concentrated in the region of 10nm after GaN channel layer, and to realize the back end donor doping to channel layer, doping content is 3 × 10 18cm -3;
6. in reative cell, pass into aluminium source and gallium source, maintaining reaction temperature is 800 DEG C, controls flow well simultaneously, and growth thickness is the AlGaN separator of 20nm, AlGaN potential barrier and AlGaN gate dielectric layer;
7. control the injection degree of depth of phosphonium ion, in the region that the phosphonium ion of injection is mainly concentrated in the middle part of AlGaN potential barrier, doping content is 4 × 10 19cm -3;
8. form Si 3n 4film: adopt ALD technique to deposit Si at 700 DEG C 3n 4film, and then the 60s that anneals in ammonia atmosphere at 1000 DEG C, obtaining thickness is the Si of 20nm 3n 4film, then to sample surfaces positive-glue removing, rotating speed is 5000 turns/min, then is dry 10min in the baking oven of 80 DEG C in temperature, by photoetching and be developed in source, grid, drain region formed etching needed for window, adopt reactive ion etching process remove source, drain region Si 3n 4film;
9. photolithographic source, drain region: in order to stripping metal better, first on sample, adhesive is got rid of, rotating speed is 8000 turns/min, time is 30s, in the high temperature oven of temperature 160 DEG C, dry 20min, and then on sample positive-glue removing, rotating speed is 5000 turns/min, last is dry 10min in the baking oven of 80 DEG C in temperature, obtains source, drain region window by photoetching;
10. evaporation source, leakage metal: adopt electron beam evaporation process depositing Ti/Al/Ni/Au tetra-layers of metal;
11. peel off source, leakage metal and annealing: carry out ultrasonic process after soaking more than 20min in acetone, then dry up with nitrogen.Sample is put into quick anneal oven anneal: first pass into nitrogen about 7 minutes to annealing furnace, then in a nitrogen atmosphere, temperature is carry out 30s short annealing under 800 DEG C of conditions;
12. photoetched grid regions: in order to stripping metal better, first on sample, adhesive is got rid of, rotating speed is 8000 turns/min, time is 30s, in the high temperature oven of temperature 160 DEG C, dry 20min, and then on sample positive-glue removing, rotating speed is 5000 turns/min, last is dry 10min in the baking oven of 80 DEG C in temperature, obtains area of grid window by photoetching;
13. evaporation gate metals: adopt electron beam evaporation process deposition Ni/Au double layer of metal, to be immersed in stripper 2 minutes subsequently, to obtain grid by sample.So far device manufacture is completed.
14. embodiment performance tests.Fig. 1 is traditional AlGaN/GaNHEMT device architecture schematic diagram.Fig. 3 compared for the GaN base double heterojunction HEMT device of embodiment 2 and the output characteristic curve (source-drain current-source-drain voltage) of traditional AlGaN/GaNHEMT device, and wherein solid line is analogue data, and hollow dots is experimental data.Result under being presented at identical drain voltage the output current density of device of the present invention obviously large than traditional devices, this weakens cause because AlInN/GaN interface has larger polarization charge densities and self-heating effect, thus device of the present invention may be used for manufacturing high power device, Fig. 4 compares the GaN base double heterojunction High Electron Mobility Transistor devices of embodiment 2 and the differential conductance characteristic (differential conductance-source-drain voltage) of traditional AlGaN/GaNHEMT device.There is obvious negative differential conductivity phenomenon in result display traditional devices, and there is not negative differential conductivity phenomenon in device of the present invention, this is because AlGaN/GaN/AlInN quantum well structure obviously inhibits thermoelectronic effect, thus reduce current collapse effect, thus improve the linearity of device.
Embodiment 3:
See Fig. 2, it is GaN base double heterojunction High Electron Mobility Transistor devices structural representation of the present invention.Be substrate with sapphire in preparation process, respectively using trimethyl gallium (TMGa), trimethyl aluminium (TMAl), trimethyl indium (TMIn) as gallium source, aluminium source and indium source, take high purity ammonia gas as nitrogenous source, hydrogen is carrier gas, and concrete preparation flow is as follows:
1. Sapphire Substrate is placed in the reative cell of metal organic chemical vapor deposition (MOCVD) equipment, the vacuum degree of reative cell is evacuated to 1 × 10 -2below Torr, carries out high-temperature heat treatment to Sapphire Substrate under the protection of hydrogen, and heating-up temperature is 1100 DEG C, heating time 5min, chamber pressure is 40Torr, and passing into hydrogen flowing quantity is 3000sccm;
2. underlayer temperature is reduced to 800 DEG C, maintenance growth pressure is 40Torr, and hydrogen flowing quantity is 1500sccm, and ammonia flow is 1500sccm, passes into the gallium source that flow is 50 μm of ol/min in reative cell, take epitaxial growth thickness as the GaN resilient coating of 3 μm;
3. in reative cell, pass into aluminium source and indium source, maintaining reaction temperature is 800 DEG C, controls flow well, and growth thickness is the AlInN barrier layer of 5nm simultaneously;
4. in reative cell, pass into gallium source, maintaining reaction temperature is 800 DEG C, controls flow well, and growth thickness is the GaN channel layer of 20nm;
5. control the injection degree of depth of silicon ion, the silicon ion of injection is mainly concentrated in the region of 10nm after GaN channel layer, and to realize the back end donor doping to channel layer, doping content is 3 × 10 18cm -3;
6. in reative cell, pass into aluminium source and gallium source, maintaining reaction temperature is 800 DEG C, controls flow well simultaneously, and growth thickness is the AlGaN separator of 20nm, AlGaN potential barrier and AlGaN gate dielectric layer;
7. control the injection degree of depth of phosphonium ion, in the region that the phosphonium ion of injection is mainly concentrated in the middle part of AlGaN potential barrier, doping content is 4 × 10 19cm -3;
8. form Si 3n 4film: adopt ALD technique to deposit Si at 700 DEG C 3n 4film, and then the 60s that anneals in ammonia atmosphere at 1000 DEG C, obtaining thickness is the Si of 20nm 3n 4film, then to sample surfaces positive-glue removing, rotating speed is 5000 turns/min, then is dry 10min in the baking oven of 80 DEG C in temperature, by photoetching and be developed in source, grid, drain region formed etching needed for window, adopt reactive ion etching process remove source, drain region Si 3n 4film;
9. photolithographic source, drain region: in order to stripping metal better, first on sample, adhesive is got rid of, rotating speed is 8000 turns/min, time is 30s, in the high temperature oven of temperature 160 DEG C, dry 20min, and then on sample positive-glue removing, rotating speed is 5000 turns/min, last is dry 10min in the baking oven of 80 DEG C in temperature, obtains source, drain region window by photoetching;
10. evaporation source, leakage metal: adopt electron beam evaporation process depositing Ti/Al/Ni/Au tetra-layers of metal;
11. peel off source, leakage metal and annealing: carry out ultrasonic process after soaking more than 20min in acetone, then dry up with nitrogen.Sample is put into quick anneal oven anneal: first pass into nitrogen about 7 minutes to annealing furnace, then in a nitrogen atmosphere, temperature is carry out 30s short annealing under 800 DEG C of conditions;
12. photoetched grid regions: in order to stripping metal better, first on sample, adhesive is got rid of, rotating speed is 8000 turns/min, time is 30s, in the high temperature oven of temperature 160 DEG C, dry 20min, and then on sample positive-glue removing, rotating speed is 5000 turns/min, last is dry 10min in the baking oven of 80 DEG C in temperature, obtains area of grid window by photoetching;
13. evaporation gate metals: adopt electron beam evaporation process deposition Ni/Au double layer of metal, to be immersed in stripper 2 minutes subsequently, to obtain grid by sample.So far device manufacture is completed.
14. embodiment performance tests.Fig. 1 is traditional AlGaN/GaNHEMT device architecture schematic diagram.Fig. 3 compared for the GaN base double heterojunction HEMT device of embodiment 3 and the output characteristic curve (source-drain current-source-drain voltage) of traditional AlGaN/GaNHEMT device, and wherein solid line is analogue data, and hollow dots is experimental data.Result under being presented at identical drain voltage the output current density of device of the present invention obviously large than traditional devices, this weakens cause because AlInN/GaN interface has larger polarization charge densities and self-heating effect, thus device of the present invention may be used for manufacturing high power device, Fig. 4 compares the GaN base double heterojunction High Electron Mobility Transistor devices of embodiment 3 and the differential conductance characteristic (differential conductance-source-drain voltage) of traditional AlGaN/GaNHEMT device.There is obvious negative differential conductivity phenomenon in result display traditional devices, and there is not negative differential conductivity phenomenon in device of the present invention, this is because AlGaN/GaN/AlInN quantum well structure obviously inhibits thermoelectronic effect, thus reduce current collapse effect, thus improve the linearity of device.

Claims (2)

1. a GaN base double heterojunction HEMT device, its structure is: be GaN resilient coating (11), AlInN barrier layer (10), GaN channel layer (9), AlGaN separator (8), AlGaN potential barrier (7) successively in Sapphire Substrate (12), AlGaN gate dielectric layer (6), source electrode (1), grid (2) and drain electrode (3), on AlGaN gate dielectric layer (6), have Si between source electrode (1) and grid (2) 3n 4source gate insulation layer (4), source electrode (2) and drain electrode (3) between have Si 3n 4drain-gate insulating barrier (5), source electrode (1) and drain electrode (3) form ohmic contact with AlGaN gate dielectric layer (6) respectively, grid (2) and AlGaN gate dielectric layer (6) form Schottky contacts, it is characterized in that:
Between described GaN resilient coating (11) and GaN channel layer (9), adopt the AlInN barrier layer (10) that can reduce device self-heating effect and current collapse effect, thickness is 3-5nm;
The silicon ion back end doping content of described GaN channel layer (9) is 3 × 10 18cm -3, thickness is 20nm.
2. prepare a manufacture method for device as claimed in claim 1, it is characterized in that comprising the following steps:
1), in Sapphire Substrate (12) along departing from crystallographic axis 10 degree of directions, utilize metal organic chemical vapor deposition technique with 30nm/ minute growth rate, growth thickness is the GaN resilient coating of 3 μm;
2), on GaN resilient coating (11), growing AlInN barrier layer (10), growth response temperature is 800 DEG C, and growth rate is 1nm/ minute, and thickness is 3-5nm;
3), at the upper growing GaN channel layer (9) of AlInN barrier layer (10), growth response room temperature controls between 800 DEG C-950 DEG C, growth rate is 5nm/ minute, thickness 20nm, then adopts Si ion implantation technique to adulterate to GaN channel layer (9) back end;
4), in GaN channel layer (9) upper growth AlGaN separator (8), AlGaN potential barrier (7), AlGaN gate dielectric layer (6), growth temperature 700 DEG C, growth rate 2nm/ minute, thickness 20nm, then adopts phosphonium ion injection technology to adulterate to AlGaN potential barrier (7);
5), in AlGaN potential barrier (7), atom layer deposition process deposit thickness at 700 DEG C is adopted to be the Si of 20nm 3n 4dielectric film;
6), Si 3n 4after film is formed, by the window of photoetching process needed for source, leakage, area of grid formation etching, reactive ion etching process is adopted to remove the Si of source, drain region 3n 4film;
7) after, having etched, photoetching process is utilized to obtain source, drain region window, then adopt electron beam evaporation process, source, drain region window evaporate metal ohmic contact Ti, Al, Ni and Au, form source electrode (1) and drain electrode (3);
8) after, source electrode (1) and drain electrode (3) are formed, photoetching process is utilized to obtain area of grid window, then adopt electron beam evaporation process, area of grid window evaporates Schottky contact metal Ni and Au, form grid (2) and Si 3n 4source gate insulation layer (4), Si 3n 4drain-gate insulating barrier (5), completes element manufacturing.
CN201610019754.0A 2016-01-13 2016-01-13 GaN-based double heterojunction HEMT (High Electron Mobility Transistor) device and manufacturing method thereof Pending CN105514157A (en)

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