CN105493061B - 用于多芯片封装上的异构存储器的统一存储器控制器 - Google Patents
用于多芯片封装上的异构存储器的统一存储器控制器 Download PDFInfo
- Publication number
- CN105493061B CN105493061B CN201480048456.3A CN201480048456A CN105493061B CN 105493061 B CN105493061 B CN 105493061B CN 201480048456 A CN201480048456 A CN 201480048456A CN 105493061 B CN105493061 B CN 105493061B
- Authority
- CN
- China
- Prior art keywords
- memory
- host interface
- unified
- memory controller
- chip package
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1668—Details of memory controller
- G06F13/1694—Configuration of memory controller to different memory types
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0604—Improving or facilitating administration, e.g. storage management
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
- G06F3/0658—Controller construction arrangements
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0683—Plurality of storage devices
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Human Computer Interaction (AREA)
- Memory System (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US14/016,717 US10185515B2 (en) | 2013-09-03 | 2013-09-03 | Unified memory controller for heterogeneous memory on a multi-chip package |
| US14/016,717 | 2013-09-03 | ||
| PCT/US2014/045983 WO2015034580A1 (en) | 2013-09-03 | 2014-07-09 | Unified memory controller for heterogeneous memory on a multi-chip package |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN105493061A CN105493061A (zh) | 2016-04-13 |
| CN105493061B true CN105493061B (zh) | 2020-11-03 |
Family
ID=51293140
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201480048456.3A Expired - Fee Related CN105493061B (zh) | 2013-09-03 | 2014-07-09 | 用于多芯片封装上的异构存储器的统一存储器控制器 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US10185515B2 (enExample) |
| EP (1) | EP3042295A1 (enExample) |
| JP (1) | JP2016532974A (enExample) |
| KR (1) | KR20160048911A (enExample) |
| CN (1) | CN105493061B (enExample) |
| WO (1) | WO2015034580A1 (enExample) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR102408613B1 (ko) | 2015-08-27 | 2022-06-15 | 삼성전자주식회사 | 메모리 모듈의 동작 방법, 및 메모리 모듈을 제어하는 프로세서의 동작 방법, 및 사용자 시스템 |
| US10268541B2 (en) | 2016-08-15 | 2019-04-23 | Samsung Electronics Co., Ltd. | DRAM assist error correction mechanism for DDR SDRAM interface |
| KR102482896B1 (ko) | 2017-12-28 | 2022-12-30 | 삼성전자주식회사 | 이종 휘발성 메모리 칩들을 포함하는 메모리 장치 및 이를 포함하는 전자 장치 |
| US20210233585A1 (en) * | 2020-01-29 | 2021-07-29 | Micron Technology, Inc. | Multichip memory package with internal channel |
| US12475068B2 (en) * | 2022-09-15 | 2025-11-18 | Micron Technology, Inc. | Multi-interface memory |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20010015905A1 (en) * | 2000-01-26 | 2001-08-23 | Samsung Electronics Co., Ltd. | System having memory devices operable in a common interface |
| CN1391166A (zh) * | 2001-06-11 | 2003-01-15 | 株式会社日立制作所 | 半导体存储装置 |
| CN1885277A (zh) * | 2005-06-24 | 2006-12-27 | 秦蒙达股份公司 | Dram芯片设备以及包括该设备的多芯片封装 |
| US20070147115A1 (en) * | 2005-12-28 | 2007-06-28 | Fong-Long Lin | Unified memory and controller |
| CN101303885A (zh) * | 2008-07-01 | 2008-11-12 | 普天信息技术研究院有限公司 | 多芯片封装存储模块 |
| CN101473438A (zh) * | 2006-06-07 | 2009-07-01 | 微软公司 | 具有单个接口的混合存储器设备 |
| CN101611387A (zh) * | 2007-01-10 | 2009-12-23 | 移动半导体公司 | 用于增强外部计算设备的性能的自适应存储系统 |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4059002B2 (ja) | 2001-06-13 | 2008-03-12 | 株式会社日立製作所 | メモリ装置 |
| KR101085406B1 (ko) | 2004-02-16 | 2011-11-21 | 삼성전자주식회사 | 불 휘발성 메모리를 제어하기 위한 컨트롤러 |
| EP1849162A4 (en) | 2005-01-25 | 2009-02-11 | Northern Lights Semiconductor | SINGLE CHIP WITH A MAGNETORESISTIVE MEMORY |
| WO2006132006A1 (ja) | 2005-06-09 | 2006-12-14 | Matsushita Electric Industrial Co., Ltd. | メモリ制御装置及びメモリ制御方法 |
| US8291295B2 (en) | 2005-09-26 | 2012-10-16 | Sandisk Il Ltd. | NAND flash memory controller exporting a NAND interface |
| US7519754B2 (en) | 2005-12-28 | 2009-04-14 | Silicon Storage Technology, Inc. | Hard disk drive cache memory and playback device |
| US8700830B2 (en) * | 2007-11-20 | 2014-04-15 | Spansion Llc | Memory buffering system that improves read/write performance and provides low latency for mobile systems |
| US7778101B2 (en) | 2008-09-05 | 2010-08-17 | Genesys Logic, Inc. | Memory module and method of performing the same |
| JP2011070470A (ja) | 2009-09-28 | 2011-04-07 | Toshiba Corp | 半導体記憶装置 |
-
2013
- 2013-09-03 US US14/016,717 patent/US10185515B2/en active Active
-
2014
- 2014-07-09 CN CN201480048456.3A patent/CN105493061B/zh not_active Expired - Fee Related
- 2014-07-09 EP EP14748020.6A patent/EP3042295A1/en not_active Withdrawn
- 2014-07-09 WO PCT/US2014/045983 patent/WO2015034580A1/en not_active Ceased
- 2014-07-09 KR KR1020167008120A patent/KR20160048911A/ko not_active Withdrawn
- 2014-07-09 JP JP2016538917A patent/JP2016532974A/ja not_active Ceased
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20010015905A1 (en) * | 2000-01-26 | 2001-08-23 | Samsung Electronics Co., Ltd. | System having memory devices operable in a common interface |
| CN1391166A (zh) * | 2001-06-11 | 2003-01-15 | 株式会社日立制作所 | 半导体存储装置 |
| CN1885277A (zh) * | 2005-06-24 | 2006-12-27 | 秦蒙达股份公司 | Dram芯片设备以及包括该设备的多芯片封装 |
| US20070147115A1 (en) * | 2005-12-28 | 2007-06-28 | Fong-Long Lin | Unified memory and controller |
| CN101473438A (zh) * | 2006-06-07 | 2009-07-01 | 微软公司 | 具有单个接口的混合存储器设备 |
| CN101611387A (zh) * | 2007-01-10 | 2009-12-23 | 移动半导体公司 | 用于增强外部计算设备的性能的自适应存储系统 |
| CN101303885A (zh) * | 2008-07-01 | 2008-11-12 | 普天信息技术研究院有限公司 | 多芯片封装存储模块 |
Also Published As
| Publication number | Publication date |
|---|---|
| CN105493061A (zh) | 2016-04-13 |
| US20150067234A1 (en) | 2015-03-05 |
| JP2016532974A (ja) | 2016-10-20 |
| KR20160048911A (ko) | 2016-05-04 |
| WO2015034580A1 (en) | 2015-03-12 |
| EP3042295A1 (en) | 2016-07-13 |
| US10185515B2 (en) | 2019-01-22 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN107229417B (zh) | 数据存储设备及其操作方法 | |
| CN105493061B (zh) | 用于多芯片封装上的异构存储器的统一存储器控制器 | |
| US9406403B2 (en) | Spare memory external to protected memory | |
| US10915264B2 (en) | Apparatus, systems, and methods to reclaim storage associated with cached data | |
| US9244853B2 (en) | Tunable multi-tiered STT-MRAM cache for multi-core processors | |
| US10445025B2 (en) | Apparatuses and methods having memory tier structure and recursively searching between tiers for address in a translation table where information is only directly transferred between controllers | |
| US20110298011A1 (en) | Semiconductor Memory Device And System Having Stacked Semiconductor Layers | |
| KR20090004618A (ko) | 메모리 어레이 장치, 그 방법 및 시스템 | |
| US10126986B2 (en) | Memory system and operating method thereof for skipping mapping information update operation of duplicate addresses in a fast write mode | |
| US20130080693A1 (en) | Hybrid memory device, computer system including the same, and method of reading and writing data in the hybrid memory device | |
| US20160371012A1 (en) | Data storage device and data processing system including same | |
| US8719546B2 (en) | Substitute virtualized-memory page tables | |
| CN104620318A (zh) | 具有由数据单元和参考单元共享的写驱动器的mram | |
| CN104520934B (zh) | 单片多通道可自适应stt‑mram | |
| US10416886B2 (en) | Data storage device that reassigns commands assigned to scale-out storage devices and data processing system having the same | |
| JP2016532974A5 (enExample) | ||
| US20160041761A1 (en) | Independently controlling separate memory devices within a rank | |
| US10534545B2 (en) | Three-dimensional stacked memory optimizations for latency and power | |
| US10528288B2 (en) | Three-dimensional stacked memory access optimization | |
| US12513915B2 (en) | Dynamic random-access memory (DRAM) on hot compute logic for last-level-cache | |
| US20250380406A1 (en) | Vertical bank redundancy in three-dimensional stacked dynamic random-access memory (dram) for improved yield | |
| US20240422995A1 (en) | Dynamic random-access memory (dram) on hot compute logic for last-level-cache applications | |
| CN121075399A (zh) | 三维堆叠存储器 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20201103 Termination date: 20210709 |
|
| CF01 | Termination of patent right due to non-payment of annual fee |