CN105374879A - Radio frequency laterally diffused metal oxide semiconductor (LDMOS) device - Google Patents
Radio frequency laterally diffused metal oxide semiconductor (LDMOS) device Download PDFInfo
- Publication number
- CN105374879A CN105374879A CN201510785579.1A CN201510785579A CN105374879A CN 105374879 A CN105374879 A CN 105374879A CN 201510785579 A CN201510785579 A CN 201510785579A CN 105374879 A CN105374879 A CN 105374879A
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- Prior art keywords
- contact hole
- radio frequency
- ldmos device
- metal
- faraday shield
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- 239000004065 semiconductor Substances 0.000 title abstract description 4
- 229910044991 metal oxide Inorganic materials 0.000 title abstract 2
- 150000004706 metal oxides Chemical class 0.000 title abstract 2
- 229910052751 metal Inorganic materials 0.000 claims abstract description 61
- 239000002184 metal Substances 0.000 claims abstract description 61
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 23
- 229910021332 silicide Inorganic materials 0.000 claims abstract description 19
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims abstract description 18
- 239000000758 substrate Substances 0.000 claims abstract description 10
- 229920005591 polysilicon Polymers 0.000 claims description 19
- 230000003071 parasitic effect Effects 0.000 claims description 3
- 230000000694 effects Effects 0.000 description 2
- 230000009916 joint effect Effects 0.000 description 2
- 230000036632 reaction speed Effects 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7816—Lateral DMOS transistors, i.e. LDMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/402—Field plates
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
The invention discloses a radio frequency laterally diffused metal oxide semiconductor (LDMOS) device. The radio frequency LDMOS device comprises a light-doped epitaxial layer, wherein the light-doped epitaxial layer is arranged on a heavily-doped substrate, a drift region and a channel region of the LDMOS device are arranged in the light-doped epitaxial layer, the surface of the epitaxial layer where the drift region and the channel region are crossed is provided with a grid oxide layer and a poly-silicon grid, a drain region of the LDMOS device is further arranged in the drift region, a metal silicide covers the poly-silicon grid, a Z-shaped Faraday shielding ring covers the metal silicide and half covers the metal silicide above the poly-silicon grid, the lower end of the Z-shaped Faraday shielding ring covers the drift region near to the poly-silicon grid, the Faraday shielding ring is led out to a first metal layer via a contact hole, the first metal layer further crosses the part above the Faraday shielding ring to be connected with the contact hole of a channel leading-out region and an electric sink channel, and a drain is connected to a second metal layer through the contact hole. In the radio frequency LDMOS device, the leading-out mode of the Faraday shielding ring is changed, and the resistance of the Faraday shielding ring is reduced.
Description
Technical field
The present invention relates to semiconductor integrated circuit field, particularly a kind of radio frequency LDMOS device.
Background technology
Radio frequency LDMOS (RadioFrequencyLaterallyDiffusedMetalOxideSemiconductor, rf-ldmos semiconductor) is the RF power device with high-gain, High Linear, high withstand voltage, high-output power being widely used in broadcasting and TV transmitting base station, mobile transmitting base station, radar etc.Common radio frequency LDMOS device as shown in Figure 1, comprises following structure: source electrode 7, drain electrode 5, grid 11, raceway groove 3 and Faraday shield ring 10 etc.Device is located in the epitaxial loayer 2 of the growth of heavily doped substrate 1, drain terminal has a longer drift region 4 to obtain required puncture voltage, raceway groove 3 is by the P type ion implantation at self-aligning grid 11 source edge, and advance formation by long-time high temperature, its exit 6 and source electrode 7 homonymy, the source electrode 7 of device and raceway groove 3 will be connected on heavily doped substrate 1.Faraday shield ring 10 is by adding one deck thin-medium at drain terminal and metallic plate forms, metallic plate has an exit at interval of 25 ~ 30 μm and strides across grid arrival source electrode, to be connected with metal level 9 then ground connection by the contact hole of source electrode, its effect utilizes field plate effect, reduce spike electric field, increase puncture voltage, improve HCI (hot carrier in jection) reliability, reduce Miller capacitance Cgd.
For radio-frequency devices, lower resistance and lower electric capacity is often needed to carry out the reaction speed of faster devices.Operating frequency is faster, require resistance and electric capacity lower.The resistance striding across the exit of grid due to Faraday shield ring is comparatively large, have impact on the reaction speed of device, causes device linearity degree to be difficult to pass through.And if expect that the number by increasing Faraday shield ring exit reduces the resistance of Faraday shield ring, can cause the current unevenness of source electrode even, affect the reliability of device.
Summary of the invention
Technical problem to be solved by this invention is to provide a kind of radio frequency LDMOS device, and it has lower Faraday shield loop resistance.
For solving the problem, radio frequency LDMOS device of the present invention, comprises:
The one lightly doped epitaxial loayer being positioned at heavy doping substrate;
In light dope epitaxial loayer, have drift region and the channel region of LDMOS device, the epi-layer surface of drift region and channel region intersection has gate oxide and polysilicon gate;
Drain region also containing LDMOS device in described drift region, is drawn by contact hole and forms drain electrode;
Also containing raceway groove draw-out area and source region in described channel region, raceway groove draw-out area and source region short circuit, and drawn by contact hole;
Be coated with metal silicide on described polysilicon gate, on metal silicide, cover faraday's shading ring;
Side, described raceway groove draw-out area also has electric sinking passage, is connected to heavy doping substrate bottom described electric sinking passage;
Described Faraday shield ring is Z-shaped, and on the metal silicide of half mulching above polysilicon gate, its lower end covers near the drift region of polysilicon gate, and Faraday shield ring and epitaxial loayer and polysilicon gate, there is oxide layer at interval between metal silicide;
Faraday shield ring is drawn out to the first metal layer by contact hole, and described the first metal layer, also from striding across above faraday shield layer, is connected with the contact hole of raceway groove draw-out area and electric sinking passage;
Described drain electrode is connected to the second metal level by contact hole.
Further, described Faraday shield ring, on the direction of polysilicon gate grid width, is arrange contact hole and metal exit every the spacing of 4 ~ 20 μm, is connected by this metal exit with source electrode by metal level.
Further, the contact hole spacing of described Faraday shield ring, is determine according to the performance requirement of radio frequency LDMOS device, selects suitable spacing by the requirement of parasitic capacitance between dead resistance, source and drain.
Further, the source drain capacitance of the spacing between described the first metal layer and the second metal level and the spacing energy joint effect radio frequency LDMOS device between Faraday shield articulating contact hole and drain contact hole, the needs according to device adjust.
Further, described Faraday shield ring covering metal silicide at least 0.1 μm on grid length direction, is covered at most vacant 0.1 μm.
The present invention changes the lead-out mode of Faraday shield ring, metal level is guided to by contact hole after traditional Faraday shield ring is striden across grid, change into and eliminate Faraday shield ring and stride across the metal segments of grid near source region, leaning on the metal of drain terminal to be directly upwards connected to by contact hole from Faraday shield ring strides across the metal level of grid, reduce the resistance of Faraday shield ring entirety, density of simultaneously arranging can increase.
Accompanying drawing explanation
Fig. 1 is the structural representation of conventional radio frequency LDMOS device;
Fig. 2 is the structural representation of radio frequency LDMOS device of the present invention;
Fig. 3 is the metal level domain of radio frequency LDMOS device of the present invention.
Description of reference numerals
1 is heavy doping substrate, and 2 is extensions, and 3 is channel regions, 4 is drift regions, and 5 is drain regions, and 6 is raceway groove draw-out areas, 7 is source regions, 8 is electric sinking passages, and 9 (1), 9 (2) is metal level, and 10 is Faraday shield rings, 11 is polysilicon gates, 12 is metal silicides, and 13 is oxide layers, and L, H1, H2 are spacing.
Embodiment
Radio frequency LDMOS device of the present invention is that the metal level exit by Faraday shield ring exit high for resistance is replaced with resistance low reduces Faraday shield loop resistance, thus improves a kind of product design of device linearity degree.
Radio frequency LDMOS device of the present invention, as shown in Figure 2, comprises:
One is positioned at the lightly doped epitaxial loayer 2 on heavy doping substrate 1;
In light dope epitaxial loayer 2, have drift region 4 and the channel region 3 of LDMOS device, the epi-layer surface of drift region 4 and channel region 3 intersection has gate oxide and polysilicon gate 11;
Drain region 5 also containing LDMOS device in described drift region 4, is drawn by contact hole and forms drain electrode;
Also containing raceway groove draw-out area 6 and source region 7 in described channel region 3, raceway groove draw-out area 6 and source region 7 short circuit, and drawn by contact hole;
Be coated with metal silicide 12 on described polysilicon gate 11, on metal silicide 12, cover faraday's shading ring 10; Described Faraday shield ring covering metal silicide at least 0.1 μm on grid length direction, is covered at most vacant 0.1 μm, as shown in white dashed line frame in Fig. 2, is the coverage of Faraday shield ring.
Side, described raceway groove draw-out area 6 also has electric sinking passage (tungsten plug) 8, is connected to heavy doping substrate 1 bottom described electric sinking passage 8;
Faraday shield ring 10 is drawn out to the first metal layer 9 (1) by contact hole, and described the first metal layer 9 (1), also from striding across above faraday shield layer 10, is connected with the contact hole of raceway groove draw-out area 6 and electric sinking passage 8;
Described Faraday shield ring 10 is in Z-shaped, cover on the metal silicide 12 above polysilicon gate 11, its lower end covers near the drift region of polysilicon gate, and Faraday shield ring 10 and epitaxial loayer 2 and polysilicon gate 11, there is oxide layer 13 at interval between metal silicide 12; Described Faraday shield ring 10, on the direction of polysilicon gate grid width, every the spacing of 4 ~ 20 μm, contact hole and metal exit are set, be connected by metal level with source electrode by this metal exit, the impact can effectively eliminated source current uniformity is set every the spacing of 4 ~ 20 μm.As shown in Figure 3, be the domain schematic diagram of metal-layer structure of the present invention, in figure, the left side comprises the first metal layer 9 (1), and intermetallic metal is that Faraday shield ring is drawn, and the right is the second metal level 9 (2) connected that drains.The contact hole spacing L of described Faraday shield ring 10, can determine according to the performance requirement of radio frequency LDMOS device, selects suitable spacing according to the requirement of parasitic capacitance between dead resistance, source and drain.Because the metal striden across can draw source electrode simultaneously, the uneven of source current can not be caused.Suitably can increase the density of drawing in grid width direction, as made an exit every 10 μm.
Described drain electrode is connected to the second metal level 9 (2) by contact hole.
The source drain capacitance Cds of the spacing H1 between described the first metal layer 9 (1) and the second metal level 9 (2) and the spacing H2 between contact hole energy joint effect radio frequency LDMOS device, can adjust according to the needs of device.
The exit of Faraday shield ring is replaced with metal level exit by the present invention, the square resistance of metal level is about 0.07% of Faraday shield ring, the resistance of Faraday shield ring exit is about 70ohm, use metal level instead and be about 0.05ohm as the resistance after exit, density of simultaneously arranging can increase, and this method can greatly reduce the resistance that Faraday shield ring produces.Although adopt this improvement can increase by the source drain electric capacity (calculating with every 10 μm of exits) of 0.2%, for substantially negligible device.
These are only the preferred embodiments of the present invention, be not intended to limit the present invention.For a person skilled in the art, the present invention can have various modifications and variations.Within the spirit and principles in the present invention all, any amendment done, equivalent replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (5)
1. a radio frequency LDMOS device, comprises:
The one lightly doped epitaxial loayer being positioned at heavy doping substrate;
In light dope epitaxial loayer, have drift region and the channel region of LDMOS device, the epi-layer surface of drift region and channel region intersection has gate oxide and polysilicon gate;
Drain region also containing LDMOS device in described drift region, is drawn by contact hole and forms drain electrode;
Also containing raceway groove draw-out area and source region in described channel region, raceway groove draw-out area and source region short circuit, and drawn by contact hole;
Be coated with metal silicide on described polysilicon gate, on metal silicide, cover faraday's shading ring;
Side, described raceway groove draw-out area also has electric sinking passage, is connected to heavy doping substrate bottom described electric sinking passage;
It is characterized in that:
Described Faraday shield ring is Z-shaped, and on the metal silicide of half mulching above polysilicon gate, its lower end covers near the drift region of polysilicon gate, and Faraday shield ring and epitaxial loayer and polysilicon gate, there is oxide layer at interval between metal silicide;
Faraday shield ring is drawn out to the first metal layer by contact hole, and described the first metal layer, also from striding across above faraday shield layer, is connected with the contact hole of raceway groove draw-out area and electric sinking passage;
Described drain electrode is connected to the second metal level by contact hole.
2. radio frequency LDMOS device as claimed in claim 1, it is characterized in that: described Faraday shield ring, on the direction of polysilicon gate grid width, be that contact hole and metal exit are set every the spacing of 4 ~ 20 μm, be connected by metal level with source electrode by this metal exit.
3. radio frequency LDMOS device as claimed in claim 2, it is characterized in that: the contact hole spacing of described Faraday shield ring, be determine according to the performance requirement of radio frequency LDMOS device, select suitable spacing according to the requirement of parasitic capacitance between dead resistance, source and drain.
4. radio frequency LDMOS device as claimed in claim 1, it is characterized in that: the spacing between described the first metal layer and the second metal level and the spacing between Faraday shield articulating contact hole and drain contact hole can affect the source drain capacitance of radio frequency LDMOS device, and the needs according to device adjust.
5. radio frequency LDMOS device as claimed in claim 1, is characterized in that: described Faraday shield ring covering metal silicide at least 0.1 μm on grid length direction, is covered at most vacant 0.1 μm.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510785579.1A CN105374879A (en) | 2015-11-16 | 2015-11-16 | Radio frequency laterally diffused metal oxide semiconductor (LDMOS) device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510785579.1A CN105374879A (en) | 2015-11-16 | 2015-11-16 | Radio frequency laterally diffused metal oxide semiconductor (LDMOS) device |
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| CN105374879A true CN105374879A (en) | 2016-03-02 |
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| CN201510785579.1A Pending CN105374879A (en) | 2015-11-16 | 2015-11-16 | Radio frequency laterally diffused metal oxide semiconductor (LDMOS) device |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105845736A (en) * | 2016-05-17 | 2016-08-10 | 昆山华太电子技术有限公司 | LDMOS device structure and manufacture method thereof |
| CN109119472A (en) * | 2018-07-18 | 2019-01-01 | 北京顿思集成电路设计有限责任公司 | A kind of LDMOS device structure and preparation method thereof |
| CN110112210A (en) * | 2019-03-21 | 2019-08-09 | 中国电子科技集团公司第五十五研究所 | A kind of side wall grid structure of radio frequency LDMOS and preparation method thereof |
| CN111063732A (en) * | 2018-11-07 | 2020-04-24 | 成都芯源系统有限公司 | LDMOS device and manufacturing method thereof |
| CN111200006A (en) * | 2018-11-19 | 2020-05-26 | 无锡华润上华科技有限公司 | Lateral double-diffusion metal oxide semiconductor field effect transistor and preparation method thereof |
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|---|---|---|---|---|
| US20050156234A1 (en) * | 2003-11-14 | 2005-07-21 | Gammel Peter L. | Control of hot carrier injection in a metal-oxide semiconductor device |
| CN102280482A (en) * | 2011-08-02 | 2011-12-14 | 清华大学 | Radio frequency lateral diffusion metal oxide semiconductor device and preparation method thereof |
| CN103872123A (en) * | 2012-12-12 | 2014-06-18 | 上海华虹宏力半导体制造有限公司 | N-channel radio frequency LDMOS (Lateral Double-diffused Metal Oxide Semiconductor field effect transistor) device and manufacturing method |
-
2015
- 2015-11-16 CN CN201510785579.1A patent/CN105374879A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050156234A1 (en) * | 2003-11-14 | 2005-07-21 | Gammel Peter L. | Control of hot carrier injection in a metal-oxide semiconductor device |
| CN102280482A (en) * | 2011-08-02 | 2011-12-14 | 清华大学 | Radio frequency lateral diffusion metal oxide semiconductor device and preparation method thereof |
| CN103872123A (en) * | 2012-12-12 | 2014-06-18 | 上海华虹宏力半导体制造有限公司 | N-channel radio frequency LDMOS (Lateral Double-diffused Metal Oxide Semiconductor field effect transistor) device and manufacturing method |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105845736A (en) * | 2016-05-17 | 2016-08-10 | 昆山华太电子技术有限公司 | LDMOS device structure and manufacture method thereof |
| WO2017197758A1 (en) * | 2016-05-17 | 2017-11-23 | 昆山华太电子技术有限公司 | Ldmos device structure and manufacturing method thereof |
| CN109119472A (en) * | 2018-07-18 | 2019-01-01 | 北京顿思集成电路设计有限责任公司 | A kind of LDMOS device structure and preparation method thereof |
| CN111063732A (en) * | 2018-11-07 | 2020-04-24 | 成都芯源系统有限公司 | LDMOS device and manufacturing method thereof |
| CN111200006A (en) * | 2018-11-19 | 2020-05-26 | 无锡华润上华科技有限公司 | Lateral double-diffusion metal oxide semiconductor field effect transistor and preparation method thereof |
| CN110112210A (en) * | 2019-03-21 | 2019-08-09 | 中国电子科技集团公司第五十五研究所 | A kind of side wall grid structure of radio frequency LDMOS and preparation method thereof |
| CN110112210B (en) * | 2019-03-21 | 2022-11-25 | 中国电子科技集团公司第五十五研究所 | Side wall gate structure of radio frequency LDMOS (laterally diffused metal oxide semiconductor) and preparation method thereof |
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Application publication date: 20160302 |