CN105374816A - Bidirectional ESD protection device based on germanium-silicon heterojunction proces - Google Patents
Bidirectional ESD protection device based on germanium-silicon heterojunction proces Download PDFInfo
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- CN105374816A CN105374816A CN201510976592.5A CN201510976592A CN105374816A CN 105374816 A CN105374816 A CN 105374816A CN 201510976592 A CN201510976592 A CN 201510976592A CN 105374816 A CN105374816 A CN 105374816A
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- 230000002457 bidirectional effect Effects 0.000 title claims abstract description 10
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 title abstract description 4
- 229910000577 Silicon-germanium Inorganic materials 0.000 claims abstract description 61
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 30
- 238000000034 method Methods 0.000 claims abstract description 16
- 239000000758 substrate Substances 0.000 claims abstract description 10
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 8
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 8
- 239000010703 silicon Substances 0.000 claims abstract description 8
- 229920005591 polysilicon Polymers 0.000 claims description 27
- 230000001681 protective effect Effects 0.000 claims description 14
- 241000033695 Sige Species 0.000 abstract 1
- 230000003071 parasitic effect Effects 0.000 description 14
- 102000004207 Neuropilin-1 Human genes 0.000 description 10
- 108090000772 Neuropilin-1 Proteins 0.000 description 10
- 102000004213 Neuropilin-2 Human genes 0.000 description 10
- 108090000770 Neuropilin-2 Proteins 0.000 description 10
- 230000015556 catabolic process Effects 0.000 description 8
- 238000007667 floating Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 3
- 230000003068 static effect Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000024241 parasitism Effects 0.000 description 2
- 238000010276 construction Methods 0.000 description 1
- 244000045947 parasite Species 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0259—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using bipolar transistors as protective elements
- H01L27/0262—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using bipolar transistors as protective elements including a PNP transistor and a NPN transistor, wherein each of said transistors has its base coupled to the collector of the other transistor, e.g. silicon controlled rectifier [SCR] devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/87—Thyristor diodes, e.g. Shockley diodes, break-over diodes
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Bipolar Integrated Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
The invention belongs to the field of electrostatic discharge protection of an integrated circuit, and especially provides a bidirectional ESD protection device, which is used to overcome the problem that an existing SiGe heterojunction bipolar transistor (HBT) device cannot achieve the same bidirectional ESD protection capability, based on germanium-silicon heterojunction process. The structure comprises a first-kind conductive-type silicon substrate, a second-kind conductive-type buried layer and a second-kind conductive-type well region are successively formed on the substrate, two first-kind conductive-type SiGe layers are formed on the well region and are distributed in a left-right symmetrical manner, N second-kind conductive-type polycrystalline silicon layers are formed on each SiGe layer, the polycrystalline silicon layers formed on the left-side SiGe layer are connected with an anode, and the polycrystalline silicon layers formed on the right-side Sige layer are connected with a cathode. On the basis of basic structure of a SiGe heterojunction bipolar transistor (HBT), bidirectional completely symmetrical SCR structure is formed; and, when the cathode of the SCR device structure is grounded, the device has the bidirectional same ESD protection capability.
Description
Technical field
The invention belongs to integrated circuit electrostatic discharge (ElectrostaticDischarge, ESD) and protect field, be specifically related to a kind of novel bidirectional ESD protective device based on germanium silicon (SiGe) Heterojunction.
Background technology
Static discharge phenomenon is extensively present in occurring in nature, and it is one of major reason causing integrated circuit (IC) products to lose efficacy.Integrated circuit (IC) products is manufactured at it and is easy to the impact being subject to static discharge in assembling process, causes the reliability of product to reduce, even damages.Therefore, the electrostatic discharge protection component that research reliability is high and electrostatic defending performance is strong and protection circuit have very important effect to the rate of finished products and reliability that improve integrated circuit.
When integrated circuit generation static discharge phenomenon, a large amount of electric charge flows into the pin of chip instantaneously, and the electric current that these circuit produce can reach several ampere usually, and the voltage produced at this pin place is even a few hectovolt up to tens volts.Larger electric current and higher voltage can cause puncturing of the infringement of chip internal circuits and device, thus cause the inefficacy of circuit function.Therefore, in order to the damage preventing chip to be subjected to ESD, just need to carry out effective ESD protection to each pin of chip.
SiGe technique can improve the performance of Si on Si sheet by energy band engineering and strain engineering, ripe and cheap Si technology can be adopted again to process simultaneously.Under the overall situation that mobile terminal is in recent years universal, adapt to high frequency, at a high speed, the SiGe technique of low-power consumption just slowly replaces the status of Si technique.So, explore the esd protection new construction designed based on SiGe technique and be conducive to improving the reliability based on the integrated circuit of SiGe technique.
Under SiGe technique, SiGe heterojunction bipolar transistor HBT device architecture is usually adopted to carry out esd protection.Basic HBT device architecture as shown in Figure 1, comprising:
P-type silicon substrate 110;
Described substrate 110 forms N-shaped buried regions 120;
Described N-shaped buried regions 120 forms N-shaped well region 130;
The both sides of the N-shaped well region 130 on described N-shaped buried regions 120 are respectively equipped with N-shaped heavily doped region 141 and 142, and this region 141 is connected with collector electrode with region 142;
Form a p-type SiGe layer 150 above described N-shaped well region 130, this SiGe layer 150 is connected with base stage;
Described SiGe layer 150 forms a N-shaped polysilicon region 160, and this polysilicon region 160 is connected with emitter;
When using usually used as ESD protective device, the grounded emitter of HBT, collector electrode connects input/output terminal or the power end of chip, base stage floating.When relative to ground be positive esd pulse come input/output port or the power port of chip time, the collector junction of HBT is reverse-biased, emitter junction positively biased; When esd pulse voltage is greater than the open base collector junction avalanche breakdown voltage BV of HBT
cEOtime, a large amount of electron hole pairs produces near the collector junction of HBT; Wherein, electronics passes through N-shaped well region 130, N-shaped buried regions district 120, and collector electrode is flowed out in N-shaped heavily doped region 141 and 142, and emitter is then flowed out by the emitter junction of positively biased in hole; Like this, ESD electric current is just released by HBT device.When relative to ground be negative esd pulse come input/output port or the power port of chip time, the collector junction positively biased of HBT, emitter junction is reverse-biased; When esd pulse voltage is greater than the open base emitter junction avalanche breakdown voltage BV of HBT
eCOtime, a large amount of electron hole pairs produces near the emitter junction of HBT; Wherein, electronics flows out emitter by N-shaped polysilicon region 160, and collector electrode is then flowed out by the collector junction of positively biased in hole; Like this, ESD electric current has just been released by HBT device.Under normal circumstances, the BV of HBT
eCOcan much smaller than BV
cEO; Therefore, when using the HBT of base stage floating as ESD protective device, trigger voltage when it tackles positive and negative esd pulse has larger difference, can not realize identical bi-directional ESD protective capability, easily cause the ESD of internal circuit to damage.
For the problems referred to above, the present invention puts forward a kind of SCR device structure of the bi-directional symmetrical based on SiGe heterojunction bipolar transistor HBT device architecture; This structure is not only structurally symmetrical, and esd protection ability has identical relieving capacity for positive esd pulse and negative esd pulse, namely functionally also symmetrical.
Summary of the invention
The object of the invention is to the problem that can not realize identical bi-directional ESD protective capability for existing SiGe heterojunction bipolar transistor HBT device, a kind of SCR device of the bi-directional symmetrical based on SiGe heterojunction bipolar transistor HBT device architecture is provided; This structure is not only symmetrical in structure, also can realize identical bi-directional ESD protection.The technical solution used in the present invention is:
A kind of novel bidirectional ESD protective device based on germanium silicon (SiGe) Heterojunction, comprising:
The first conduction type silicon substrate,
The first conduction type silicon substrate described forms the second conduction type buried regions,
Described the second conduction type buried regions forms the second conduction type well region,
Described the second conduction type well region is formed two the first conduction type SiGe layer of symmetrical distribution,
The first conduction type SiGe layer each forms N number of the second conductivity type polysilicon layer respectively, N is positive integer, wherein, N number of the second conductivity type polysilicon layer jointed anode that the first conduction type SiGe layer of left side is formed, N number of the second conductivity type polysilicon layer that the first conduction type SiGe layer of right side is formed connects negative electrode.
Further, the first conduction type SiGe layer of described left side is connected with anode by the first resistance, and the first conduction type SiGe layer of described right side is connected with negative electrode by the second resistance, and described first resistance is identical with the resistance of the second resistance.
The invention provides a kind of SCR structure protected for novel bi-directional ESD based on Ge-Si heterojunction technique, this structure, based on the basic structure of SiGe heterojunction bipolar transistor HBT, forms the SCR structure of two-way full symmetric; When the minus earth of this SCR device structure, it is positive esd pulse electric current that this device both can have been released relative to ground, and also can release relative to ground is negative esd pulse electric current, has two-way identical esd protection ability.
Accompanying drawing explanation
Fig. 1 is basic SiGe heterojunction bipolar transistor HBT device architecture schematic diagram.
Fig. 2 is embodiment 1 novel bi-directional ESD protection SCR device structural representation.
Fig. 3 is embodiment 2 novel bi-directional ESD protection SCR device structural representation.
Fig. 4 is embodiment 3 novel bi-directional ESD protection SCR device structural representation.
Embodiment
Below in conjunction with the drawings and specific embodiments, the present invention is described in detail.
Embodiment 1
There is provided the SCR structure protected for novel bi-directional ESD based on Ge-Si heterojunction technique in the present embodiment, as shown in Figure 2, this structure is the single emitter bar bi-directional symmetrical SCR device of base stage floating, comprising for its structure and equivalent electric circuit:
P-type silicon substrate 110;
Described p-type silicon substrate 110 forms N-shaped buried regions 120;
Described N-shaped buried regions 120 forms N-shaped well region 130;
Described N-shaped well region 130 upper left forms a p-type SiGe layer 151;
Described SiGe layer 151 forms a N-shaped polysilicon region 161, and this polysilicon region 161 is connected with anode;
Described N-shaped well region 130 upper right forms a p-type SiGe layer 152;
Described SiGe layer 152 forms a N-shaped polysilicon region 162, and this polysilicon region 162 is connected with negative electrode;
Described p-type SiGe layer 151 and the symmetrical setting of p-type SiGe layer 152, described two-way SCR structure is the five layers of npnpn structure be made up of N-shaped polysilicon region 161, p-type SiGe layer 151, N-shaped well region 130, p-type SiGe layer 152 and N-shaped polysilicon region 162.
Can be seen by its equivalent circuit diagram, this SCR device is made up of the npn1 transistor of parasitism, parasitic npn2 transistor and parasitic pnp transistor, wherein, npn1 is made up of N-shaped polysilicon region 161, p-type SiGe layer 151 and N-shaped well region 130, npn2 is made up of N-shaped polysilicon region 162, p-type SiGe layer 152 and N-shaped well region 130, and pnp is made up of p-type SiGe layer 151, N-shaped well region 130 and p-type SiGe layer 152.
When using usually used as ESD protective device, the minus earth of SCR, anode connects input/output terminal or the power end of chip.When relative to ground be positive esd pulse come input/output port or the power port of chip time, the pn that N-shaped polysilicon region 161 and p-type SiGe layer 151 are formed ties reverse-biased, the pn that p-type SiGe layer 151 is formed with the well region 130 of N-shaped ties positively biased, the pn knot that the well region 130 of N-shaped and p-type SiGe layer 152 are formed is reverse-biased, and the pn that p-type SiGe layer 152 and N-shaped polysilicon region 162 are formed ties positively biased.When esd pulse voltage is greater than the open base emitter junction avalanche breakdown voltage BV of npn1
eCO1with the open base collector junction avalanche breakdown voltage BV of npn2
cEO2during sum, a large amount of electron hole pairs produces thus forms current channel near the emitter junction of npn1 pipe and the collector junction of npn2 pipe, and ESD electric current is just released by this SCR device.When relative to ground be negative esd pulse come input/output port or the power port of chip time, the pn that N-shaped polysilicon region 161 and p-type SiGe layer 151 are formed ties positively biased, the pn that p-type SiGe layer 151 is formed with the well region 130 of N-shaped ties reverse-biased, the pn that the well region 130 of N-shaped and p-type SiGe layer 152 are formed ties positively biased, and the pn knot that p-type SiGe layer 152 and N-shaped polysilicon region 162 are formed is reverse-biased.When esd pulse voltage is greater than the open base collector junction avalanche breakdown voltage BV of npn1
cE01with the open base emitter junction avalanche breakdown voltage BV of npn2
eCO2during sum, a large amount of electron hole pairs produces thus forms current channel near the collector junction of npn1 pipe and the emitter junction of npn2 pipe, and ESD electric current is just released by this SCR device.As can be seen from the above analysis, because the structure of parasitic npn1 pipe and npn2 pipe is symmetrical, and the structure of parasitic pnp pipe is also symmetrical.Therefore, use the SCR device of this symmetry as ESD protective device, trigger voltage when it tackles the esd pulse of positive negative sense is consistent, and can realize identical bi-directional ESD protective capability.
Embodiment 2
The SCR structure protected for novel bi-directional ESD based on Ge-Si heterojunction technique is provided in the present embodiment, its structure as shown in Figure 3, this structure is the multi-emitter bar bi-directional symmetrical SCR device structure of base stage floating, p-type SiGe layer 151 described in its structure is formed N number of N-shaped polysilicon region 161,163, ..., 16 (2N+1), and described whole polysilicon regions are connected with anode; Described p-type SiGe layer 152 forms N number of N-shaped polysilicon region 162,164 ..., 16 (2N), and described whole polysilicon regions are connected with negative electrode;
The difference of the single emitter bar bi-directional symmetrical SCR device structure of the base stage floating shown in this structure from Fig. 2 is only that the number of pole, emitter region bar is different, and its operation principle is identical.Under the condition of identical emitter area, adopt the structure of multi-emitter bar, effectively can avoid emitter junction edge-crowding effect of current in bipolar transistor, make device have larger emitter current, the esd protection ability of device is improved.
Embodiment 3
The SCR structure protected for novel bi-directional ESD based on Ge-Si heterojunction technique is provided in the present embodiment; its structure and equivalent electric circuit are as shown in Figure 4; this structure is the single emitter bar bi-directional symmetrical SCR device structure that base stage is connected by resistance with emitter; p-type SiGe layer 151 described in its structure is connected with anode by resistance R1; described p-type SiGe layer 152 is by resistance R2 and negative electrode phase, and resistance R1, R2 resistance is equal.
Can see from its equivalent circuit diagram, this SCR device is made up of the npn1 transistor of parasitism, parasitic npn2 transistor and parasitic pnp transistor; Wherein, npn1 is made up of N-shaped polysilicon region 161, p-type SiGe layer 151 and N-shaped well region 130, npn2 is made up of N-shaped polysilicon region 162, p-type SiGe layer 152 and N-shaped well region 130, and pnp is made up of p-type SiGe layer 151, N-shaped well region 130 and p-type SiGe layer 152; The base stage of parasitic npn1 pipe is connected with emitter by resistance R1, and the base stage of parasitic npn2 pipe is connected with emitter by resistance R2, and the resistance of R2 and R2 is equal.
When using usually used as ESD protective device, the minus earth of SCR, anode connects input/output terminal or the power end of chip.When relative to ground be positive esd pulse come input/output port or the power port of chip time, resistance R1, parasitic pnp pipe and resistance R2 form a parasite current passage.When esd pulse voltage is greater than the open base collector junction avalanche breakdown voltage BV of parasitic pnp pipe
cEOtime, this parasitic path just has electric current to flow to negative electrode from anode, and ESD electric current is just released by this SCR device.In like manner, when being input/output port or the power port that negative esd pulse comes chip relative to ground, and esd pulse voltage is when being greater than parasitic pnp pipe emitter junction avalanche breakdown voltage, in parasitic path, electric current flows to anode from negative electrode, and ESD electric current is just released by this SCR device.As can be seen from the above analysis; as long as the resistance of resistance R1 with R2 is identical, and the symmetrical configuration of parasitic pnp pipe, use the SCR device of this symmetry as ESD protective device; trigger voltage when it tackles the esd pulse of positive negative sense is consistent, and can realize identical esd protection ability.Meanwhile, by the resistance of adjusting resistance R1 and R2, the trigger voltage of this SCR device can be adjusted.
Bi-directional symmetrical SCR device structure shown in Fig. 4, can adopt the structure of multi-emitter bar equally, shown in its operation principle with Fig. 4, structure is identical, just repeats no more here.
What finally illustrate is, above example is only in order to illustrate technical solution of the present invention and unrestricted, although describe the present invention with reference to preferred embodiments, those of ordinary skill in the art is to be understood that, can modify to technical scheme of the present invention or equivalent replacement, and not departing from aim and the scope of technical solution of the present invention, it all should be encompassed in the middle of right of the present invention.
Claims (2)
1., based on a bidirectional ESD protective device for Ge-Si heterojunction technique, comprising:
The first conduction type silicon substrate,
The first conduction type silicon substrate described forms the second conduction type buried regions,
Described the second conduction type buried regions forms the second conduction type well region,
Described the second conduction type well region is formed two the first conduction type SiGe layer of symmetrical distribution,
The first conduction type SiGe layer each forms N number of the second conductivity type polysilicon layer respectively, N is positive integer, wherein, N number of the second conductivity type polysilicon layer jointed anode that the first conduction type SiGe layer of left side is formed, N number of the second conductivity type polysilicon layer that the first conduction type SiGe layer of right side is formed connects negative electrode.
2. by the bidirectional ESD protective device based on Ge-Si heterojunction technique described in claim 1; it is characterized in that; the first conduction type SiGe layer of described left side is connected with anode by the first resistance; the first conduction type SiGe layer of described right side is connected with negative electrode by the second resistance, and described first resistance is identical with the resistance of the second resistance.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108598076A (en) * | 2018-04-10 | 2018-09-28 | 电子科技大学 | A kind of adjustable ESD protective device of trigger voltage based on Ge-Si heterojunction technique |
| CN110459594A (en) * | 2019-08-29 | 2019-11-15 | 成都矽能科技有限公司 | A kind of embedded isolation ring can be used for electrostatic leakage protection is silicon-controlled |
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| CN101281899A (en) * | 2008-05-16 | 2008-10-08 | 浙江大学 | PMOS pipe built-in bidirectional thyristor electrostatic protection device |
| US20090315146A1 (en) * | 2008-06-18 | 2009-12-24 | National Semiconductor | Compact dual direction BJT clamps |
| US20120153347A1 (en) * | 2010-12-17 | 2012-06-21 | National Semiconductor Corporation | ESD clamp with auto biasing under high injection conditions |
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2015
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101281899A (en) * | 2008-05-16 | 2008-10-08 | 浙江大学 | PMOS pipe built-in bidirectional thyristor electrostatic protection device |
| US20090315146A1 (en) * | 2008-06-18 | 2009-12-24 | National Semiconductor | Compact dual direction BJT clamps |
| US20120153347A1 (en) * | 2010-12-17 | 2012-06-21 | National Semiconductor Corporation | ESD clamp with auto biasing under high injection conditions |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108598076A (en) * | 2018-04-10 | 2018-09-28 | 电子科技大学 | A kind of adjustable ESD protective device of trigger voltage based on Ge-Si heterojunction technique |
| CN110459594A (en) * | 2019-08-29 | 2019-11-15 | 成都矽能科技有限公司 | A kind of embedded isolation ring can be used for electrostatic leakage protection is silicon-controlled |
| CN110459594B (en) * | 2019-08-29 | 2024-04-12 | 成都矽能科技有限公司 | Embedded isolation ring silicon controlled rectifier capable of being used for electrostatic discharge protection |
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