CN105353293A - Wafer testing method - Google Patents
Wafer testing method Download PDFInfo
- Publication number
- CN105353293A CN105353293A CN201510648900.1A CN201510648900A CN105353293A CN 105353293 A CN105353293 A CN 105353293A CN 201510648900 A CN201510648900 A CN 201510648900A CN 105353293 A CN105353293 A CN 105353293A
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- Prior art keywords
- test
- measuring unit
- probe
- wafer
- zone block
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Classifications
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/282—Testing of electronic circuits specially adapted for particular applications not provided for elsewhere
- G01R31/2831—Testing of materials or semi-finished products, e.g. semiconductor wafers or substrates
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- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
The invention discloses a wafer testing method, and the method comprises the steps: 1, carrying out the division of an external ring and an internal ring of a wafer; 2, determining a testing regional block of the external ring and a testing regional block of the internal ring; 3, cleaning a probe on a probe card on a probe platform; 4, testing a testing unit of the testing regional block of the internal ring; 5, testing a testing unit of the testing regional block of the external ring. The method can improve the testing yield, and prolongs the service life of the probe card.
Description
Technical field
The present invention relates to a kind of SIC (semiconductor integrated circuit) method of manufacturing technology, particularly relate to a kind of crystal round test approach.
Background technology
As shown in Figure 1, be the probe of the probe station of existing crystal round test approach move towards schematic diagram, in On-Wafer Measurement, need to adopt probe station to test, the probe of probe station is provided with multiple probe, contacts by multiple probe of probe the same survey realizing multiple chip with the chip on wafer 101, corresponding with probe, wafer includes multiple measuring unit 102, each measuring unit is by multiple adjacent forming for the same chip surveyed.Existing method takes the strategy as marked the "the" shape trend shown in 103, it is that probe easily pollutes that the "the" shape of existing this probe moves towards the problem that method brings, contaminated probe then easily and between chip forms bad contact, easily directly causes test yield (yield) to reduce.In order to improve contact performance, the cleaning time of increase probe of having to, is also carry out loss to probe itself while cleaning, finally can causes the quick consumption in pin card life-span to the probe of probe.
Summary of the invention
Technical matters to be solved by this invention is to provide a kind of crystal round test approach, can improve test yield, extend the life-span of probe.
For solving the problems of the technologies described above, crystal round test approach provided by the invention comprises the steps:
Step one, carry out the division of wafer outer ring and wafer inner ring, described wafer inner ring is exposing wafer effective coverage, it is outside that described wafer outer ring is positioned at described wafer inner ring, and is exposing wafer inactive area in ring-band shape region between described wafer outer ring and described wafer inner ring.
Step 2, test zone block residing for the position relationship determination measuring unit of the measuring unit on wafer and described wafer outer ring and described wafer inner ring, the described measuring unit intersected with described exposing wafer inactive area is defined as outer ring test zone block around the test zone block formed, the test zone block that the described measuring unit by test zone block inside, described outer ring forms is defined as inner ring test zone block.
Step 3, described wafer is tested before first the probe in the probe of probe station is cleaned.
Step 4, probe clean the described probe station of rear use and first test the described measuring unit of described inner ring test zone block, test is carried out several times, test each time and all standing test is carried out to a described measuring unit, a described measuring unit has been tested the described probe of rear movement and has been tested the described measuring unit of the next one, until all described measuring unit in described inner ring test zone block is all completed.
All described measuring unit in step 5, described inner ring test zone block is all completed the described measuring unit of the described probe of rear movement to described outer ring test zone block and tests, test is carried out several times, test each time and all standing test is carried out to a described measuring unit, a described measuring unit has been tested the described probe of rear movement and has been tested the described measuring unit of the next one, until all described measuring unit in the test zone block of described outer ring is all completed.
The improvement of entering one is, uses clear faller gill to clean described probe in step 3.
The improvement of entering one is, the aluminium bits on described probe or tungsten plug depollution fall by the cleaning procedure of step 3.
The improvement of entering one is, the aluminium on described probe is considered to be worth doing or produced in the step 5 of tungsten plug pollution source in time testing a upper wafer.
The improvement of entering one is, produces aluminium bits or tungsten plug pollutes in step 5 with the probe that described exposing wafer inactive area contacts of being positioned at of described measuring unit.
The improvement of entering one is, in step 4, the moving direction of the described probe in test process is set as: select a described measuring unit near described outer ring test zone block to be test starting point, move inward with screw type afterwards until all described measuring unit in described inner ring test zone block is all completed.
The improvement of entering one is, in step 4, the moving direction of the described probe in test process is set as: select one the described measuring unit in inner side be test starting point, outwards move with screw type afterwards until all described measuring unit in described inner ring test zone block is all completed.
The improvement of entering one is, in step 5, the moving direction of the described probe in test process is set as: select a described measuring unit for test starting point, afterwards according to described outer ring test zone block circle clockwise direction or counterclockwise carry out moving until all described measuring unit in the test zone block of described outer ring is all completed.
The improvement of entering one is, described measuring unit is by multiple adjacent forming for the same chip surveyed.
The improvement of entering one is, described all standing test refers to and utilizes the probe in described probe all to carry out testing the same survey connecting all chips realized in described measuring unit to all chips in described measuring unit.
The improvement of entering one is, the ring-band shape width of described exposing wafer inactive area is 3 millimeters ~ 5 millimeters.
The improvement of entering one is, the through hole of the contact pad of described exposing wafer inactive area is in the state come out.
The present invention is by carrying out the division of Internal and external cycle to wafer according to exposing wafer effective coverage, and the division of Internal and external cycle test zone block is carried out according to the position relationship of measuring unit and wafer Internal and external cycle, first the measuring unit of inner ring test zone block is tested after probe is once cleaned, again the measuring unit of outer ring test zone block is tested, because the measuring unit of inner ring test zone block all can not intersect with exposing wafer inactive area, the through hole exposed in exposing wafer inactive area can be avoided the pollution of probe, improve the test yield of inner ring test zone block, due to can not be contaminated to the test process middle probe of inner ring test zone block, so do not need to clean probe in the test process of whole inner ring test zone block, and in the test process afterwards to outer ring test zone block, outer ring test zone block is a loop configuration, the probe position on the probe card used corresponding to chip during test to two positions of the center of circle symmetry along outer ring test zone block in exposing wafer inactive area is roughly contrary, so the test process that can reduce outer ring test zone block is to the pollution of probe, thus stability and the test yield of test can be improved.In addition, carry out, carrying out the clean of a probe to Internal and external cycle test zone block, so the present invention can reduce the cleaning time of probe, improving the life-span of probe in whole test process.
Accompanying drawing explanation
Below in conjunction with the drawings and specific embodiments, the present invention is further detailed explanation:
Fig. 1 be the probe of the probe station of existing crystal round test approach move towards schematic diagram;
Fig. 2 is first embodiment of the invention method flow diagram;
Fig. 3 is the schematic diagram carrying out determining in the division of wafer Internal and external cycle and step 2 Internal and external cycle test zone block in the step one of first embodiment of the invention method;
Fig. 4 be the probe of the probe station of first embodiment of the invention method move towards schematic diagram;
Fig. 5 be the probe of the probe station of second embodiment of the invention method move towards schematic diagram.
Embodiment
As shown in Figure 2, be first embodiment of the invention method flow diagram; First embodiment of the invention crystal round test approach comprises the steps:
Step one, as shown in Figure 3, carry out the division of wafer outer ring 203 and wafer inner ring 204, described wafer inner ring 204 is exposing wafer effective coverage, it is outside that described wafer outer ring 203 is positioned at described wafer inner ring 204, and is exposing wafer inactive area in ring-band shape region between described wafer outer ring 203 and described wafer inner ring 204.
In the embodiment of the present invention, the ring-band shape width of described exposing wafer inactive area is 3 millimeters ~ 5 millimeters.The through hole of the contact pad (pad) of described exposing wafer inactive area is in the state come out.
Step 2, as shown in Figure 3, according to the test zone block residing for the position relationship determination measuring unit 202 of the measuring unit 202 on wafer 201 and described wafer outer ring 203 and described wafer inner ring 204, the described measuring unit 202 intersected with described exposing wafer inactive area is defined as outer ring test zone block around the test zone block formed, the test zone block that the described measuring unit 202 by test zone block inside, described outer ring forms is defined as inner ring test zone block.
Described measuring unit 202, by multiple adjacent forming for the same chip surveyed, shows in Fig. 3 in described measuring unit 202 and includes 24 with the chips surveyed.
Step 3, described wafer 201 is tested before first the probe in the probe of probe station is cleaned.
Goodly to be chosen as, to use faller gill clearly to clean described probe.Aluminium bits on described probe or tungsten plug depollution fall by cleaning procedure.Aluminium on described probe is considered to be worth doing or is produced in the step 5 of tungsten plug pollution source in time testing a upper wafer.
Step 4, probe clean the described probe station of rear use and first test the described measuring unit 202 of described inner ring test zone block, test is carried out several times, test each time and all standing test is carried out to a described measuring unit 202, a described measuring unit 202 has been tested the described probe of rear movement and has been tested the described measuring unit 202 of the next one, until all described measuring unit 202 in described inner ring test zone block is all completed.
Described all standing test refers to and utilizes the probe in described probe all to carry out testing the same survey connecting all chips realized in described measuring unit 202 to all chips in described measuring unit 202.
All described measuring unit 202 in step 5, described inner ring test zone block is all completed the described measuring unit 202 of the described probe of rear movement to described outer ring test zone block and tests, test is carried out several times, test each time and all standing test is carried out to a described measuring unit 202, a described measuring unit 202 has been tested the described probe of rear movement and has been tested the described measuring unit 202 of the next one, until all described measuring unit 202 in the test zone block of described outer ring is all completed.
Aluminium bits are produced or tungsten plug pollutes with the probe that described exposing wafer inactive area contacts of being positioned at of described measuring unit 202 in step 5.
As shown in Figure 4, be first embodiment of the invention method middle probe platform probe move towards schematic diagram; The trend of the probe of the probe station of first embodiment of the invention method is:
Wherein the moving direction of the described probe in the test process of step 4 is set as: select a described measuring unit 202 near described outer ring test zone block to be test starting point, move inward until all described measuring unit 202 in described inner ring test zone block is all completed afterwards with screw type, the inside trend line of this screw type is as shown in mark 205a and 205b, region between measuring unit corresponding to the end of trend line 205a and the top of trend line 205b has all covered in trend line 205a, therefore trend line 205a and 205b is off structure.
In step 5, the moving direction of the described probe in test process is set as: select a described measuring unit 202 for test starting point, afterwards according to described outer ring test zone block circle clockwise direction or counterclockwise carry out moving until all described measuring unit 202 in the test zone block of described outer ring is all completed, shown in the trend line corresponding to mark 205c.
The trend that the difference of second embodiment of the invention method and first embodiment of the invention method is only the probe of probe station arranges difference, as shown in Figure 5, be the probe of the probe station of second embodiment of the invention method move towards schematic diagram; The trend of the probe of the probe station of second embodiment of the invention method is:
Wherein the moving direction of the described probe in the test process of step 4 is set as: select one the described measuring unit 202 in inner side be test starting point, outwards move with screw type afterwards until all described measuring unit 202 in described inner ring test zone block is all completed.The outside trend line of this screw type is as shown in mark 206a and 206b, region between measuring unit corresponding to the end of trend line 206a and the top of trend line 206b has all covered in trend line 206a or has been positioned at described outer ring test zone block, therefore trend line 206a and 206b is off structure.
In step 5, the moving direction of the described probe in test process is set as: select a described measuring unit 202 for test starting point, afterwards according to described outer ring test zone block circle clockwise direction or counterclockwise carry out moving until all described measuring unit 202 in the test zone block of described outer ring is all completed, shown in the trend line corresponding to mark 206c.
Above by specific embodiment to invention has been detailed description, but these are not construed as limiting the invention.Without departing from the principles of the present invention, those skilled in the art also can make many distortion and improvement, and these also should be considered as protection scope of the present invention.
Claims (12)
1. a crystal round test approach, is characterized in that, comprises the steps:
Step one, carry out the division of wafer outer ring and wafer inner ring, described wafer inner ring is exposing wafer effective coverage, it is outside that described wafer outer ring is positioned at described wafer inner ring, and is exposing wafer inactive area in ring-band shape region between described wafer outer ring and described wafer inner ring;
Step 2, test zone block residing for the position relationship determination measuring unit of the measuring unit on wafer and described wafer outer ring and described wafer inner ring, the described measuring unit intersected with described exposing wafer inactive area is defined as outer ring test zone block around the test zone block formed, the test zone block that the described measuring unit by test zone block inside, described outer ring forms is defined as inner ring test zone block;
Step 3, described wafer is tested before first the probe in the probe of probe station is cleaned;
Step 4, probe clean the described probe station of rear use and first test the described measuring unit of described inner ring test zone block, test is carried out several times, test each time and all standing test is carried out to a described measuring unit, a described measuring unit has been tested the described probe of rear movement and has been tested the described measuring unit of the next one, until all described measuring unit in described inner ring test zone block is all completed;
All described measuring unit in step 5, described inner ring test zone block is all completed the described measuring unit of the described probe of rear movement to described outer ring test zone block and tests, test is carried out several times, test each time and all standing test is carried out to a described measuring unit, a described measuring unit has been tested the described probe of rear movement and has been tested the described measuring unit of the next one, until all described measuring unit in the test zone block of described outer ring is all completed.
2. crystal round test approach as claimed in claim 1, is characterized in that: use clear faller gill to clean described probe in step 3.
3. crystal round test approach as claimed in claim 1 or 2, is characterized in that: the aluminium bits on described probe or tungsten plug depollution fall by the cleaning procedure of step 3.
4. crystal round test approach as claimed in claim 3, is characterized in that: produce in the aluminium bits on described probe or the step 5 of tungsten plug pollution source in time testing a upper wafer.
5. crystal round test approach as claimed in claim 4, is characterized in that: produce aluminium bits or tungsten plug pollutes with the probe that described exposing wafer inactive area contacts of being positioned at of described measuring unit in step 5.
6. crystal round test approach as claimed in claim 1, it is characterized in that: in step 4, the moving direction of the described probe in test process is set as: select a described measuring unit near described outer ring test zone block to be test starting point, move inward with screw type afterwards until all described measuring unit in described inner ring test zone block is all completed.
7. crystal round test approach as claimed in claim 1, it is characterized in that: in step 4, the moving direction of the described probe in test process is set as: select one the described measuring unit in inner side be test starting point, outwards move with screw type afterwards until all described measuring unit in described inner ring test zone block is all completed.
8. crystal round test approach as claimed in claim 1, it is characterized in that: in step 5, the moving direction of the described probe in test process is set as: select a described measuring unit for test starting point, afterwards according to described outer ring test zone block circle clockwise direction or counterclockwise carry out moving until all described measuring unit in the test zone block of described outer ring is all completed.
9. crystal round test approach as claimed in claim 1, is characterized in that: described measuring unit is by multiple adjacent for forming with the chip surveyed.
10. crystal round test approach as described in claim 1 or 9, is characterized in that: described all standing test refers to and utilizes the probe in described probe all to carry out testing the same survey connecting all chips realized in described measuring unit to all chips in described measuring unit.
11. crystal round test approach as claimed in claim 1, is characterized in that: the ring-band shape width of described exposing wafer inactive area is 3 millimeters ~ 5 millimeters.
12. crystal round test approach as claimed in claim 1, is characterized in that: the through hole of the contact pad of described exposing wafer inactive area is in the state come out.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510648900.1A CN105353293B (en) | 2015-10-09 | 2015-10-09 | Crystal round test approach |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510648900.1A CN105353293B (en) | 2015-10-09 | 2015-10-09 | Crystal round test approach |
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| CN105353293A true CN105353293A (en) | 2016-02-24 |
| CN105353293B CN105353293B (en) | 2018-04-17 |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN107561319A (en) * | 2017-08-23 | 2018-01-09 | 上海华力微电子有限公司 | A kind of clear needle method of WAT boards probe card |
| CN107976620A (en) * | 2017-11-20 | 2018-05-01 | 上海华力微电子有限公司 | A kind of crystal round test approach |
| CN110230989A (en) * | 2018-03-06 | 2019-09-13 | 均豪精密工业股份有限公司 | Probe card adjusts needle maintenance system and its method online |
| CN111157868A (en) * | 2019-12-23 | 2020-05-15 | 广西天微电子有限公司 | Wafer retesting method and testing equipment |
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| CN111157868B (en) * | 2019-12-23 | 2021-09-10 | 广西天微电子有限公司 | Wafer retesting method and testing equipment |
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| Publication number | Publication date |
|---|---|
| CN105353293B (en) | 2018-04-17 |
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