CN105336632A - 用于将芯片连接到载体的分批工艺 - Google Patents

用于将芯片连接到载体的分批工艺 Download PDF

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Publication number
CN105336632A
CN105336632A CN201510473217.9A CN201510473217A CN105336632A CN 105336632 A CN105336632 A CN 105336632A CN 201510473217 A CN201510473217 A CN 201510473217A CN 105336632 A CN105336632 A CN 105336632A
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chip
carrier
transfer vector
connecting media
chip carrier
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CN201510473217.9A
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CN105336632B (zh
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R.菲舍尔
A.海因里希
J.马勒
K.勒斯尔
P.施特罗贝尔
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Infineon Technologies AG
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Infineon Technologies AG
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    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H01L2924/143—Digital devices
    • H01L2924/1434—Memory

Abstract

本发明涉及用于将芯片连接到载体的分批工艺。公开用于将芯片连接到芯片载体的方法。在一些实施例中用于将多个芯片连接到芯片载体的方法包含：将第一芯片放置在转移载体上，将第二芯片放置在转移载体上，将带有第一和第二芯片的转移载体放置在芯片载体上，并且在第一芯片和芯片载体与在第二芯片和芯片载体之间形成连接。

Description

用于将芯片连接到载体的分批工艺
技术领域
本发明通常涉及用于将多个芯片连接到芯片载体的方法，并且在特定实施例中涉及用于将多个芯片连接到芯片载体的分批工艺。
背景技术
半导体芯片通常被连接到芯片载体（所谓的管芯焊盘）上的芯片接触位置。存在用于在芯片载体和半导体芯片之间生产电接触的各种方法。
发明内容
依据本发明的实施例，用于将多个芯片放置在芯片载体上的方法包括：将第一芯片放置在转移载体上；将第二芯片放置在转移载体上；将带有第一和第二芯片的转移载体放置在芯片载体上；并且在第一芯片和芯片载体与在第二芯片和芯片载体之间形成连接。
依据本发明的其它实施例，用于将多个芯片连接到芯片载体的方法包括：将第一芯片放置在转移载体上，该第一芯片包括芯片前侧电极和芯片背侧电极；将第二芯片放置在转移载体上，该第二芯片仅包括芯片前侧电极；将带有第一和第二芯片的转移载体放置在芯片载体上；并且在第一芯片和芯片载体之间以第一连接介质形成第一连接且在第二芯片和芯片载体之间以第二连接介质形成第二连接。
依据本发明的又其它实施例，用于将多个芯片连接到芯片载体的方法包括：将第一芯片放置在转移载体上；将第二芯片放置在转移载体上；将带有第一和第二芯片的转移载体放置在芯片载体上并且施加压强和温度，由此在第一芯片和芯片载体之间形成第一连接并且在第二芯片和芯片载体之间形成第二连接。
附图说明
为了更完全理解本发明及其优势，现在参考连同附图一起进行的下面描述，在附图中：
图1示出依据本发明的实施例的分批工艺的流程图；
图2a示出设置在转移载体上的不同类型的芯片；
图2b示出带有设置在某些区域上的粘合介质的芯片载体；
图2c示出与芯片载体对准的转移载体；
图2d示出被放置在芯片载体上的转移载体；
图2e示出在分批工艺中被按压在芯片载体上同时施加温度的转移载体；
图2f示出在转移载体已被去除之后接合到芯片载体的不同类型的芯片；
图2g示出带有不同类型的芯片的芯片布置；
图3示出转移载体的顶视图；以及
图4a-4c示出在分批工艺中被按压在芯片载体上同时施加温度的转移载体。
具体实施方式
在传统多芯片封装技术中，驱动器芯片和功率芯片在单独、分离和串行的工艺步骤中被接合到引线框架。比如，在第一接合步骤中功率芯片首先被焊接到引线框架，并且随后在第二单独和分离的接合步骤中驱动器芯片被粘合地连接到引线框架。引线框架被预热到加热板上的温度并且芯片通过拾放工具单独地被按压在引线框架上。这样的单独、分离和串行的接合工艺步骤消耗相当多的处理时间。
本发明的实施例提供用于在高度并行的接合工艺中使用相同或不同的连接介质将多个芯片或多个类型的芯片连接到芯片载体的方法。这样高度并行的接合工艺具有优于传统芯片接合工艺的极大优势，因为它们减少总体处理时间。由于芯片在单个工艺或接合步骤中被连接到芯片载体，所以与传统工艺相比要求更少的工艺步骤。此外，更少的温度步骤是必要的，这提高制造的连接的可靠性。
本发明的实施例提供在芯片载体或芯片被加热之前将多个芯片放置在芯片载体上。芯片载体和芯片可以一起被加载到加热设备、按压设备或加热和按压设备（设备）中。替选地，带有芯片的转移载体和芯片载体在分离的步骤中被加载到诸如炉或压具的设备中（在有或没有温度的情况下）。在芯片载体、转移载体和芯片被加载之后，形成芯片和芯片载体之间的物理稳定的连接。
图1示出用于将多个芯片连接到芯片载体的方法100。在步骤102中，带有垂直器件（例如，被配置成提供垂直电流流动的器件）的晶片在切割箔上被分离（例如，切割）。分离晶片形成包括垂直器件的垂直芯片。垂直芯片包括芯片前（也被称为顶）侧接触（也被称为电极）和芯片背（或底）侧接触。
晶片衬底可以包含各种材料，例如半导体材料。晶片衬底可以包含来自下面组的材料的至少一个，该组材料由下述构成：硅、锗、III到V族材料、和聚合物。依据一些实施例，晶片衬底可以包含掺杂或不掺杂的半导体材料。依据其它实施例，晶片衬底可以包含半导体化合物材料，例如碳化硅（SiC）、砷化镓（GaAs）、磷化铟（InP）、或四元半导体化合物材料诸如砷化铟镓（InGaAs）。晶片衬底可以是绝缘体上硅（SOI）晶片。
垂直芯片可以包括功率半导体芯片，其中功率半导体芯片可以包含来自由下述构成的组的至少一个功率半导体器件：功率晶体管、功率MOS晶体管、功率双极晶体管、功率场效应晶体管、功率绝缘栅双极晶体管（IGBT）、结型栅双极晶体管（JFET）、晶闸管、MOS受控晶闸管、受控整流器、功率二极管、功率肖特基二极管、碳化硅二极管、和氮化镓器件。在某一实施例中，垂直芯片可以是功率半导体晶体管，其中功率半导体晶体管能够承载高到近似600V的电压。垂直芯片包括顶侧（前侧）和底侧（背侧）。垂直芯片可以包含设置在顶侧处的第一芯片接触（例如，栅极接触）和第二芯片接触（例如，第一源极/漏极接触），以及设置在底侧处的第三芯片接触（例如，第二源极/漏极接触）。芯片接触中的每个可以包含导电接触焊盘。每个导电接触焊盘包含来自下面组的材料的至少一个材料、元素或合金，该组由下述构成：铜、铝、银、锡、金、钯、锌、和镍。接触中的每个通过电绝缘材料比如二氧化硅、氮化硅或聚酰亚胺或氮化物与垂直芯片的顶侧上的其它接触电隔离。
在一些实施例中，导电介质被设置在垂直芯片的底侧上同时它们仍是晶片的部分。特别地，导电介质被设置在第三芯片接触上。导电介质可以被放置在垂直芯片的整个底侧上或仅在垂直芯片的底侧的部分上。导电介质可以包含来自下面组的材料的至少一个，该组由下述构成：软焊料、扩散焊料、导电膏诸如导电纳米膏、和导电粘合剂。此外，导电介质可以包含来自下面组的元素的至少一个，该组的元素由下述构成：Ag、Zn、Sn、Pb、Bi、In、Cu、Au、和Pd。
在导电连接介质被放置在晶片上之前，晶片可以在顶侧上被处理并且随后被翻转或倒装。为了分离的目的，可以翻回晶片。替选地，在芯片变为分离的之后，导电连接介质被放置在芯片的背侧上。
在步骤104中，带有水平器件（例如，被配置成提供与主表面平行的水平电流流动的器件）的晶片在切割箔上被分离（例如，切割）以形成水平芯片。水平芯片包括芯片前（也被称为顶）侧接触但是没有芯片背（或底）侧接触。
晶片衬底材料可以包括与关于步骤102描述的晶片衬底材料相同或类似的材料。水平芯片可以包括半导体逻辑芯片诸如集成电路芯片。水平芯片可以包含来自由下述构成的组的半导体逻辑器件的至少一个半导体逻辑芯片：专用集成芯片（ASIC）、驱动器芯片、控制器芯片和存储器芯片。替选地，水平芯片可以是LED芯片、光-机械芯片、传感器芯片或MEMS芯片。半导体逻辑芯片可以包含低功率半导体器件，例如能够处理高到大约5V、高到大约30V或高到大约150V的器件。水平芯片可以包含芯片顶侧（前侧）和芯片底侧（背侧）。芯片顶侧可以是有源区域（例如，器件）和所有芯片接触（电接触、接触焊盘或电极）被定位于此的有源侧，并且芯片底侧可以是未将有源区域以及芯片接触定位于此的芯片背侧。芯片前侧可以是可以包括金属化层的侧。芯片背侧可以包括半导体材料诸如硅并且该芯片背侧可以没有金属化材料。当底侧被附连到芯片载体时，水平芯片可以在底侧上电绝缘。每个导电接触焊盘可以包含来自下面组的材料的至少一个材料、元素或合金，该组由下述构成：铜、铝、银、锡、金、锌、镍。
在步骤106中，垂直芯片被放置在转移载体上。转移载体可以包括转移箔。转移箔可以包含聚合物诸如硅合成橡胶。在一些实施例中，垂直芯片被放置在转移载体上，从而第一和第二电接触面对转移箔并且第三电接触背对转移箔。如以上讨论的，第一接触可以是栅极接触，第二接触可以是第一源极/漏极接触，并且第三接触可以是第二源极/漏极接触。在其它实施例中，垂直芯片被放置在转移载体上，从而第三接触面对转移载体并且第一和第二接触正背对转移载体。其它配置可以是可能的，特别是针对带有多于三个接触的芯片诸如晶闸管。垂直芯片可以通过拾放工具被放置在转移载体上。
水平芯片被放置在转移载体上。在一些实施例中，水平芯片被放置在转移载体上，从而带有电接触的顶侧面对转移载体并且背侧背对转移载体。在其它实施例中，水平芯片被放置在转移载体上，从而带有接触的顶侧背对转移载体并且背侧面对转移载体。水平芯片可以通过拾放工具被放置在转移载体上。它可以是与拾放垂直芯片的工具相同的拾放工具。替选地，拾放工具可以是不同的拾放工具。
在转移载体和芯片被加热和/或芯片抵住芯片载体被按压之前，水平和垂直芯片被放置在转移载体上。在芯片和转移载体被放置在加热和/或按压设备诸如炉或压具中之前，芯片被布置在转移载体上。
用于将芯片100、150放置在转移载体200上的实施例能够在图2a中看到。垂直芯片100以顶侧被放置在载体200上，该垂直芯片100包含面对转移载体200的第一接触110（例如，栅极接触）和第二接触120（例如，第一源极/漏极接触），并且水平芯片150以顶侧被放置在载体200上，该水平芯片150包含面对转移载体200的接触160。垂直芯片的第三接触130（例如，第二源极/漏极接触）和水平芯片的底侧背对转移载体200。导电介质140诸如焊料材料被布置在垂直芯片100的第三接触130上，而导电介质或电绝缘介质未被放置在水平芯片150的底侧上。
在一些实施例中，垂直和水平芯片以阵列和以交替方式被布置在转移载体上。转移载体可以包括用于水平芯片的列和用于垂直芯片的列。比如，定位在用于垂直芯片的列中的垂直芯片被放置成邻近定位在用于水平芯片的列中的水平芯片。在其它实施例中，垂直芯片的列被定位成邻近水平芯片的两列，或水平芯片的列被放置成邻近垂直芯片的两列。其它配置是可能的，从而三个或四个不同芯片被定位成邻近彼此。水平/垂直芯片的列能够包括相同类型的水平/垂直芯片或不同类型的水平/垂直芯片。
图3示出转移载体200的顶视图。如能够从图3看到的，转移载体200包括用于芯片100、150的位置标识符210的行。在这个特定实施例中，在转移载体200的第一侧230上存在9个列220，并且在转移载体200的第二侧240上存在9个列250。第一侧230以距离260与第二侧240间隔开。每个列220、250具有21个行270。列220、250和行270被细分成6个块280-285。转移载体200可以具有用于位置标识符210的不同配置。比如，可以存在每个侧上的10-20或多于20个列、25-50或多于50个行以及10-20或多于20个块。位置标识符可以由全局对准标记（比如由凹陷或突起）来限定。转移载体200上的任何其它合适的位置标识符210配置能够被设计。
转移载体200可以包括长度l和宽度w。转移载体200可以包括50cm到1米（替选地30cm到1.5m）的长度以及50cm到1m（替选地30cm到1.5m）的宽度。转移载体可以包括矩形形状或方形形状。转移载体200能够承载多于大约100个芯片、多于大约500个芯片或多于大约1000个芯片。
在下一个步骤（108）中，在水平和垂直芯片经由转移载体被放置在芯片载体上之前，电绝缘介质（例如，电绝缘粘合剂）诸如粘合膏被分配在芯片载体上。粘合介质可以仅被定位在水平芯片将被定位在芯片载体上的区域（例如，用于水平芯片的管芯附连区域）中，从而在芯片载体上形成粘合薄膜。粘合介质可以经由喷墨印刷工艺或经由丝网印刷工艺被分配。可分配的粘合介质可以包括环氧树脂、胶、或膏。替选地，粘合介质诸如粘合薄膜可以被放置在芯片载体上。
在一些实施例中，芯片载体可以包含金属板或金属箔（例如，引线框架）。芯片载体可以包含来自下面组的材料的至少一个，该组材料由下述构成：铜、镍、铁、铜合金、镍合金、铁合金。芯片载体可以包括比50μm更厚或比75μm更厚的厚度。芯片载体可以具有下述厚度：该厚度范围为从大约200μm到大约300μm，例如从大约220μm到大约280μm、例如从240μm到大约260μm。芯片载体可以是热沉或散热器。
在其它实施例中，芯片载体包括载体衬底材料诸如绝缘材料（例如，陶瓷、塑料等等）或半导体材料。比如，芯片载体可以是印刷电路板（PCB）。在一些实施例中，在转移载体和芯片被放置在芯片载体上之前，芯片载体已被结构化（例如，分开芯片载体）。
图2b示出步骤108的实施例，其中芯片载体300具有设置在某些区域上的粘合介质310。如能够从图2b看到的，粘合介质310被设置在用于水平芯片320的管芯附连区域中但是不在用于垂直芯片330的管芯附连区域中。在其它实施例中，电绝缘介质可以不被设置在芯片载体上而是被设置在水平芯片的底侧上。这以下进一步关于图4a来讨论。
可选步骤110提供带有水平和垂直芯片的转移载体被倒装或翻转并且被放置在芯片载体上。
在步骤112中，在其上带有芯片的转移载体200和带有设置在某些区域中的电绝缘介质的芯片载体被彼此对准，从而垂直芯片被定位在不带有电绝缘介质的管芯附连区域之上并且水平芯片与用于水平芯片的管芯附连区域和在其上的电绝缘介质对准。这能够在图2c中看到。转移载体随后被放置在芯片载体上，从而芯片在它们的相应区域上被对准和被放置。这在图2d中被示出。电绝缘连接介质310的厚度可以对所有的水平芯片150相同并且导电连接介质140的厚度可以对所有的垂直芯片100相同。在一些实施例中，电绝缘连接介质310的厚度和导电连接介质140的厚度相同。
在步骤114中，在芯片和芯片载体之间形成连接。转移载体、芯片和芯片载体可以被放置在加热设备、按压设备、或加热的按压设备中。这样加热的按压设备可以是压具，在该压具中芯片被加热同时抵住芯片载体被按压。压具可以是层压压具。在一些实施例中，芯片仅被加热而不被按压以便形成连接。在其它实施例中，芯片仅被按压朝向芯片载体而不被加热（施加室温以上的温度）以便形成连接。
当转移载体被按压到芯片载体同时施加升高的温度（例如，施加烘烤工艺）时，在芯片和芯片载体之间形成连接。在芯片和芯片载体之间的连接可以在单个加热、按压或加热/按压步骤中形成。在转移载体上的所有芯片同时被加热和/或被按压。
比如，在转移载体和芯片载体上的所有芯片被放置在炉中，当布置在炉中时施加热和压强并且形成连接。在一些实施例中，施加在大约200℃和大约400℃之间的温度。同时施加至少1N/mm2（替选地，2N/mm2到10N/mm2）的压强。替选地，施加在大约250℃和大约350℃之间的温度。同时施加至少1N/mm2（替选地，2N/mm2到10N/mm2）的压强。
在一些实施例中，炉中的温度缓慢地增加直到大约45分钟到大约1小时。随后，将温度维持在大约200℃和大约400℃处、或替选地在大约250℃和大约350℃处达大约1小时。最终，温度相对快速地被减小到室温。比如，温度以小于大约30分钟被减小同时保持或减小压强。
在垂直芯片被按压在芯片载体上并且被加热时，电绝缘介质（例如，粘合材料）在芯片载体和水平芯片的背侧之间形成强物理连接。在相同的工艺步骤中，垂直芯片的底侧与芯片载体形成强物理连接。比如，粘合介质（被分配或放置为胶带）在大约100℃和大约200℃之间（替选地在大约150℃和大约200℃之间）的温度下在水平芯片和芯片载体之间形成连接，并且随后在更高的温度下，导电介质在大约200℃和大约400℃之间（替选地在大约250℃和大约350℃之间）与芯片载体或与芯片载体的接合焊盘形成连接（例如，焊料连接）。绝缘连接可以是粘合接合。导电连接在形成或不形成金属间相的情况下可以是焊料接合。图2e示出下述实施例：将芯片100、150按压在芯片载体300上并且退火芯片100、150和芯片载体300，由此形成接合粘合接合350和导电接合340。
电绝缘连接350的厚度可以对所有的水平芯片150相同并且导电连接340的厚度可以对所有的垂直芯片100相同。在一些实施例中，电绝缘连接350的厚度和导电连接340的厚度相同。
在一些实施例中，转移载体和芯片载体被顺序地加载在加热设备、按压设备、或加热的按压设备（被称为设备）中。比如，带有芯片的转移载体首先被放置或被加载在设备中并且随后其后芯片载体被放置或被加载在设备中。设备加热芯片载体并且将转移载体放置或按压在芯片载体上，从而形成芯片和芯片载体之间的连接。替选地，在不施加任何热的情况下设备将转移载体按压在芯片载体上。
在步骤116中，布置可以从加热、按压、或加热的按压设备去除并且转移载体从芯片去除，从而芯片现在仅被连接到芯片载体。比如，通过施加紫外（UV）光以解开芯片和转移载体之间的连接，可以将转移载体从芯片去除。随后，转移载体被移去或剥离。替选地，转移载体通过自动步骤被去除。图2f示出被接合340、350到芯片载体300的芯片100、150。已从芯片100、150去除转移载体200。
在步骤118中，芯片载体被分离成单独芯片布置。比如，单独芯片布置可以包括垂直芯片、水平芯片和芯片载体的部分。替选地，单独芯片布置可以包括多于两个芯片和芯片载体的部分。比如，单独芯片布置可以包括垂直芯片和多于一个（例如，两个）水平芯片或水平芯片和多于一个（例如，两个）垂直芯片。在图2g中示出两个单独芯片布置360的实施例。
芯片布置通过切割、锯切或刻蚀与芯片载体上的其它芯片布置分离。
在步骤120中，单独芯片布置被层压、封装或围起在外壳中。在封装芯片布置（由此形成多芯片封装）之前，芯片接触可以被线接合或夹接合。比如，垂直芯片的第一和第二芯片接触可以被线接合到引线框架的引线，并且水平芯片的芯片接触可以被线接合到引线框架的其它引线。
在一些实施例中，在芯片载体上的芯片被线接合或夹接合并且随后被层压或被封装。其后，在芯片载体上的层压芯片以单独层压芯片布置（封装的（多）芯片）被分离。
封装材料可以包含来自下面组的材料的至少一个，该组由下述构成：填充或未填充的环氧树脂材料、预浸复合纤维材料、增强纤维材料、层压材料、模制材料、热固材料、热塑材料、或纤维增强层压材料。依据各种实施例，封装材料可以包含带有或没有一个或多个颗粒填充物的未被结构化的层压材料。该颗粒填充物可以包括二氧化硅颗粒填充物、氧化铝颗粒填充物（例如，玻璃颗粒或纳米颗粒）、或玻璃纤维。封装材料可以至少部分地围绕芯片和芯片载体（的部分）。封装材料可以将水平芯片与垂直芯片绝缘。封装材料可以在芯片的顶侧的顶侧之上形成。
可以使用一个或多个沉积工艺来形成或沉积封装材料。封装材料可以被沉积使得（电绝缘）封装材料例如未被结构化的环氧树脂可以至少部分地围绕芯片。在芯片载体之上形成的封装材料可以具有下述厚度：该厚度范围为从大约5μm到大约500μm，例如从大约15μm到大约150μm。在一些实施例中，封装材料可以被形成以至少部分地围绕芯片载体底侧。在芯片载体底侧上形成的封装材料可以具有下述厚度：该厚度范围为从大约5μm到大约500μm，例如从大约15μm到大约150μm。依据其它实施例，封装材料可以包含第一封装材料和第二封装材料。
在一些实施例中，芯片载体的表面可以被粗糙化，从而改进封装材料到芯片载体的粘附性。
图4a示出类似于图1中的工艺的工艺的工艺步骤。在这些实施例中，电绝缘连接介质（例如，粘合剂）不被设置在芯片载体上而直接被设置在水平芯片上。比如，当芯片仍是晶片的部分时（例如，在芯片与晶片分离之前），电绝缘连接介质被分配在水平芯片的背侧上。比如，在分离晶片之前电绝缘连接介质（例如，膏或胶带）被分配、施加或放置在水平器件的晶片上。依据这些实施例，如关于步骤2描述的那样来处理水平芯片。随后晶片被倒装或翻转并且粘合层被施加（例如，粘合膏被分配或粘合胶带被放置）在芯片载体上。在粘合材料被分配在晶片的背侧上并且晶片被倒装回到它的原始位置之后，晶片被分离。分离的水平芯片随后可以被放置在转移载体上，其中它们的有源侧面对转移载体。替选地，分离的水平芯片随后可以被放置在转移载体上，其中它们的有源侧背对转移载体。带有水平和垂直芯片的转移载体与芯片载体对准并且随后被放置或被按压在芯片载体上，如在图4a中示出的（例如，在设备中）。在一些实施例中，芯片载体和转移载体被对准且放置在彼此上，并且随后被放置或被加载在设备中用于在芯片和芯片载体之间形成物理连接，如关于步骤112描述的。这个工艺的实施例可以省略步骤108。
图4b示出类似于图1中的工艺的工艺的工艺步骤。在这个工艺的实施例中，然而芯片载体被部分或完全地结构化。如果芯片载体被完全地结构化（分开），则分离芯片载体可以不如在步骤118中讨论的那样被完成。如果芯片载体（例如，金属板或引线框架）被部分地结构化（预结构化），则芯片载体可以通过切割或刻蚀穿过预结构化的区域例如穿过预形成的凹陷被完全地分离。替选地，芯片载体可以在一些区域中而不在其它区域中被分开（完全地切割）。在这个情形中，如果芯片载体被最终分离，则仅特定区域被分离，因为其它区域被预分离。
分开的芯片载体可以包括隔离的岛390和剩余部分380。比如，金属板（例如，引线框架）300包括管芯附连区域（隔离的岛）390，该管芯附连区域（隔离的岛）390比如在金属板或封装的最终分离步骤（例如，刻蚀工艺）之后与金属板300的周围的金属部分断开。在一些实施例中，隔离的岛390是用于水平芯片150而不是用于垂直芯片100的管芯附连区域。在这些情形中，导电连接介质370诸如焊料或导电膏可以被施加到水平芯片150的底侧。这可以具有下述优势：在不导致可能的短路的情况下，可以针对不同的芯片类型施加相同的连接介质。
在其它实施例中，用于水平芯片的管芯附连区域是隔离的岛，并且用于垂直芯片的管芯附连区域是（不同的）隔离的岛。在又其它实施例中，隔离的岛包括两个或更多个芯片。比如，每个岛包括水平和垂直芯片。在将芯片接合到它们相应的岛之后，芯片可以被线接合并且随后被层压。注意的是，转移载体和芯片载体能够在设备外或在设备内被对准和被放置在彼此上，如关于之前实施例描述的。
图4c示出类似于图1中的工艺的工艺的工艺步骤。在这个工艺的实施例中，仅垂直芯片100被设置在转移载体200上。水平芯片150未被放置在转移载体200上。所有的垂直芯片100被同时放置在芯片载体300上并且同时形成电连接，如关于之前实施例描述的。步骤104和108可以被省略。
在一些实施例中，垂直芯片包括不同类型的垂直芯片。不同类型的垂直芯片也可以包括不同类型的导电连接介质。比如，一个垂直芯片包括带有焊料材料的背侧而另一个垂直芯片包括带有导电膏的背侧。不同的导电连接介质可以在不同温度处或在不同时间处但是在相同工艺步骤（例如，工艺步骤114）内在芯片和芯片载体之间形成连接。
在这个工艺的其它实施例中，仅水平芯片被设置在芯片载体上并且被接合到芯片载体。垂直芯片未被放置在转移载体上。所有的水平芯片被同时放置在芯片载体上并且同时形成绝缘连接。工艺步骤102可以被省略。
水平芯片可以包括不同类型的水平芯片，诸如逻辑芯片和存储器芯片。此外，水平芯片可以包括不同的半导体衬底材料诸如基于硅（Si）衬底或GaAs衬底的芯片。这些不同类型的水平芯片（例如，Si衬底或GaAs衬底）可以包括不同类型的电绝缘连接介质。比如，带有硅衬底的水平芯片可以以第一粘合膏被接合到芯片载体，并且带有GaAs衬底的水平芯片可以以第二粘合膏被接合到芯片载体。不同的电绝缘连接介质可以在不同温度处或在不同时间处但是在相同工艺步骤（例如，工艺步骤114）内在芯片和芯片载体之间形成连接。
对于水平芯片而言，绝缘连接介质可以被布置在水平芯片（的背侧）上，或替选地在芯片载体上。所以，图1的工艺可以被修改以适应这些实施例。
在一些实施例中，垂直芯片被放置在转移载体上，其中第一和第二接触背对芯片载体；而水平芯片在放置在转移载体上，其中有源侧背对转移载体。在转移载体被放置在芯片载体上并且芯片被接合到芯片载体之后，垂直芯片以第三接触被连接到芯片载体，而水平芯片的有源侧被连接到芯片载体（其中水平芯片的底侧背对芯片载体）。在这些实施例中，垂直芯片的第一和第二接触可以被线接合到芯片载体，而水平芯片的接触可以被焊接到芯片载体。相同的焊料材料可以被施加以将（垂直芯片的背侧）和水平芯片的有源侧连接到芯片载体（例如，PCB）。
本发明的实施例包括在分批工艺中在带有多个电绝缘连接介质的多个水平芯片和芯片载体之间以及在带有多个导电连接介质的多个垂直芯片和芯片载体之间形成接合。特别地，在不同芯片和芯片载体之间的连接在单个压强/加热步骤中形成。
尽管参考图解的实施例已描述本发明，但是这个描述不意图以限制的意思来解释。图解的实施例的各种修改和组合以及本发明的其它实施例在参考描述时对本领域技术人员将是显而易见的。因此，意图所附权利要求涵盖任何这样的修改或实施例。

Claims (25)

1.一种用于将多个芯片连接到芯片载体的方法，所述方法包括：
将第一芯片放置在转移载体上；
将第二芯片放置在转移载体上；
将带有第一和第二芯片的转移载体放置在所述芯片载体上；并且
在将所述转移载体放置在所述芯片载体上之后，在所述第一芯片和所述芯片载体与在所述第二芯片和所述芯片载体之间形成连接。
2.依据权利要求1的所述方法，其中形成连接包括使用电绝缘连接介质形成用于第一芯片的第一连接并且使用导电连接介质形成用于第二芯片的第二连接。
3.依据权利要求1的所述方法，其中形成连接包括施加第一导电连接介质形成用于第一芯片的第一连接并且施加第二导电连接介质形成用于第二芯片的第二连接。
4.依据权利要求3的所述方法，其中所述第一导电连接介质和所述第二导电连接介质相同。
5.依据权利要求1的所述方法，其中形成连接包括施加第一电绝缘连接介质形成用于第一芯片的第一连接并且施加第二电绝缘连接介质形成用于第二芯片的第二连接。
6.依据权利要求1的所述方法，其中形成连接包括在单个加热步骤中、在单个按压步骤中、或在单个加热和按压步骤中形成连接。
7.依据权利要求1的所述方法，在形成连接之后进一步从第一和第二芯片去除转移载体。
8.依据权利要求7的所述方法，进一步包括分离芯片载体，由此形成单独芯片布置，其中所述单独芯片布置包括芯片载体的部分、第一芯片和第二芯片。
9.依据权利要求1的所述方法，其中所述第一芯片和所述第二芯片是相同的芯片。
10.一种用于将多个芯片连接到芯片载体的方法，所述方法包括：
将第一芯片放置在转移载体上，所述第一芯片包括芯片前侧接触和芯片背侧接触；
将第二芯片放置在转移载体上，所述第二芯片仅包括芯片前侧接触；
将带有第一和第二芯片的所述转移载体放置在所述芯片载体上；并且
在所述第一芯片和所述芯片载体之间以第一连接介质形成第一连接且在所述第二芯片和所述芯片载体之间以第二连接介质形成第二连接。
11.依据权利要求10的所述方法，其中将带有第一和第二芯片的所述转移载体放置在所述芯片载体上包括将带有所述芯片背侧接触的第一芯片放置在所述芯片载体上并且将带有不具有芯片前侧接触的侧的第二芯片放置在所述芯片载体上。
12.依据权利要求10的所述方法，其中所述第一连接介质是电绝缘连接介质，并且其中所述第二连接介质是导电连接介质。
13.依据权利要求10的所述方法，其中所述导电连接介质包括焊料、导电膏、或导电粘合剂，并且其中所述电绝缘连接介质包括环氧树脂、胶、膏、胶带或薄膜。
14.依据权利要求10的所述方法，其中所述第一连接介质是第一导电连接介质，并且其中所述第二连接介质是第二导电连接介质。
15.依据权利要求10的所述方法，其中所述芯片载体是金属板，其中所述金属板包括第一和第二芯片岛，其中所述第一和第二芯片岛与金属板的剩余部分隔离，其中所述第一连接被形成在所述第一芯片岛上，其中所述第二连接被形成在所述第二芯片岛上，并且其中第一和第二连接介质包括焊料、导电膏、或导电粘合剂。
16.一种用于将多个芯片连接到芯片载体的方法，所述方法包括：
将第一芯片放置在转移载体上；
将第二芯片放置在转移载体上；
将带有第一和第二芯片的所述转移载体放置在所述芯片载体上；并且
施加压强和温度，由此在所述第一芯片和所述芯片载体之间形成第一连接并且在所述第二芯片和所述芯片载体之间形成第二连接。
17.依据权利要求16的所述方法，进一步包括在形成第一和第二连接之后从第一和第二芯片去除转移载体。
18.依据权利要求17的所述方法，进一步包括分离所述芯片载体由此形成芯片布置，所述芯片布置包括芯片载体的部分、第一芯片和第二芯片。
19.依据权利要求18的所述方法，进一步包括封装所述芯片布置。
20.依据权利要求16的所述方法，进一步包括在所述第一芯片的底侧上形成第一连接介质，并且在所述第二芯片的底侧上形成第二连接介质。
21.依据权利要求16的所述方法，进一步包括在所述芯片载体上在所述第一芯片的管芯附连区域处形成第一连接介质，并且在所述第二芯片的底侧上形成第二连接介质。
22.依据权利要求16的所述方法，其中所述转移载体是转移箔，并且其中所述芯片载体是引线框架或金属板。
23.依据权利要求16的所述方法，其中所述芯片载体是引线框架，并且其中所述引线框架是包括绝缘管芯焊盘的分开的引线框架。
24.依据权利要求16的所述方法，进一步包括：
处理第一晶片，所述第一晶片带有仅在单个表面上具有电极的器件；
分离所述第一晶片，由此形成第一芯片，所述第一芯片包括仅在单个表面上具有电极的器件；
处理第二晶片，所述第二晶片带有在相对表面上具有电极的器件；并且
分离所述第二晶片，由此形成第二芯片，所述第二芯片包括在相对表面上具有电极的器件。
25.依据权利要求10的所述方法，进一步包括在形成第一和第二连接之后从第一和第二芯片去除转移载体。
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