CN105280534B - 承载盘 - Google Patents

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CN105280534B
CN105280534B CN201410617600.2A CN201410617600A CN105280534B CN 105280534 B CN105280534 B CN 105280534B CN 201410617600 A CN201410617600 A CN 201410617600A CN 105280534 B CN105280534 B CN 105280534B
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黄源宏
黄崇桂
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Epistar Corp
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    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
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    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/458—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
    • C23C16/4582—Rigid and flat substrates, e.g. plates or discs
    • C23C16/4583—Rigid and flat substrates, e.g. plates or discs the substrate being supported substantially horizontally
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    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
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    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/458—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
    • C23C16/4582—Rigid and flat substrates, e.g. plates or discs
    • C23C16/4583—Rigid and flat substrates, e.g. plates or discs the substrate being supported substantially horizontally
    • C23C16/4585—Devices at or outside the perimeter of the substrate support, e.g. clamping rings, shrouds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
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    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
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Abstract

本发明公开一种承载盘，包含︰一本体；多个分布在本体上用于承载晶片的承载舟；一与本体连接的内圈；以及一可自本体拆卸且与内圈分离的外圈；其中内圈以及外圈将承载舟彼此分离。

Description

承载盘
技术领域
本发明涉及一种承载盘，特别是涉及一种用于外延成长系统的承载盘。
背景技术
随着科技日新月异，半导体光电元件在资讯的传输以及能量的转换上占有极大的贡献。例如，半导体光电元件可应用于许多不同的系统，包括光纤通讯、光学存储及军事系统等。一般现有的半导体光电元件的制作工艺包含提供晶片、外延成长、薄膜成长、扩散\离子注入、黄光步骤以及蚀刻等步骤。
在上述各种制作过程之中，外延成长步骤大多是通过化学气相沉积(chemicalvapor deposition，CVD)系统或分子束外延(molecular beam epitaxy，MBE)系统进行生长。其中，化学气相沉积系统由于生产速率较快，一般较常为业界所采用。在化学气相沉积系统中成长外延层时，会搭配承载盘以承载晶片。在成长外延层的过程中，沉积物会累积在承载盘的表面上。在承载盘使用一定的次数后，需要移除沉积物以避免后续成长外延层时，降低外延层的品质。其中一种移除沉积物的方法是敲打承载盘的表面以连同沉积物一同剥除承载盘最外层的表面。然而，此种方法易损坏承载盘的表面且会逐渐降低承载盘的厚度，因此考虑到外延层的品质，损坏的承载盘便无法再使用，导致汰换承载盘的费用非常可观。另一种移除沉积物的方法是烘烤承载盘，然而此种方式十分耗时，烘烤一次需花八小时左右，且承载盘于烘烤时，便无法用于成长外延层，因此造成生产率大幅下降。
发明内容
本发明提供一承载盘，包含︰一本体；多个分布在本体上用于承载晶片的承载舟；一与本体连接的内圈；以及一可自本体拆卸且与内圈分离的外圈；其中内圈以及外圈将承载舟彼此分离。
底下通过具体实施例配合所附的附图详加说明，当更容易了解本发明的目的、技术内容、特点及其所达成的功效。
附图说明
图1为本发明一实施例的承载盘的示意图；
图2为本发明一实施例的承载盘的分解图；
图3为本发明一实施例的子元件的示意图；
图4为本发明一实施例的承载盘的分解图；
图5为本发明一实施例的承载盘的侧视图；
图6为本发明一实施例的承载盘的示意图；
图7为本发明一实施例的承载盘的示意图；
图8为本发明一实施例的承载盘的示意图；
图9为本发明一实施例的子元件的示意图；
图10为本发明一实施例的承载盘的局部放大图；
图11为本发明一实施例的承载盘的示意图；
图12为本发明一实施例的子元件的示意图。
符号说明
10：本体 13：承载舟
121：内圈 20：外圈
11：穿孔 1211：内侧
W：径向宽度 1212：第一延伸部
21,22,23：子元件 211,223,231：外缘
212,222,232第二延伸部 w1,w2：最大宽度
301：孔洞 123：上表面
131：顶面 132：边缘
H：高度 124：第一定位结构
213：第一表面 214：第二表面
215：第二定位结构 125：凸部
216：凹槽 40：垫片
41：通孔 221：端部
具体实施方式
为让本发明的上述特征和优点能更明显易懂，下文特举实施例，并配合所附的附图作详细说明如下。在附图中，元件的形状或厚度可扩大或缩小。需特别注意的是，图中未绘示或描述的元件，可以是熟悉此技术的人士所知的形式。本发明所列举的各实施例仅用以说明本发明，并非用以限制本发明的范围。任何人对本发明所作的任何显而易知的修饰或变更都不脱离本发明的精神与范围。
图1为本发明一实施例的承载盘的示意图。图2为本发明一实施例的承载盘的分解图。如图1以及图2所示，本发明一实施例的承载盘包含一本体10、多个在本体10上呈圆形分布且彼此分离的承载舟13、一与本体10连接的内圈121，以及一可自本体10拆卸且与内圈121分离的外圈20，其中承载舟13用于承载晶片。在本实施例中，本体10包含一穿孔11以及一环绕穿孔11的内侧1211，因此，本体10为一具有一径向宽度W的环形圈。内圈121以及外圈20将各承载舟13与其他的承载舟13分离。在本实施例中，内圈121与本体10一体成型，故本体10与内圈121一体成型的部位的厚度大于本体10的其余部位的厚度。内圈121还包含多个第一延伸部1212，各第一延伸部1212以径向朝向外圈20延伸，且延伸方向远离穿孔11。相较于内圈121，外圈20离穿孔11较远。外圈20包含多个可自本体10拆卸的子元件21。多个子元件21具有相同结构且彼此分离。图3为本发明一实施例的子元件21的示意图。如图2以及图3所示，各子元件21包含一外缘211以及一第二延伸部212，第二延伸部212以径向朝内自外缘211向内圈121以及穿孔11延伸。具体而言，各子元件21的第二延伸部212分别对齐第一延伸部1212，因此第二延伸部212与第一延伸部1212将各承载舟13与其他的承载舟13分离且围绕承载舟13。在本实施例中，各子元件21的外缘211的曲率大致上吻合本体10的一外侧1221的曲率。各子元件21的一最大宽度w1小于本体10的径向宽度W。优选的，各子元件21的最大宽度w1不大于本体10的径向宽度W的一半。在本实施例中，各子元件21的第二延伸部212具有最大宽度w1。各子元件21与部分的其中一承载舟13相邻，亦即，单一子元件21并不完全地环绕任一承载舟13。具体而言，各子元件21与两个承载舟13相邻。此外，外圈20的材料包含蓝宝石(sapphire)、氮化硼(boron nitride)、石英(quartz)、碳化硅(silicon carbide)或石墨(graphite)。在一实施例中，外圈20的厚度大于晶片的厚度。例如，外圈20的厚度至少是晶片的厚度的三倍。具体而言，放置于承载舟13上的一晶片其厚度为0.2毫米(mm)至0.6mm之间，外圈20的各子元件21的厚度为1mm至9mm之间。在一实施例中，本发明公开的承载盘是用于成长组成为AlGaInP的外延层，而非用于成长三族氮化物的外延层。由于本发明公开的承载盘包含可自本体10拆卸的外圈20，在敲打外圈20以去除表面的沉积物后，若外圈20严重受损，只需汰换受损的外圈20而不需汰换整个承载盘，因此可大幅降低维护承载盘的成本。进一步的，因为外圈20包含多个具有相同结构的子元件21，若其中一子元件21损坏或是累积太多沉积物，可另以一新的子元件21直接取代欲汰换的子元件21，而不需汰换一整个外圈20，因此可进一步降低承载盘的维护成本。此外，由于可以直接汰换单一子元件21，并不一定需要使用耗时的烘烤方法来去除沉积物，故大幅提升生产力。
图4为本发明一实施例的承载盘的分解图。图5为本发明一实施例的承载盘的侧视图。如图1以及图4所示，在本实施例中，内圈121可自本体10拆卸，所以内圈121可分别与本体10和外圈20分离。内圈121包含一贯穿中心且与本体10的穿孔11对齐的孔洞301。在本实施例中，本体10放置内圈121的部位的厚度大致相等于本体10放置外圈20的部位的厚度。进一步的，内圈121环绕各承载舟13的一部分，因此，内圈121结合外圈20可实质上环绕整个各承载舟13。此外，内圈121的数目小于子元件21的数目。例如，在本实施例中，内圈121的数目为1，子元件21的数目为12。内圈121具有一最大宽度w2，最大宽度w2小于本体10的径向宽度W。优选的，内圈121的最大宽度w2不大于本体10的径向宽度W的一半。在本实施例中，第一延伸部1212具有内圈121的最大宽度w2。具体而言，具有最大宽度w1的第二延伸部212分别对齐具有最大宽度w2的第一延伸部1212。此外，内圈121的厚度为1mm至9mm之间，且内圈121的厚度可相同或相异于子元件21的厚度。如图5所示，本体10包含一面对且支撑外圈(图未示)以及内圈(图未示)的上表面123。各承载舟13包含一顶面131以及一环绕顶面131的边缘132。各晶片是以坐落于顶面131且被边缘132环绕的方式分别放置在承载舟13上。各子元件21的厚度21相等或小于边缘132自上表面123开始量测的高度H。例如，各子元件21的厚度为1mm至9mm之间，边缘132的高度H为1mm至12mm之间。内圈121的材料包含蓝宝石(sapphire)、氮化硼(boron nitride)、石英(quartz)、碳化硅(silicon carbide)或石墨(graphite)。
图6为本发明一实施例的承载盘的示意图。如图6所示，本体10还包含一第一定位结构124，第一定位结构124形成于本体10的上表面123上且对应于子元件21的位置。各子元件21包含一面对本体10的上表面123的第一表面213、一相对于第一表面213第二表面214以及一形成于第一表面213上且与第一定位结构124结合的第二定位结构215。第一定位结构124与第二定位结构215可使子元件21稳固地与本体10连接。在一实施例中，第一定位结构124包含多个凸部125，各凸部125自上表面123凸出，第二定位结构215包含多个凹槽216，各凹槽216内凹成形于第一表面213，各凹槽216分别与其中一凸部125接合。各凹槽216的深度小于第一表面213至第二表面214的距离，故当子元件21与本体10连接时，子元件21会覆盖凸部125。因此，在一化学气相沉积系统中，沉积物不会沉积于凹槽216以及凸部125周围。在一实施例中，如图4所示，多个凸部125也形成于上表面123上对应于内圈121的位置，多个凹槽(图未示)内凹成形于内圈121的一面对上表面123的表面，各凹槽分别与其中一凸部125结合。
在一化学气相沉积系统中，使用一现有技术的承载盘形成对照样品1、2以及3的管芯，并使用本发明公开的承载盘形成样品1至10的管芯。结果如表1所示。
表1.对照样品1、2、3以及样品1至10的结果
Figure BDA0000601689310000061
由表1可得知，样品1至样品10的良率都高于对照样品1至3的良率，且样品1至样品10的亮度不合格以及波长不合格的百分比都分别低于对照样品1至3的亮度不合格以及波长不合格的百分比，因此样品1至样品10的结果明显较对照样品1至3的结果佳。故，本发明公开的承载盘有利于成长具有优选的品质以及较高良率的外延层。
图7为本发明一实施例的承载盘的示意图。如图7所示，在本实施例中，承载盘还包括多个放置且分布于外圈20以及本体10之间的垫片40。各垫片40包含有一通孔41，各通孔41分别与第一定位结构124的其中一凸部125结合。垫片40的材料包含蓝宝石(sapphire)、氮化硼(boron nitride)、石英(quartz)、碳化硅(silicon carbide)或石墨(graphite)。通过在本体10的上表面123以及子元件21之间堆叠多垫片40，可调整自本体10的上表面123至子元件21的第二表面214的高度。此外，如图4所示，垫片也可设置于本体10与内圈121之间以调整本体10与内圈121之间的间距。在一化学气相沉积系统中，使用一现有技术的承载盘以及三个本发明的不同实施例的承载盘成长外延层，并比较最后制成的管芯的波长均匀性。三个本发明的不同实施例的承载盘中，第一个承载盘不包含垫片40，第二个承载盘包含多个凸部125且各凸部125与一垫片40结合，第三个承载盘包含多个凸部125且各凸部125与两个垫片40结合。形成于现有技术的承载盘、第一、第二以及第三个承载盘上的外延层，个别的波长分布的标准差分别为0.248％、0.152％、0.184％以及0.198％。故，由上述数据可得知，由于本发明揭示的承载盘有利于均匀加热，因此使用本发明公开的承载盘制得的管芯具有优选的波长均匀性。
图8为本发明一实施例的承载盘的示意图。图9为本发明一实施例的子元件22的示意图。图10为本发明一实施例的承载盘的局部放大图。如图8以及图9所示，在本实施例中，各子元件22包含一外缘223，两个相对的端部221，以及两个第二延伸部222，其中各第二延伸部222径向地自外缘223向内圈121以及穿孔11延伸且位于两个端部221之间。如图10所示，任意一承载舟13的部分被其中一子元件22环绕。连续的三个承载舟13之中，位于中间的承载舟13是部分的介于两个第二延伸部222之间，其他两个承载舟13是部份的被端部221围绕。单一子元件21并不完全地环绕任一承载舟13。各子元件22的两个第二延伸部222对齐内圈121的其中两个第一延伸部1212，因此子元件22与内圈121将各承载舟13与其他的承载舟13分离。各子元件22的外缘223的曲率大致上吻合本体10的外侧1221的曲率。
图11为本发明一实施例的承载盘的示意图。图12为本发明一实施例的子元件23的示意图。如图11以及图12所示，在本实施例中，各子元件23包含一外缘231以及两个位于两端且径向的自外缘231向内圈121以及穿孔11延伸的第二延伸部232。如图11所示，各子元件23与部分的其中一承载舟13相邻。各子元件23的两个第二延伸部232对齐内圈121的其中两个第一延伸部1212，因此子元件23与内圈121将各承载舟13与其他的承载舟13分离。
以上所述的实施例仅为说明本发明的技术思想及特点，其目的在使熟悉此项技术的人士能够了解本发明的内容并据以实施，当不能以之限定本发明的专利范围，即大凡依本发明所揭示的精神所作的均等变化或修饰，仍应涵盖在本发明的专利范围内。

Claims (10)

1.一承载盘，包含︰
本体；
多个分布在该本体上用于承载晶片的承载舟；
与该本体连接的内圈；以及
可自该本体拆卸且与该内圈分离的外圈；
其中该内圈以及该外圈将该些承载舟彼此分离；该外圈包含多个具有相同结构且彼此分离并可自该本体拆卸的子元件。
2.如权利要求1所述的承载盘，其中各子元件包含一朝向内圈延伸的第二延伸部。
3.如权利要求2所述的承载盘，其中该内圈包含多个朝向外圈延伸的第一延伸部。
4.如权利要求3所述的承载盘，其中各第二延伸部分别对齐其中一第一延伸部。
5.如权利要求3所述的承载盘，其中该多个子元件中其中一子元件具有一最大宽度，且该子元件的第二延伸部具有该最大宽度，其中该内圈具有一最大宽度，该多个第一延伸部中其中一第一延伸部具有该内圈的最大宽度，具有该内圈的最大宽度的该第一延伸部对齐该具有该子元件的该最大宽度的该第二延伸部。
6.如权利要求1所述的承载盘，其中该本体为一具有一径向宽度的环形圈，其中该多个子元件中其中一子元件具有一小于该径向宽度的最大宽度。
7.如权利要求1所述的承载盘，其中各承载舟包含一顶面以及一环绕该顶面且具有一高度的边缘，该本体包含一支撑该外圈以及该内圈的上表面，该多个子元件中其中一子元件包含一厚度，该厚度不大于该边缘的高度。
8.如权利要求1所述的承载盘，其中该外圈与部分的每一承载舟相邻，且该外圈的厚度大于该晶片的厚度。
9.如权利要求1所述的承载盘，其中该外圈以及该内圈实质上环绕各承载舟，且该内圈可自该本体拆卸。
10.如权利要求1所述的承载盘，其中该本体还包含第一定位结构以及上表面，该第一定位结构形成于该上表面上且对应于该多个子元件的位置。
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