CN105206677B - Oxide semiconductor thin film transistor and manufacturing method thereof - Google Patents

Oxide semiconductor thin film transistor and manufacturing method thereof Download PDF

Info

Publication number
CN105206677B
CN105206677B CN201510580206.0A CN201510580206A CN105206677B CN 105206677 B CN105206677 B CN 105206677B CN 201510580206 A CN201510580206 A CN 201510580206A CN 105206677 B CN105206677 B CN 105206677B
Authority
CN
China
Prior art keywords
layer
oxide semiconductor
hydrogen
film transistor
hydrogen diffusion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201510580206.0A
Other languages
Chinese (zh)
Other versions
CN105206677A (en
Inventor
王培筠
胡晋玮
陈佳楷
黄雅琴
许庭毓
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AU Optronics Corp
Original Assignee
AU Optronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by AU Optronics Corp filed Critical AU Optronics Corp
Publication of CN105206677A publication Critical patent/CN105206677A/en
Application granted granted Critical
Publication of CN105206677B publication Critical patent/CN105206677B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/34Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
    • H01L21/44Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/38 - H01L21/428
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4908Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET for thin film semiconductor, e.g. gate of TFT
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51Insulating materials associated therewith
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66969Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78696Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Thin Film Transistor (AREA)

Abstract

An oxide semiconductor thin film transistor comprises a patterned oxide semiconductor layer, a patterned grid dielectric layer, a grid, a hydrogen diffusion control layer, a hydrogen source layer, a source electrode and a drain electrode. The patterned oxide semiconductor layer is arranged on a substrate. The patterned gate dielectric layer is disposed on the patterned oxide semiconductor layer. The gate is disposed on the patterned gate dielectric layer. The hydrogen diffusion control layer is arranged on the grid electrode and the patterned oxide semiconductor layer, and the hydrogen diffusion control layer covers the grid electrode and the patterned grid electrode dielectric layer. The hydrogen source layer is arranged on the hydrogen diffusion control layer and the patterned oxide semiconductor layer, the source electrode and the drain electrode are arranged on the hydrogen source layer, and the hydrogen content of the hydrogen source layer is greater than that of the hydrogen diffusion control layer.

Description

Oxide semiconductor thin-film transistor and preparation method thereof
Technical field
The present invention is espespecially a kind of to utilize hydrogen diffusion control about a kind of oxide semiconductor thin-film transistor and preparation method thereof Preparative layer controls the oxide semiconductor thin-film transistor of situation and preparation method thereof that hydrogen enters oxide semiconductor layer.
Background technology
In recent years, the application development of various displays is rapid, and thin film transistor (TFT) (thin film transistor, TFT) a kind of to be widely used in the semiconductor element of display technology, such as apply in liquid crystal display (liquid crystal Display, LCD), Organic Light Emitting Diode (organic light emitting diode, OLED) display and Electronic Paper In displays such as (electronic paper, E-paper).Thin film transistor (TFT) using providing the switching of voltage or electric current, with So that the display pixel in various displays can show bright, dark and grayscale display effect.
The thin film transistor (TFT) that display industry uses at present can be distinguished according to the semiconductor layer material used, including non- Polycrystal silicon film transistor (amorphous silicon TFT, a-Si TFT), polycrystalline SiTFT (poly silicon ) and oxide semiconductor thin-film transistor (oxide semiconductor TFT) TFT.Wherein oxide semiconductor thin-film Transistor is using the oxide semiconductor material newly to emerge in recent years, and such material is generally amorphous phase (amorphous) knot Structure, therefore less it is applied to the problem that uniformity is bad on large size panel, and form a film using various ways, such as sputter (sputter), the modes such as spin coating (spin-on) and printing (inkjet printing).Due to oxide semiconductor thin-film crystalline substance The electron mobility of body pipe generally more than the high several times of more amorphous silicon thin film transistor and can have above-mentioned processing procedure advantage, therefore at present Gradually there are some to be listed using the commercial prod of oxide semiconductor thin-film transistor in the market.
In the structure of general oxide semiconductor thin-film transistor, the material of oxide semiconductor layer and source/drain Between contact impedance can significantly affect the whole electrical performance of oxide semiconductor thin-film transistor.As shown in Figure 1, in film crystalline substance In the case that the size of body pipe fixes channel width (W), when passage length (L) is smaller and smaller, it is possible to find when L narrows down to 15 microns When following, oxide semiconductor thin-film transistor electrical performance will will produce offset.Therefore, thin in order to promote oxide semiconductor The efficiency of film transistor need to improve the contact impedance of oxide semiconductor layer and source/drain interpolar.It is general at present to do Method has using corona treatment (plasma treatment) or oxide semiconductor layer is made to be in direct contact the high material of hydrogen content Expect and generate hydrogen diffusion, so that the resistivity in the region of the estimated oxide semiconductor layer contacted with source/drain in part reduces. However, above-mentioned corona treatment mode be easy to cause it is unstable by the resistance value situation of treated oxide semiconductor layer, And be in direct contact the high material of hydrogen content and be then difficult to control its range of scatter in a manner of generating hydrogen diffusion, it be easy to cause and wants originally It is vulnerable to as the oxide semiconductor layer of conducting region and extends influence and highly impact the element characteristic of thin film transistor (TFT), it is special It is not under the design of the thin film transistor (TFT) in short channel.
Invention content
One of main object of the present invention is to provide a kind of oxide semiconductor thin-film transistor and preparation method thereof, profit The situation that hydrogen enters oxide semiconductor layer is controlled with hydrogen diffusion-controlled layer, hydrogen is avoided to enter the conduction of oxide semiconductor layer The element characteristic of thin film transistor (TFT) is influenced in area, defined herein conducting region is that oxide semiconductor thin-film transistor is ideal Upper electronics moves the shortest distance.
One embodiment of the invention provides a kind of oxide semiconductor thin-film transistor, including a substrate, a patterning oxygen Compound semiconductor layer, a patterning gate dielectric, a grid, a hydrogen diffusion-controlled layer, a hydrogen source layer, a source electrode and one Drain electrode.Patterned oxide semiconductor layer is set on substrate.Patterning gate dielectric is set to patterned oxide and partly leads On body layer.Grid is set on patterning gate dielectric.Hydrogen diffusion-controlled layer is set to grid and is partly led with patterned oxide On body layer, and hydrogen diffusion-controlled layer cladding grid and patterning gate dielectric.Hydrogen source layer be set to hydrogen diffusion-controlled layer with And on patterned oxide semiconductor layer, and the hydrogen content of hydrogen source layer is more than the hydrogen content of hydrogen diffusion-controlled layer.Source electrode and leakage Pole is set in hydrogen source layer, and source electrode is contacted and is electrically connected with drain electrode with patterned oxide semiconductor layer.
According to an embodiment of the present invention, wherein the hydrogen diffusion-controlled layer is in direct contact the patterned oxide semiconductor Layer, and the hydrogen source layer is in direct contact the hydrogen diffusion-controlled layer.
Another embodiment according to the present invention, wherein the hydrogen source layer are in direct contact the patterned oxide semiconductor Layer.
Another embodiment according to the present invention, wherein the hydrogen diffusion-controlled layer cover the patterning gate dielectric and are somebody's turn to do Grid, a side of the hydrogen diffusion-controlled layer from a top surface of the grid along the grid are prolonged to the patterned oxide semiconductor layer It stretches, and extends and be located at the top surface upright projection in the drop shadow spread of the substrate without departing from the hydrogen diffusion-controlled layer.
Another embodiment according to the present invention, wherein the hydrogen diffusion-controlled layer in a horizontal direction also have one extend Portion, the extension cover the patterned oxide semiconductor layer in the both ends of the horizontal direction.
Another embodiment according to the present invention, the oxide semiconductor thin-film transistor further include that multiple contacts are opened Hole connects through such contact trepanning with the patterned oxide semiconductor layer through the hydrogen source layer wherein source electrode with the drain electrode It touches and is electrically connected.
Another embodiment according to the present invention, wherein such contact trepanning also extends through the hydrogen diffusion-controlled layer.
Another embodiment according to the present invention, wherein the hydrogen diffusion-controlled layer include metal oxide, silicon nitride, oxidation Silicon or silicon oxynitride.
Another embodiment according to the present invention, the wherein thickness of the hydrogen diffusion-controlled layer are between 100 angstroms (angstrom) To 500 angstroms.
Another embodiment according to the present invention, wherein the hydrogen source layer include silicon nitride, silica or silicon oxynitride.
Another embodiment according to the present invention, wherein the patterned oxide semiconductor layer include indium gallium zinc, oxygen Change zinc, indium zinc oxide or indium gallium.
Another embodiment according to the present invention, wherein the hydrogen content of the hydrogen source layer is between 15atoms/cm3Extremely 27atoms/cm3Between.
Another embodiment of the present invention provides a kind of production method of oxide semiconductor thin-film transistor, including following step Suddenly.In forming a patterned oxide semiconductor layer on a substrate;It is patterned in forming one on patterned oxide semiconductor layer Gate dielectric;In patterning a grid is formed on gate dielectric;It is formed on patterned oxide semiconductor layer in grid One hydrogen diffusion-controlled layer, wherein hydrogen diffusion-controlled layer coat grid and patterning gate dielectric;In hydrogen diffusion-controlled layer and A hydrogen source layer is formed on patterned oxide semiconductor layer, the wherein hydrogen content of hydrogen source layer is more than containing for hydrogen diffusion-controlled layer Hydrogen amount;And in formed in hydrogen source layer a source electrode and one drain electrode, wherein source electrode with drain electrode with patterned oxide semiconductor layer Contact and electric connection.
According to an embodiment of the present invention, which covers the patterning gate dielectric and the grid, The a side of the hydrogen diffusion-controlled layer from a top surface of the grid along the grid extends to the patterned oxide semiconductor layer, and Extend and is located at the top surface upright projection in the drop shadow spread of the substrate without departing from the hydrogen diffusion-controlled layer.
Another embodiment according to the present invention, wherein the hydrogen diffusion-controlled layer, the patterning gate dielectric and the grid Pole defines figure using same mask (mask).
Another embodiment according to the present invention, wherein the hydrogen diffusion-controlled layer include metal oxide, silicon nitride, oxidation Silicon or silicon oxynitride.
Another embodiment according to the present invention, wherein the hydrogen content of the hydrogen source layer is between 15atoms/cm3Extremely 27atoms/cm3Between.
The oxide semiconductor thin-film transistor of the present invention is spread using cladding grid with the hydrogen for patterning gate dielectric Control layer controls the situation that the hydrogen in hydrogen source layer diffuses to patterned oxide semiconductor layer, and can avoid in hydrogen source layer Hydrogen diffused to by patterning gate dielectric patterning gate dielectric in conducting region, whereby can be in patterned oxide Ensure the electrical situation of conducting region while forming doped region in object semiconductor layer, and then can realize the oxygen designed with short channel Compound semiconductor thin-film transistor.
Description of the drawings
Fig. 1 depicts the Drain current-Gate Voltage relational graph of the oxide semiconductor thin-film transistor of the prior art.
Fig. 2 to Fig. 6 depicts the production method signal of the oxide semiconductor thin-film transistor of first embodiment of the invention Figure.
Fig. 7 depicts the Drain current-Gate Voltage of the oxide semiconductor thin-film transistor of first embodiment of the invention Relational graph.
Fig. 8 depicts the schematic diagram of the oxide semiconductor thin-film transistor of a reference examples.
Fig. 9 depicts the Drain current-Gate Voltage relational graph of the oxide semiconductor thin-film transistor of reference examples.
Figure 10 depicts the schematic diagram of the oxide semiconductor thin-film transistor of second embodiment of the invention.
Figure 11 depicts the schematic diagram of the oxide semiconductor thin-film transistor of third embodiment of the invention.
The production method that Figure 12 and Figure 13 depicts the oxide semiconductor thin-film transistor of fourth embodiment of the invention is shown It is intended to.
Figure 14 depicts the Drain current-Gate Voltage of the oxide semiconductor thin-film transistor of fourth embodiment of the invention Relational graph.
【Symbol description】
10 substrates
20 patterned oxide semiconductor layers
20A conducting regions
20B doped regions
30 patterning gate dielectrics
30F intersections
The sides 30S
40 grids
50 hydrogen diffusion-controlled layers
50A extensions
60 hydrogen source layers
70D drains
70S source electrodes
101-104 oxide semiconductor thin-film transistors
200 oxide semiconductor thin-film transistors
H horizontal directions
The top surfaces S
V contacts trepanning
The first width of W1
The second width of W2
W3 third width
Z vertical direction
Specific implementation mode
It is hereafter special to arrange to enable the those skilled in the art for being familiar with the technical field of the invention to be further understood that the present invention Presently preferred embodiments of the present invention is lifted, and coordinates appended attached drawing, the constitution content that the present invention will be described in detail and the effect to be reached.
It please refers to Fig.2 to Fig. 6.Fig. 2 to Fig. 6 depicts the oxide semiconductor thin-film transistor of first embodiment of the invention Production method schematic diagram.The production method of the oxide semiconductor thin-film transistor of the present embodiment includes the following steps.First, As shown in Fig. 2, in forming patterned oxide semiconductor layer 20 on substrate 10.Substrate 10 may include hard substrate such as glass base Plate is formed by with ceramic substrate, flexible substrate (flexible substrate) such as plastic substrate or other suitable materials Substrate.The material of patterned oxide semiconductor layer 20 may include indium gallium zinc, zinc oxide, indium zinc oxide, indium gallium or Other suitable oxide semiconductor materials, and patterned oxide semiconductor layer 20 can be for example, by processing procedures such as lithographic, etchings Reach patterning effect or directly formed in a manner of transfer (roll to roll), but is not limited thereto.Then, in patterning Patterning gate dielectric 30 and grid 40 are formed on oxide semiconductor layer 20.Patterning gate dielectric 30 can with grid 40 It to be formed by the same photoresist pattern (not shown) to define, so as to making the figure and grid 40 of patterning gate dielectric 30 Figure is not limited thereto in can reach the effect of autoregistration (self-aligned) on vertical direction Z.Grid is patterned to be situated between Electric layer 30 can be the dielectric materials layer of single-layer or multi-layer, and its material may include inorganic material such as silicon nitride (silicon Nitride), silica (silicon oxide), silicon oxynitride (silicon oxynitride), with metal oxide (such as Aluminium oxide), organic material such as acrylic resin (acrylic resin) or other suitable dielectric material.In addition, grid 40 may include metal material such as aluminium, copper, silver, chromium, titanium, at least one of which of molybdenum, the composite layer of above-mentioned material or above-mentioned material The alloy of material, but it is not limited thereto and can be used the material of other conductive matter.
Then, as shown in figure 3, in forming hydrogen diffusion-controlled layer 50 on patterning gate dielectric 30.And such as Fig. 4 institutes Show, patterning hydrogen diffusion-controlled layer 50, in this step, hydrogen diffusion-controlled layer 50, patterning gate dielectric 30 and grid 40 Figure is defined using same mask (mask), determines that 50 overlay pattern grid of hydrogen diffusion-controlled layer is situated between using light exposure The size of electric layer 30.Specifically, hydrogen diffusion-controlled layer 50 is ㄇ fonts, and patterning gate dielectric 30 and grid is completely covered The intersection 30F of 40 side 30S and side 30S and patterned oxide semiconductor layer 20, hydrogen diffusion-controlled layer 50 is from grid The top surface S of pole 40 extends in vertical direction Z upper edges side 30S to patterned oxide semiconductor layer 20, and extends without departing from hydrogen Diffusion-controlled layer 50 is located at top surface S upright projections in the drop shadow spread of substrate 10.Horizontal direction H is preferably with vertical direction Z just It hands over, and vertical direction Z is preferably generally orthogonal with the surface of substrate 10, but be not limited thereto.In the present embodiment, hydrogen expands Control layer 50 is dissipated other than cladding grid 40 is with patterning gate dielectric 30, only covers patterning gate dielectric 30 The intersection 30F of side 30S and patterned oxide semiconductor layer 20, therefore 50 non-overlay pattern oxide of hydrogen diffusion-controlled layer Semiconductor layer 20 is in the both ends on horizontal direction H, but the present invention is not limited thereto.Also may be used in other embodiments of the invention Optionally make comprehensive overlay pattern oxide semiconductor layer 20 or at least overlay pattern oxide semiconductor layer 20 in level Both ends on the H of direction.Hydrogen diffusion-controlled layer 50 may include the hydrogen content insulating materials low compared with hydrogen source layer 60, including silicon nitride, Silica, silicon oxynitride or metal oxide etc., metal oxide for example can be aluminium oxide (aluminium oxide), Calcium oxide (calcium oxide), molybdenum oxide (molybdenum oxide), zinc oxide (zinc oxide), indium oxide (indium oxide), gallium oxide (gallium oxide), indium gallium (indium gallium oxide), indium gallium Zinc (indium gallium zinc oxide), indium zinc oxide (indium zinc oxide), tin indium oxide (indium tin Oxide), titanium oxide (titanium oxide), tin oxide (tin oxide), third family metal oxide, the 4th race's metal oxygen Compound or the 5th family metal oxide and other suitable metal oxide materials.Hydrogen content herein, after being fabrication process The hydrogen content of hydrogen diffusion-controlled layer 50, and the hydrogen diffusion-controlled layer 50 of the present embodiment is preferably the comparatively dense aluminium oxide of structure, Achieve the effect that preferably to prevent hydrogen from spreading whereby, but is not limited thereto.Hydrogen diffusion-controlled layer 50 can utilize chemical vapor deposition Or physical vapour deposition (PVD) mode is formed, and can by processing procedure when processing environment and parameter adjustment reduce hydrogen content.In addition, The thickness of hydrogen diffusion-controlled layer 50 between 100 angstroms (angstrom) between 1000 angstroms, preferably between 100 angstroms to 500 angstroms it Between, but this is not limited.It is worth noting that the hydrogen diffusion-controlled layer 50 of the present embodiment is situated between with grid 40 and patterning grid Electric layer 30 is correspondingly arranged, therefore the same mask that can be used in used in the processing procedure of grid 40 comes to the formation of hydrogen diffusion-controlled layer 50 Pattern effect, you can controlled to be formed to spread hydrogen using the adjustment of same mask and light exposure of arranging in pairs or groups (exposure dose) Preparative layer 50 carries out patterning required correspondence photoresist pattern, reaches the effect for reducing mask requirements amount and reducing production cost whereby Fruit, but be not limited thereto.
Later, as shown in figure 5, in shape on substrate 10, patterned oxide semiconductor layer 20 and hydrogen diffusion-controlled layer 50 At a hydrogen source layer 60.The hydrogen content of hydrogen source layer 60 is more than the hydrogen content of hydrogen diffusion-controlled layer 50.The material of hydrogen source layer 60 It may include that silicon nitride, silica, silicon oxynitride or other suitable insulating materials with high hydrogen content, hydrogen source layer 60 can wrap The hydrogen content silica high compared with hydrogen diffusion-controlled layer 50 after the higher silicon nitride of hydrogen content or processing procedure react after being reacted containing processing procedure.Hydrogen Source layer 60 is also formed using chemical vapor deposition or physical vapour deposition (PVD) mode, and processing environment when can pass through processing procedure with And parameter adjustment promotes hydrogen content.For example, when using hydrogen source layer 60 of the chemical vapor deposition to form silicon nitride, Its process temperatures can be 280 DEG C, and the reaction gas being passed through may include silicomethane (SiH4) and ammonia (NH3), and methane (SiH4) With ammonia (NH3) intake may respectively be 200sccm and 1200sccm, whereby formed hydrogen content it is high compared with hydrogen diffusion-controlled layer 50 Silicon nitride, but be not limited thereto.The hydrogen content of the hydrogen source layer 60 of the present embodiment is preferably between 15atoms/cm3Extremely 27atoms/cm3Between, can spread to enough hydrogen doped region is formed in patterned oxide semiconductor layer 20 20B, but be not limited thereto.Due to the present embodiment 50 non-overlay pattern oxide semiconductor layer 20 of hydrogen diffusion-controlled layer in Both ends on horizontal direction H, therefore patterned oxide semiconductor layer 20 is exposed to hydrogen diffusion control in the both ends on horizontal direction H It is directly contacted with hydrogen source layer 60 except layer 50, hydrogen component diffusion in hydrogen source layer 60 can be reinforced whereby to corresponding pattern Change the effect of oxide semiconductor layer 20, and then reduces the resistivity of doped region 20B.In the present embodiment, patterned oxide Semiconductor layer 20 and hydrogen source layer 60 are in direct contact place and form two doped region 20B, and with hydrogen diffusion-controlled layer 50, grid 40 And 30 corresponding region of patterning gate dielectric still maintains the conducting region 20A with characteristic of semiconductor.In other words, this reality The patterned oxide semiconductor layer 20 for applying example may include conducting region 20A and two doped regions after hydrogen source layer 60 is formed 20B, grid 40 is in Chong Die with conducting region 20A on vertical direction Z, and two doped region 20B on horizontal direction H in being located at conducting region The both sides of 20A, and the resistivity of doped region 20B is less than the resistivity of conducting region 20A.
It is worth noting that due to the cladding patterning gate dielectric 30 of hydrogen diffusion-controlled layer 50 of the present embodiment, therefore can Avoid hydrogen in hydrogen source layer 60 by influencing the electrical situation of conducting region 20A laterally through patterning gate dielectric 30. The hydrogen for being covered in the side 30S and the intersection 30F of patterned oxide semiconductor layer 20 of patterning gate dielectric 30 is spread Control layer 50 also can be used to control the range of doped region 20B, avoid keeping the range of doped region 20B excessive and making entirely to pattern oxygen The state to electrically conduct is presented in compound semiconductor layer 20.In the present embodiment, it is set on grid 40 and coats grid 40 and figure The hydrogen diffusion-controlled layer 50 of case gate dielectric 30 is in having the first width W1 on horizontal direction H, grid 40 is in horizontal direction H Upper have the second width W2, and conducting region 20A is in having a third width W3 on horizontal direction H, and the first of hydrogen diffusion-controlled layer 50 Width W1 is greater than or equal to the third width W3 of conducting region 20A.Diffusion-condition by adjusting the hydrogen of hydrogen source layer 60 can be to passing The width for leading area 20A is controlled, such as when the diffusion-condition of the hydrogen of hydrogen source layer 60 is stronger, the third of conducting region 20A is wide Degree W3 is also likely less than the second width W2 of grid 40.In addition, the production method of the present embodiment optionally selectively can be wrapped also Include heat treatment processing procedure, to assist hydrogen source layer 60 hydrogen diffusion effect, but be not limited thereto.
Then, as shown in fig. 6, forming multiple contact trepanning V in hydrogen source layer 60, contact trepanning V runs through hydrogen source layer 60 and expose the doped region 20B of part.Later, in forming the drain electrode 70D of a source electrode 70S and one in hydrogen source layer 60, whereby Complete oxide semiconductor thin-film transistor 101 as shown in Figure 5.Source electrode 70S and drain electrode 70D is mixed through contact trepanning V with two Miscellaneous area 20B contacts and electric connection, source electrode 70S can respectively include metal material such as aluminium, copper, silver, chromium, titanium, molybdenum with drain electrode 70D At least one of which, the composite layer of above-mentioned material or the alloy of above-mentioned material, but be not limited thereto and other tools can be used The material of conductive matter.
As shown in fig. 6, the oxide semiconductor thin-film transistor 101 of the present embodiment includes patterned oxide semiconductor layer 20, gate dielectric 30, grid 40, hydrogen diffusion-controlled layer 50, hydrogen source layer 60, source electrode 70S and drain electrode 70D are patterned.Figure Case oxide semiconductor layer 20 is set on substrate 10.Patterning gate dielectric 30 is set to patterned oxide semiconductor On layer 20.Grid 40 is set on patterning gate dielectric 30.Hydrogen diffusion-controlled layer 50 is set to grid 40 and patterning oxygen On compound semiconductor layer 20, and hydrogen diffusion-controlled layer 50 coats grid 40 and patterning gate dielectric 30.Hydrogen source layer 60 is set It is placed on hydrogen diffusion-controlled layer 50 and patterned oxide semiconductor layer 20, and the hydrogen content of hydrogen source layer 60 is spread more than hydrogen The hydrogen content of control layer 50.Source electrode 70S is set to drain electrode 70D in hydrogen source layer 60, and source electrode 70S is penetrated with drain electrode 70D and contacted Trepanning V is contacted and is electrically connected with two doped region 20B.The material property of each element in oxide semiconductor thin-film transistor 101 Illustrate in above-mentioned production method, therefore herein and repeats no more.It is worth noting that, the hydrogen diffusion-controlled layer 50 of the present embodiment It is preferably in direct contact patterned oxide semiconductor layer 20, hydrogen source layer 60 is preferably in direct contact hydrogen diffusion-controlled layer 50, And hydrogen source layer 60 is in direct contact doped region 20B, but be not limited thereto.Hydrogen diffusion-controlled layer 50 through this embodiment is controllable Hydrogen in hydrogen manufacturing source layer 60 diffuses to the situation of patterned oxide semiconductor layer 20, and can avoid in hydrogen source layer 60 simultaneously Hydrogen diffuse to the conducting region 20A in patterned oxide semiconductor layer 20 by patterning gate dielectric 30.It sets herein Under meter, even if grid 40 and patterning gate dielectric 30 need to reduce because short channel is designed, it can still be spread and be controlled by hydrogen Layer 50 come control the range size of doped region 20B and avoid conducting region 20A electrically be affected, whereby promoted oxide partly lead The element characteristic of body thin film transistor 101.
For example, Fig. 6 is please referred to Fig. 9.Fig. 7 depicts the oxide semiconductor thin-film transistor of first embodiment 101 channel width (W) and passage length (L) is the relationship of the Drain current-Gate Voltage under 5 microns of design situation Figure.Fig. 8 depicts the schematic diagram of the oxide semiconductor thin-film transistor 200 of a reference examples.Fig. 9 depicts the oxidation of reference examples Object semiconductor thin-film transistor 200 is in the Drain current-Gate that channel width and passage length are under 5 microns of design situation Voltage relationship figure.The oxide semiconductor thin-film transistor 200 of this reference examples is not in addition to including that the hydrogen of first embodiment spreads control Preparative layer 50, remaining part are similar to oxide semiconductor thin-film transistor 101.As shown in Figures 6 and 7, first embodiment Oxide semiconductor thin-film transistor 101 can be in channel width and passage length under the situation for being provided with hydrogen diffusion-controlled layer 50 Still there are good tft characteristics, and its carrier transport factor (mobility) can be of about under the relatively high situation of ratio 22cm2/VS.Comparatively, as shown in Fig. 8 and Fig. 9, since hydrogen diffusion-controlled layer not being arranged, thus it is long with channel in channel width The oxide semiconductor thin-film transistor of this reference examples can be biased to conducting without film under the relatively high situation of degree ratio Transistor characteristic.
It illustrates below for different embodiments of the invention, and to simplify explanation, illustrates below mainly for each Embodiment difference is described in detail, and is no longer repeated to something in common.In addition, identical in various embodiments of the present invention Element indicated with identical label, in favor of checking one against another between each embodiment.
Please refer to Fig.1 0.Figure 10 depicts showing for the oxide semiconductor thin-film transistor 102 of second embodiment of the invention It is intended to.The places different from above-mentioned first embodiment are that the third width W3 of the conducting region 20A of the present embodiment is spread less than hydrogen First width W1 of control layer 50, and the third width W3 of conducting region 20A is generally identical as the second width W2 of grid 40, but It is not limited thereto.
Please refer to Fig.1 1.Figure 11 depicts showing for the oxide semiconductor thin-film transistor 103 of third embodiment of the invention It is intended to.The places different from above-mentioned first embodiment are that the present embodiment can be imitated by reinforcing the diffusion of hydrogen in hydrogen source layer 60 Should come make conducting region 20A third width W3 be less than grid 40 the second width W2, reach whereby further shorten oxidation The purpose of the channel width of object semiconductor thin-film transistor 103.The above-mentioned mode for reinforcing hydrogen diffusion effect in hydrogen source layer 60 It may include improving that the concentration (such as being additionally passed through hydrogen when depositing hydrogen source layer 60) of hydrogen in strong hydrogen source layer 60, to apply one auxiliary Help processing such as heat treatment or other modes for being suitble to can be used to reinforce hydrogen diffusion effect.
Please refer to Fig.1 2 and Figure 13.The oxide semiconductor thin-film that Figure 12 and Figure 13 depicts fourth embodiment of the invention is brilliant The production method schematic diagram of body pipe.The places different from above-mentioned first embodiment are that as shown in figure 12, the hydrogen of the present embodiment expands Patterned oxide semiconductor layer 20 can be completely covered, pattern gate dielectric 30 and grid 40 by dissipating control layer 50, therefore hydrogen 50 overlay pattern oxide semiconductor layer 20 of diffusion-controlled layer is in the both ends on horizontal direction H, and hydrogen source layer 60 is not then straight The doped region 20B for connecing contact patterns oxide semiconductor layer 20 and being subsequently formed.Mode can avoid working as hydrogen source layer whereby Hydrogen diffusion effect in 60 is too strong and makes the range for the doped region 20B being correspondingly formed excessive, and therefore influences conducting region 20A Electrical situation.As shown in figure 13, when forming the oxide semiconductor thin-film transistor 104 of the present embodiment, due to doped region 20B is covered by hydrogen diffusion-controlled layer 50 and hydrogen source layer 60, therefore hydrogen source layer 60 and hydrogen diffusion control need to be run through by contacting trepanning V Preparative layer 50 makes source electrode 70S can be by contacting trepanning V and doped region with drain electrode 70D partly to expose two doped region 20B 20B is contacted and is electrically connected.In addition, the hydrogen diffusion-controlled layer 50 of the present embodiment also has an extension 50A, extension 50A overlay patterns oxide semiconductor layer 20 is in the both ends of horizontal direction H.
4 are please referred to Fig.1, and please also refer to Figure 13.Figure 14 depicts the oxide semiconductor thin-film crystal of the present embodiment Pipe 104 is in the relational graph that channel width and passage length are the Drain current-Gate Voltage under 5 microns of design situation.Such as Shown in Figure 14 and Figure 13, the oxide semiconductor thin-film transistor 104 of the present embodiment is in the shape for being provided with hydrogen diffusion-controlled layer 50 Can still have good tft characteristics, and its under condition under channel width and the relatively high situation of passage length ratio Carrier transport factor (mobility) can be of about 13cm2/VS.Although the oxide semiconductor thin-film transistor 104 of the present embodiment The more above-mentioned first embodiment of carrier transport factor is low, but due to 50 overlay pattern oxide of the hydrogen diffusion-controlled layer of the present embodiment half Conductor layer 20 and so that hydrogen source layer 60 is not in direct contact patterned oxide semiconductor layer 20, therefore it is dense for the hydrogen of hydrogen source layer 60 It can progress that is comparatively loose and being conducive to processing procedure on degree control precision.Comparatively, as shown in Fig. 8 and Fig. 9, due to not Hydrogen diffusion-controlled layer is set, therefore in the oxide half of channel width and this reference examples under the relatively high situation of passage length ratio Conductor thin film transistor can be biased to conducting without tft characteristics.
In conclusion the oxide semiconductor thin-film transistor of the present invention controls hydrogen source layer using hydrogen diffusion-controlled layer In hydrogen diffuse to the situation of patterned oxide semiconductor layer, and avoid hydrogen in hydrogen source layer to pass through simultaneously and pattern grid Dielectric layer and the conducting region that diffuses in patterning gate dielectric and influence the electrical situation of conducting region.Therefore, even if oxygen Grid and patterning gate dielectric in compound semiconductor thin-film transistor need to reduce to meet short channel design, still The formation range of doped region can be controlled by hydrogen diffusion-controlled layer and avoid electrically being affected for conducting region, therefore can reach and carry Rise the purpose of the element characteristic of oxide semiconductor thin-film transistor.In addition, the oxide semiconductor thin-film transistor of the present invention Production method can utilize same mask definition hydrogen diffusion-controlled layer, pattern gate dielectric and grid figure, whereby Achieve the purpose that reduce cost of manufacture.
The foregoing is merely presently preferred embodiments of the present invention, all equivalent changes done according to scope of the present invention patent with Modification should all belong to the covering scope of the present invention.

Claims (14)

1. a kind of oxide semiconductor thin-film transistor, including:
One substrate;
One patterned oxide semiconductor layer, is set on the substrate;
One patterning gate dielectric, is set on the patterned oxide semiconductor layer;
One grid is set on the patterning gate dielectric;
One hydrogen diffusion-controlled layer is set on the grid and the patterned oxide semiconductor layer, wherein the hydrogen diffusion-controlled layer The grid and the patterning gate dielectric are coated, and the hydrogen diffusion-controlled layer is in direct contact the patterned oxide semiconductor Layer;
One hydrogen source layer is set on the hydrogen diffusion-controlled layer and the patterned oxide semiconductor layer, wherein the hydrogen source The hydrogen content of layer is more than the hydrogen content of the hydrogen diffusion-controlled layer, which is in direct contact the patterned oxide semiconductor Layer;And
One source electrode and a drain electrode, are set in the hydrogen source layer, wherein the source electrode is partly led with the drain electrode and the patterned oxide Body layer is contacted and is electrically connected.
2. oxide semiconductor thin-film transistor as described in claim 1, wherein the hydrogen source layer are in direct contact hydrogen diffusion Control layer.
3. oxide semiconductor thin-film transistor as described in claim 1, wherein the hydrogen diffusion-controlled layer cover the patterning Gate dielectric and the grid, the hydrogen diffusion-controlled layer from a top surface of the grid along the grid a side to the patterning oxygen Compound semiconductor layer extends, and extends and be located at the top surface upright projection in the projection model of the substrate without departing from the hydrogen diffusion-controlled layer It encloses.
4. oxide semiconductor thin-film transistor as claimed in claim 3, wherein the hydrogen diffusion-controlled layer is in a horizontal direction On also there is an extension, which covers the patterned oxide semiconductor layer in the both ends of the horizontal direction.
5. oxide semiconductor thin-film transistor as described in claim 1 further includes multiple contact trepannings, run through the hydrogen source Layer, the wherein source electrode are contacted and are electrically connected with the patterned oxide semiconductor layer through the contact trepanning with the drain electrode.
6. oxide semiconductor thin-film transistor as claimed in claim 5, wherein the contact trepanning also extends through hydrogen diffusion Control layer.
7. oxide semiconductor thin-film transistor as described in claim 1, wherein the hydrogen diffusion-controlled layer include metal oxidation Object, silicon nitride, silica or silicon oxynitride.
8. oxide semiconductor thin-film transistor as described in claim 1, wherein the thickness of the hydrogen diffusion-controlled layer is between 100 Angstrom to 500 angstroms.
9. oxide semiconductor thin-film transistor as described in claim 1, wherein the hydrogen source layer include silicon nitride, silica Or silicon oxynitride.
10. oxide semiconductor thin-film transistor as described in claim 1, wherein the patterned oxide semiconductor layer include Indium gallium zinc, zinc oxide, indium zinc oxide or indium gallium.
11. a kind of production method of oxide semiconductor thin-film transistor, including:
In forming a patterned oxide semiconductor layer on a substrate;
Gate dielectric is patterned in forming one on the patterned oxide semiconductor layer;
In forming a grid on the patterning gate dielectric;
In forming a hydrogen diffusion-controlled layer on the grid and the patterned oxide semiconductor layer, the wherein hydrogen diffusion-controlled layer packet The grid and the patterning gate dielectric are covered, and the hydrogen diffusion-controlled layer is in direct contact the patterned oxide semiconductor layer;
In forming a hydrogen source layer on the hydrogen diffusion-controlled layer and the patterned oxide semiconductor layer, the wherein hydrogen source layer Hydrogen content be more than the hydrogen diffusion-controlled layer hydrogen content;And
It drains in forming a source electrode and one in the hydrogen source layer, wherein the source electrode and the drain electrode and the patterned oxide semiconductor Layer is contacted and is electrically connected, which is in direct contact the patterned oxide semiconductor layer.
12. the production method of oxide semiconductor thin-film transistor as claimed in claim 11, hydrogen diffusion-controlled layer covering The patterning gate dielectric and the grid, the hydrogen diffusion-controlled layer from a top surface of the grid along the grid a side to this Patterned oxide semiconductor layer extends, and extends and be located at the top surface upright projection in the substrate without departing from the hydrogen diffusion-controlled layer Drop shadow spread.
13. the production method of oxide semiconductor thin-film transistor as claimed in claim 12, wherein the hydrogen diffusion-controlled layer, The patterning gate dielectric goes out figure with the grid using same mask definition.
14. the production method of oxide semiconductor thin-film transistor as claimed in claim 11, wherein the hydrogen diffusion-controlled layer Including metal oxide, silicon nitride, silica or silicon oxynitride.
CN201510580206.0A 2015-07-03 2015-09-14 Oxide semiconductor thin film transistor and manufacturing method thereof Active CN105206677B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
TW104121643A TWI613706B (en) 2015-07-03 2015-07-03 Oxide semiconductor thin film transistor and manufacturing method thereof
TW104121643 2015-07-03

Publications (2)

Publication Number Publication Date
CN105206677A CN105206677A (en) 2015-12-30
CN105206677B true CN105206677B (en) 2018-10-12

Family

ID=54954235

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201510580206.0A Active CN105206677B (en) 2015-07-03 2015-09-14 Oxide semiconductor thin film transistor and manufacturing method thereof

Country Status (2)

Country Link
CN (1) CN105206677B (en)
TW (1) TWI613706B (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104183650A (en) * 2014-09-10 2014-12-03 六安市华海电子器材科技有限公司 Oxide semiconductor thin film transistor
CN105655353A (en) * 2016-01-21 2016-06-08 武汉华星光电技术有限公司 TFT array substrate structure and manufacturing method thereof
CN105977306A (en) * 2016-06-21 2016-09-28 北京大学深圳研究生院 Self-aligned thin-film transistor and preparation method thereof
TW201808628A (en) 2016-08-09 2018-03-16 Semiconductor Energy Lab Manufacturing method of semiconductor device
US11362034B2 (en) * 2018-04-04 2022-06-14 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device having a laminate contact plug of specified configuration including a conductive metal oxide layer
US11923459B2 (en) * 2020-06-23 2024-03-05 Taiwan Semiconductor Manufacturing Company Limited Transistor including hydrogen diffusion barrier film and methods of forming same

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08242000A (en) * 1995-03-03 1996-09-17 Sharp Corp Semiconductor device and fabrication thereof
CN101884109A (en) * 2007-12-04 2010-11-10 佳能株式会社 Oxide semiconductor device including insulating layer and display apparatus using the same
CN104465783A (en) * 2013-09-23 2015-03-25 三星显示有限公司 Thin film transistor and method of manufacturing same

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012015436A (en) * 2010-07-05 2012-01-19 Sony Corp Thin film transistor and display device
TW201322341A (en) * 2011-11-21 2013-06-01 Ind Tech Res Inst Semiconductor device and manufacturing method thereof
KR102099445B1 (en) * 2012-06-29 2020-04-09 가부시키가이샤 한도오따이 에네루기 켄큐쇼 Semiconductor device and method for manufacturing semiconductor device
KR20160034262A (en) * 2013-07-24 2016-03-29 아이엠이씨 브이제트더블유 Method for improving the electrical conductivity of metal oxide semiconductor layers
TWI528564B (en) * 2013-09-23 2016-04-01 友達光電股份有限公司 Thin film transistor and fabricating method thereof
TWI527201B (en) * 2013-11-06 2016-03-21 友達光電股份有限公司 Pixel structure and fabricating method thereof

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08242000A (en) * 1995-03-03 1996-09-17 Sharp Corp Semiconductor device and fabrication thereof
CN101884109A (en) * 2007-12-04 2010-11-10 佳能株式会社 Oxide semiconductor device including insulating layer and display apparatus using the same
CN104465783A (en) * 2013-09-23 2015-03-25 三星显示有限公司 Thin film transistor and method of manufacturing same

Also Published As

Publication number Publication date
CN105206677A (en) 2015-12-30
TWI613706B (en) 2018-02-01
TW201703120A (en) 2017-01-16

Similar Documents

Publication Publication Date Title
CN105206677B (en) Oxide semiconductor thin film transistor and manufacturing method thereof
TWI396885B (en) Wire structure, method for fabricating wire, thin film transistor substrate, and method for fabricating the thin film transistor substrate
US10707236B2 (en) Array substrate, manufacturing method therefor and display device
US9246007B2 (en) Oxide thin film transistor and method for manufacturing the same, array substrate, and display apparatus
CN107507841A (en) Array base palte and preparation method thereof, display device
CN106531692A (en) Array substrate and preparation method therefor, and display apparatus
CN102651339B (en) TFT (Thin Film Transistor) array substrate and manufacturing method and display device of TFT array substrate
CN106128963A (en) Thin film transistor (TFT) and preparation method, array base palte and preparation method, display floater
US9842915B2 (en) Array substrate for liquid crystal display device and method of manufacturing the same
CN109326609A (en) A kind of array substrate and preparation method thereof
US9059293B2 (en) Array substrate and its manufacturing method
US10347660B2 (en) Array substrate and manufacturing method thereof
CN103794555A (en) Method of fabricating array substrate
CN109166802A (en) LTPS array substrate and its manufacturing method, display panel
CN106653767A (en) Array substrate and fabrication method therefor
WO2018196289A1 (en) Thin-film transistor and preparation method therefor
CN107507850A (en) A kind of array base palte and preparation method thereof, display device
US7687805B2 (en) Metal wiring, method of forming the metal wiring, display substrate having the metal wiring and method of manufacturing the display substrate
KR20080073870A (en) Thin film transistor array panel and method for manufacturing the same
CN107275343A (en) The preparation method of bottom gate type TFT substrate
CN107910301A (en) Production method, display base plate and the display device of display base plate
US20070215876A1 (en) Thin film transistor panel and manufacturing method thereof
CN103928397B (en) A kind of tft array substrate and preparation method thereof and display device
CN207503977U (en) array substrate, display panel and display device
US20150069401A1 (en) Thin film transistor substrate and method of manufacturing the thin film transistor substrate

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant