CN105190757B - 用于动态地确定存储器设备的定时参数的系统和方法 - Google Patents

用于动态地确定存储器设备的定时参数的系统和方法 Download PDF

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Publication number
CN105190757B
CN105190757B CN201480014106.5A CN201480014106A CN105190757B CN 105190757 B CN105190757 B CN 105190757B CN 201480014106 A CN201480014106 A CN 201480014106A CN 105190757 B CN105190757 B CN 105190757B
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memory
value
timing
access request
memory access
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CN105190757A (zh
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X·董
J·徐
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Qualcomm Inc
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Qualcomm Inc
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/061—Improving I/O performance
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/061—Improving I/O performance
    • G06F3/0611—Improving I/O performance in relation to response time
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0629—Configuration or reconfiguration of storage systems
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/32—Circuit design at the digital level
    • G06F30/33—Design verification, e.g. functional simulation or model checking
    • G06F30/3308—Design verification, e.g. functional simulation or model checking using simulation
    • G06F30/3312—Timing analysis
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4076—Timing circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • G11C29/023—Detection or location of defective auxiliary circuits, e.g. defective refresh counters in clock generator or timing circuitry
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • G11C29/50012—Marginal testing, e.g. race, voltage or current testing of timing
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C2029/0409—Online test
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/22—Control and timing of internal memory operations
    • G11C2207/2254—Calibration

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Geometry (AREA)
  • Evolutionary Computation (AREA)
  • Memory System (AREA)
  • Dram (AREA)
  • Executing Machine-Instructions (AREA)
CN201480014106.5A 2013-03-15 2014-03-12 用于动态地确定存储器设备的定时参数的系统和方法 Active CN105190757B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/842,410 2013-03-15
US13/842,410 US9224442B2 (en) 2013-03-15 2013-03-15 System and method to dynamically determine a timing parameter of a memory device
PCT/US2014/024311 WO2014150815A2 (en) 2013-03-15 2014-03-12 System and method to dynamically determine a timing parameter of a memory device

Publications (2)

Publication Number Publication Date
CN105190757A CN105190757A (zh) 2015-12-23
CN105190757B true CN105190757B (zh) 2017-08-22

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US (1) US9224442B2 (enExample)
EP (1) EP2973576B1 (enExample)
JP (1) JP6059399B2 (enExample)
KR (1) KR101650042B1 (enExample)
CN (1) CN105190757B (enExample)
WO (1) WO2014150815A2 (enExample)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9530468B2 (en) * 2014-09-26 2016-12-27 Intel Corporation Method, apparatus and system to manage implicit pre-charge command signaling
CN108139994B (zh) * 2016-05-28 2020-03-20 华为技术有限公司 内存访问方法及内存控制器
KR20170141298A (ko) * 2016-06-14 2017-12-26 에스케이하이닉스 주식회사 데이터 저장 장치 및 그것의 동작 방법
US10877547B2 (en) 2016-11-18 2020-12-29 Ati Technologies Ulc Application profiling for power-performance management
US11210019B2 (en) * 2017-08-23 2021-12-28 Micron Technology, Inc. Memory with virtual page size
US10394456B2 (en) 2017-08-23 2019-08-27 Micron Technology, Inc. On demand memory page size
JP6891087B2 (ja) 2017-09-29 2021-06-18 株式会社小松製作所 作業車両、表示装置、および障害判定方法
US11079945B2 (en) * 2018-09-20 2021-08-03 Ati Technologies Ulc Dynamic configuration of memory timing parameters
CN111026258B (zh) * 2019-12-10 2020-12-15 深圳云天励飞技术有限公司 处理器及降低电源纹波的方法
US11183248B1 (en) * 2020-07-29 2021-11-23 Micron Technology, Inc. Timing parameter adjustment mechanisms
JP7614865B2 (ja) * 2021-02-02 2025-01-16 キヤノン株式会社 メモリコントローラ及びその制御方法
US20250278189A1 (en) * 2024-02-29 2025-09-04 Arm Limited Method and circuit for reducing processing latency

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2217066B (en) * 1988-04-05 1992-01-08 Int Computers Ltd Data processing apparatus with page mode memory
US5159676A (en) * 1988-12-05 1992-10-27 Micron Technology, Inc. Semi-smart DRAM controller IC to provide a pseudo-cache mode of operation using standard page mode draws
CN1149184A (zh) * 1994-05-19 1997-05-07 株式会社日立制作所 存储器读取装置
CN1648877A (zh) * 2004-01-27 2005-08-03 精工爱普生株式会社 信息处理装置及存储器访问方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5848025A (en) * 1997-06-30 1998-12-08 Motorola, Inc. Method and apparatus for controlling a memory device in a page mode
KR100304705B1 (ko) 1999-03-03 2001-10-29 윤종용 포스티드 카스 레이턴시 기능을 가지는 동기식 반도체 메모리 장치 및 카스 레이턴시 제어 방법
KR100374637B1 (ko) 2000-10-24 2003-03-04 삼성전자주식회사 Ｊｅｄｅｃ 규격의 포스티드 카스 기능을 가지는 동기식반도체 메모리 장치
US6963516B2 (en) 2002-11-27 2005-11-08 International Business Machines Corporation Dynamic optimization of latency and bandwidth on DRAM interfaces
US7650481B2 (en) 2004-11-24 2010-01-19 Qualcomm Incorporated Dynamic control of memory access speed
KR100671747B1 (ko) * 2006-01-04 2007-01-19 삼성전자주식회사 개선된 애디티브 레이턴시를 가진 메모리 시스템 및제어방법
US8195907B2 (en) 2007-12-21 2012-06-05 Rambus Inc. Timing adjustment in a reconfigurable system
US8463987B2 (en) 2008-09-23 2013-06-11 Intel Corporation Scalable schedulers for memory controllers
US8683164B2 (en) 2009-02-04 2014-03-25 Micron Technology, Inc. Stacked-die memory systems and methods for training stacked-die memory systems
US9245881B2 (en) 2009-03-17 2016-01-26 Qualcomm Incorporated Selective fabrication of high-capacitance insulator for a metal-oxide-metal capacitor
US20120284576A1 (en) 2011-05-06 2012-11-08 Housty Oswin E Hardware stimulus engine for memory receive and transmit signals
US8693269B2 (en) 2011-08-08 2014-04-08 Samsung Electronics Co., Ltd. Memory device for managing timing parameters
US9003256B2 (en) 2011-09-06 2015-04-07 Kingtiger Technology (Canada) Inc. System and method for testing integrated circuits by determining the solid timing window

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2217066B (en) * 1988-04-05 1992-01-08 Int Computers Ltd Data processing apparatus with page mode memory
US5159676A (en) * 1988-12-05 1992-10-27 Micron Technology, Inc. Semi-smart DRAM controller IC to provide a pseudo-cache mode of operation using standard page mode draws
CN1149184A (zh) * 1994-05-19 1997-05-07 株式会社日立制作所 存储器读取装置
CN1648877A (zh) * 2004-01-27 2005-08-03 精工爱普生株式会社 信息处理装置及存储器访问方法

Also Published As

Publication number Publication date
WO2014150815A2 (en) 2014-09-25
JP6059399B2 (ja) 2017-01-11
EP2973576A2 (en) 2016-01-20
KR20150131186A (ko) 2015-11-24
KR101650042B1 (ko) 2016-08-22
CN105190757A (zh) 2015-12-23
US9224442B2 (en) 2015-12-29
WO2014150815A3 (en) 2014-11-27
EP2973576B1 (en) 2017-11-08
US20140281327A1 (en) 2014-09-18
JP2016515269A (ja) 2016-05-26

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