CN105101685B - The preparation method and multi-layer PCB of a kind of multi-layer PCB - Google Patents

The preparation method and multi-layer PCB of a kind of multi-layer PCB Download PDF

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Publication number
CN105101685B
CN105101685B CN201510557834.7A CN201510557834A CN105101685B CN 105101685 B CN105101685 B CN 105101685B CN 201510557834 A CN201510557834 A CN 201510557834A CN 105101685 B CN105101685 B CN 105101685B
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CN
China
Prior art keywords
pad
predeterminable area
pcb
layer
layer pcb
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201510557834.7A
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Chinese (zh)
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CN105101685A (en
Inventor
黄占肯
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Guangdong Oppo Mobile Telecommunications Corp Ltd
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Guangdong Oppo Mobile Telecommunications Corp Ltd
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Priority to CN201510557834.7A priority Critical patent/CN105101685B/en
Publication of CN105101685A publication Critical patent/CN105101685A/en
Application granted granted Critical
Publication of CN105101685B publication Critical patent/CN105101685B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09372—Pads and lands
    • H05K2201/09454—Inner lands, i.e. lands around via or plated through-hole in internal layer of multilayer PCB
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Details Of Connecting Devices For Male And Female Coupling (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

The invention discloses a kind of preparation method of multi-layer PCB and multi-layer PCB.Wherein, method includes：On top layer PCB on the first predeterminable area and on bottom PCB with the second predeterminable area of the first predeterminable area position correspondence, the first pad and the second pad are etched respectively, for welding jack element pin, or the signal lead for layer where welding jack element pin and connecting first, second pad；Cabling is needed to change layer and with the 3rd predeterminable area of the first predeterminable area position correspondence, etching the 3rd pad for connecting the layer signal cabling on internal layer PCB；Etch away on internal layer PCB do not need cabling change layer and with the metal foil of the 4th predeterminable area of the first predeterminable area position correspondence；Pressed after each layer PCB is aligned, in first, second, third and fourth predeterminable area internal drilling, the plated-through hole for inserting jack element is formed, solves the problems, such as high density interconnection PCB design difficult to realize, it is easy to make high density interconnection PCB, reduces cost of manufacture.

Description

The preparation method and multi-layer PCB of a kind of multi-layer PCB
Technical field
The present invention relates to the preparation method and multi-layer PCB of the manufacturing technology of multi-layer PCB, more particularly to a kind of multi-layer PCB.
Background technology
With developing rapidly for smart electronicses product, and the fast-developing trend of lightening high density structures layout designs, Printed circuit board (Printed Circuit Board, PCB) design in product is also progressively sent out to the direction that high density interconnects Exhibition.The PCB layout design of high density interconnection, particularly multi-layer PCB design is, it is necessary to make full use of each corner significant surface on PCB Product, to meet the needs of multi-layer PCB tends to high density designs.
At present, the PCB of jack element make when, top layer, internal layer, bottom pad size all, so carrying out When multi-layer PCB designs, the pad of internal layer can take PCB space, when particularly having many jack elements on PCB, internal layer pad Many PCB surfaces product will be taken, this is unfavorable for carrying out highdensity PCB layout design, be difficult to realize or need it is higher into This could realize the PCB design of high density interconnection.
The content of the invention
The purpose of the present invention is to propose to a kind of preparation method of multi-layer PCB and multi-layer PCB, to solve jack member difficult to realize The problem of high density interconnection PCB design of part, increase layout area, be easy to make the high density interconnection PCB of jack element, reduce Cost of manufacture.
To achieve the above object, the present invention adopts the following technical scheme that：
On the one hand, the embodiments of the invention provide a kind of multilayer printed circuit board PCB preparation method, including：
On the first predeterminable area on top layer PCB and on bottom PCB with the first predeterminable area position correspondence On two predeterminable areas, the first pad and the second pad are etched respectively, and first pad and the second pad are used to weld jack The pin of element, or the signal lead for layer where welding the pin and the first pad of connection and the second pad of jack element, The first clearance for insulation and the second clearance for insulation are formed respectively around first pad and the second pad；
Needed on internal layer PCB cabling change layer and with the 3rd predeterminable area of the first predeterminable area position correspondence, The 3rd pad for connecting the layer signal cabling is etched, the 3rd clearance for insulation is formed around the 3rd pad；
Etch away on internal layer PCB do not need cabling change layer and with the 4th preset areas of the first predeterminable area position correspondence The metal foil in domain, form insulating regions；
Pressed after each layer PCB is aligned, in first predeterminable area, the second predeterminable area, the 3rd predeterminable area With the 4th predeterminable area internal drilling, the plated-through hole for inserting the jack element is formed.
On the other hand, the embodiments of the invention provide a kind of multilayer printed circuit board PCB, including top layer PCB, internal layer PCB With bottom PCB；
It is pre- with the second of the first predeterminable area position correspondence on the first predeterminable area and bottom PCB on top layer PCB If region, the first pad and the second pad are etched with respectively, and first pad and the second pad are used to weld jack element Pin, or the signal lead for layer where welding the pin and the first pad of connection and the second pad of jack element, described the The first clearance for insulation and the second clearance for insulation are respectively formed with around one pad and the second pad；
On internal layer PCB, it is necessary to cabling change layer and with the 3rd predeterminable area of the first predeterminable area position correspondence, The 3rd pad for connecting the layer signal cabling is etched with, formed with the 3rd clearance for insulation around the 3rd pad；
On internal layer PCB, it is not necessary to cabling change layer and with the 4th preset areas of the first predeterminable area position correspondence Domain is insulating regions；
First predeterminable area, the second predeterminable area, the 3rd predeterminable area and the 4th predeterminable area up/down perforation, formed For inserting the plated-through hole of the jack element.
The beneficial effects of the invention are as follows：The preparation method and multi-layer PCB of a kind of multi-layer PCB of the present invention, making jack During the multi-layer PCB board of element, top layer PCB and bottom PCB pad are etched, for welding the pin of jack element, or is used for The signal lead of layer where welding the pin and connection pad of jack element, while on the internal layer PCB for needing cabling to change layer, with Position corresponding to above-mentioned pad etches the pad for connecting the layer signal cabling, and in the internal layer for not needing cabling to change layer On PCB, position corresponding with above-mentioned pad forms insulating regions, adds layout area, is easy to make the highly dense of jack element Degree interconnection PCB, reduces cost of manufacture.
Brief description of the drawings
The exemplary embodiment of the present invention will be described in detail by referring to accompanying drawing below, make one of ordinary skill in the art The above-mentioned and other feature and advantage of the present invention are become apparent from, in accompanying drawing：
Fig. 1 is the dimensional structure diagram of four layers of PCB in the prior art；
Fig. 2 is the schematic flow sheet of the preparation method for the multi-layer PCB that the embodiment of the present invention one provides；
Fig. 3 is the dimensional structure diagram for the multi-layer PCB that the embodiment of the present invention two provides；
Fig. 4 is the dimensional structure diagram for the multi-layer PCB that the embodiment of the present invention two provides.
Embodiment
Further illustrate technical scheme below in conjunction with the accompanying drawings and by embodiment.It is appreciated that It is that specific embodiment described herein is used only for explaining the present invention, rather than limitation of the invention.Further need exist for illustrating , for the ease of description, part related to the present invention rather than entire infrastructure are illustrate only in accompanying drawing.
Fig. 1 is the dimensional structure diagram of four layers of PCB in the prior art, and four layers of PCB include top layer PCB1, the first internal layer PCB2, the second internal layer PCB3 and bottom PCB4；On the first predeterminable area and bottom PCB4 on top layer PCB1 and the first preset areas Second predeterminable area of domain position correspondence, the first pin pad 5 and the second pin pad 6, the first pin pad 5 are etched with respectively It is used to weld the pin of jack element with the second pin pad 6, or for welding the first pin of pin and connection of jack element The signal lead 7 of the place layer of 5 and second pin pad of pad 6, the first pin pad 5 and the surrounding of the second pin pad 6 difference shape Into having the first clearance for insulation 8 and the second clearance for insulation 9；It is and described respectively on the first internal layer PCB2 and the second internal layer PCB3 The 3rd predeterminable area and the 4th predeterminable area of first predeterminable area position correspondence, are etched with non-lead pad 10, described non-to draw Formed with the 3rd clearance for insulation 11 around wire bonding disk 10；First predeterminable area, the second predeterminable area, the 3rd predeterminable area and the 4th Predeterminable area up/down perforation, form the plated-through hole 12 for inserting jack element.Non-lead pad in above-mentioned four layers of PCB 10 occupy substantial amounts of PCB space, reduce layout area, are difficult to realize the high density interconnection PCB design of jack element.
To solve the above problems, the embodiments of the invention provide a kind of multilayer printed circuit board PCB preparation method and more Layer PCB, embodiment are as follows.
Embodiment one
Fig. 2 is the schematic flow sheet of the preparation method for the multi-layer PCB that the embodiment of the present invention one provides.This method is applied to system Make the Multilayer singles such as four layers, six layers and eight layers or two-sided PCB situation, as shown in figure 1, this method includes：
In step 110, the first predeterminable area on top layer PCB and on bottom PCB with the first predeterminable area position correspondence The second predeterminable area on, etch the first pad and the second pad respectively.
Exemplary, according to the PCB for being covered with metal foil of the default size of customer demand offer polylith, by the figure of customer requirement Shape is transferred on PCB, and the figure includes line pattern and land pattern, etches away non-graphic part.Specifically, in top layer PCB On the first predeterminable area on and bottom PCB on on the second predeterminable area of the first predeterminable area position correspondence, etching respectively Go out the first pad and the second pad；First pad and the second pad are used for the pin for welding jack element, or for welding jack The signal lead of layer where the pin and the first pad of connection and the second pad of element；In addition, by the first pad and the second pad The metal foil of surrounding etches away, and is just formed respectively around the first pad and the second pad between the first clearance for insulation and the second insulation Gap, to prevent the first pad and the second pad from being electrically connected with circuit, and avoid solder fluxes short circuit circuit.Meanwhile etch Fall other non-graphic parts, form circuit-line.
In the present embodiment, as the top layer PCB in multi-layer PCB or bottom PCB no signal cablings, corresponding first pad or Second pad is used for the pin for welding jack element；When top layer PCB or bottom PCB have signal lead, corresponding first pad Or second pad be used for weld jack element pin and connection the first pad or the second pad where layer signal lead.
In addition, the second predeterminable area with the first predeterminable area position correspondence, represent after multi-layer PCB presses, above-mentioned the The upright projection of one predeterminable area and the second predeterminable area overlaps.
In the present embodiment, the size and shape of the first pad and the second pad can according to design requirement or technological ability and It is fixed.
Step 120, need on internal layer PCB cabling change layer and with the 3rd predeterminable area of the first predeterminable area position correspondence On, etch the 3rd pad for connecting the layer signal cabling.
According to wiring requirements, when the signal lead on internal layer PCB needs to change layer, with the first predeterminable area position pair The 3rd predeterminable area answered nearby draws signal lead, is etched on the 3rd predeterminable area for connecting the layer signal cabling 3rd pad, and above-mentioned signal lead is connected on the 3rd pad；In addition, the metal foil around the 3rd pad is etched away, Make to form the 3rd clearance for insulation around the 3rd pad.
Step 130, etch away and do not need cabling to change layer and pre- with the 4th of the first predeterminable area position correspondence on internal layer PCB If the metal foil in region, insulating regions are formed.
In the operation, on internal layer PCB, the 4th predeterminable area undesired signal cabling with the first predeterminable area position correspondence When changing layer, the metal foil on the 4th predeterminable area is etched away, forms insulating regions.Different from prior art, the operation will The non-lead bond-pad etch of correspondence position falls in the prior art, and in the prior art on the clearance for insulation around non-lead pad Metal foil is formed, adds layout area.
Thus, there are hundreds and thousands of non-lead pads on multi-layer PCB, etch away all non-lead pads, and each non-draw Clearance for insulation around wire bonding disk increases some metal foils, i.e. layout area, can finally produce high density interconnection PCB.
Step 140, pressed after each layer PCB is aligned, preset in the first predeterminable area, the second predeterminable area, the 3rd Region and the 4th predeterminable area internal drilling, form the plated-through hole for inserting jack element.
Wherein, the internal diameter of through hole is less than the first predeterminable area, the second predeterminable area, the 3rd predeterminable area and the 4th preset areas The diameter in domain.
It is exemplary, it is by each layer PCB with being pressed after contraposition equipment contraposition, the multi-layer PCB after pressing is horizontal positioned, the Vertical drilling in one predeterminable area, the through hole through each layer PCB is formed, then used hole plating copper machine is formed to through-hole wall copper facing For inserting the plated-through hole of jack element.The inwall of plated-through hole electrically connects with each layer PCB pad, so that each layer PCB is turned on up and down.
In the present embodiment, when cabling changes layer, each pad internal drilling on PCB, plated-through hole is formed.Wherein, it is golden The size of categoryization through hole can be depending on design requirement or technological ability.
Wherein, plated-through hole can be circular hole or slotted hole.
In addition, the metal foil in the present embodiment can be copper foil or aluminium foil.
A kind of preparation method for multi-layer PCB that the embodiment of the present invention one provides, making the multi-layer PCB board of jack element When, top layer PCB and bottom PCB pad is etched, for welding the pin of jack element, or for welding the pipe of jack element The signal lead of layer where pin and connection pad, while on the internal layer PCB for needing cabling to change layer, position corresponding with above-mentioned pad The pad etched for connecting the layer signal cabling is put, and on the internal layer PCB for not needing cabling to change layer, with above-mentioned pad pair The position answered forms insulating regions, adds layout area, is easy to make the high density interconnection PCB of jack element, reduces system Make cost.
Embodiment two
Fig. 3 is the dimensional structure diagram for the multi-layer PCB that the embodiment of the present invention two provides.The present embodiment using four layers of PCB as Example illustrates, as shown in figure 3, the multi-layer PCB includes top layer PCB20, internal layer PCB22 and bottom PCB21；
Wherein, on the first predeterminable area and bottom PCB21 on top layer PCB20 with the first predeterminable area position correspondence the Two predeterminable areas, are etched with the first pad 23 and the second pad 24 respectively, and the first pad 23 and the second pad 24 are slotting for welding The pin of hole element, or for welding the pin and the signal of the first pad 23 of connection and the place layer of the second pad 24 of jack element The first clearance for insulation 26 and the second clearance for insulation 27 are respectively formed with around cabling 25, the first pad 23 and the second pad 24；
Positioned at internal layer PCB22, i.e., on the second internal layer PCB222, it is necessary to cabling change layer and with the first predeterminable area position correspondence The 3rd predeterminable area, the 3rd pad 28 for connecting the layer signal cabling is etched with, formed with around the 3rd pad 28 Three clearance for insulations 29；
Positioned at internal layer PCB22, i.e., on the first internal layer PCB221, it is not necessary to cabling change layer and with the first predeterminable area position pair The 4th predeterminable area answered is insulating regions 30；
Above-mentioned first predeterminable area, the second predeterminable area, the 3rd predeterminable area and the 4th predeterminable area up/down perforation, formed For inserting the plated-through hole 31 of jack element.
Further, in such scheme, plated-through hole 31 can be circular hole or slotted hole.Referring to Fig. 3, plated-through hole 31 be slotted hole, and referring to Fig. 4, plated-through hole is circular hole, is respectively suitable for pin section as Long Circle and circular jack member Part.
In addition, as shown in figure 4, working as needs the signal lead 25 for changing layer to be all distributed on top layer PCB20 and bottom PCB21 When, the first internal layer PCB221 the 4th predeterminable area and the second internal layer PCB222 the 4th predeterminable area are insulating regions 30.
The embodiment of the present invention two is constructive embodiment, and the inventive method embodiment belongs to same design with constructive embodiment, The detail content of not detailed description, may be referred to above method embodiment, here is omitted in constructive embodiment.
It should be noted that multi-layer PCB structure of the present invention is not limited to four layers of PCB, while suitable for six layers, eight layers and ten The multi-layer PCBs such as layer.
The multi-layer PCB that the embodiment of the present invention two provides, top layer PCB and bottom PCB are etched with pad, for welding jack member The pin of part, or the signal lead for layer where welding the pin and connection pad of jack element, while needing cabling to change On the internal layer PCB of layer, position corresponding with above-mentioned pad etches the pad for connecting the layer signal cabling, and is not needing Cabling is changed on the internal layer PCB of layer, and position corresponding with above-mentioned pad forms insulating regions, adds layout area, is easy to make The high density interconnection PCB of jack element, reduces cost of manufacture.
Pay attention to, above are only presently preferred embodiments of the present invention and institute's application technology principle.It will be appreciated by those skilled in the art that The invention is not restricted to specific embodiment described here, can carry out for a person skilled in the art various obvious changes, Readjust and substitute without departing from protection scope of the present invention.Therefore, although being carried out by above example to the present invention It is described in further detail, but the present invention is not limited only to above example, without departing from the inventive concept, also Other more equivalent embodiments can be included, and the scope of the present invention is determined by scope of the appended claims.

Claims (5)

  1. A kind of 1. multilayer printed circuit board PCB preparation method, it is characterised in that including：
    It is pre- with the second of the first predeterminable area position correspondence on the first predeterminable area on top layer PCB and on bottom PCB If on region, etching the first pad and the second pad respectively, first pad and the second pad are used to weld jack element Pin, or for weld jack element pin and connection the first pad and the second pad where layer signal lead, it is described The first clearance for insulation and the second clearance for insulation are formed respectively around first pad and the second pad；
    Cabling is needed to change layer and with the 3rd predeterminable area of the first predeterminable area position correspondence, etching on internal layer PCB Go out the 3rd pad for connecting the layer signal cabling, the 3rd clearance for insulation is formed around the 3rd pad；
    Etch away on internal layer PCB do not need cabling change layer and with the 4th predeterminable area of the first predeterminable area position correspondence Metal foil, form insulating regions, the upright projection coincidence of the insulating regions and first predeterminable area；
    It will be pressed after each layer PCB contrapositions, in first predeterminable area, the second predeterminable area, the 3rd predeterminable area and the Four predeterminable area internal drillings, form the plated-through hole for inserting the jack element.
  2. 2. according to the method for claim 1, it is characterised in that the metal foil is copper foil or aluminium foil.
  3. 3. method according to claim 1 or 2, it is characterised in that the plated-through hole is circular hole or slotted hole.
  4. 4. a kind of multilayer printed circuit board PCB, it is characterised in that including top layer PCB, internal layer PCB and bottom PCB；
    On the first predeterminable area and bottom PCB on top layer PCB with the second preset areas of the first predeterminable area position correspondence Domain, the first pad and the second pad are etched with respectively, first pad and the second pad are used for the pin for welding jack element, Or the signal lead for layer where welding the pin and the first pad of connection and the second pad of jack element, first pad And second be respectively formed with the first clearance for insulation and the second clearance for insulation around pad；
    On internal layer PCB, it is necessary to cabling change layer and with the 3rd predeterminable area of the first predeterminable area position correspondence, etching There is the 3rd pad for connecting the layer signal cabling, formed with the 3rd clearance for insulation around the 3rd pad；
    On internal layer PCB, it is not necessary to which cabling, which changes layer and with the 4th predeterminable area of the first predeterminable area position correspondence, is The upright projection of insulating regions, the insulating regions and first predeterminable area overlaps；
    First predeterminable area, the second predeterminable area, the 3rd predeterminable area and the 4th predeterminable area up/down perforation, form and are used for Insert the plated-through hole of the jack element.
  5. 5. multi-layer PCB according to claim 4, it is characterised in that the plated-through hole is circular hole or slotted hole.
CN201510557834.7A 2015-09-02 2015-09-02 The preparation method and multi-layer PCB of a kind of multi-layer PCB Expired - Fee Related CN105101685B (en)

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CN105682379A (en) * 2016-01-25 2016-06-15 东莞联桥电子有限公司 Process for rapidly fabricating multi-layer circuit board
CN105704918B (en) * 2016-02-01 2018-09-07 浪潮(北京)电子信息产业有限公司 A kind of high-density printed circuit board
CN105898982B (en) * 2016-06-30 2019-01-18 广东顺德施瑞科技有限公司 A kind of high-voltage flexible wiring board and multi-layer flexible circuit board
CN107041084A (en) * 2017-06-06 2017-08-11 苏州胜科设备技术有限公司 A kind of preparation method of wiring board
CN113068306A (en) * 2021-04-26 2021-07-02 Tcl通讯（宁波）有限公司 PCB and PCB mounting method
CN113709963B (en) * 2021-07-23 2023-02-28 苏州浪潮智能科技有限公司 PCB and manufacturing method and equipment thereof
CN113891576B (en) * 2021-09-30 2023-07-14 苏州浪潮智能科技有限公司 Layer-changing through hole circuit comprising multilayer PCB, manufacturing method and equipment

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