CN105075128B - 用于经提升ldpc码的方法、计算机可读存储介质和设备 - Google Patents
用于经提升ldpc码的方法、计算机可读存储介质和设备 Download PDFInfo
- Publication number
- CN105075128B CN105075128B CN201480008419.XA CN201480008419A CN105075128B CN 105075128 B CN105075128 B CN 105075128B CN 201480008419 A CN201480008419 A CN 201480008419A CN 105075128 B CN105075128 B CN 105075128B
- Authority
- CN
- China
- Prior art keywords
- group
- sub
- lifting
- lifted
- columns
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1105—Decoding
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/033—Theoretical methods to calculate these checking codes
- H03M13/036—Heuristic code construction methods, i.e. code construction or code search based on using trial-and-error
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1105—Decoding
- H03M13/1131—Scheduling of bit node or check node processing
- H03M13/1137—Partly parallel processing, i.e. sub-blocks or sub-groups of nodes being processed in parallel
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
- H03M13/1168—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices wherein the sub-matrices have column and row weights greater than one, e.g. multi-diagonal sub-matrices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/118—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/118—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
- H03M13/1185—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/118—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
- H03M13/1185—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal
- H03M13/1188—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal wherein in the part with the double-diagonal at least one column has an odd column weight equal or greater than three
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
- H03M13/611—Specific encoding aspects, e.g. encoding by means of decoding
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/63—Joint error correction and other techniques
- H03M13/635—Error control coding in combination with rate matching
- H03M13/6362—Error control coding in combination with rate matching by puncturing
Landscapes
- Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Probability & Statistics with Applications (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Error Detection And Correction (AREA)
Applications Claiming Priority (7)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201361764476P | 2013-02-13 | 2013-02-13 | |
| US61/764,476 | 2013-02-13 | ||
| US14/179,942 US9306601B2 (en) | 2013-02-13 | 2014-02-13 | LDPC design for high parallelism, low error floor, and simple encoding |
| US14/179,942 | 2014-02-13 | ||
| US14/179,871 US20140229788A1 (en) | 2013-02-13 | 2014-02-13 | Ldpc design for high rate, high parallelism, and low error floor |
| US14/179,871 | 2014-02-13 | ||
| PCT/US2014/016279 WO2014127140A1 (en) | 2013-02-13 | 2014-02-13 | Design for lifted ldpc codes having high parallelism, low error floor, and simple encoding principle |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN105075128A CN105075128A (zh) | 2015-11-18 |
| CN105075128B true CN105075128B (zh) | 2018-07-17 |
Family
ID=51298356
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201480008409.6A Active CN104981978B (zh) | 2013-02-13 | 2014-02-13 | 使用准循环构造和穿孔以实现高速率、高并行性和低差错本底的ldpc设计 |
| CN201480008419.XA Active CN105075128B (zh) | 2013-02-13 | 2014-02-13 | 用于经提升ldpc码的方法、计算机可读存储介质和设备 |
Family Applications Before (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201480008409.6A Active CN104981978B (zh) | 2013-02-13 | 2014-02-13 | 使用准循环构造和穿孔以实现高速率、高并行性和低差错本底的ldpc设计 |
Country Status (7)
| Country | Link |
|---|---|
| US (2) | US20140229788A1 (enExample) |
| EP (2) | EP2957037A1 (enExample) |
| JP (2) | JP6542132B2 (enExample) |
| KR (2) | KR102142142B1 (enExample) |
| CN (2) | CN104981978B (enExample) |
| BR (1) | BR112015019409B1 (enExample) |
| WO (2) | WO2014127129A1 (enExample) |
Families Citing this family (50)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP3035539A1 (en) * | 2014-12-19 | 2016-06-22 | Xieon Networks S.à r.l. | Encoder, decoder and encoding method with low error floor |
| CN106160937B (zh) | 2015-04-15 | 2019-01-04 | 中兴通讯股份有限公司 | 一种实现码块分割的方法及装置 |
| US10523364B2 (en) * | 2015-11-06 | 2019-12-31 | Samsung Electronics Co., Ltd. | Channel coding framework for 802.11AY and larger block-length LDPC codes for 11AY with 2-step lifting matrices and in-place property |
| US10784901B2 (en) * | 2015-11-12 | 2020-09-22 | Qualcomm Incorporated | Puncturing for structured low density parity check (LDPC) codes |
| US10404280B2 (en) * | 2015-11-19 | 2019-09-03 | Westhold Corporation | Error correction using cyclic code-based LDPC codes |
| US11043966B2 (en) | 2016-05-11 | 2021-06-22 | Qualcomm Incorporated | Methods and apparatus for efficiently generating multiple lifted low-density parity-check (LDPC) codes |
| US10454499B2 (en) * | 2016-05-12 | 2019-10-22 | Qualcomm Incorporated | Enhanced puncturing and low-density parity-check (LDPC) code structure |
| US10313057B2 (en) | 2016-06-01 | 2019-06-04 | Qualcomm Incorporated | Error detection in wireless communications using sectional redundancy check information |
| US9917675B2 (en) | 2016-06-01 | 2018-03-13 | Qualcomm Incorporated | Enhanced polar code constructions by strategic placement of CRC bits |
| US10291354B2 (en) * | 2016-06-14 | 2019-05-14 | Qualcomm Incorporated | High performance, flexible, and compact low-density parity-check (LDPC) code |
| KR20180009558A (ko) | 2016-07-19 | 2018-01-29 | 삼성전자주식회사 | 저밀도-패리티 체크 코드를 이용하는 디코더 및 이를 포함하는 메모리 컨트롤러 |
| CN109478959B (zh) | 2016-07-27 | 2021-08-06 | 高通股份有限公司 | 用于极化码的混合自动重复请求(harq)反馈比特的设计 |
| WO2018062660A1 (ko) * | 2016-09-30 | 2018-04-05 | 엘지전자 주식회사 | Qc ldpc 코드의 레이트 매칭 방법 및 이를 위한 장치 |
| CN107959501B (zh) * | 2016-10-17 | 2021-06-29 | 上海数字电视国家工程研究中心有限公司 | 一种ldpc编码器 |
| WO2018079987A1 (ko) * | 2016-10-24 | 2018-05-03 | 엘지전자 주식회사 | Ldpc 코드의 운송블록 분할 방법 및 이를 위한 장치 |
| WO2018084735A1 (en) | 2016-11-03 | 2018-05-11 | Huawei Technologies Co., Ltd. | Efficiently decodable qc-ldpc code |
| PL3327936T3 (pl) * | 2016-11-23 | 2021-10-25 | Suez Groupe | Kodowanie/dekodowanie za pomocą quasi-cyklicznego, półregularnego kodu ldpc o krótkiej długości do zastosowań o niskim poborze mocy, takich jak zdalny odczyt |
| KR101998199B1 (ko) * | 2017-01-06 | 2019-07-09 | 엘지전자 주식회사 | 다중 ldpc 코드에서 ldpc 베이스 코드를 선택하는 방법 및 이를 위한 장치 |
| WO2018157390A1 (en) * | 2017-03-03 | 2018-09-07 | Huawei Technologies Co., Ltd. | High-rate long ldpc codes |
| WO2018171043A1 (zh) | 2017-03-24 | 2018-09-27 | 中兴通讯股份有限公司 | 一种准循环低密度奇偶校验编码处理方法及装置 |
| CN108631925B (zh) * | 2017-03-24 | 2022-05-03 | 中兴通讯股份有限公司 | 一种准循环低密度奇偶校验编码处理方法及装置 |
| CN108809328B (zh) | 2017-05-05 | 2024-05-17 | 华为技术有限公司 | 信息处理的方法、通信装置 |
| RU2667772C1 (ru) * | 2017-05-05 | 2018-09-24 | Хуавэй Текнолоджиз Ко., Лтд. | Способ и устройство обработки информации и устройство связи |
| WO2018201540A1 (zh) * | 2017-05-05 | 2018-11-08 | 华为技术有限公司 | 信息处理的方法、通信装置 |
| CN108809325B (zh) * | 2017-05-05 | 2022-01-28 | 上海数字电视国家工程研究中心有限公司 | Ldpc译码器 |
| US10680646B2 (en) * | 2017-05-12 | 2020-06-09 | Qualcomm Incorporated | Row orthogonality in LDPC rate compatible design |
| CN108988869B (zh) * | 2017-05-31 | 2021-07-30 | 大唐移动通信设备有限公司 | 一种确定校验矩阵的方法及装置、计算机存储介质 |
| CN108988871A (zh) * | 2017-05-31 | 2018-12-11 | 电信科学技术研究院 | 一种编码方法及装置、计算机存储介质 |
| US10312939B2 (en) | 2017-06-10 | 2019-06-04 | Qualcomm Incorporated | Communication techniques involving pairwise orthogonality of adjacent rows in LPDC code |
| CN111416625B (zh) | 2017-06-15 | 2021-03-23 | 华为技术有限公司 | 信息处理的方法和通信装置 |
| CN109067407B (zh) * | 2017-06-15 | 2019-11-15 | 华为技术有限公司 | 信息处理的方法、装置和通信设备 |
| US12476733B2 (en) | 2017-06-19 | 2025-11-18 | Qualcomm Incorporated | Communication techniques with self-decodable redundancy versions (RVs) using systematic codes |
| CN118473422A (zh) | 2017-06-27 | 2024-08-09 | 华为技术有限公司 | 信息处理的方法、装置和通信设备 |
| CN109150196B (zh) | 2017-06-27 | 2024-06-18 | 华为技术有限公司 | 信息处理的方法、装置和通信设备 |
| CN110832799B (zh) | 2017-07-07 | 2021-04-02 | 高通股份有限公司 | 应用低密度奇偶校验码基图选择的通信技术 |
| US10887791B2 (en) * | 2017-07-28 | 2021-01-05 | Qualcomm Incorporated | Techniques and apparatuses for low density parity check base graph determination and indication |
| KR101917829B1 (ko) * | 2017-11-30 | 2018-11-12 | 고려대학교 산학협력단 | Ldpc 부호의 셔플 복호를 위한 복호 순서 결정 방법 및 장치 |
| US11973593B2 (en) * | 2018-02-23 | 2024-04-30 | Nokia Technologies Oy | LDPC codes for 3GPP NR ultra-reliable low-latency communications |
| CN112204888B (zh) * | 2018-05-22 | 2024-08-09 | 华为技术有限公司 | 具有高效编码和良好误码平层特性的一类qc-ldpc码 |
| KR101991447B1 (ko) * | 2018-09-10 | 2019-06-20 | 국방과학연구소 | 블록 간섭 및 블록 페이딩에 강인한 고부호율 프로토그래프 기반 ldpc 부호 설계 기법 |
| CN111064475A (zh) * | 2018-10-16 | 2020-04-24 | 华为技术有限公司 | 基于低密度奇偶校验码的译码方法及装置 |
| CN109639392B (zh) * | 2018-11-09 | 2020-03-27 | 清华大学 | 广播信道传输的空间耦合ldpc码的构造方法及系统 |
| US11303303B2 (en) * | 2020-01-03 | 2022-04-12 | Qualcomm Incorporated | Rate 7/8 low-density parity-check (LDPC) code |
| US11455208B2 (en) | 2020-08-20 | 2022-09-27 | Western Digital Technologies, Inc. | Soft information for punctured bit estimation in a data storage device |
| KR102476160B1 (ko) * | 2020-11-11 | 2022-12-08 | 포항공과대학교 산학협력단 | 비이진 저밀도 패리티 검사 코드 복호기 및 이를 이용한 복호화 방법 |
| US11575390B2 (en) * | 2021-07-02 | 2023-02-07 | Hong Kong Applied Science and Technology Research Insitute Co., Ltd. | Low-latency segmented quasi-cyclic low-density parity-check (QC-LDPC) decoder |
| US20240405918A1 (en) * | 2023-06-05 | 2024-12-05 | Qualcomm Incorporated | Low-density parity-check coding including punctured auxiliary bits |
| CN116644071B (zh) * | 2023-06-08 | 2024-04-05 | 中国长江三峡集团有限公司 | 一种物资编码管理方法、装置、计算机设备及存储介质 |
| US12308958B2 (en) * | 2023-08-15 | 2025-05-20 | Qualcomm Incorporated | Fast converging low-density parity-check techniques |
| CN120185621A (zh) * | 2023-12-18 | 2025-06-20 | 华为技术有限公司 | 一种基于ldpc码的通信方法和通信装置 |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1770640A (zh) * | 2004-11-04 | 2006-05-10 | 中兴通讯股份有限公司 | 一种低密度奇偶校验码的编码器/译码器及其生成方法 |
| CN101427473A (zh) * | 2006-06-07 | 2009-05-06 | Lg电子株式会社 | 使用低密度校验码矩阵进行编码/解码的方法 |
Family Cites Families (28)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6633856B2 (en) * | 2001-06-15 | 2003-10-14 | Flarion Technologies, Inc. | Methods and apparatus for decoding LDPC codes |
| US6961888B2 (en) * | 2002-08-20 | 2005-11-01 | Flarion Technologies, Inc. | Methods and apparatus for encoding LDPC codes |
| US6957375B2 (en) | 2003-02-26 | 2005-10-18 | Flarion Technologies, Inc. | Method and apparatus for performing low-density parity-check (LDPC) code operations using a multi-level permutation |
| KR100809619B1 (ko) * | 2003-08-26 | 2008-03-05 | 삼성전자주식회사 | 이동 통신 시스템에서 블록 저밀도 패러티 검사 부호부호화/복호 장치 및 방법 |
| KR100922956B1 (ko) * | 2003-10-14 | 2009-10-22 | 삼성전자주식회사 | 저밀도 패리티 검사 코드의 부호화 방법 |
| KR20050118056A (ko) * | 2004-05-12 | 2005-12-15 | 삼성전자주식회사 | 다양한 부호율을 갖는 Block LDPC 부호를 이용한이동 통신 시스템에서의 채널부호화 복호화 방법 및 장치 |
| US7346832B2 (en) * | 2004-07-21 | 2008-03-18 | Qualcomm Incorporated | LDPC encoding methods and apparatus |
| US7143333B2 (en) * | 2004-08-09 | 2006-11-28 | Motorola, Inc. | Method and apparatus for encoding and decoding data |
| US7506238B2 (en) * | 2004-08-13 | 2009-03-17 | Texas Instruments Incorporated | Simplified LDPC encoding for digital communications |
| WO2006039801A1 (en) | 2004-10-12 | 2006-04-20 | Nortel Networks Limited | System and method for low density parity check encoding of data |
| KR100856235B1 (ko) | 2005-09-26 | 2008-09-03 | 삼성전자주식회사 | 가변 부호화율을 가지는 블록 저밀도 패리티 검사 부호부호화/복호 장치 및 방법 |
| US8132072B2 (en) | 2006-01-06 | 2012-03-06 | Qualcomm Incorporated | System and method for providing H-ARQ rate compatible codes for high throughput applications |
| JP4918655B2 (ja) * | 2006-03-30 | 2012-04-18 | 富士通株式会社 | パリティチェック行列生成方法と装置および送信機と受信機 |
| US8028216B1 (en) * | 2006-06-02 | 2011-09-27 | Marvell International Ltd. | Embedded parity coding for data storage |
| EP2076988B1 (en) | 2006-10-26 | 2018-05-02 | QUALCOMM Incorporated | Coding schemes for wireless communication transmissions |
| US8161363B2 (en) * | 2006-12-04 | 2012-04-17 | Samsung Electronics Co., Ltd | Apparatus and method to encode/decode block low density parity check codes in a communication system |
| KR101433375B1 (ko) * | 2006-12-04 | 2014-08-29 | 삼성전자주식회사 | 통신 시스템에서 블록 저밀도 패리티 검사 부호부호화/복호 장치 및 방법 |
| KR20090113869A (ko) * | 2007-01-24 | 2009-11-02 | 콸콤 인코포레이티드 | 가변 크기들의 패킷들의 ldpc 인코딩 및 디코딩 |
| US8261155B2 (en) * | 2007-03-09 | 2012-09-04 | Qualcomm Incorporated | Methods and apparatus for encoding and decoding low density parity check (LDPC) codes |
| KR101119302B1 (ko) * | 2007-04-20 | 2012-03-19 | 재단법인서울대학교산학협력재단 | 통신 시스템에서 저밀도 패리티 검사 부호 부호화 장치 및방법 |
| KR20080102902A (ko) * | 2007-05-22 | 2008-11-26 | 삼성전자주식회사 | 가변 부호화율을 가지는 ldpc 부호 설계 방법, 장치 및그 정보 저장 매체 |
| US7966548B2 (en) | 2007-06-29 | 2011-06-21 | Alcatel-Lucent Usa Inc. | Method and system for encoding data using rate-compatible irregular LDPC codes based on edge growth and parity splitting |
| JP5354985B2 (ja) | 2007-07-30 | 2013-11-27 | パナソニック株式会社 | 符号化装置及び復号化装置 |
| CN101227193B (zh) * | 2008-02-02 | 2010-06-02 | 中国科学院计算技术研究所 | 一种低密度校验码的编解码装置和方法 |
| PL2099135T3 (pl) * | 2008-03-03 | 2018-07-31 | Samsung Electronics Co., Ltd. | Urządzenie i sposób kodowania i dekodowania kanałowego w systemie komunikacyjnym wykorzystującym kody sprawdzania parzystości o niskiej gęstości |
| US8433972B2 (en) * | 2009-04-06 | 2013-04-30 | Nec Laboratories America, Inc. | Systems and methods for constructing the base matrix of quasi-cyclic low-density parity-check codes |
| EP2244387A1 (en) | 2009-04-23 | 2010-10-27 | Georgia Tech Research Corporation | Method and transmitter for use in secure communication using error correction codes |
| US8832520B2 (en) * | 2011-11-29 | 2014-09-09 | California Institute Of Technology | High order modulation protograph codes |
-
2014
- 2014-02-13 WO PCT/US2014/016261 patent/WO2014127129A1/en not_active Ceased
- 2014-02-13 EP EP14707568.3A patent/EP2957037A1/en not_active Ceased
- 2014-02-13 EP EP14708175.6A patent/EP2957038B1/en active Active
- 2014-02-13 CN CN201480008409.6A patent/CN104981978B/zh active Active
- 2014-02-13 CN CN201480008419.XA patent/CN105075128B/zh active Active
- 2014-02-13 JP JP2015557231A patent/JP6542132B2/ja active Active
- 2014-02-13 KR KR1020157024376A patent/KR102142142B1/ko active Active
- 2014-02-13 WO PCT/US2014/016279 patent/WO2014127140A1/en not_active Ceased
- 2014-02-13 US US14/179,871 patent/US20140229788A1/en not_active Abandoned
- 2014-02-13 JP JP2015557232A patent/JP5976960B2/ja active Active
- 2014-02-13 KR KR1020157024378A patent/KR101662747B1/ko active Active
- 2014-02-13 US US14/179,942 patent/US9306601B2/en active Active
- 2014-02-13 BR BR112015019409-5A patent/BR112015019409B1/pt active IP Right Grant
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1770640A (zh) * | 2004-11-04 | 2006-05-10 | 中兴通讯股份有限公司 | 一种低密度奇偶校验码的编码器/译码器及其生成方法 |
| CN101427473A (zh) * | 2006-06-07 | 2009-05-06 | Lg电子株式会社 | 使用低密度校验码矩阵进行编码/解码的方法 |
Non-Patent Citations (4)
| Title |
|---|
| Lowering the Error Floor of LDPC Codes Using Cyclic Liftings;Reza Asvadi et al.;《IEEE TRANSACTIONS ON INFORMATION THEORY》;20110430;第57卷(第4期);全文 * |
| On the Girth of Quasi Cycilc Protograph LDPC Codes;Mehdi Karimi and Amir H.Banihashemi;《2012 IEEE International Symposium on Information Theory Proceedings》;20120706;全文 * |
| 基于陪集的拟循环LDPC码构造;陈鹏程;《计算机工程》;20091231;第35卷(第24期);全文 * |
| 基于马尔可夫的LDPC码围长检测研究;陈石平;《桂林电子科技大学学报》;20071031;第27卷(第5期);全文 * |
Also Published As
| Publication number | Publication date |
|---|---|
| KR20150118993A (ko) | 2015-10-23 |
| CN104981978B (zh) | 2017-12-08 |
| WO2014127129A1 (en) | 2014-08-21 |
| JP2016510185A (ja) | 2016-04-04 |
| BR112015019409A2 (pt) | 2017-07-18 |
| JP6542132B2 (ja) | 2019-07-10 |
| BR112015019409B1 (pt) | 2022-01-11 |
| CN105075128A (zh) | 2015-11-18 |
| EP2957038A1 (en) | 2015-12-23 |
| WO2014127140A1 (en) | 2014-08-21 |
| US20140229788A1 (en) | 2014-08-14 |
| CN104981978A (zh) | 2015-10-14 |
| EP2957037A1 (en) | 2015-12-23 |
| JP5976960B2 (ja) | 2016-08-24 |
| US9306601B2 (en) | 2016-04-05 |
| KR102142142B1 (ko) | 2020-08-06 |
| KR101662747B1 (ko) | 2016-10-06 |
| JP2016507200A (ja) | 2016-03-07 |
| US20140229789A1 (en) | 2014-08-14 |
| KR20150118992A (ko) | 2015-10-23 |
| EP2957038B1 (en) | 2020-06-10 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN105075128B (zh) | 用于经提升ldpc码的方法、计算机可读存储介质和设备 | |
| JP7152394B2 (ja) | Ldpcコードを符号化および復号化するための方法および装置 | |
| US11463114B2 (en) | Protograph quasi-cyclic polar codes and related low-density generator matrix family | |
| EP4231532B1 (en) | Encoding method and device and decoding method and device for structured ldpc | |
| US10320419B2 (en) | Encoding method, decoding method, encoding device and decoding device for structured LDPC | |
| KR101742451B1 (ko) | 부호화 장치, 복호 장치, 부호화 방법 및 복호 방법 | |
| US7395494B2 (en) | Apparatus for encoding and decoding of low-density parity-check codes, and method thereof | |
| CN113612486A (zh) | 一种构建pbrl ldpc码的基矩阵方法、系统、装置及存储介质 | |
| CN101032082A (zh) | 编码和解码数据的方法和设备 | |
| WO2010004722A1 (ja) | 符号化器、復号化器及び符号化方法 | |
| CN112204888B (zh) | 具有高效编码和良好误码平层特性的一类qc-ldpc码 | |
| EP2890016A1 (en) | Ldpc encoder and decoder | |
| CN105164924A (zh) | 10gbase-t系统中ldpc编码器的方法和装置 | |
| EP4062540A1 (en) | Spatially coupled forward error correction encoding method and device using generalized error locating codes as component codes | |
| CN106685432A (zh) | 一种基于完备循环差集的大围长Type‑II QC‑LDPC码构造方法 | |
| WO2011144161A1 (zh) | 前向纠错方法、装置及系统 | |
| CN115664431A (zh) | 基于嵌套结构的全局耦合低密度奇偶校验码构造系统 | |
| WO2018126914A1 (zh) | 准循环低密度奇偶校验码的编码方法及装置、存储介质 | |
| US8977924B2 (en) | Optimized mechanism to simplify the circulant shifter and the P/Q kick out for layered LDPC decoder | |
| CN102136842B (zh) | 一种译码器及译码方法 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |