CN105074887A - 紫外线擦除型非易失性半导体装置 - Google Patents

紫外线擦除型非易失性半导体装置 Download PDF

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CN105074887A
CN105074887A CN201480009981.4A CN201480009981A CN105074887A CN 105074887 A CN105074887 A CN 105074887A CN 201480009981 A CN201480009981 A CN 201480009981A CN 105074887 A CN105074887 A CN 105074887A
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silicon nitride
ultraviolet
nitride film
nonvolatile semiconductor
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染谷哲勇
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Seiko Instruments Inc
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Seiko Instruments Inc
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157—Partial encapsulation or coating
    • H01L23/3192—Multilayer coating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/5329—Insulating materials
    • H01L23/53295—Stacked insulating layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/1443—Devices controlled by radiation with at least one potential jump or surface barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electromagnetism (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

为了得到耐湿性高且能够紫外线擦除的紫外线擦除型非易失性半导体装置，保护膜具备氮化硅膜（12）及氧氮化硅膜（13），氮化硅膜（12）及氧氮化硅膜（13）共同防止水分对紫外线擦除型非易失性半导体装置的进入，并且氮化硅膜（12）具有不会加长紫外线照射对非易失性半导体存储元件（17）的数据擦除时间的膜厚。

Description

紫外线擦除型非易失性半导体装置
技术领域
本发明涉及紫外线擦除型非易失性半导体装置。
背景技术
在以半导体集成电路为代表的半导体装置中，有半导体装置被水分浸蚀的担忧。因此，如专利文献1所示，通过在半导体装置的表面设置耐湿性优异的氮化膜，防止水分对半导体装置的浸入，从而提高半导体装置的耐湿性。
现有技术文献
专利文献
专利文献1：日本特开2006－344956号公报。
发明内容
发明要解决的课题
然而，当专利文献1的技术被适用于能够用紫外线擦除数据的紫外线擦除型非易失性半导体装置时，因氮化膜而半导体装置的耐湿性变高，但紫外线难以透射，因此不能用紫外线擦除数据，或者擦除需要很多时间。因此，希望有适合于耐湿性高且能够紫外线擦除的紫外线擦除型非易失性半导体装置的构造。
本发明鉴于上述课题而成，提供耐湿性高且能够紫外线擦除的紫外线擦除型非易失性半导体装置。
用于解决课题的方案
本发明为了解决上述课题，提供一种紫外线擦除型非易失性半导体装置，其特征在于，包括：半导体衬底；非易失性半导体存储元件，形成在所述半导体衬底；顶部金属，形成在所述半导体衬底上；以及保护膜，形成在所述顶部金属上，所述保护膜具备氮化硅膜及氧氮化硅膜，所述氮化硅膜及所述氧氮化硅膜协同而防止水分对紫外线擦除型非易失性半导体装置的进入，所述氮化硅膜具有能够缩短紫外线照射对所述非易失性半导体存储元件的数据擦除时间的膜厚。
发明效果
本发明的紫外线擦除型非易失性半导体装置具有较高的耐湿性，且能够紫外线擦除。
附图说明
图1是紫外线擦除型非易失性半导体装置的截面图。
图2是紫外线擦除型非易失性半导体装置的截面图。
图3是示出氮化硅膜的膜厚与紫外线擦除型非易失性半导体存储元件的数据擦除时间的关系的图表。
具体实施方式
以下，参照附图，对本发明的实施方式进行说明。
对紫外线擦除型非易失性半导体装置进行说明。图1是紫外线擦除型非易失性半导体装置的截面图。图3是示出氮化硅膜的膜厚与紫外线擦除型非易失性半导体存储元件的数据擦除时间的关系的图表。
紫外线擦除型非易失性半导体装置具有：半导体衬底10；形成在半导体衬底10的非易失性半导体存储元件17；形成在半导体衬底10上的顶部金属11；以及形成在顶部金属11上的保护膜，进而，在一部分具备除去了顶部金属11上的保护膜的垫（pad）开口部14。在此，保护膜由氮化硅膜12及氧氮化硅膜13这二层构成。
从垫开口部14露出一部分顶部金属11，由此进行必要的信号交换。氮化硅膜12及氧氮化硅膜13协同而防止水分对紫外线擦除型非易失性半导体装置的进入。氮化硅膜12厚度越厚就越不会使紫外线透射，因此选择能够缩短紫外线照射对非易失性半导体存储元件17的数据擦除时间的膜厚。
以公知的半导体制造工艺，在半导体衬底10形成有EPROM（可擦可编程只读存储器：ErasableProgrammableReadOnlyMemory）等非易失性半导体存储元件17。然后，层叠层间绝缘膜（未图示）等，并层叠顶部金属11。然后，作为保护膜，层叠氮化硅膜12，并层叠氧氮化硅膜13。然后，垫开口部14形成在一部分顶部金属11之上的保护膜。
在此，为了确保耐湿性，氮化硅膜12形成为具有约1000埃（angstrom）以上的膜厚。另外，如图3所示，若氮化硅膜12的膜厚超过约2000埃，则紫外线擦除型非易失性半导体存储元件的数据擦除时间会急剧变长。因此，需要氮化硅膜12的膜厚为约2000埃以下，以使数据擦除时间不会长达所需以上。由此，在制造工序也能进行非易失性半导体存储元件17的紫外线擦除。
另外，氧氮化硅膜13具有1.65～1.85的折射率，且形成为具有约7000埃以上的膜厚，因此能够提高耐湿性。此外，氧氮化硅膜13不会阻碍紫外线的进入。
通过这样，紫外线擦除型非易失性半导体装置不仅具有较高的耐湿性，而且能够在可大量生产的时间内实施紫外线擦除。
此外，在图1中，在氮化硅膜12上层叠了氧氮化硅膜13。虽然未图示，但是也可在氧氮化硅膜13上层叠氮化硅膜12。
另外，如图2所示，作为保护膜也可以在氮化硅膜与氧氮化硅膜之间追加TEOS膜15。
标号说明
10半导体衬底；11顶部金属；12氮化硅膜；13氧氮化硅膜；14垫开口部；15TEOS膜；17非易失性半导体存储元件。

Claims (4)

1.一种紫外线擦除型非易失性半导体装置，包括：
半导体衬底；
紫外线擦除型非易失性半导体存储元件，形成在所述半导体衬底的表面；
顶部金属，形成在所述半导体衬底之上；以及
保护膜，形成在所述非易失性半导体存储元件及所述顶部金属之上，在氮化硅膜上层叠氧氮化硅膜。
2.如权利要求1所述的紫外线擦除型非易失性半导体装置，其中，所述氮化硅膜具有1000埃以上2000埃以下的膜厚。
3.如权利要求1所述的紫外线擦除型非易失性半导体装置，其中，所述氧氮化硅膜具有1.65～1.85的折射率。
4.如权利要求1所述的紫外线擦除型非易失性半导体装置，其中，在所述氮化硅膜与所述氧氮化硅膜之间具有TEOS膜。
CN201480009981.4A 2013-02-21 2014-01-22 紫外线擦除型非易失性半导体装置 Pending CN105074887A (zh)

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JP2013032114A JP2014165191A (ja) 2013-02-21 2013-02-21 紫外線消去型の不揮発性半導体装置
JP2013-032114 2013-02-21
PCT/JP2014/051182 WO2014129252A1 (ja) 2013-02-21 2014-01-22 紫外線消去型の不揮発性半導体装置

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EP (1) EP2960928A4 (zh)
JP (1) JP2014165191A (zh)
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TW (1) TW201448217A (zh)
WO (1) WO2014129252A1 (zh)

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CN106206737B (zh) * 2016-08-19 2019-03-08 上海华力微电子有限公司 半浮栅晶体管工艺方法
CN113809085A (zh) * 2020-06-17 2021-12-17 和舰芯片制造(苏州)股份有限公司 一种flash存储器的制备方法及flash存储器

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KR100832715B1 (ko) * 2006-12-23 2008-05-28 동부일렉트로닉스 주식회사 플래시 메모리 소자의 제조방법
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JPS61140155A (ja) * 1984-12-12 1986-06-27 Hitachi Ltd 半導体装置
JPS6428869A (en) * 1987-07-23 1989-01-31 Mitsubishi Electric Corp Semiconductor device
JPH05299661A (ja) * 1992-04-17 1993-11-12 Sony Corp 不揮発性半導体装置
JPH05299660A (ja) * 1992-04-21 1993-11-12 Nippondenso Co Ltd 半導体装置の製造方法
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107123600A (zh) * 2017-05-19 2017-09-01 武汉新芯集成电路制造有限公司 一种改善晶圆表面缺陷的刻蚀方法

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WO2014129252A1 (ja) 2014-08-28
TW201448217A (zh) 2014-12-16
JP2014165191A (ja) 2014-09-08
EP2960928A4 (en) 2016-11-02
KR20150120370A (ko) 2015-10-27
US20160005744A1 (en) 2016-01-07
US9589972B2 (en) 2017-03-07

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