CN104934361A - Manufacturing method of shallow trench and manufacturing method of storage device - Google Patents

Manufacturing method of shallow trench and manufacturing method of storage device Download PDF

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Publication number
CN104934361A
CN104934361A CN201410103919.3A CN201410103919A CN104934361A CN 104934361 A CN104934361 A CN 104934361A CN 201410103919 A CN201410103919 A CN 201410103919A CN 104934361 A CN104934361 A CN 104934361A
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shallow trench
sacrificial material
layer
material layer
opening
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CN104934361B (en
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王新鹏
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Semiconductor Manufacturing International Shanghai Corp
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Semiconductor Manufacturing International Shanghai Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Memories (AREA)

Abstract

The invention provides a manufacturing method of a shallow trench and a manufacturing method of a storage device, wherein the manufacturing method of the shallow trench comprises the steps of: dividing a substrate into a first region and a second region; forming a first expendable material layer on the position, on which the shallow trench is going to be formed, of the second region; and carrying out etching on the first expendable material layer and the substrate simultaneously, forming a first shallow trench in the first region, and forming a second shallow trench on the position corresponding to the first expendable material layer in the second region. According to the method, the first expendable material layer is correspondingly arranged on the position to be etched in the second region, so that the depth of the second shallow trench formed by etching the second region is smaller than the depth of the first shallow trench formed by etching the first region. In addition, the shallow trenches are formed by only one time of photo-etching, mask alignment, and the first region and second region etching process, so that the existing technology is simplified, the production cost is lowered, and the alignment precision of the formed shallow trenches is improved.

Description

The manufacture method of shallow trench and the manufacture method of memory device
Technical field
The application relates to the manufacture craft of semiconductor integrated circuit, particularly relates to a kind of manufacture method of shallow trench and the manufacture method of memory device.
Background technology
Zones of different in integrated circuit (IC) chip comprises the semiconductor device with difference in functionality, needs to be isolated mutually by shallow trench between these devices.Due to the difference of operational environment, the degree of depth of the isolated groove in zones of different between device can be different.Such as high tension apparatus has higher operating voltage and electric current, in order to prevent producing leakage current between high tension apparatus, usually need the degree of depth of the isolated groove increased between high tension apparatus, make the degree of depth of the isolated groove in the depth ratio logic circuit area of the isolated groove between high tension apparatus larger.
Existing memory generally comprises core cell district and logic circuit area, and in core cell district between device the degree of depth of isolated groove usually than in logic circuit area between device the degree of depth of isolated groove high .In existing memory manufacturing process, usually form the isolated groove of different depth in memory cell array district and logic circuit area with the method for subregion manufacture.Namely make respectively memory cell array district shallow trench isolation discrete logic circuit region shallow trench isolation from, controlled the degree of depth of the isolated groove of two zoness of different by the difference of etching period respectively, form the isolated groove with different depth.
There is following problem in which: subregion formed shallow trench isolation from time, need use twice mask, mask pattern is corresponding stored cell array region and logic circuit area respectively, therefore the cost making mask is higher, and needing through twice mask alignment, the shallow trench isolation formed is lower from alignment precision.
Summary of the invention
The application aims to provide a kind of manufacture method of shallow trench and the manufacture method of memory device, to solve the problem of the complex process existed in existing semiconductor device isolation technology.
The application provides a kind of manufacture method of shallow trench on the one hand.This manufacture method comprises: substrate is divided into first area and second area; Second area for form shallow trench position on form first can sacrificial material layer; And can sacrificial material layer and substrate etch first, form the first shallow trench in first area, correspond to first in the second area and the position of sacrificial material layer can form the second shallow trench. simultaneously
Further, in the manufacture method of above-mentioned shallow trench, first can sacrificial material layer be formed on the surface of substrate in the second area.
Further, the manufacture method of above-mentioned shallow trench also comprises: can before sacrificial material layer in formation first, substrate is formed the protective layer with the first opening and the second opening, first opening corresponds to for forming the position of the first shallow trench in first area, and the second opening corresponds in second area for forming the position of the second shallow trench; Can in the step of sacrificial material layer in formation first, first can sacrificial material layer be formed in the second opening.
Further, in the manufacture method of above-mentioned shallow trench, above-mentioned protective layer is sacrificial material layer or is dielectric layer.
Further, in the manufacture method of above-mentioned shallow trench, when protective layer is sacrificial material layer, forms the step with the protective layer of the first opening and the second opening and comprise: on substrate, form preparation protective layer; Preparation protective layer is formed the first hard mask layer of patterning; Etch downwards according to figure in the first hard mask layer, form the protective layer with the first opening and the second opening; Remove the first hard mask layer, and remove remaining protective layer after formation first shallow trench and the second shallow trench.
Further, in the manufacture method of above-mentioned shallow trench, when protective layer is as dielectric layer, forms the step with the protective layer of the first opening and the second opening and comprise: on substrate, form preparation protective layer; Preparation protective layer forms second can sacrificial material layer; Sacrificial material layer can be formed the first hard mask layer of patterning second; According to figure in the first hard mask layer downwards successively etch second can sacrificial material layer and preparation protective layer, until preparation protective layer in form the first opening and the second opening; Removing the first hard mask layer and remaining second can sacrificial material layer.
Further, in the manufacture method of above-mentioned shallow trench, forming first in the second opening can the step of sacrificial material layer comprise: in first opening and the second opening of protective layer, form first can sacrificial material layer simultaneously; Sacrificial material layer can form the second hard mask layer be arranged in the second opening first; Remove be arranged in first of the first opening can sacrificial material layer; Remove the second hard mask layer.
Further, in the manufacture method of above-mentioned shallow trench, also can comprise before sacrificial material layer in formation first: the position corresponding to the first shallow trench in the first region forms the step of the first pre-shallow trench, and the position corresponding to the second shallow trench in the second area forms the step of the second pre-shallow trench, first can sacrificial material layer be formed on the inwall of the second pre-shallow trench.
Further; also comprise in the manufacture method of above-mentioned shallow trench: can before sacrificial material layer in formation; substrate is formed the protective layer with the first opening and the second opening, and the first opening communicates with the first pre-shallow trench, and the second opening communicates with the second pre-shallow trench.
Further, in the manufacture method of above-mentioned shallow trench, above-mentioned protective layer is sacrificial material layer or is dielectric layer.
Further, in the manufacture method of above-mentioned shallow trench, protective layer is sacrificial material layer, forms the protective layer with the first opening and the second opening, and the step forming the first pre-shallow trench and the second pre-shallow trench on substrate comprises: on substrate, form preparation protective layer; Preparation protective layer is formed the first hard mask layer of patterning; Etch downwards according to figure in the first hard mask layer, form the protective layer with the first opening and the second opening, and on substrate, form the first pre-shallow trench communicated with the first opening, and the communicate with the second opening second pre-shallow trench; Remove the first hard mask layer, and remove remaining described protective layer after formation first shallow trench and the second shallow trench.
Further, in the manufacture method of above-mentioned shallow trench, when protective layer is dielectric layer, form the protective layer with the first opening and the second opening, and the step forming the first pre-shallow trench and the second pre-shallow trench on substrate comprises: on substrate, form preparation protective layer; Preparation protective layer forms second can sacrificial material layer; Sacrificial material layer can form patterned first hard mask layer second; Etching second downwards according to figure in the first hard mask layer can sacrificial material layer, preparation protective layer and substrate, until form the first opening and the second opening in preparation protective layer, and form the first pre-shallow trench communicated with the first opening on substrate, and the communicate with the second opening second pre-shallow trench; Removing the first hard mask layer and remaining second can sacrificial material layer.
Further, in the manufacture method of above-mentioned shallow trench, in the second pre-shallow trench, form first can the step of sacrificial material layer comprise: in the first pre-shallow trench and the second pre-shallow trench, formation first can sacrificial material layer simultaneously; Sacrificial material layer can form the second hard mask layer be arranged in the second pre-shallow trench first; Remove be arranged in first of the first pre-shallow trench can sacrificial material layer; Remove the second hard mask layer.
Further, in the manufacture method of above-mentioned shallow trench, formed in the step of the first shallow trench and the second shallow trench in the substrate, while etched substrate forms the first shallow trench, etching remove be formed in first on the second pre-shallow trench inwall can sacrificial material layer, formation is arranged in the second shallow trench of substrate; Or while etched substrate forms the first shallow trench, sacrificial material layer first time etching can be carried out to being formed in first on the second pre-shallow trench inwall, after the etching completing the first shallow trench, sacrificial material layer can carry out second time etching to being formed in first on the second pre-shallow trench inwall, forming the second shallow trench being arranged in substrate; Or while etched substrate forms the first shallow trench, sequentially etching be formed in first on the second pre-shallow trench inwall can sacrificial material layer and be positioned at first can substrate below sacrificial material layer, formation is arranged in the second shallow trench of substrate.
Further, in the manufacture method of above-mentioned shallow trench, first can the thickness of sacrificial material layer be c, depth difference between first shallow trench and the second shallow trench is h, substrate and first can the etch rate of sacrificial material layer than for v, and first can the thickness c=h/v of sacrificial material layer, is preferably .
Further, in the manufacture method of above-mentioned shallow trench, first can sacrificial material layer be oxide skin(coating).
Further, in the manufacture method of above-mentioned shallow trench, forming first can the technique of sacrificial material layer be ald or thermal oxidation technology, and the temperature of thermal oxidation technology is 300 ~ 600 DEG C.
Further, in the manufacture method of above-mentioned shallow trench, remove and be arranged in first of the first opening or the first pre-shallow trench and can the step of sacrificial material layer adopt wet processing to etch, the speed of etching be
Further, in the manufacture method of above-mentioned shallow trench, protective layer is sandwich construction, is outwards comprised successively by substrate surface: SiO 2layer, Si 3n 4layer, SiO 2layer; Second sacrificial material layer can have sandwich construction, is outwards comprised successively: amorphous carbon layer and silicon oxynitride layer by dielectric layer surface.
The another aspect of the application there are provided a kind of manufacture method of memory device.This manufacture method comprises: on the substrate with logic region and core memory area, form shallow trench, and substrate between shallow trench makes grid, source electrode and drain electrode, the manufacture method of the shallow trench that the method wherein forming shallow trench on the substrate with logic region and core memory area provides for the application.
The technical scheme of application the application, is divided into first area and second area by substrate, and the position in the second area for forming shallow trench form first can sacrificial material layer, then first area and second area are etched simultaneously.Can sacrificial material layer by the position to be etched relative set first at second area, make the degree of depth etching the second shallow trench that second area is formed be less than the degree of depth of the first shallow trench that etching first area is formed.With formed compared with the existing technique of different depth shallow trench by repeatedly photoetching and etching technics, the manufacture method of the shallow trench that the application provides is by means of only a photoetching, mask alignment, and the shallow trench of different depth is just defined by the technique etching first area and second area, thus simplify existing technique, reduce production cost, and the shallow trench alignment precision formed is improved.
Except object described above, feature and advantage, the application also has other object, feature and advantage.Below with reference to figure, the application is described in further detail.
Accompanying drawing explanation
Accompanying drawing form this specification a part, for understanding the application further, accompanying drawing shows the preferred embodiment of the application, and be used for the principle of the application is described together with specification.In figure:
Fig. 1 shows the schematic flow sheet of the manufacturing method for shallow groove that the application provides;
Fig. 2 a shows in the manufacture method of the shallow trench provided at a kind of execution mode of the application, substrate is divided into the matrix cross-sectional view after first area and second area;
Fig. 2 b shows and form the matrix cross-sectional view after having the protective layer of the first opening and the second opening on the substrate of Fig. 2 a,
Fig. 2 b-1 shows in the manufacture method of the shallow trench provided in a kind of embodiment of the application, and the substrate of Fig. 2 a is formed the matrix cross-sectional view after preparation dielectric layer;
Fig. 2 b-2 show prepare shown in Fig. 2 b-1 dielectric layer formed second can matrix cross-sectional view after sacrificial material layer;
Fig. 2 b-3 show shown in Fig. 2 b-2 second sacrificial material layer can form the first hard mask layer after matrix cross-sectional view;
Fig. 2 c show in the second opening of protective layer shown in Fig. 2 b, to form first can matrix cross-sectional view after sacrificial material layer;
Fig. 2 c-1 show in first opening and the second opening of protective layer shown in Fig. 2 b, to form first can matrix cross-sectional view after sacrificial material layer;
Fig. 2 c-2 show protective layer shown in Fig. 2 c-1 the second opening first sacrificial material layer can form the second hard mask layer after matrix cross-sectional view;
Fig. 2 d shows and form the first shallow trench in first area middle shown in Fig. 2 c, and forms the matrix cross-sectional view after the second shallow trench in second area;
Fig. 3 a shows in the manufacture method of the shallow trench provided at a kind of execution mode of the application, substrate is divided into the matrix cross-sectional view after first area and second area;
Fig. 3 b shows and form the matrix cross-sectional view after having the protective layer of the first opening and the second opening on substrate shown in Fig. 3 a;
Fig. 3 c shows the protective layer being formed on substrate shown in Fig. 3 a and have the first opening and the second opening, form the first pre-shallow trench and the second pre-shallow trench in the substrate, and formation first can matrix cross-sectional view after sacrificial material layer in the second pre-shallow trench;
Fig. 3 c-1 show in the first pre-shallow trench shown in Fig. 3 b and the second pre-shallow trench, to form first can matrix cross-sectional view after sacrificial material layer;
Fig. 3 c-2 to show in the second pre-shallow trench shown in Fig. 3 c-1 first sacrificial material layer can form the second hard mask layer after matrix cross-sectional view;
Fig. 3 d shows and forms the first shallow trench in first area in figure 3 c, and forms the matrix cross-sectional view after the second shallow trench in second area; And
Fig. 4 shows in the manufacture method of the shallow trench provided in a kind of embodiment of the application, in the second pre-shallow trench of Fig. 3 b first can sacrificial material layer complete first time etching after matrix cross-sectional view.
Embodiment
Below in conjunction with the embodiment of the application, the technical scheme of the application is described in detail, but following embodiment is only understand the application, and the application can not be limited, embodiment in the application and the feature in embodiment can combine mutually, and the multitude of different ways that the application can be defined by the claims and cover is implemented.
It should be noted that used term is only to describe embodiment here, and be not intended to the illustrative embodiments of restricted root according to the application.As used herein, unless the context clearly indicates otherwise, otherwise singulative is also intended to comprise plural form, in addition, it is to be further understood that, when use belongs to " comprising " and/or " comprising " in this manual, it indicates existing characteristics, step, operation, device, assembly and/or their combination.
For convenience of description, here can usage space relative terms, as " ... on ", " in ... top ", " at ... upper surface ", " above " etc., be used for the spatial relation described as a device shown in the figure or feature and other devices or feature.Should be understood that, space relative terms is intended to comprise the different azimuth in use or operation except the described in the drawings orientation of device.Such as, " in other devices or structure below " or " under other devices or structure " will be positioned as after if the device in accompanying drawing is squeezed, being then described as the device of " above other devices or structure " or " on other devices or structure ".Thus, exemplary term " in ... top " can comprise " in ... top " and " in ... below " two kinds of orientation.This device also can other different modes location (90-degree rotation or be in other orientation), and relatively describe space used here and make respective explanations.
Introducing as background technology part, there is the problem of complex process in semiconductor device isolation technology, and the applicant of the application studies for the problems referred to above, proposes a kind of manufacture method of shallow trench.As shown in Figure 1, this manufacture method comprises: substrate is divided into first area and second area; Second area for form shallow trench position on form first can sacrificial material layer; Sacrificial material layer and substrate can etch first simultaneously, form the first shallow trench in first area, correspond to first in the second area and the position of sacrificial material layer can form the second shallow trench.
In above-mentioned manufacture method, due to can sacrificial material layer by be provided with first at the position to be etched of second area in etch step, make the degree of depth etching the second shallow trench that second area is formed be less than the degree of depth of the first shallow trench that etching first area is formed more.With formed compared with the existing technique of different depth shallow trench by repeatedly photoetching and etching technics, the manufacture method of the shallow trench that the application provides is by means of only a photoetching, mask alignment, and the technique once etching first area and second area just defines the shallow trench of different depth simultaneously, thus simplify existing technique, reduce production cost, and the shallow trench alignment precision formed is improved.
In a kind of optimal way of the manufacture method of the above-mentioned shallow trench that the application provides, first can sacrificial material layer be formed on the surface of substrate in the second area.In another kind of optimal way, can before sacrificial material layer in formation first, also be included in the step forming the first pre-shallow trench corresponding to the first shallow trench in described first area, and form the step of the second pre-shallow trench corresponding to the second shallow trench in the second area, now, first can sacrificial material layer can be formed on the inwall of the second pre-shallow trench.Further illustrate when adopting this two kinds of modes respectively below with reference to accompanying drawing, the detailed step of the manufacturing method for shallow groove that the application provides.
Below in conjunction with accompanying drawing 2a to Fig. 4, the illustrative embodiments according to the application is described in more detail.But these illustrative embodiments can be implemented by multiple different form, and should not be interpreted as being only limited to execution mode set forth herein.Should be understood that, there is provided these execution modes be in order to make the application open thorough and complete, and the design of these illustrative embodiments is fully conveyed to those of ordinary skill in the art, in the accompanying drawings, for the sake of clarity, expand the thickness in layer and region, and use the device that identical Reference numeral represents identical, thus will omit description of them.
As shown in Fig. 2 a to Fig. 2 d, the manufacture method of the shallow trench provided in a kind of execution mode of the application comprises the following steps:
First, substrate 10 is divided into first area 11 and second area 13, forms basal body structure as shown in Figure 2 a.Wherein the material of substrate 10 preferably includes but is not limited to adopt Si substrate, when wherein adopting Si substrate, can be preferably P type Si substrate, N-type Si substrate or the Si substrate that do not adulterate.Wherein first area 11 and second area 13 can be high voltage device regions and low-voltage device district, also can be core memory district and logic circuit area.Those skilled in the art has the ability to divide substrate 10 according to the function of substrate 10 semiconductor-on-insulator device.
After completing step substrate being divided into first area 11 and second area 13; form the protective layer 20 with the first opening 51 and the second opening 53 over the substrate 10; form basal body structure as shown in Figure 2 b; wherein the first opening 51 corresponds to for forming the position of the first shallow trench 81 in first area 11, and the second opening 53 corresponds in second area 13 for forming the position of the second shallow trench 83.The becoming to be conducive to of this protective layer 20 protects substrate 10 in the process of subsequent etching shallow trench.In the step of above-mentioned formation protective layer 20, protective layer 20 can select arbitrarily can for substrate protection is provided can expendable material, also can be effective dielectric layer in subsequent step.
In order to form basal body structure as shown in Figure 2 b, in this application can in the following ways: when adopted protective layer 20 for arbitrarily can for substrate provide protection can expendable material time, in the unshowned a kind of execution mode of the application, formation is similar to protective layer 20 step with the first opening 51 and the second opening 53 shown in Fig. 2 b and comprises: form preparation protective layer 20 ' over the substrate 10; Preparation protective layer 20 ' is formed the first hard mask layer 43 of patterning; Etch downwards according to the figure formed in the first hard mask layer 43, form the protective layer 20 with the first opening 51 and the second opening 53; Remove the first hard mask layer 43, to form basal body structure as shown in Figure 2 b.It should be noted that when employing can expendable material formed protective layer 20 time, form the first shallow trench 81 and the second shallow trench 83 in the manufacture method of the application's shallow trench after, remove protective layer 20.
When adopted protective layer 20 is dielectric layer, in a kind of preferred implementation of the application, formation is similar to protective layer 20 step with the first opening 51 and the second opening 53 shown in Fig. 2 b and comprises: form preparation protective layer 20 ' over the substrate 10, to form the basal body structure as shown in Fig. 2 b-1; Preparation protective layer 20 ' forms second can sacrificial material layer 30, forms the basal body structure as shown in Fig. 2 b-2, and sacrificial material layer 30 can be formed the first hard mask layer 43 of patterning second further, and then forms the basal body structure as shown in Fig. 2 b-3.Etching second downwards successively according to the figure formed in the first hard mask layer 43 can sacrificial material layer 30 and preparation protective layer 20 ', until at preparation protective layer 20 ' middle formation first opening 51 and the second opening 53; Remove the first hard mask layer 43, and remaining second can sacrificial material layer 30, form basal body structure as shown in Figure 2 b.When adopting in this way, after protective layer 20 is formed the first opening 51 and the second opening 53, dielectric layer can be retained in order to follow-up use.
In such scheme when protective layer 20 is dielectric layer, it can be a Rotating fields, but more preferably adopts sandwich construction, particularly preferably as shown in structure in Fig. 2 b, adopts and is outwardly comprised successively by substrate 10: SiO 2layer 21, Si 3n 4layer 23 and SiO 2the ONO sandwich construction of layer 25.Now, the preparation protective layer 20 ' formed, as shown in Fig. 2 b-1, comprises the preparation SiO that substrate 10 is outwardly formed successively 2layer 21 ', preparation Si 3n 4layer 23 ' and preparation SiO 2the sandwich construction of layer 25 '.The technique forming this preparation protective layer 20 ' includes but not limited to chemical vapour deposition (CVD), thermal oxidation, evaporation, sputtering.When this protective layer 20 is dielectric layer; be formed thereon second can sacrificial material layer 30 also can use satisfactory arbitrarily can expendable material; but more preferably this second can sacrificial material layer 30 also be sandwich construction; as shown in Fig. 2 b-2, this second can sacrificial material layer 30 by preparation protective layer 20 ' outwardly comprise successively: amorphous carbon layer 31 and silicon oxynitride layer 33.Form this and second the technique of sacrificial material layer 30 can include but not limited to chemical vapour deposition (CVD), evaporation, sputtering.One preferred embodiment in, first hard mask layer 43 is photoresist layer, when formation the first hard mask layer 43, is included in second and sacrificial material layer 30 can forms antireflecting coating 41, then in antireflecting coating 41, form photoresist, after exposure imaging, form the first above-mentioned hard mask layer 43.The technique wherein forming antireflecting coating and photoresist includes but not limited to adopt deposition and spin coating.Above-mentioned preparation technology is state of the art, does not repeat them here.
Etching preparation protective layer 20 ' and be positioned at second on preparation protective layer 20 ' and can the optimal process of sacrificial material layer 30 include but not limited to adopt dry etching in such scheme, more preferably adopts plasma etching.Adopt plasma process etching second can sacrificial material layer 30 and preparation protective layer 20 ' time, in a kind of optional scheme, the process conditions of etch step are: etching gas is CF 4and CHF 3, sputtering power is 400 ~ 1000 watts, and etching temperature is 25 ~ 60 DEG C, and etch period is 30 ~ 360 seconds.
In such scheme, remove the first hard mask layer 43 and remaining second can the optimal process of sacrificial material layer 30 include but not limited to adopt wet processing, more preferably adopt infusion method and rotary spray method.Adopt infusion method remove the first hard mask layer 43 and remaining second can sacrificial material layer 30 time, a kind of optional mode comprises: by mass fraction be 30% ~ 50% HF solution be placed in etching groove, control the temperature of cleaning reagent in etching groove at 25 ~ 50 DEG C, then comprise the first hard mask layer 43 and remaining second and the semiconductor substrate of sacrificial material layer 30 can be placed in HF solution, first hard mask layer 43 and remaining second can sacrificial material layer 30 be reacted with HF solution, and the reaction time is 30 ~ 120 seconds.Adopt rotary spray method remove the first hard mask layer 43 and remaining second can sacrificial material layer 30 time, a kind of optional mode comprises: by mass fraction be 30% ~ 50% HF solution spraying can on the semiconductor substrate of sacrificial material layer 30 to comprising the first hard mask layer 43 and remaining second, and make HF dissolution homogeneity be distributed on the surface of above-mentioned semiconductor substrate by low speed rotation (<500rpm), under temperature is 25 ~ 50 DEG C of conditions, first hard mask layer 43 and remaining second can sacrificial material layer 30 be reacted with HF solution, reaction time is 30 ~ 120 seconds.
After completing and being formed and have the protective layer 20 of the first opening 51 and the second opening 53, in the second opening 53 of protective layer 20, form first can sacrificial material layer 60, forms basal body structure as shown in Figure 2 c.In second opening 53 of protective layer 20 with the first opening 51 and the second opening 53, for how form first can sacrificial material layer 60; when forming the basal body structure be similar to as shown in Figure 2 c; in a kind of preferred implementation of the application; it comprises the following steps; in first opening 51 and the second opening 53 of protective layer 20, form first can sacrificial material layer 60 simultaneously, forms the basal body structure as shown in Fig. 2 c-1.Sacrificial material layer 60 can form the second hard mask layer 73 be arranged in the second opening 53 first, form the basal body structure as shown in Fig. 2 c-2; Remove be arranged in first of the first opening 51 can sacrificial material layer 60; Remove the second hard mask layer 73 in the second opening 53, form basal body structure as shown in Figure 2 c.
In above-mentioned steps, can according to the depth difference h of different shallow trenchs for being formed and substrate 10 and first can the etch rate of sacrificial material layer 60 calculate pre-formed first than the incidence relation between v can the thickness c of sacrificial material layer 60, its correlation is: c=h/v.In a kind of preferred implementation of the application; in first opening 51 and the second opening 53 of protective layer 20, form first can the optimal process of sacrificial material layer 60 include but not limited to adopt atomic layer deposition sum thermal oxidation technology, forming first can the thickness of sacrificial material layer 60 be preferably .Above-mentioned technique accurately can control formation first can the thickness of sacrificial material layer 60, and first can the compact structure, evenly of sacrificial material layer 60.Adopt atom layer deposition process formed first can sacrificial material layer 60 time, in a kind of optional scheme, process conditions are: with SiH 4and O 2for key reaction gas, the pressure in reaction cavity is 600 ~ 1200Pa, and the depositing temperature of atomic layer is 450 ~ 800 DEG C.Adopt thermal oxidation technology formed first can sacrificial material layer 60 time, a kind of preferred process conditions are: oxidizing temperature is 300 ~ 600 DEG C, and oxidization time is 60 ~ 300 seconds.Preferably, this first can expendable material can be oxide skin(coating), such as SiO 2.
Comprise in the first step that sacrificial material layer 60 can be formed the second hard mask layer 73 being arranged in the second opening 53: in a kind of preferred implementation of the application, in the first opening 51 and the second opening 53, form the second hard mask layer 73 simultaneously; Remove the second hard mask layer 73 in the first opening 51, form the basal body structure as shown in Fig. 2 c-2.This second hard mask layer 73 can adopt photoresist to be formed, and the optimal process forming the second hard mask layer 73 comprises deposition and spin coating, and the optimal process removing the second hard mask layer 73 in the first opening 51 includes but not limited to adopt wet processing.Before the step of the second hard mask layer 73 in removal first opening 51, a kind of preferred embodiment in also comprise the step of first area 11 being carried out to ion implantation, to improve the threshold voltage of first area 11.
In the above-mentioned methods, wet-etching technology can be adopted to remove be positioned at first of the first opening 51 can sacrificial material layer 60, and in a kind of preferred implementation of the application, the speed of etching is preferably when adopt wet processing to etch in the first opening 51 first can sacrificial material layer 60 time, in a kind of optional scheme, etch step comprises: by mass fraction be 30% ~ 50% HF solution be placed in etching groove, control the temperature of HF solution in etching groove at 25 ~ 50 DEG C, then comprise first and the silicon chip of sacrificial material layer 60 can be placed in HF solution, make first can sacrificial material layer 60 react with HF solution, the reaction time is 30 ~ 120 seconds.
In a kind of preferred implementation of the application, the second hard mask layer 73 is photoresist, adopts wet processing to remove the second hard mask layer 73 being positioned at the second opening 53, and the reagent of wet processing preferably includes but is not limited to adopt 1-METHYLPYRROLIDONE.The second hard mask layer 73 in the second opening 53 is etched when employing 1-METHYLPYRROLIDONE, one preferred embodiment comprises: by 1-METHYLPYRROLIDONE solution spraying on the silicon chip comprising the second hard mask layer in the second opening 53, and make 1-METHYLPYRROLIDONE dissolution homogeneity be distributed on silicon chip surface by low speed rotation (<500rpm), under temperature is 25 ~ 50 DEG C of conditions, second hard mask layer 73 is reacted with 1-METHYLPYRROLIDONE, and the reaction time is 30 ~ 100 seconds.
Complete the position for forming shallow trench in second area 13 form first can after the step of sacrificial material layer 60, can sacrificial material layer 60 and substrate 10 etch first simultaneously, the first shallow trench 81 is formed in first area 11, in second area 13, correspond to first the position of sacrificial material layer 60 can form the second shallow trench 83, form basal body structure as shown in Figure 2 d.Can sacrificial material layer by compare first area many first at the position to be etched of second area, the degree of depth of the second shallow trench that etching second area is formed is less than the degree of depth of the first shallow trench that etching first area is formed in a kind of preferred implementation of the application, above-mentioned etching technics can be dry etching, more preferably adopts plasma process.When adopting plasma process etching first area 11 and second area 13, in a kind of optional scheme, the process conditions of plasma etching are: etching gas is CF 4and CHF 3, sputtering power is 400 ~ 1000 watts, and etching temperature is 25 ~ 60 DEG C, and etch period is 30 ~ 120 seconds.
Carry out the manufacture method that can complete the shallow trench that the application provides according to above-mentioned steps, the method may be used in the preparation of memory device.In a kind of preferred implementation of the application, the manufacture method of this memory device, be included in there is logic region and core memory area substrate 10 on form shallow trench, and substrate 10 between shallow trench makes grid, source electrode and drain electrode, the method wherein forming shallow trench on the substrate 10 with logic region and core memory area adopts above-mentioned manufacture method.This manufacture method that the application provides is by means of only a photoetching, mask alignment, and the technique once etching first area and second area just defines the shallow trench of different depth simultaneously, thus simplify existing technique, reduce production cost, and the shallow trench alignment precision formed is improved.
As shown in Fig. 3 a to Fig. 4, the manufacture method of the shallow trench provided in the second execution mode of the application, comprises the following steps:
First, substrate 10 is divided into first area 11 and second area 13, forms basal body structure as shown in Figure 3 a.Wherein the material of substrate 10 preferably includes but is not limited to adopt Si substrate, and the Si substrate wherein adopted can be preferably P type Si substrate, N-type Si substrate and the Si substrate that do not adulterate.Wherein first area 11 and second area 13 can be high voltage device regions and low-voltage device district, also can be core memory district and logic circuit area.Those skilled in the art has the ability to divide substrate 10 according to the function of substrate 10 semiconductor-on-insulator device.
After completing step substrate being divided into first area 11 and second area 13, in first area 11, form the first pre-shallow trench 81 ' corresponding to the first shallow trench 81, in second area 13, form the second pre-shallow trench 83 ' corresponding to the second shallow trench 83.In the preferred mode of the one of the application, in order to protect substrate 10 in the process of subsequent etching shallow trench, the the first pre-shallow trench 81 ' corresponding to the first shallow trench 81 is formed in first area 11, formed in second area 13 in the step of the second pre-shallow trench 83 ' corresponding to the second shallow trench 83, form the protective layer 20 with the first opening 51 and the second opening 53 over the substrate 10 simultaneously, wherein the first opening 51 communicates with the first pre-shallow trench 81 ', second opening 53 communicates with the second pre-shallow trench 83 ', form basal body structure as shown in Figure 3 b.Being formed to be beneficial to of this protective layer 20 is protected substrate 10 in the process of subsequent etching shallow trench.In the step of above-mentioned formation protective layer 20, protective layer 20 can select arbitrarily can for substrate protection is provided can expendable material, also can be effective dielectric layer in subsequent step.
In order to form basal body structure as shown in Figure 3 b, in this application can in the following ways: when adopted protective layer 20 for arbitrarily can for substrate provide protection can expendable material time, in the unshowned a kind of execution mode of the application, formed and be similar to the structure shown in Fig. 3 b, namely the protective layer with the first opening 51 and the second opening 53 is formed over the substrate 10, form the first pre-shallow trench 81 ' communicated with the first opening 51 over the substrate 10 simultaneously, and the step of the second pre-shallow trench 83 ' to communicate with the second opening 53 comprising: formed over the substrate 10 and prepare protective layer 20 ', preparation protective layer 20 ' is formed the first hard mask layer 43 of patterning, the protective layer 20 being formed and there is the first opening 51 and the second opening 53 is etched downwards according to the figure in the first hard mask layer 43, and form the first pre-shallow trench 81 ' communicated with the first opening 51 over the substrate 10, and the second pre-shallow trench 83 ' communicated with the second opening 53, remove the first hard mask layer 43, to form basal body structure as shown in Figure 3 b.It should be noted that when employing can expendable material formed protective layer 20 time, form the first shallow trench 81 and the second shallow trench 83 in the manufacture method of the application's shallow trench after, remove protective layer 20.
When adopted protective layer 20 is dielectric layer, in a kind of preferred implementation of the application, adopt the operating procedure similar with given operating procedure in Fig. 2 b-1 to Fig. 2 b-3.Form the protective layer with the first opening 51 and the second opening 53 over the substrate 10, form the first pre-shallow trench 81 ' communicated with the first opening 51 over the substrate 10 simultaneously, and the second pre-shallow trench 83 ' to communicate with the second opening 53, its operating procedure comprises: form preparation dielectric layer 20 ' over the substrate 10, preparation dielectric layer 20 ' forms second can sacrificial material layer 30, and sacrificial material layer 30 can form patterned first hard mask layer 43 second further, etching second downwards successively according to figure in the first hard mask layer 43 can sacrificial material layer 30, preparation protective layer 20 ' and substrate 10, to preparing protective layer 20 ' middle formation first opening 51 and the second opening 53, and form the first pre-shallow trench 81 ' communicated with the first opening 51 over the substrate 10, and the second pre-shallow trench 83 ' to communicate with the second opening 53, remove the first hard mask layer 43, and remaining second can sacrificial material layer 30, form basal body structure as shown in Figure 2 b.When adopting in this way; form the protective layer 20 with the first opening 51 and the second opening 53 over the substrate 10; form the first pre-shallow trench 81 ' communicated with the first opening 51 over the substrate 10 simultaneously; and after the step of the second pre-shallow trench 83 ' to communicate with the second opening 53, retain dielectric layer in order to follow-up use.
When in such scheme, protective layer 20 is dielectric layer, it can be a Rotating fields, but more preferably adopts sandwich construction, particularly preferably as shown in figure 3b, adopts and is outwardly comprised successively by substrate 10: SiO 2layer 21, Si 3n 4layer 23 and SiO 2the ONO sandwich construction of layer 25.Now, the preparation protective layer 20 ' formed, comprises the preparation SiO that substrate 10 is outwardly formed successively 2layer, preparation Si 3n 4layer and preparation SiO 2the sandwich construction of layer.The technique forming this preparation protective layer 20 ' includes but not limited to chemical vapour deposition (CVD), thermal oxidation, evaporation, sputtering.When this protective layer 20 is dielectric layer; be formed thereon second can sacrificial material layer 30 also can make satisfactory arbitrarily can expendable material; but more preferably this second can sacrificial material layer 30 also be sandwich construction, outwardly comprised successively by preparation protective layer 20 ': amorphous carbon layer and silicon oxynitride layer.Form this and second the technique of sacrificial material layer 30 can include but not limited to chemical vapour deposition (CVD), evaporation, sputtering.Above-mentioned first hard mask layer 43 can be the material layer that can play a protective role arbitrarily; also can be photoresist layer; one preferred embodiment; be included in second in the step forming photoresist layer and sacrificial material layer 30 can form antireflecting coating 41; then in antireflecting coating 41, form photoresist layer, the technique wherein forming antireflecting coating and photoresist includes but not limited to adopt deposition and spin coating.Above-mentioned preparation technology is state of the art, does not repeat them here.
In such scheme, etching technics preferably includes but is not limited to adopt dry etching, more preferably adopts plasma etching.Adopt plasma process etching second can sacrificial material layer 30 and preparation protective layer 20 ' time, in a kind of optional scheme, the process conditions of etch step are: etching gas is CF 4and CHF 3, sputtering power is 400 ~ 1000 watts, and etching temperature is 25 ~ 60 DEG C, and etch period is 30 ~ 360 seconds.In above-mentioned etching process, by controlling the process conditions (such as temperature, time etc.) of etching, and the degree of depth of detection etch, make to form the first pre-shallow trench 81 ' and the second pre-shallow trench 83 ' over the substrate 10.
Remove in such scheme the first hard mask layer 43(preferably this first hard mask layer be photoresist layer) and remaining second can the optimal process of sacrificial material layer 30 to include but not limited to adopt wet processing, more preferably adopt infusion method and rotary spray method.Adopt infusion method remove the first hard mask layer 43 and remaining second can sacrificial material layer 30 time, a kind of optional mode comprises: by mass fraction be 30% ~ 50% HF solution be placed in etching groove, control the temperature of cleaning reagent in etching groove at 25 ~ 50 DEG C, then comprise the first hard mask layer 46 and remaining second and the semiconductor substrate of sacrificial material layer 30 can be placed in HF solution, first hard mask layer 43 and remaining second can sacrificial material layer 30 be reacted with HF solution, and the reaction time is 30 ~ 120 seconds.Adopt rotary spray method remove the first hard mask layer 43 and remaining second can sacrificial material layer 30 time, a kind of optional mode comprises: by mass fraction be 30% ~ 50% HF solution spraying can on the semiconductor substrate of sacrificial material layer 30 to comprising the first hard mask layer 43 and remaining second, and make HF dissolution homogeneity be distributed on silicon chip surface by low speed rotation (<500rpm), under temperature is 25 ~ 50 DEG C of conditions, first hard mask layer 43 and remaining second can sacrificial material layer 30 be reacted with HF solution, reaction time is 30 ~ 120 seconds.
Complete the first pre-shallow trench 81 ' being formed in first area 11 and correspond to the first shallow trench 81, form the step of the second pre-shallow trench 83 ' corresponding to the second shallow trench 83 in second area 13 after, can sacrificial material layer 60 in the interior formation first of the second pre-shallow trench 83 ', form basal body structure as shown in Figure 3 c.Can sacrificial material layer 60 in the middle formation first of the second pre-shallow trench 83 ' for how, when forming the basal body structure be similar to as shown in Figure 3 c, in a kind of preferred implementation of the application, it comprises the following steps, simultaneously can sacrificial material layer 60 at the first pre-shallow trench 81 ' and the middle formation first of the second pre-shallow trench 83 '.Sacrificial material layer 60 can form the second hard mask layer 73 be arranged in the second pre-shallow trench 83 ' first; Remove be arranged in first of the first pre-shallow trench 81 ' can sacrificial material layer 60; Remove the second hard mask layer 73, and then form basal body structure as shown in Figure 3 c.
Above-mentioned can in the step of sacrificial material layer 60 in the interior formation first of the second pre-shallow trench 83 ', when being formed with protective layer 20 on the surface of substrate 10, its manufacture method comprises the following steps: simultaneously can sacrificial material layer 60 in the first pre-shallow trench 81 ' and the middle formation first of the second pre-shallow trench 83 ', now, this first can sacrificial material layer 60 can not to be formed in protective layer 20 on first opening 51 and the second opening 53 sidewall, and be only formed on the inwall of the first pre-shallow trench 81 ' and the second pre-shallow trench 83 ', form the basal body structure as shown in Fig. 3 c-1; Sacrificial material layer 60 can form the second hard mask layer 73 be arranged in the second pre-shallow trench 83 ' first, preferably this second hard mask layer 73 covers the upper surface being arranged in second area protective layer 20, and be filled in the first opening 51 and the second pre-shallow trench 83 ', form the basal body structure as shown in Fig. 3 c-1; Remove be arranged in first of the first pre-shallow trench 81 ' can sacrificial material layer 60, form the basal body structure as shown in Fig. 3 c-2; Remove interior second hard mask layer 73 of the second pre-shallow trench 83 ', form basal body structure as shown in Figure 3 c.
In above-mentioned steps, can according to the depth difference h of different shallow trenchs for being formed and substrate 10 and first can the etch rate of sacrificial material layer 60 calculate pre-formed first than the incidence relation between v can the thickness c of sacrificial material layer 60, its correlation is: c=h/v.In a kind of preferred implementation of the application, can the optimal process of sacrificial material layer 60 include but not limited to adopt thermal oxidation technology in the be arranged in substrate 10 first pre-shallow trench 81 ' and the second pre-shallow trench 83 ' formation first, forming first can the thickness of sacrificial material layer 60 be preferably .Above-mentioned technique accurately can control formation first can the thickness of sacrificial material layer 60, and first can the compact structure, evenly of sacrificial material layer 60.Adopt thermal oxidation technology formed first can sacrificial material layer 60 time, a kind of preferred process conditions are: oxidizing temperature is 300 ~ 600 DEG C, and oxidization time is 60 ~ 300 seconds.Preferably, this first can sacrificial material layer 60 can be oxide skin(coating), such as SiO 2.
Comprise in the first step that sacrificial material layer 60 can be formed the second hard mask layer 73 being arranged in the second shallow pre-groove 83 ': simultaneously at the first pre-shallow trench 81 ' and the second pre-shallow trench 83 ' formation second hard mask layer; Remove the second hard mask layer 73 that the first pre-shallow trench 81 ' is interior.When substrate 10 is formed with protective layer; comprise in the first step that sacrificial material layer 60 can be formed light second hard mask layer 73 being arranged in the second shallow pre-groove 83 ': simultaneously at the first pre-shallow trench 81 '; the first opening 51 and the second pre-shallow trench 83 ' be located thereon, forms the second hard mask layer 73 in the second opening of the side of being located thereon.In practical operation, this second hard mask layer 73 can cover on protective layer 20 simultaneously; Removal is positioned at the first pre-shallow trench 81 ', and the second hard mask layer 73 namely in the side of being located thereon first opening 51, forms the basal body structure as shown in Fig. 3 c-2.
In the above-mentioned methods, formed the second hard mask layer 73(preferably this second hard mask layer be photoresist layer) optimal process comprise deposition and spin coating, the optimal process removing the second hard mask layer includes but not limited to adopt wet processing.Preferably before the step of interior the second hard mask layer of the pre-shallow trench 81 ' of removal first, a kind of preferred embodiment in also comprise the step of first area 11 being carried out to ion implantation, to improve the threshold voltage of first area 11.
In the above-mentioned methods, wet-etching technology can be adopted to remove be positioned at first of the first pre-shallow trench 81 ' can sacrificial material layer 60, and in a kind of preferred implementation of the application, the speed of etching preferably when adopt wet processing etching the first pre-shallow trench 81 ' interior first can sacrificial material layer 60 time, in a kind of optional scheme, etch step comprises: by mass fraction be 30% ~ 50% HF solution be placed in etching groove, control the temperature of HF solution in etching groove at 25 ~ 50 DEG C, then comprise first and the silicon chip of sacrificial material layer 60 can be placed in HF solution, make first can sacrificial material layer 60 react with HF solution, the reaction time is 30 ~ 120 seconds.
In a kind of preferred implementation of the application, the the second hard mask layer 73(adopting wet processing to remove to be positioned at the second shallow pre-groove 83 ' preferably this second hard mask layer is photoresist layer), the reagent of wet processing preferably includes but is not limited to adopt 1-METHYLPYRROLIDONE.When employing 1-METHYLPYRROLIDONE etches the second interior hard mask layer 73 of the second shallow pre-groove 83 ', one preferred embodiment comprises: by 1-METHYLPYRROLIDONE solution spraying on the silicon chip comprising interior second hard mask layer of the second shallow pre-groove 83 ', and make 1-METHYLPYRROLIDONE dissolution homogeneity be distributed on silicon chip surface by low speed rotation (<500rpm), under temperature is 25 ~ 50 DEG C of conditions, second hard mask layer and 1-METHYLPYRROLIDONE are reacted, and the reaction time is 30 ~ 100 seconds.
Complete the position for forming shallow trench in second area 13 form first can after the step of sacrificial material layer 60, can sacrificial material layer 60 and substrate 10 etch first simultaneously, the first shallow trench 81 is formed in first area 11, in second area 13, correspond to first the position of sacrificial material layer 60 can form the second shallow trench 83, form basal body structure as shown in Figure 3 d.
In this embodiment, due to just the first pre-shallow trench 81 ' and the second pre-shallow trench 83 ' can be pre-formed before sacrificial material layer 60 in formation first, according to the degree of depth of the formed second pre-shallow trench 83 ', and first can the impact of the factor such as etching selection ratio between sacrificial material layer 60 and substrate.Formed in substrate 10 in the step of the second shallow trench 83, following either type can be taked.
(1) while etched substrate forms the first shallow trench 81, completely etching be formed in first on the inwall of the second pre-shallow trench 83 ' can sacrificial material layer 60, formation is arranged in the second shallow trench 83 of substrate 10.The degree of depth that this scheme is suitable for the second pre-shallow trench 83 ' can meet the requirement of the second shallow trench 83, and selected first can etching selection ratio between the material of sacrificial material layer 60 and substrate 10, just meet and can sacrificial material layer 60 etch first completely, and the degree of depth of the second shallow trench 83 formed meets the requirements.
(2) while etched substrate forms the first shallow trench 81, sacrificial material layer 60 first time etching can be carried out to being formed in first on the inwall of the second pre-shallow trench 83 ', after the etching completing the first shallow trench 81, sacrificial material layer 60 can carry out second time etching to being formed in first on the inwall of the second pre-shallow trench 83 ', forming the second shallow trench 83 being arranged in substrate 10; The degree of depth that this scheme is suitable for the second pre-shallow trench 83 ' can meet the requirement of the second shallow trench 83, and when the degree of depth of the second shallow trench 83 formed meets the requirements, second shallow trench 83 remains first can sacrificial material layer 60, namely basal body structure is as shown in Figure 4 formed, now by sacrificial material layer 60 secondarily etched mode can be carried out to first, it can be etched removal completely.
(3) while etched substrate forms the first shallow trench 81, sequentially etching be formed in first on the inwall of the described second pre-shallow trench 83 ' can sacrificial material layer 60 and be positioned at first can substrate 10 below sacrificial material layer 60, formation is arranged in the second groove 83 of substrate 10.This scheme be suitable for form the degree of depth of the second pre-shallow trench 83 ' more shallow, and in the process of the first shallow trench 83 of etching formation, sacrificial material layer 60 removal can be etched completely by first, and further etching be positioned at first can matrix under sacrificial material layer 60, formed simultaneously and meet first shallow trench 81 and second shallow trench 83 of semiconductor equipment to depth requirements.
In a kind of preferred implementation of the application, above-mentioned etching technics can be dry etching, more preferably adopts plasma process.When adopting plasma process etching first area 11 and second area 13, in a kind of optional scheme, the process conditions of plasma etching are: etching gas is CF 4and CHF 3, sputtering power is 400 ~ 1000 watts, and etching temperature is 25 ~ 60 DEG C, and etch period is 30 ~ 120 seconds.
Present invention also provides a kind of manufacture method of memory device, be included in there is logic region and core memory area substrate on form shallow trench, and substrate between shallow trench makes grid, source electrode and drain electrode, the method wherein forming shallow trench on the substrate with logic region and core memory area is the manufacture method of the above-mentioned shallow trench of the application.
The manufacture method of the shallow trench that the application provides will be further illustrated below with specific embodiment.
Embodiment 1
Present embodiments provide a kind of method forming the isolated groove of memory device, the method comprises the following steps:
Formed successively by SiO from lower to upper at the upper surface of the Si substrate comprising core memory district and logic circuit area 2, Si 3n 4, SiO 2the dielectric layer of composition, by agraphitic carbon and SiON form second can sacrificial material layer, antireflecting coating and photoresist layer, and on photoresist layer, defined the position of shallow trench by photoetching.
Position antagonistic reflex coating, second along above-mentioned shallow trench can sacrificial material layer and dielectric layer etch, the dielectric layer in core memory district is formed the first opening, and the second opening is formed on the dielectric layer of logic circuit area, the concrete technology condition of its etching is: main etching gas is CF 4and CHF 3, sputtering power is 300 watts, and etching temperature is 60 DEG C, and etch period is 60 seconds.
Adopt HF etching to remove antireflecting coating and second can sacrificial material layer, and wherein in HF solution, the mass fraction of HF is 35%, and etch period is 40 seconds.
Atom layer deposition process is adopted to form SiO in the first opening and the second opening 2layer, its concrete technology condition is: with SiH 4and O 2for key reaction gas, the pressure in reaction cavity is 650Pa, and the depositing temperature of atomic layer is 570 DEG C, and wherein first can the thickness of sacrificial material layer be .
Adopt the SiO in HF etching removal core memory district 2layer, wherein in HF solution, the mass fraction of HF is 35%, and the processing time is 20 seconds.
Adopt plasma etching industrial to etch the silicon substrate in the first opening and the second opening, the process conditions of etching are: etching gas is CF 4and CHF 3, sputtering power is 400 watts, and etching temperature is 60 DEG C, and etch period is 80 seconds.
Measure the degree of depth of isolated groove, test result shows, the degree of depth of the groove in high voltage device regions is , the degree of depth of the groove in logic circuit area is .
Embodiment 2
Present embodiments provide a kind of method forming the isolated groove of memory device, the method comprises the following steps:
Formed successively by SiO from lower to upper at the upper surface of the Si substrate comprising core memory district and logic circuit area 2, Si 3n 4, SiO 2the dielectric layer of composition, by agraphitic carbon and SiON form second can sacrificial material layer, antireflecting coating and photoresist layer, and on photoresist layer, define grooved position by photoetching.
Can sacrificial material layer, dielectric layer and substrate etch along above-mentioned grooved position antagonistic reflex coating, second, the dielectric layer in core memory district is formed in the first opening, substrate and form the first pre-shallow trench, and on the dielectric layer of logic circuit area, forming formation the second pre-shallow trench in the second opening, substrate, concrete technology condition of its etching is: etching gas is CF 4and CHF 3, sputtering power is 400 watts, and etching temperature is 60 DEG C, and etch period is 70 seconds.
Adopting HF etching to remove antireflecting coating and second can sacrificial material layer, and wherein in HF solution, the mass fraction of HF is 35%, and etch period is 40 seconds.
Thermal oxidation technology is adopted to form SiO in the first pre-shallow trench and the second pre-shallow trench 2layer, its concrete technology condition is: oxidizing temperature is 400 DEG C, and oxidization time is 120 seconds.
Adopt the SiO in HF etching removal core memory district 2layer, wherein in HF solution, the mass fraction of HF is 35%, and the processing time is 20 seconds.
Adopt plasma etching industrial to etch the silicon substrate in the first pre-shallow trench and the second prefabricated shallow trench, the process conditions of etching are: etching gas is CF 4and CHF 3, sputtering power is 400 watts, and etching temperature is 60 DEG C, and etch period is 80 seconds.
Measure the degree of depth of isolated groove, test result shows, the degree of depth of the groove in high voltage device regions is , the degree of depth of the groove in logic circuit area is .
As can be seen from the above embodiments, the example that the application is above-mentioned achieves following technique effect:
(1) substrate is divided into first area and second area, and the position in the second area for forming shallow trench form first can sacrificial material layer, then first area and second area are etched simultaneously.By compare at the position to be etched of second area arrange first can sacrificial material layer, make to etch the position of second area compare first area many first can sacrificial material layer, the degree of depth therefore etching the second shallow trench that second area is formed is less than the degree of depth of the first shallow trench that etching first area is formed.
(2) with formed compared with the existing technique of different depth shallow trench by repeatedly photoetching and etching technics, the manufacture method of the shallow trench that the application provides is by means of only a photoetching, mask alignment, and the technique once etching first area and second area just defines the shallow trench of different depth simultaneously, thus simplify existing technique, reduce production cost, and the shallow trench alignment precision formed is improved.
These are only the preferred embodiment of the application, be not limited to the application, for a person skilled in the art, the application can have various modifications and variations.Within all spirit in the application and principle, any amendment done, equivalent replacement, improvement etc., within the protection range that all should be included in the application.

Claims (20)

1. a manufacture method for shallow trench, is characterized in that, described manufacture method comprises:
Substrate is divided into first area and second area;
Described second area for form shallow trench position on form first can sacrificial material layer; And
Sacrificial material layer and described substrate can etch described first simultaneously, form the first shallow trench in described first area, in described second area, correspond to first the position of sacrificial material layer can form the second shallow trench.
2. manufacture method according to claim 1, is characterized in that, described first can sacrificial material layer be formed on the surface of substrate in described second area.
3. manufacture method according to claim 2, is characterized in that, described manufacture method also comprises:
Can before sacrificial material layer in formation described first, form the protective layer with the first opening and the second opening over the substrate, described first opening corresponds to for forming the position of the first shallow trench in described first area, and described second opening corresponds in described second area for forming the position of the second shallow trench;
Can in the step of sacrificial material layer in described formation first, described first can sacrificial material layer be formed in described second opening.
4. manufacture method according to claim 3, is characterized in that, described protective layer is sacrificial material layer or dielectric layer.
5. manufacture method according to claim 4, is characterized in that, when described protective layer is sacrificial material layer, the step described in formation with the protective layer of the first opening and the second opening comprises:
Form preparation protective layer over the substrate;
Described preparation protective layer is formed the first hard mask layer of patterning;
Etch downwards according to figure in described first hard mask layer, there is described in formation the protective layer of the first opening and the second opening;
Remove described first hard mask layer; And
Remaining described protective layer is removed after described first shallow trench of formation and the second shallow trench.
6. manufacture method according to claim 4, is characterized in that, when described protective layer is as dielectric layer, the step that described formation has the protective layer of the first opening and the second opening comprises:
Form preparation protective layer over the substrate;
Described preparation protective layer is formed second can sacrificial material layer;
Sacrificial material layer can be formed the first hard mask layer of patterning described second;
Etching described second downwards successively according to figure in described first hard mask layer can sacrificial material layer and described preparation protective layer, until form the first opening and the second opening in described preparation protective layer; And
Removing described first hard mask layer and remaining described second can sacrificial material layer.
7. manufacture method according to claim 3, is characterized in that, in described second opening, form described first can the step of sacrificial material layer comprise:
In first opening and the second opening of described protective layer, form described first can sacrificial material layer simultaneously;
Sacrificial material layer can form the second hard mask layer be arranged in described second opening described first;
Remove be arranged in described first of described first opening can sacrificial material layer; And
Remove described second hard mask layer.
8. manufacture method according to claim 1, is characterized in that, in described manufacture method, also can comprise in formation described first before sacrificial material layer:
The position corresponding to described first shallow trench in described first area forms the step of the first pre-shallow trench, and the position corresponding to described second shallow trench in described second area forms the step of the second pre-shallow trench, described first can sacrificial material layer be formed on the inwall of the described second pre-shallow trench.
9. manufacture method according to claim 8; it is characterized in that; described manufacture method also comprises: can before sacrificial material layer in formation described first; form the protective layer with the first opening and the second opening over the substrate; described first opening communicates with the described first pre-shallow trench, and described second opening communicates with the described second pre-shallow trench.
10. manufacture method according to claim 9, is characterized in that, described protective layer is sacrificial material layer, or described protective layer is dielectric layer.
11. manufacture methods according to claim 10; it is characterized in that; described protective layer is sacrificial material layer, and described formation has the protective layer of the first opening and the second opening, and the step forming the first pre-shallow trench and the second pre-shallow trench over the substrate comprises:
Form preparation protective layer over the substrate;
Described preparation protective layer is formed the first hard mask layer of patterning;
Etch downwards according to figure in described first hard mask layer, form the described protective layer with the first opening and the second opening, and form the first pre-shallow trench communicated with described first opening over the substrate, and the second pre-shallow trench communicated with described second opening;
Remove described first hard mask layer; And
Remaining described protective layer is removed after formation first shallow trench and the second shallow trench.
12. manufacture methods according to claim 10; it is characterized in that; when described protective layer is dielectric layer, described formation has the protective layer of the first opening and the second opening, and the step forming the first pre-shallow trench and the second pre-shallow trench over the substrate comprises:
Form preparation protective layer over the substrate;
Described preparation protective layer is formed second can sacrificial material layer;
Sacrificial material layer can form patterned first hard mask layer described second;
Etching described second downwards according to figure in described first hard mask layer can sacrificial material layer, described preparation protective layer and substrate, to forming the first opening and the second opening in described preparation protective layer, and form the first pre-shallow trench communicated with described first opening over the substrate, and the second pre-shallow trench communicated with described second opening;
Removing described first hard mask layer and remaining described second can sacrificial material layer.
13. manufacture methods according to claim 8, is characterized in that, in the described second pre-shallow trench, form described first can the step of sacrificial material layer comprise:
In the described first pre-shallow trench and the second pre-shallow trench, form described first can sacrificial material layer simultaneously;
Sacrificial material layer can form the second hard mask layer be arranged in the described second pre-shallow trench described first;
Remove be arranged in described first of the described first pre-shallow trench can sacrificial material layer;
Remove described second hard mask layer.
14. manufacture methods according to claim 8, is characterized in that, are describedly formed in the step of described first shallow trench and the second shallow trench in the substrate,
While etched substrate forms described first shallow trench, etching remove be formed in described first on the described second pre-shallow trench inwall can sacrificial material layer, formation is arranged in described second shallow trench of described substrate; Or
While etched substrate forms described first shallow trench, sacrificial material layer first time etching can be carried out to being formed in described first on the described second pre-shallow trench inwall, after the etching completing described first shallow trench, sacrificial material layer can carry out second time etching to being formed in described first on the described second pre-shallow trench inwall, forming described second shallow trench being arranged in described substrate; Or
While etched substrate forms described first shallow trench, sequentially etching be formed in described first on the described second pre-shallow trench inwall can sacrificial material layer and be positioned at described first can substrate below sacrificial material layer, formation is arranged in the second shallow trench of described substrate.
15. manufacture methods according to claim 1, it is characterized in that, described first can the thickness of sacrificial material layer be c, depth difference between described first shallow trench and the second shallow trench is h, described substrate and first can the etch rate of sacrificial material layer than for v, and described first can the thickness c=h/v of sacrificial material layer, is preferably .
16. manufacture methods according to claim 1, is characterized in that, described first can sacrificial material layer be oxide skin(coating).
17. manufacture methods according to claim 1, is characterized in that, forming described first can the technique of sacrificial material layer be ald or thermal oxidation technology, and the temperature of described thermal oxidation technology is 300 ~ 600 DEG C.
18. manufacture methods according to claim 7 or 13, is characterized in that, remove to be arranged in described first of the first opening or the described first pre-shallow trench and can the step of sacrificial material layer to adopt wet processing to etch, and the speed of etching is
19. manufacture methods according to claim 6 or 12, it is characterized in that, described protective layer is sandwich construction, is outwards comprised successively: SiO by described substrate surface 2layer, Si 3n 4layer, SiO 2layer; Described second sacrificial material layer can have sandwich construction, is outwards comprised successively: amorphous carbon layer and silicon oxynitride layer by described dielectric layer surface.
The manufacture method of 20. 1 kinds of memory devices, be included in there is logic region and core memory area substrate on form shallow trench, and substrate between described shallow trench makes grid, source electrode and drain electrode, it is characterized in that, the substrate with logic region and core memory area is formed the manufacture method of method according to any one of claim 1 to 19 of described shallow trench.
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CN105655286A (en) * 2016-02-04 2016-06-08 上海华虹宏力半导体制造有限公司 Forming method of semiconductor structure
CN108231770A (en) * 2016-12-22 2018-06-29 联华电子股份有限公司 The method for forming pattern
CN110349906A (en) * 2018-04-03 2019-10-18 长鑫存储技术有限公司 A kind of forming method of autoregistration groove
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CN114121776B (en) * 2022-01-26 2022-04-19 晶芯成(北京)科技有限公司 Manufacturing method of semiconductor isolation structure
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