CN104882452B - 一种阵列基板、显示面板及阵列基板的制造方法 - Google Patents
一种阵列基板、显示面板及阵列基板的制造方法 Download PDFInfo
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- 238000000034 method Methods 0.000 title claims abstract description 24
- 238000004519 manufacturing process Methods 0.000 title abstract description 16
- 230000004888 barrier function Effects 0.000 claims abstract description 59
- 239000000758 substrate Substances 0.000 claims abstract description 32
- 230000008569 process Effects 0.000 claims description 12
- 239000004065 semiconductor Substances 0.000 claims description 12
- 238000000059 patterning Methods 0.000 claims description 11
- 238000002360 preparation method Methods 0.000 claims description 4
- 238000009413 insulation Methods 0.000 claims description 2
- 230000005611 electricity Effects 0.000 claims 1
- 230000019491 signal transduction Effects 0.000 abstract description 8
- 239000002184 metal Substances 0.000 description 20
- 229910052751 metal Inorganic materials 0.000 description 20
- 229920002120 photoresistant polymer Polymers 0.000 description 18
- 230000007547 defect Effects 0.000 description 7
- 238000005530 etching Methods 0.000 description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 5
- 229910052802 copper Inorganic materials 0.000 description 5
- 239000010949 copper Substances 0.000 description 5
- 238000001514 detection method Methods 0.000 description 5
- 238000001312 dry etching Methods 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- 230000008901 benefit Effects 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 238000001259 photo etching Methods 0.000 description 3
- 239000000523 sample Substances 0.000 description 3
- 238000000137 annealing Methods 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000010408 film Substances 0.000 description 2
- 238000005240 physical vapour deposition Methods 0.000 description 2
- 238000012360 testing method Methods 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- 230000004075 alteration Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
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- H—ELECTRICITY
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- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
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- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
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- G02F1/1343—Electrodes
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- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
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- G02—OPTICS
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- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
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- H01L27/1259—Multistep manufacturing methods
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Abstract
本发明公开了一种阵列基板、显示面板及阵列基板的制造方法,用以提高阵列基板上连接短路环的过孔处的信号传导的可靠性。阵列基板包括交叉设置的一组数据线、一组栅线以及位于阵列基板周边区域的第一短路环和第二短路环,第一短路环与一组数据线同层设置,第二短路环与一组栅线同层设置;相邻两根数据线分别连接第一短路环和第二短路环,第二短路环与数据线的连接结构包括:位于衬底基板之上的第一透明电极;位于第一透明电极之上的栅连接线;位于第一透明电极和栅连接线之上的第一绝缘层,数据线位于第一绝缘层之上;位于数据线之上的第二绝缘层;位于第二绝缘层之上的第二透明电极。
Description
技术领域
本发明涉及显示技术领域,特别是涉及一种阵列基板、显示面板及阵列基板的制造方法。
背景技术
在平板显示装置中,薄膜晶体管液晶显示器(Thin Film Transistor LiquidCrystal Display,简称TFT-LCD)具有体积小、功耗低、制造成本相对较低和无辐射等特点,在当前的平板显示器市场占据了主导地位。
目前,TFT-LCD的显示模式主要有TN(Twisted Nematic,扭曲向列)模式、VA(VerticalAlignment,垂直取向)模式、IPS(In-Plane-Switching,平面方向转换)模式和AD-SDS(ADvanced Super Dimension Switch,高级超维场转换技术,简称ADS)模式等。
其中,ADS模式已发展到0+4次构图工艺,其优点是可以将第一透明电极和栅极金属通过一次光刻工艺制作,即首先在基板上沉积第一透明电极和栅极金属,然后涂覆光刻胶,进行半曝光和显影,之后进行湿法刻蚀以及干法刻蚀,这样通过一次光刻就将两层金属制作到基板上,大大降低了成本。
为检测阵列基板制作过程中的不良缺陷,现有的阵列基板中往往在阵列基板的周边区域设置两个短路环,分别为第一短路环和第二短路环,第一短路环与源漏极位于同一层,并由制作数据线的数据金属制作,与奇数序列数据线连接,第二检测短路环与栅极位于同一层,并由制作栅极的栅极金属制作,然后通过过孔与偶数序列数据线连接。
在现有技术中使用铜作为栅极金属的阵列基板的制作工艺中,由于铜具有活性强、易氧化的性质,在制作栅极金属上方的第一绝缘层时,往往需要300℃以上的高温,温度升高后,铜表面易被氧化;在进行钝化层沉积后,会使用大功率等离子体进行干法刻蚀,这样会使铜表面进一步遭到轰击;并且在栅极金属与透明电极接触后的制作工艺中存在高温退火,高温退火易使过孔边缘的透明电极被氧化腐蚀,产生信号断裂。图1所示为目前铜作为栅极金属的阵列基板的制作工艺中过孔处存在的问题。
发明内容
本发明提供了一种阵列基板、显示面板及阵列基板的制造方法,用以提高阵列基板上连接短路环的过孔处的信号传导的可靠性。
本发明实施例提供了一种阵列基板,包括交叉设置的一组数据线和一组栅线,以及位于所述阵列基板周边区域的第一短路环和第二短路环,所述第一短路环与所述一组数据线同层设置,所述第二短路环与所述一组栅线同层设置;所述一组数据线中,相邻的两根所述数据线分别连接所述第一短路环和所述第二短路环,所述第二短路环与对应的所述数据线的连接结构包括:
位于衬底基板之上的第一透明电极;
位于所述第一透明电极之上的栅连接线;
位于所述第一透明电极和所述栅连接线之上的第一绝缘层,与第二短路环连接的数据线位于所述第一绝缘层之上;
位于所述与第二短路环连接的数据线之上的第二绝缘层,所述第二绝缘层在所述与第二短路环连接的数据线上方具有第一过孔;所述第一绝缘层和所述第二绝缘层在所述第一透明电极的上方具有第二过孔;
位于所述第二绝缘层之上的第二透明电极,所述第二透明电极通过所述第一过孔与所述与第二短路环连接的数据线连接,并通过所述第二过孔与所述第一透明电极连接。
在本发明实施例的技术方案中,栅连接线位于第一透明电极之上,两者的接触面积较大,导电连接较为可靠;第二过孔通向第一透明电极,而非通向栅连接线,因此,在制作第二过孔时,栅连接线所受影响较小;第二透明电极通过第二过孔与所述第一透明电极连接,而不是直接与栅连接线连接,因此,阵列基板在制作时,该过孔处的金属不易被氧化,从而大大提高了阵列基板上连接短路环的过孔处信号传导的可靠性。
可选的,所述第一短路环连接奇数序列的所述数据线,所述第二短路环连接偶数序列的所述数据线;或者所述第一短路环连接偶数序列的所述数据线,所述第二短路环连接奇数序列的所述数据线。
在本发明实施例的技术方案中,对第一短路环和第二短路环分别施加不同电压可以检测阵列基板的显示区域是否存在线不良缺陷,如短接缺陷、断接缺陷等。
优选的,所述阵列基板为高级超维场转换模式阵列基板,所述第一透明电极与所述阵列基板的板状电极同层设置,所述第二透明电极与所述阵列基板的狭缝状电极同层设置。
本发明实施例还提供了一种显示面板,包括前述任一技术方案所述的阵列基板。该显示面板的阵列基板上连接短路环的过孔处的信号线接触可靠,因此,信号传导可靠。
本发明实施例还提供了一种阵列基板的制作方法,包括如下步骤:
在衬底基板之上形成第一透明电极、栅连接线和第二短路环,其中,所述栅连接线位于所述第一透明电极之上,栅连接线与第二短路环连接,且栅连接线与第一透明电极上表面搭接;
在所述栅连接线和所述第二短路环的层结构之上形成第一绝缘层;
在所述第一绝缘层之上形成数据线和第一短路环,其中奇数序列的所述数据线或偶数序列的所述数据线连接所述第一短路环;
在所述数据线和所述第一短路环的层结构之上形成第二绝缘层,所述第二绝缘层在未与所述第一短路环连接的所述数据线上方具有第一过孔;所述第一绝缘层和所述第二绝缘层在所述第一透明电极的上方具有第二过孔;
在所述第二绝缘层之上形成第二透明电极,所述第二透明电极通过所述第一过孔与对应的所述数据线连接,通过所述第二过孔与所述第一透明电极连接。
在本发明实施例的技术方案中,栅连接线位于第一透明电极之上,两者的接触面积较大,导电连接较为可靠;第二过孔通向第一透明电极,而非通向栅连接线,因此,在制作第二过孔时,栅连接线所受影响较小;第二透明电极通过第二过孔与所述第一透明电极连接,而不是直接与栅连接线连接,因此,阵列基板在制作时,该过孔处的金属不易被氧化,从而大大提高了阵列基板上连接短路环的过孔处信号传导的可靠性。
优选的,所述方法还包括:
在形成所述第一透明电极时,形成与所述第一透明电极同层设置的板状电极;
在形成所述栅连接线和所述第二短路环时,形成与所述栅连接线和所述第二短路环同层设置的栅线;
在形成所述第一绝缘层之后,在所述第一绝缘层之上形成半导体层;
在形成所述第二透明电极时,形成与所述第二透明电极同层设置的狭缝状电极。
优选的,在所述衬底基板之上形成所述第一透明电极、所述栅连接线和所述第二短路环,包括:通过半掩模构图工艺形成所述第一透明电极、所述栅连接线和所述第二短路环。
在本发明实施例的技术方案中,通过一次半掩模构图工艺即可将第一透明电极和栅连接线两层金属制作到衬底基板上,制作成本较低。
优选的,在所述第一绝缘层之上形成所述半导体层、所述数据线和所述第一短路环,包括:通过半掩模构图工艺形成所述半导体层、所述数据线和所述第一短路环。
在本发明实施例的技术方案中,通过一次半掩模构图工艺即可将半导体层和数据线制作到第一绝缘层上,制作成本较低。
附图说明
图1为本发明实施例阵列基板的周边区域的俯视结构示意图;
图2为图1中A-A向剖视截面结构示意图;
图3为本发明实施例的阵列基板的制造方法流程示意图。
附图标记:
1-第一短路环;
2-第二短路环;
3、3a、3b-数据线;
4-栅连接线;
5-衬底基板;
6-第一透明电极;
7-第一绝缘层;
8-第二绝缘层;
9-第二透明电极;
10-第一过孔;
11-第二过孔。
具体实施方式
为了提高阵列基板上连接短路环的过孔处的信号传导的可靠性,本发明实施例提供了一种阵列基板、显示面板及阵列基板的制造方法。为使本发明的目的、技术方案和优点更加清楚,以下举实施例对本发明作进一步详细说明。
如图1和图2所示,本发明实施例提供的阵列基板,包括交叉设置的一组数据线3和一组栅线,以及位于阵列基板周边区域的第一短路环1和第二短路环2,第一短路环1与一组数据线3同层设置,第二短路环2与一组栅线同层设置;一组数据线3中,相邻的两根数据线3a、3b分别连接第一短路环1和第二短路环2,第二短路环2与数据线3b的连接结构包括:
位于衬底基板5之上的第一透明电极6;
位于第一透明电极6之上的栅连接线4;
位于第一透明电极6和栅连接线4之上的第一绝缘层7,数据线3b位于第一绝缘层7之上;
位于数据线3b之上的第二绝缘层8,所述第二绝缘层8在数据线3b上方具有第一过孔10;所述第一绝缘层7和第二绝缘层8在所述第一透明电极6的上方具有第二过孔11;
位于第二绝缘层8之上的第二透明电极9,第二透明电极9通过第一过孔10与数据线3b连接,并通过第二过孔11与第一透明电极6连接。
在本发明实施例中,采用第一透明电极6作为连接栅连接线4与第二透明电极9之间的转接结构,可以明显改善阵列基板上连接短路环的过孔处的信号线接触不良,原因如下:栅连接线4位于第一透明电极6之上,两者的接触面积较大,导电连接较为可靠;第二过孔11通向第一透明电极6,而非通向栅连接线4,因此,在使用大功率等离子体进行干法刻蚀制作第二过孔11时,此种结构使栅连接线4表面受到的侵蚀影响较小;第二透明电极9通过第二过孔11与第一透明电极6连接,而不是直接与栅连接线4连接,因此,阵列基板在制作时,该过孔处的金属不易被氧化,从而大大提高了阵列基板上连接短路环的过孔处的信号传导的可靠性。
如图1所示,第一短路环1连接奇数序列的数据线3a,第二短路环2连接偶数序列的数据线3b。在本发明其它实施例中,第一短路环1可以连接偶数序列的数据线,第二短路环2可以连接奇数序列的数据线。
在本发明实施例中,对第一短路环1和第二短路环2的信号载入端子分别施加不同电压可以检测阵列基板的显示区域是否存在线不良缺陷,如短接缺陷、断接缺陷等。若是断接不良,断线发生位置以下的电压信号会显著降低,检测设备通过测试探头感知电压变化,从而实现检出;若是短接不良,由于相邻两根数据线之间加载的电压信号不同,发生短接后,相邻两根数据线的电压信号受到影响,检测设备通过测试探头感知到短接点,从而实现短接不良的检出。
在本发明实施例中,阵列基板可以为高级超维场转换模式阵列基板,高级超维场转换模式的显示面板具有高分辨率、高透过率、低功耗、宽视角、高开口率、低色差、无挤压水波纹等优点。在该实施例中,第一透明电极6与阵列基板的板状电极同层设置,第二透明电极9与阵列基板的狭缝状电极同层设置,这样可以使阵列基板的制作成本较低。图1和图2为本发明实施例阵列基板的周边区域的结构示意图,显示区域的板状电极和狭缝状电极在图1和图2中未示出。
值得一提的是,阵列基板的具体类型不限于上述高级超维场转换模式阵列基板,例如还可以为扭曲向列模式阵列基板、垂直取向模式阵列基板,等等。
本发明实施例还提供了一种显示面板,包括前述任一实施例的阵列基板。该显示面板的阵列基板上连接短路环的过孔处的信号线接触可靠,因此,信号传导可靠。
如图3所示,本发明实施例还提供了一种阵列基板的制作方法,包括如下步骤:
步骤101、在衬底基板之上形成第一透明电极、栅连接线和第二短路环,其中,栅连接线位于第一透明电极之上,栅连接线与第二短路环连接,且栅连接线与第一透明电极上表面搭接;
步骤102、在栅连接线和第二短路环的层结构之上形成第一绝缘层;
步骤103、在第一绝缘层之上形成数据线和第一短路环,其中奇数序列的数据线或偶数序列的数据线连接第一短路环;
步骤104、在数据线和第一短路环的层结构之上形成第二绝缘层,第二绝缘层在未与第一短路环连接的数据线上方具有第一过孔;第一绝缘层和第二绝缘层在第一透明电极的上方具有第二过孔;
步骤105、在第二绝缘层之上形成第二透明电极,第二透明电极通过第一过孔与对应的数据线连接,通过第二过孔与第一透明电极连接。
在本发明实施例中,采用第一透明电极作为连接栅连接线与第二透明电极之间的转接结构,可以明显改善阵列基板上连接短路环的过孔处的信号线接触不良,原因如下:栅连接线包括位于第一透明电极之上,两者的接触面积较大,导电连接较为可靠;第二过孔通向第一透明电极,而非通向栅连接线,因此,在使用大功率等离子体进行干法刻蚀制作第二过孔时,此种结构使栅连接线表面受到的侵蚀影响较小;第二透明电极通过第二过孔与第一透明电极连接,而不是直接与栅连接线连接,因此,阵列基板在制作时,该过孔处的金属不易被氧化,从而大大提高了阵列基板上连接短路环的过孔处的信号传导的可靠性。
在本发明一实施例中,阵列基板的制作方法还包括:
在形成第一透明电极时,在阵列基板的显示区域形成与第一透明电极同层设置的板状电极;
在形成栅连接线和第二短路环时,在阵列基板的显示区域形成与栅连接线和第二短路环同层设置的栅线;
在形成第一绝缘层之后,在阵列基板的显示区域在第一绝缘层之上形成半导体层;
在形成第二透明电极时,在阵列基板的显示区域形成与第二透明电极同层设置的狭缝状电极。
在上述实施例中,步骤101可包括:通过半掩模构图工艺形成第一透明电极、栅连接线和第二短路环。
具体的,步骤101可包括如下子步骤:
在衬底基板之上采用物理气相淀积的方式依次沉积第一透明导电薄膜、栅极金属层;
在完成上述步骤的衬底基板上涂覆一层正性光刻胶;
使用设计的具有全透光区、半透光区和不透光区结构的掩模板对基板进行曝光,其中,掩模板的全透光区对应的光刻胶全部曝光,半透光区对应的光刻胶部分曝光,不透光区对应的光刻胶未被曝光;
对完成上述步骤的基板进行显影,完全曝光的区域光刻胶溶解并去除,部分曝光的区域光刻胶部分溶解并去除,未曝光区域光刻胶保留,成为保护掩模;
对完成上述步骤的基板进行刻蚀,完全曝光区域刻蚀后露出衬底基板,此时第一透明电极的图形形成,该步骤中与第一透明电极同层的板状电极的图形也可一并形成;
对完成上述步骤的基板通过灰化工艺去除部分曝光区域残留的部分光刻胶,暴露出该区域的栅极金属层,对该栅极金属层进行刻蚀,至暴露出第一透明电极和板状电极;
将完成上述步骤的基板上的残余光刻胶剥离,暴露出栅连接线和第二短路环。
在本发明实施例中,通过一次半掩模构图工艺即可将第一透明电极和栅连接线两层金属制作到衬底基板上,制作成本较低。
在本发明的上述实施例中,步骤103可包括:通过半掩模构图工艺形成半导体层、数据线和第一短路环。
具体的,步骤103可包括如下子步骤:
在完成上述步骤102的基板上依次采用采用化学气相淀积的方式沉积第一绝缘层、采用化学气相淀积的方式沉积半导体层薄膜和采用物理气相淀积的方式沉积数据金属层;
在完成上述步骤的基板上涂覆一层正性光刻胶;
使用设计的具有全透光区、半透光区和不透光区结构的掩模板对基板进行曝光,其中,掩模板的全透光区对应的光刻胶全部曝光,半透光区对应的光刻胶部分曝光,不透光区对应的光刻胶未被曝光;
对完成上述步骤的基板进行显影,完全曝光的区域光刻胶溶解并去除,部分曝光的区域光刻胶部分溶解并去除,未曝光区域光刻胶保留,成为保护掩模;
对完成上述步骤的基板进行刻蚀,完全曝光区域刻蚀后露出第一绝缘层;
对完成上述步骤的基板通过灰化工艺去除部分曝光区域残留的部分光刻胶,暴露出该区域的数据金属层,对该数据金属层进行刻蚀,至暴露出半导体层;
将完成上述步骤的基板上的残余光刻胶剥离,暴露出数据线和位于阵列基板周边区域的第一短路环。
在本发明实施例中,通过一次半掩模构图工艺即可将数据线和位于阵列基板显示区域的半导体层制作到第一绝缘层上,制作成本较低。
显然,本领域的技术人员可以对本发明进行各种改动和变型而不脱离本发明的精神和范围。这样,倘若本发明的这些修改和变型属于本发明权利要求及其等同技术的范围之内,则本发明也意图包含这些改动和变型在内。
Claims (8)
1.一种阵列基板,包括交叉设置的一组数据线和一组栅线,以及位于所述阵列基板周边区域的第一短路环和第二短路环,所述第一短路环与所述一组数据线同层设置,所述第二短路环与所述一组栅线同层设置;所述一组数据线中,相邻的两根所述数据线分别连接所述第一短路环和所述第二短路环,其特征在于,所述第二短路环与对应的所述数据线的连接结构包括:
位于衬底基板之上的第一透明电极;
位于所述第一透明电极之上的栅连接线;
位于所述第一透明电极和所述栅连接线之上的第一绝缘层,与第二短路环连接的数据线位于所述第一绝缘层之上;
位于所述与第二短路环连接的数据线之上的第二绝缘层,所述第二绝缘层在所述与第二短路环连接的数据线上方具有第一过孔;所述第一绝缘层和所述第二绝缘层在所述第一透明电极的上方具有第二过孔;
位于所述第二绝缘层之上的第二透明电极,所述第二透明电极通过所述第一过孔与所述与第二短路环连接的数据线连接,并通过所述第二过孔与所述第一透明电极连接。
2.如权利要求1所述的阵列基板,其特征在于,所述第一短路环连接奇数序列的所述数据线,所述第二短路环连接偶数序列的所述数据线;或者
所述第一短路环连接偶数序列的所述数据线,所述第二短路环连接奇数序列的所述数据线。
3.如权利要求1或2所述的阵列基板,其特征在于,所述阵列基板为高级超维场转换模式阵列基板,所述第一透明电极与所述阵列基板的板状电极同层设置,所述第二透明电极与所述阵列基板的狭缝状电极同层设置。
4.一种显示面板,其特征在于,包括如权利要求1~3任一项所述的阵列基板。
5.一种阵列基板的制作方法,其特征在于,包括如下步骤:
在衬底基板之上形成第一透明电极、栅连接线和第二短路环,其中,所述栅连接线位于所述第一透明电极之上,栅连接线与第二短路环连接,且栅连接线与第一透明电极上表面搭接;
在所述栅连接线和所述第二短路环的层结构之上形成第一绝缘层;
在所述第一绝缘层之上形成数据线和第一短路环,其中奇数序列的所述数据线或偶数序列的所述数据线连接所述第一短路环;
在所述数据线和所述第一短路环的层结构之上形成第二绝缘层,所述第二绝缘层在未与所述第一短路环连接的所述数据线上方具有第一过孔;所述第一绝缘层和所述第二绝缘层在所述第一透明电极的上方具有第二过孔;
在所述第二绝缘层之上形成第二透明电极,所述第二透明电极通过所述第一过孔与对应的所述数据线连接,通过所述第二过孔与所述第一透明电极连接。
6.如权利要求5所述的方法,其特征在于,所述方法还包括:
在形成所述第一透明电极时,形成与所述第一透明电极同层设置的板状电极;
在形成所述栅连接线和所述第二短路环时,形成与所述栅连接线和所述第二短路环同层设置的栅线;
在形成所述第一绝缘层之后,在所述第一绝缘层之上形成半导体层;
在形成所述第二透明电极时,形成与所述第二透明电极同层设置的狭缝状电极。
7.如权利要求6所述的方法,其特征在于,在所述衬底基板之上形成所述第一透明电极、所述栅连接线和所述第二短路环,包括:
通过半掩模构图工艺形成所述第一透明电极、所述栅连接线和所述第二短路环。
8.如权利要求6所述的方法,其特征在于,在所述第一绝缘层之上形成所述半导体层、所述数据线和所述第一短路环,包括:
通过半掩模构图工艺形成所述半导体层、所述数据线和所述第一短路环。
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