CN104871308B - 用于制造电子组件的方法 - Google Patents

用于制造电子组件的方法 Download PDF

Info

Publication number
CN104871308B
CN104871308B CN201380067353.7A CN201380067353A CN104871308B CN 104871308 B CN104871308 B CN 104871308B CN 201380067353 A CN201380067353 A CN 201380067353A CN 104871308 B CN104871308 B CN 104871308B
Authority
CN
China
Prior art keywords
electronic structure
structure element
encapsulating material
electronic
building brick
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201380067353.7A
Other languages
English (en)
Other versions
CN104871308A (zh
Inventor
L·比布里歇尔
M·舒尔迈斯特
J·席林格
D·胡贝尔
T·菲舍尔
S·甘特奈尔
W·鲍穆格
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Continental Teves AG and Co OHG
Original Assignee
Continental Teves AG and Co OHG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Continental Teves AG and Co OHG filed Critical Continental Teves AG and Co OHG
Publication of CN104871308A publication Critical patent/CN104871308A/zh
Application granted granted Critical
Publication of CN104871308B publication Critical patent/CN104871308B/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3135—Double encapsulation or coating and encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/562—Protection against mechanical damage
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
    • H05K1/186—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit manufactured by mounting on or connecting to patterned circuits before or during embedding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H01L2924/143—Digital devices
    • H01L2924/1433—Application-specific integrated circuit [ASIC]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/146—Mixed devices
    • H01L2924/1461—MEMS
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49147—Assembling terminal to base

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Health & Medical Sciences (AREA)
  • Electromagnetism (AREA)
  • Toxicology (AREA)
  • Micromachines (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)

Abstract

本发明涉及一种用于制造电子组件(14)的方法，在该电子组件中，承载在一布线载体(32)上的电子结构元件(26，30)用封装材料(38)进行封装，该方法包括：‑在所述布线载体(32)上这样设置所述电子结构元件(26，30)，使得通过所述封装材料(38)引入到所述电子结构元件(26，30)上的应力低于一预先规定的值，和‑用所述封装材料(38)封装所述电子结构元件(26，30)。

Description

用于制造电子组件的方法
技术领域
本发明涉及一种用于制造电子组件的方法和一种电子组件。
背景技术
由DE 10 2007 060 931A1已知一种具有被封装的电子结构元件的电子组件(在该文献中称为封装结构)，该电子结构元件保持在呈具有电路的印刷电路板形式的基底上并通过结合线与电路连接。具有电子结构元件的基底固定在一壳体中，该壳体用一种埋封材料浇注。该被浇注的壳体利用用作屏蔽件的盖件进行封闭。
发明内容
本发明的目的在于，改善已知的电子组件。
该目的通过独立权利要求的特征得以实现。优选改进方案是从属权利要求的主题。
根据本发明的一个方面涉及一种用于制造电子组件的方法，在该电子组件中，承载在布线载体上的电子结构元件用封装材料进行封装，该方法包括下述步骤：在所述布线载体上这样设置所述电子结构元件，使得通过所述封装材料引入到所述电子结构元件上的应力低于一预先规定的值；以及用所述封装材料封装所述电子结构元件。
上述方法基于如下考虑，即：开头所述的电子组件在尺寸上是非常大的，这是由于所述电子结构元件首先要独立封装并且随后为了固定而必须用另一种材料埋封入一壳体中。相应地，该结构需要非常大的结构空间，由此开头所述类型的电子组件不适于用作空间紧缺的技术用途、例如表面贴装的结构元件(英语：surface-mounted device(表面贴装器件))，下面称为SMD。
与此相比，上述方法基于如下思想，即：将电子结构元件的埋封装置直接用作壳体，从而可以省去围绕所述埋封装置的额外壳体。这将显著减少用于整个电子组件的必需的结构空间。
但是这种思想基于如下认识，即：埋封装置必须具有一定的弹性和/或粘性，以避免将过高的机械应力引入到电子组件上和/或其电连接件例如结合线(或称为压接引线、压焊引线或键合引线)上，这是因为机械的应力引入可能电地和/或机械地损害电子组件和/或电连接件，并因此导致相应的功能障碍。
因此所述方法的思想在于：在准备待制造的电子组件时当确定其尺寸大小时考虑应力引入并且采取合适的预防措施，使得该应力引入保持为低于一个限值，在该限值时不再可以可靠地确保整个电子组件的功能。在确定电子组件的尺寸大小时可以如何考虑应力引入的示例在从属权利要求中得到阐述。
用于应力引入的预先规定的值在此可以直接或间接地在确定尺寸大小时得出。直接的预给定例如可以在模拟的范围内得以实现，其中直接预给定所述预先规定的值。间接的预给定例如可以借助一系列对比测试得以实现，在所述一系列对比测试的范围内预给定仅一个期望的结果、例如特定的故障安全性并且由该故障安全性然后隐含地得出所述预先规定的值。
在所述方法的一种改进方案中，所述封装材料所具有的热膨胀系数位于所述电子结构元件的热膨胀系数的范围内，从而该封装材料和以该封装材料封装的电子组件以相同的方式膨胀并因此相互间不会施加机械应力或仅施加最小的机械应力。
所述封装材料可以包括可硬化的树脂、特别是环氧树脂，从而电子结构元件的封装可以以本领域技术人员已知的方式借助传递模塑(英语：transfer molding(传递模塑))得以实施。
在所述方法的另一改进方案中，所述电子结构元件可以设置在所述布线载体的零点位置处，在该零点位置处所述封装材料的热运动抵消。通过这种方式同样可以减小应力引入。
在此，所述电子结构元件可以是用于对来自至少两个编码器元件(或称为发送器元件)的测量信号进行分析的分析电路，其中，所述至少两个编码器元件可以绕所述分析电路对称设置。通过这种方式随后可以基于已知的对称性考虑引入到编码器元件上的应力和与此相联系的可能的测量误差。
在所述方法的再一改进方案中，为用所述封装材料封装所述电子结构元件，选择一种封装几何结构，在该封装几何结构中所述封装材料的热运动至少在一个方向上低于一预先规定的值。这种几何结构可以以任意方式进行选择，其中，特别优选这样选择所述封装几何结构，使得在所述电子结构元件的至少一个壁部处所述封装材料的壁厚低于一预先规定的值，从而将通过所述壁部施加的机械应力保持限制在与这个预先规定的值有关的应力值上。
在又一改进方案中，所述方法包括如下步骤：在封装之前用一种机械去耦合材料包裹住所述电子结构元件。这种机械去耦合材料进一步减小引入到电子组件上的应力并因此减小该电子结构元件的机械应变。
在一种特别的改进方案中，所述机械去耦合材料至少是触变的。通过这种方式，所述机械去耦合材料能以简单的方式浇注在电子结构元件上，然而在浇注上的状态中具有足够的稳定性以完全包裹住所述电子结构元件。
在另外一种附加的改进方案中，所述布线载体包括用于使所述电子结构元件电接触印刷电路板的连接部和电屏蔽层，其中，所述方法包括如下步骤：在所述布线载体上这样设置所述电子结构元件，使得在所述电组件的至少一个方向上看，所述电子结构元件容纳在所述电屏蔽层和所述连接部之间。通过这种方式，所述布线载体同时可用于改善被称为EMV的电磁兼容性，而无需额外的电屏蔽层。
根据本发明的另一方面，一种电子组件包括承载在布线载体上的电子结构元件，该电子结构元件用封装材料进行封装，其中，所述电子结构元件这样设置在所述布线载体上，使得通过所述封装材料引入到所述电子结构元件上的应力低于一预先规定的值。
所述电子组件可以用在意义上对应于所述方法的从属权利要求的特征来扩展。
在所述电子组件的一种改进方案中，所述电子组件被构造为惯性传感器。
在此优选可以以所述方法制造所述电子组件。
根据本发明的另一方面，车辆包括一个所述电子组件，特别是用于检测行驶动力学数据。
附图说明
本发明的上述特性、特征和优点以及如何实现这些特性、特征和优点的方式方法可以结合下述对实施例的描述得到更清楚和更明确的理解，这些实施例结合附图更具体地阐述，其中：
图1示出具有一种行驶动力学控制设备的车辆的示意图，
图2示出图1的构造为SMD构件的惯性传感器的示意图，
图3示出图1的惯性传感器的中间产品的示意图，
图4示出图1的惯性传感器在印刷电路板上的示意图，以及
图5示出图1的惯性传感器的另一示意图。
附图中相同的技术元素标有相同的附图标记并且仅描述一次。
具体实施方式
图1示出一种具有本身已知的行驶动力学控制设备的车辆2的示意图。关于这种行驶动力学控制设备的细节例如可以参考DE 10 2011 080 789 A1。
车辆2包括底盘4和四个车轮6。每个车轮6可以通过一位置固定地固定在底盘4上的制动器8相对于底盘4减速，以便减慢车辆2在未进一步示出的道路上的运动。
在此，可以以本领域技术人员已知的方式发生：车辆2的车轮6失去其路面附着并且车辆2甚至由于转向不足或过度转向而运动离开例如通过未进一步示出的转向盘预给定的轨迹。这将通过本身已知的控制回路、例如ABS(防抱死系统)和ESP(电子稳定程序)得以避免。
在本实施形式中，车辆2为此具有车轮6处的转速传感器10，所述转速传感器检测车轮6的转速12。此外车辆2还具有惯性传感器14，该惯性传感器检测车辆2的行驶动力学数据16，由这些行驶动力学数据例如可以以本领域技术人员已知的方式输出俯仰角速度、侧倾角速度、横摆角速度、横向加速度、纵向加速度和/或垂直加速度。
基于所检测到的转速12和行驶动力学数据16，控制器18可以以本领域技术人员已知的方式确定：车辆2是否在车道上滑行或者甚至偏离了上述预给定的轨迹，并且相应地以已知的控制器输出信号20对此做出反应。控制器输出信号20然后可以由调整装置22使用，以便借助调整信号24触发调整元件/执行元件、例如制动器8，所述调整元件针对滑行和从所述预给定轨迹的偏离以已知的方式做出反应。
控制器18例如可以集成在车辆2的已知的发动机控制装置中。控制器18和调整装置22也可以构造成一个共同的调控单元并且可选地集成到之前说过的发动机控制装置中。
在图1中示出惯性传感器14作为控制器18外部的外部装置。在这样的情况下，人们会想到被构造为卫星装置的惯性传感器14。但是在本实施形式中，惯性传感器14应构建为SMD构件，由此其例如可以一起集成在控制器18的壳体中。
惯性传感器14包括至少一个微机电系统26(称为MEMS 26)作为测量检出元件，该测量检出元件以已知的方式将与行驶动力学数据16有关的、未进一步示出的信号通过结合线28输出给两个信号分析电路30，该信号分析电路呈特定用途集成电路30、即ASIC 30(英语：application-specific integrated circuit(特定用途集成电路))的形式。ASIC30然后可以基于接收到的、与行驶动力学数据16有关的信号而生成行驶动力学数据16。
MEMS 26和ASIC 30承载在印刷电路板32上并且与不同的、成型在印刷电路板32上的电导线34电触点接通。另选地，印刷电路板32也可以构造成引线框架，对此随后还要详细介绍。关于导线34，在图2中仅能看到唯一导线34的截面。触点接通在此可以直接地例如通过本身已知的倒装晶片连接结构来实现或者如图2所示通过结合线28实现。
MEMS 26和ASIC 30此外还可以由一种称为球顶地线36的机械去耦合材料36包裹住，这种球顶地线又可以与MEMS 26和ASIC 30一起封装在传递模塑材料38、例如环氧树脂38中。
传递模塑材料38由此单独已经可以用作惯性传感器14的壳体并且保护容纳在其中的电路部件。
最后在被构造为SMD构件的惯性传感器14处设置相应的可能的接触方案，如在图2中示出的用于与控制器18的开关电路电触点接通的焊珠40。然而另选地，如果基底被构造为已知的且在图3中示出的引线框架32，则被构造为SMD构件的惯性传感器14的可能的接触方案可以设计为已知的鸥翼式的焊接接头或J形引线焊接接头。
参照图3，可以借助图3阐述惯性传感器14的内部构造。为了表明惯性传感器14可以如何构造为SMD构件的各种可能性，在图3中取代作为可能的接触方案的焊珠40，形成有接触销40作为可能的接触方案。
在图3中，代替承载在作为布线载体的印刷电路板32上，MEMS 26和ASIC 30承载在作为布线载体的引线框架32上，在该引线框架上形成有接触销40，MEMS 26和ASIC 30通过这些接触销可以与之前提到的控制器18的开关电路电连接。在图3中为了清楚起见没有为所有接触销都标上附图标记。
MEMS 26和ASIC 30可以通过焊接、粘接和/或胶粘薄膜(如已知的DAF胶带)固定在引线框架32上。在此，电触点接通可以通过所述固定和/或通过结合线28(为了清楚起见没有为其都标上附图标记)实现。
在本实施形式中，替代地或附加地，可以将另一MEMS 26承载在ASIC 30上，该另一MEMS要么可以同样用作检测行驶动力学数据16的编码器元件，要么可以用作例如检测温度或另一物理参量的替代的编码器元件。在这个引线框架上也能以未示出的方式连接其它的电结构元件、例如被动结构元件。
向图3的图像平面内观察，ASIC 30和MEMS 26可以承载在金属层46上，该金属层用作电屏蔽层46并且因此提高了融合传感器(或称为联合传感器)14的EMV。通过这种方式，融合传感器14的EMV通过使整个电子组件在一侧承载在图4中示出的印刷电路板48上而在另一侧承载在电屏蔽层46上而得到改善。
为了用上面提到的去耦合材料36包裹住ASIC 30和MEMS 26和/或为了用传递模塑材料38封装ASIC 30和MEMS 26，在引线框架32上形成有凸耳50，引线框架32可以在包裹和/或封装过程期间被机械地固定保持在所述凸耳上。
因为凸耳50显现为引线框架32穿过传递模塑材料38伸到外侧的穿透部，所以该凸耳为湿气提供了通到ASIC 30和MEMS 26的通径。为了削弱这种湿气侵入，在凸耳50上形成有空隙部51，该空隙部减小了之前所述的、引线框架32穿过传递模塑材料38伸到外侧的穿透部的横截面。同时，传递模塑材料38和进而对ASIC 30和MEMS 26的封装进一步锚固在空隙部51中。
在此，各个接触销40具有锚固元件，这些锚固元件在本实施形式中例如构造为缺口52，接触销40在所述缺口处逐渐变细。在图3中为了清楚起见没有为所有这些缺口都标上附图标记。缺口52可以由传递模塑材料38环绕，以阻止接触销40随后从传递模塑材料38中移出。
此外，示例性构造为缺口52的锚固元件还限制了接触销40由于在传递模塑材料38内部的热膨胀、振动等而出现的运动，这可以例如通过以这种方式形成的剪切力阻止对结合线28及其在接触销40处的电连接部的损伤。
完成了制造的融合传感器14在图4中示出为承载在印刷电路板48上，在该印刷电路板上可以以未进一步示出的方式连接控制器18。
从引线框架32看在扣除了ASIC 30和MEMS 26的体积的条件下，示例性构造为封装材料的传递模塑材料38的体积在顶侧54和底侧56上应该是相等的或者彼此相差最大30％(如图5所示)。通过这种方式实现了不相同的缩减和减小的弯曲，这可以使被灌注的传递模塑材料38的内应力保持较低并因此进一步减小或者甚至避免ASIC 30和MEMS 26以及结合线的机械负荷。
为了确保在制造融合传感器14时在模具中的脱模，脱模斜角58应该构造为至少5°，在图5中为了清楚起见仅有一个脱模斜角标有附图标记。

Claims (9)

1.一种用于制造电子组件(14)的方法，在该电子组件中，承载在一布线载体(32)上的电子结构元件(26，30)用封装材料(38)进行封装，该方法包括：
-在所述布线载体(32)上这样布置所述电子结构元件(26，30)，使得通过所述封装材料(38)引入到所述电子结构元件(26，30)上的应力低于一预先规定的值，和
-用所述封装材料(38)封装所述电子结构元件(26，30),
其中，所述电子结构元件(26，30)设置在所述布线载体(32)的零点位置处，在该零点位置处所述封装材料(38)的热运动抵消；并且
其中，所述电子结构元件(26，30)是用于分析来自至少两个编码器元件的测量信号的分析电路，所述至少两个编码器元件绕所述分析电路对称布置。
2.根据权利要求1的方法，其中，所述封装材料(38)的热膨胀系数位于所述电子结构元件(26，30)的热膨胀系数的范围内。
3.根据权利要求2的方法，其中，所述封装材料包括可硬化的树脂。
4.根据权利要求3的方法，其中，所述封装材料包括环氧树脂。
5.根据前述权利要求1-3之一的方法，其中，为用所述封装材料(38)封装所述电子结构元件(26，30)，封装几何结构选择成使得所述封装材料(38)的热运动至少在一个方向上低于一预先规定的值。
6.根据权利要求5的方法，其中，所述封装几何结构选择成，使得所述封装材料(38)在所述电子结构元件(26，30)的至少一个壁部处的壁厚低于一预先规定的值。
7.根据前述权利要求1-3之一的方法，包括以下步骤：在封装之前用机械去耦合层(36)包裹住所述电子结构元件(26，30)。
8.根据前述权利要求1-3之一的方法，其中，所述布线载体(32)包括一用于使所述电子结构元件(26，30)与印刷电路板(50)电接触的连接部(40)和一电屏蔽层(46)，该方法包括以下步骤：在所述布线载体(32)上这样设置所述电子结构元件(26，30)，使得所述电子结构元件(26，30)在所述电子组件(14)的至少一个方向上看容纳在所述电屏蔽层(32)与所述连接部(40)之间。
9.一种电子组件(14)，该电子组件以根据前述权利要求之一的方法制造而成，该电子组件包括：
-承载在一布线载体(32)上的电子结构元件(26，30)，该电子结构元件用封装材料(38)进行封装，
-其中，所述电子结构元件(26，30)这样设置在所述布线载体(32)上，使得通过所述封装材料(38)引入到所述电子结构元件(26，30)上的应力低于一预先规定的值。
CN201380067353.7A 2012-12-20 2013-12-10 用于制造电子组件的方法 Expired - Fee Related CN104871308B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE102012223982.0A DE102012223982A1 (de) 2012-12-20 2012-12-20 Verfahren zum Herstellen einer elektronischen Baugruppe
DE102012223982.0 2012-12-20
PCT/EP2013/076134 WO2014095500A1 (de) 2012-12-20 2013-12-10 Verfahren zum herstellen einer elektronischen baugruppe

Publications (2)

Publication Number Publication Date
CN104871308A CN104871308A (zh) 2015-08-26
CN104871308B true CN104871308B (zh) 2018-08-07

Family

ID=49880704

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201380067353.7A Expired - Fee Related CN104871308B (zh) 2012-12-20 2013-12-10 用于制造电子组件的方法

Country Status (7)

Country Link
US (1) US9961779B2 (zh)
EP (1) EP2936553A1 (zh)
JP (1) JP2016504769A (zh)
KR (1) KR20150097628A (zh)
CN (1) CN104871308B (zh)
DE (1) DE102012223982A1 (zh)
WO (1) WO2014095500A1 (zh)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN203416415U (zh) * 2013-08-15 2014-01-29 山东共达电声股份有限公司 指向性mems传声器
DE102013224645A1 (de) * 2013-11-29 2015-06-03 Continental Teves Ag & Co. Ohg Verfahren zum Herstellen einer elektronischen Baugruppe
DE102014210523A1 (de) * 2014-06-03 2015-12-03 Continental Teves Ag & Co. Ohg Spannungsarmes Verkleben von Sensorchips
DE102014213217A1 (de) 2014-07-08 2016-01-14 Continental Teves Ag & Co. Ohg Körperschallentkopplung an mit Geberfeldern arbeitenden Sensoren
DE102014213218A1 (de) * 2014-07-08 2016-02-18 Continental Teves Ag & Co. Ohg Sensor mit Opferanode
DE102014213588A1 (de) * 2014-07-11 2016-02-18 Continental Teves Ag & Co. Ohg Kundenspezifischer Sensor hergestellt durch Dreifach-Molden
DE102016207664A1 (de) 2016-05-03 2017-11-09 Continental Teves Ag & Co. Ohg Sensorelement für ein kraftfahrzeug
US20210043466A1 (en) * 2019-08-06 2021-02-11 Texas Instruments Incorporated Universal semiconductor package molds

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0515094A1 (en) * 1991-05-23 1992-11-25 AT&T Corp. Molded circuit package
CN1561574A (zh) * 2001-09-28 2005-01-05 埃普科斯股份有限公司 封装电构件的方法和由此封装的表面波构件
CN101616864A (zh) * 2006-12-21 2009-12-30 大陆-特韦斯贸易合伙股份公司及两合公司 封装模块、该封装模块的制造方法及应用
DE102008043773A1 (de) * 2008-11-17 2010-05-20 Robert Bosch Gmbh Elektrisches und/oder mikromechanisches Bauelement und Verfahren zur Herstellung eines elektrischen und/oder mikromechanischen Bauelements
EP2339627A1 (en) * 2009-12-24 2011-06-29 Imec Window interposed die packaging
CN102576682A (zh) * 2009-10-09 2012-07-11 丰田自动车株式会社 半导体装置的制造方法

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2546125B2 (ja) 1993-03-02 1996-10-23 日本電気株式会社 半導体装置
JP3940298B2 (ja) 2002-02-08 2007-07-04 インターナショナル・ビジネス・マシーンズ・コーポレーション 半導体装置及びその半導体装置の製造方法
US7352070B2 (en) * 2003-06-27 2008-04-01 Delphi Technologies, Inc. Polymer encapsulated electrical devices
DE10330739A1 (de) 2003-07-07 2004-09-23 Infineon Technologies Ag Mikroelektromechanisches Modul mit Sensor und Gehäuse sowie Verfahren zur Herstellung derselben
EP1659386A4 (en) 2003-08-26 2007-08-29 Matsushita Electric Works Ltd SENSOR DEVICE
US7608789B2 (en) 2004-08-12 2009-10-27 Epcos Ag Component arrangement provided with a carrier substrate
JP4821537B2 (ja) 2006-09-26 2011-11-24 株式会社デンソー 電子制御装置
JP2008258478A (ja) * 2007-04-06 2008-10-23 Murata Mfg Co Ltd 電子部品装置およびその製造方法
DE102007025992A1 (de) * 2007-06-04 2008-12-11 Epcos Ag Verfahren zur Herstellung eines MEMS-Packages
JP2009226571A (ja) * 2008-02-28 2009-10-08 Nippon Kayaku Co Ltd マイクロデバイス及びその製造方法
JP5415823B2 (ja) * 2008-05-16 2014-02-12 株式会社デンソー 電子回路装置及びその製造方法
JP2010080901A (ja) 2008-08-28 2010-04-08 Kyocera Corp 電子部品モジュール
US8021930B2 (en) 2009-08-12 2011-09-20 Stats Chippac, Ltd. Semiconductor device and method of forming dam material around periphery of die to reduce warpage
WO2012020069A1 (de) 2010-08-10 2012-02-16 Continental Teves Ag & Co. Ohg Verfahren und system zur regelung der fahrstabilität
US9082707B2 (en) 2010-11-25 2015-07-14 Mitsubshi Electric Corporation Semiconductor device and method for manufacturing semiconductor device

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0515094A1 (en) * 1991-05-23 1992-11-25 AT&T Corp. Molded circuit package
CN1561574A (zh) * 2001-09-28 2005-01-05 埃普科斯股份有限公司 封装电构件的方法和由此封装的表面波构件
CN101616864A (zh) * 2006-12-21 2009-12-30 大陆-特韦斯贸易合伙股份公司及两合公司 封装模块、该封装模块的制造方法及应用
DE102008043773A1 (de) * 2008-11-17 2010-05-20 Robert Bosch Gmbh Elektrisches und/oder mikromechanisches Bauelement und Verfahren zur Herstellung eines elektrischen und/oder mikromechanischen Bauelements
CN102576682A (zh) * 2009-10-09 2012-07-11 丰田自动车株式会社 半导体装置的制造方法
EP2339627A1 (en) * 2009-12-24 2011-06-29 Imec Window interposed die packaging

Also Published As

Publication number Publication date
JP2016504769A (ja) 2016-02-12
KR20150097628A (ko) 2015-08-26
WO2014095500A1 (de) 2014-06-26
EP2936553A1 (de) 2015-10-28
DE102012223982A1 (de) 2014-06-26
CN104871308A (zh) 2015-08-26
US20150351252A1 (en) 2015-12-03
US9961779B2 (en) 2018-05-01

Similar Documents

Publication Publication Date Title
CN104871308B (zh) 用于制造电子组件的方法
US10953578B2 (en) Sensor production by holding the intermediate injection-molded part
EP2680304B1 (en) Film-assist molded gel-fill cavity package with overflow reservoir
CN104508816B (zh) 用于为电子装置布线的布线设备
US20160159642A1 (en) Stress isolated mems device with asic as cap
EP2090873B1 (en) Integrated circuit package
US20160090298A1 (en) Packages for stress-sensitive device dies
CN104870947B (zh) 电子装置和用于制造电子装置的方法
US7836764B2 (en) Electrical device with covering
KR20080075108A (ko) 센서, 센서 구성 요소 및 센서 제조 방법
CN110031032B (zh) 传感器头和用于制造传感器头的方法
US9851370B2 (en) System including a sensor and an electrical cable
CN106662471B (zh) 在利用发射场工作的传感器上的固体声退耦
KR101930649B1 (ko) 희생 양극을 구비하는 센서
US9964603B2 (en) Tool for the primary shaping of a housing for a sensor
CN112499577A (zh) 封装结构、其制备方法和电子器件
DE102015206299B4 (de) Über Leiterplatte auf Leadframe verschaltete Sensorschaltung

Legal Events

Date Code Title Description
PB01 Publication
EXSB Decision made by sipo to initiate substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20180807

Termination date: 20201210

CF01 Termination of patent right due to non-payment of annual fee