CN104868881A - Relaxation oscillator with average voltage feedback - Google Patents
Relaxation oscillator with average voltage feedback Download PDFInfo
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- CN104868881A CN104868881A CN201510296581.2A CN201510296581A CN104868881A CN 104868881 A CN104868881 A CN 104868881A CN 201510296581 A CN201510296581 A CN 201510296581A CN 104868881 A CN104868881 A CN 104868881A
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Abstract
The invention provides a relaxation oscillator with average voltage feedback, comprising a two-capacitance relaxation oscillator unit and an average voltage generating circuit unit, wherein the two-capacitance relaxation oscillator unit comprises two current sources which are symmetrical with each other, two comparators, two charging and discharging capacitors, two transmission gates, two phase inverters and an S-R latch. The relaxation oscillator with average voltage feedback of the invention can be used for generating an adjustable threshold voltage for controlling overturn of a comparator by introducing a circuit of the average voltage feedback. When delay time of the comparator is added, the average value of a sawtooth voltage on the charging and discharging capacitor is added too. An average voltage generating circuit is used for adjusting the threshold voltage for overturning the comparator to reduce so that the comparator can be overturned in advance to hold the period of the oscillator not to be changed basically. Through this manner, the relaxation oscillator with average voltage feedback of the invention reduces the requirement of output frequency accuracy in a traditional relaxation oscillator to a response speed of the comparator and realizes closed-loop regulation to the output frequency of the oscillator with a comparator circuit with simple structure and the average voltage generating circuit.
Description
Technical field
The present invention relates to analog integrated circuit technology, be specifically related to a kind of relaxation oscillator with average voltage feedback-type topological structure.
Background technology
Relaxation oscillator often as running clock, is applied in Switch electronic equipment.Compare active or passive crystal oscillator, it is little that it has volume, simplicity of design, is convenient to the advantages such as integrated.But its performance such as voltage characteristic, temperature characterisitic is relatively poor.The circuit structure of common two capacitor relaxation oscillators as shown in Figure 1, produces two bursts of electric current I by two current sources
1and I
2, these two strands of electric currents are respectively alternately to two electric capacity C
1and C
2charge, the voltage on electric capacity and I
refthe reference voltage that resistance R produces is compared, as wherein electric capacity C
1after voltage reaches threshold value, comparator 1 overturns, and the output of the S-R latch of control connection also overturns, and makes electric capacity C
1repid discharge and electric capacity C
2start charging, at electric capacity C
2on voltage reach threshold value after, comparator 2 overturns, S-R latch control capacitance C
2repid discharge, and electric capacity C
1start charging, thus produce vibration output.The upset error of comparator is the main source of error affecting oscillator output frequencies precision, and particularly when the output frequency of oscillator is higher, the minimum delay that comparator increases or reduces also can cause appreciable impact to the frequency of output signal.For reducing this impact, conventional method is that the response speed by accelerating comparator realizes, but exacerbates again design difficulty and design cost like this.And the present invention produces by introducing average voltage the upper limit threshold that circuit controls sawtooth waveforms upset, reduce the requirement of output frequency precision to comparator response speed.
Summary of the invention
Object of the present invention, be exactly for above-mentioned common double electric capacity relaxation oscillator Problems existing, a kind of relaxation oscillator with average voltage feedback is proposed, introduce average voltage and produce the threshold voltage that circuit produces the control comparator upset that can regulate, regulate due to the comparator error that time of delay, change produced, and the comparator configuration used is simple, and comparator turn threshold can be low to moderate about 100mV.
Technical solution of the present invention is as follows:
A kind of relaxation oscillator with average voltage feedback, comprise two electric capacity relaxation oscillator unit and average voltage generating circuit unit, it is characterized in that: described two electric capacity relaxation oscillator unit comprise two symmetrical current sources, two comparators, two charge and discharge capacitances, two transmission gates, two inverters and a S-R latch; Described average voltage produces circuit unit and comprises active filter circuit and a current source that an amplifier and electric capacity forms and the generating circuit from reference voltage that an adjustable resistance is formed;
Described average voltage produces in circuit unit, the pressure drop that current source produces on adjustable resistance as the reference voltage, be input to the inverting input of amplifier in active filter circuit, the output of active filter circuit is connected to the positive input terminal of comparator in two capacitor relaxation pierce circuit;
In described two electric capacity relaxation oscillator unit, what adopt is the circuit structure of mutual symmetry, for half of circuit, the output of current source is connected to charge and discharge capacitance, charging current is provided to electric capacity, and the discharge and recharge of electric capacity is controlled by the output of R-S latch, the switch of the output of R-S latch controls transfer door simultaneously, voltage on charge and discharge capacitance is sent to the input of active filter circuit by timesharing, the average voltage that active filter circuit produces by comparator is compared with the voltage on charge and discharge capacitance, output a control signal to R-S latch, circuit structure half of is in addition same as above.
As optimal way, when the output frequency of described oscillator is stablized, the value of output frequency is only relevant with the capacitance of charge and discharge capacitance with the resistance of adjustable resistance.
As optimal way, the output frequency of described oscillator is: f
osc=K/ (4CR), wherein, f
oscfor the output frequency of described oscillator, C is the capacitance of charge and discharge capacitance, and R is the resistance of adjustable resistance, and K is proportionality coefficient.
As optimal way, described charge and discharge capacitance is intermetallic electric capacity, and adjustable resistance is made up of jointly polycrystalline resistor and diffusion resistance.
As optimal way, the current value of two current sources in described two electric capacity relaxation oscillator unit and a current source in average voltage generating circuit unit is equal, namely meets I
cs=I
cr=I
c, and by resistance control current source cell produce, specifically by NMOS tube MN1 and MN2, and PMOS MP1, MP2, MP3, MP4, MP5, MP6, MP7, MP8, resistance R1 and adjustable resistance R2 forms; The grid of PMOS MP1 and drain interconnection form node vbias, source electrode connects power supply, PMOS MP2 and MP3 grid meet vbias, source electrode connects power supply, the drain electrode of NMOS tube MN1 is connected with the drain electrode of PMOS MP2, form node V2, the drain electrode of NMOS tube MN2 is connected with the drain electrode of PMOS MP3, forms node V4; The grid leak short circuit of NMOS tube MN1, source electrode forms node V1, and V1 connecting resistance R1 is to ground, and the grid of NMOS tube MN2 meets V2, source electrode forms node V3, and V3 meets adjustable resistance R2 to ground; The grid of PMOS MP4 meets V4, and drain electrode meets V3, and source electrode connects power supply; From current reference source I
refthe electric current that mirror image is come adds that the electric current flowing through PMOS MP4 is as I
celectric current, I
cthe pressure drop that electric current produces on adjustable resistance R2 is as the negative input end input voltage of active filter circuit; Electric current on PMOS MP5 mirror image MP3, the electric current on PMOS MP6 mirror image MP4, two pipe drain electrodes connect together, generation current I
cs, the PMOS MP7 of same structure and MP8 generation current I
cr.
As optimal way, comparator circuit in described pair of electric capacity relaxation oscillator unit is made up of PMOS MP1 and NMOS tube MN1, the drain electrode of PMOS MP1 and NMOS tube MN1 is connected together as output Y, the source electrode of PMOS MP1 and NMOS tube MN1 connects VDD-to-VSS respectively, the grid of PMOS MP1 receives the output of active filter circuit, and the grid of NMOS tube MN1 connects the one end rushing electric capacity.
As optimal way, described average voltage produces the active filter circuit in circuit unit, by PMOS MP1, MP2, MP3, MP4, MP5, MP6, MP7, NMOS tube MN1, MN2, MN3, MN4, MN5, MN6, MN7 and electric capacity C forms, PMOS MP1, MP2 is as inputting pipe, signal is respectively the sawtooth voltage on the reference voltage of current source cell and charge and discharge capacitance that self-resistance controls, the drain electrode of PMOS MP4 connects the source electrode of MP1 and MP2, and for circuit provides bias current, and the electric current of PMOS MP4 comes as PMOS MP3, NMOS tube MN3, MN4 is from the mirror image of current reference unit, owing to adopting accordion structure, the source electrode of NMOS tube MN1 and the drain electrode of MN5 are received in the drain electrode of PMOS MP1, the source electrode of NMOS tube MN2 and the drain electrode of MN6 are received in the drain electrode of PMOS MP2, the source ground of NMOS tube MN5 and MN6, the drain electrode of NMOS tube MN1 and MN2 is linked together by the PMOS MP5 of current mirror form and PMOS MP6, carry out the output that both-end turns single-ended, the drain electrode of NMOS tube MN2 meets a filter capacitor C as output, and the simple bias circuit that the gate bias voltage of NMOS tube MN1 and MN2 pipe is made up of PMOS MP7 and NMOS tube MN7 obtains.
The invention has the beneficial effects as follows: the threshold voltage being produced the control comparator upset that can regulate by the circuit introducing average voltage feedback, when increasing the time of delay of comparator, the mean value of the sawtooth voltage on charge and discharge capacitance also increases, the threshold voltage that average voltage produces the upset of circuit adjustment comparator reduces, comparator is overturn in advance, keeps the cycle of oscillator substantially constant.In this way, reduce output frequency precision in traditional relaxation oscillator and, to the requirement of comparator response speed, realize the closed-loop adjustment to oscillator output frequencies with the simple comparator circuit of a kind of structure and average voltage generation circuit.
Accompanying drawing explanation
Fig. 1 is the circuit diagram of common two electric capacity relaxation oscillators;
Fig. 2 is the circuit diagram with average voltage feedback relaxation oscillator;
The two electric capacity relaxation oscillator cellular construction figure of Fig. 3 and each node waveform schematic diagram;
Fig. 4 is comparator circuit figure;
Fig. 5 is the current source cell structure chart that resistance controls;
Fig. 6 is the current source cell circuit diagram that resistance controls;
Fig. 7 is active filter circuit figure;
Fig. 8 is the comparison diagram of the temperature characterisitic of traditional relaxation oscillator and relaxation oscillator of the present invention.
Embodiment
Below by way of specific instantiation, embodiments of the present invention are described, those skilled in the art the content disclosed by this specification can understand other advantages of the present invention and effect easily.The present invention can also be implemented or be applied by embodiments different in addition, and the every details in this specification also can based on different viewpoints and application, carries out various modification or change not deviating under spirit of the present invention.
Below in conjunction with drawings and Examples, the specific embodiment of the present invention is described.
As shown in Figure 2, a kind of relaxation oscillator with average voltage feedback, comprise two electric capacity relaxation oscillator unit and average voltage generating circuit unit, it is characterized in that: described two electric capacity relaxation oscillator unit comprise two symmetrical current sources, two comparators, two charge and discharge capacitances, two transmission gates, two inverters and a S-R latch; Described average voltage produces circuit unit and comprises active filter circuit and a current source that an amplifier and electric capacity forms and the generating circuit from reference voltage that an adjustable resistance is formed;
Relaxation oscillator can be regarded as one and exports the voltage controlled oscillator controlled by active filter circuit.The average voltage including power filter produces circuit, and can adjust the turn threshold of comparator in real time according to the average voltage level on charging capacitor, even if change the time of delay of comparator like this, the output frequency of oscillator also can remain unchanged.
Described average voltage produces in circuit unit, the pressure drop that current source produces on adjustable resistance as the reference voltage, be input to the inverting input of amplifier in active filter circuit, the output of active filter circuit is connected to the positive input terminal of comparator in two capacitor relaxation pierce circuit;
In described two electric capacity relaxation oscillator unit, what adopt is the circuit structure of mutual symmetry, for half of circuit, the output of current source is connected to charge and discharge capacitance, charging current is provided to electric capacity, and the discharge and recharge of electric capacity is controlled by the output of R-S latch, the switch of the output of R-S latch controls transfer door simultaneously, voltage on charge and discharge capacitance is sent to the input of active filter circuit by timesharing, the average voltage that active filter circuit produces by comparator is compared with the voltage on charge and discharge capacitance, output a control signal to R-S latch, circuit structure half of is in addition same as above.
When the output frequency of described oscillator is stablized, the value of output frequency is only relevant with the capacitance of charge and discharge capacitance with the resistance of adjustable resistance.
The output frequency of described oscillator is: f
osc=K/ (4CR), wherein, f
oscfor the output frequency of described oscillator, C is the capacitance of charge and discharge capacitance, and R is the resistance of adjustable resistance, and K is proportionality coefficient.
Described charge and discharge capacitance is intermetallic electric capacity, and adjustable resistance is made up of jointly polycrystalline resistor and diffusion resistance.
The current value of two current sources in described two electric capacity relaxation oscillator unit and a current source in average voltage generating circuit unit is equal, namely meets I
cs=I
cr=I
c, and the current source cell controlled by resistance produce, specifically by NMOS tube MN1 and MN2, and PMOS MP1, MP2, MP3, MP4, MP5, MP6, MP7, MP8, resistance R1 and adjustable resistance R2 forms; The grid of PMOS MP1 and drain interconnection form node vbias, source electrode connects power supply, PMOS MP2 and MP3 grid meet vbias, source electrode connects power supply, the drain electrode of NMOS tube MN1 is connected with the drain electrode of PMOS MP2, form node V2, the drain electrode of NMOS tube MN2 is connected with the drain electrode of PMOS MP3, forms node V4; The grid leak short circuit of NMOS tube MN1, source electrode forms node V1, and V1 connecting resistance R1 is to ground, and the grid of NMOS tube MN2 meets V2, source electrode forms node V3, and V3 meets adjustable resistance R2 to ground; The grid of PMOS MP4 meets V4, and drain electrode meets V3, and source electrode connects power supply; From current reference source I
refthe electric current that mirror image is come adds that the electric current flowing through PMOS MP4 is as I
celectric current, I
cthe pressure drop that electric current produces on adjustable resistance R2 is as the negative input end input voltage of active filter circuit; Electric current on PMOS MP5 mirror image MP3, the electric current on PMOS MP6 mirror image MP4, two pipe drain electrodes connect together, generation current I
cs, the PMOS MP7 of same structure and MP8 generation current I
cr.
Comparator circuit in described pair of electric capacity relaxation oscillator unit is made up of PMOS MP1 and NMOS tube MN1, the drain electrode of PMOS MP1 and NMOS tube MN1 is connected together as output Y, the source electrode of PMOS MP1 and NMOS tube MN1 connects VDD-to-VSS respectively, the grid of PMOS MP1 receives the output of active filter circuit, and the grid of NMOS tube MN1 connects the one end rushing electric capacity.
Described average voltage produces the active filter circuit in circuit unit, by PMOS MP1, MP2, MP3, MP4, MP5, MP6, MP7, NMOS tube MN1, MN2, MN3, MN4, MN5, MN6, MN7 and electric capacity C forms, PMOS MP1, MP2 is as inputting pipe, signal is respectively the sawtooth voltage on the reference voltage of current source cell and charge and discharge capacitance that self-resistance controls, the drain electrode of PMOS MP4 connects the source electrode of MP1 and MP2, and for circuit provides bias current, and the electric current of PMOS MP4 comes from PMOS MP3, NMOS tube MN3, MN4 is from the mirror image of current reference unit, owing to adopting accordion structure, the source electrode of NMOS tube MN1 and the drain electrode of MN5 are received in the drain electrode of PMOS MP1, the source electrode of NMOS tube MN2 and the drain electrode of MN6 are received in the drain electrode of PMOS MP2, the source ground of NMOS tube MN5 and MN6, the drain electrode of NMOS tube MN1 and MN2 is linked together by the PMOS MP5 of current mirror form and PMOS MP6, carry out the output that both-end turns single-ended, the drain electrode of NMOS tube MN2 meets a filter capacitor C as output, and the simple bias circuit that the gate bias voltage of NMOS tube MN1 and MN2 pipe is made up of PMOS MP7 and NMOS tube MN7 obtains.
Comparator in the relaxation oscillator unit of the present embodiment, the syndeton of S-R latch and charge and discharge capacitance, as shown in Figure 3.Cs and Cr is charge and discharge capacitance, I
csand I
crbe two-way current source, Qs and Qr is the output signal of S-R latch and the output signal after inverter, Ys and Yr is the signal that comparator is input to S-R latch, I
csand I
crbe two current sources, Cs and Cr is two charge and discharge capacitances.Specific works process is, enable signal EN from low become height after, the output Qs not connecting the S-R latch of inverter first overturns as low level, and now Qr is high level, Ys and Yr is high level, and on electric capacity Cs and Cr, voltage is 0, so current source I
cselectric capacity Cs is charged, and I
crelectric current does not charge (flowing through from other branch road) to its corresponding electric capacity Cr, the voltage V therefore on Cs
cslinear rising, after T1 after a while, V
csrise to certain voltage and (be referred to as V
max1) after, trigger Ys and become low level from high level, and Ys still keeps high level, triggers Qs to become high level, Qr becomes low level.
When Qs is high level, Qr is after low level, is replaced by I
crelectric current starts to charge to the electric capacity Cr of its correspondence, and I
cselectric current no longer charges to its corresponding electric capacity Cs, and Cr electric charge is discharged by discharge path.Therefore, the voltage V on electric capacity Cr
crstart linear rising, node voltage V
csbe dropped rapidly to 0V, trigger Yr and become high level from low level.After T2 after a while, V
crrise to certain voltage and (be referred to as V
max2) after, trigger Yr and become low level from high level, now Ys is still high level, and trigger Qr and become high level, Qs becomes low level.
Now state becomes Qr is high level, and Qs is low level, Ys and Yr is high level, V
crundertaken discharging by a path and decline rapidly, V
csvoltage linear rises.Because discharge time is very short, and the charging interval is longer, treats V
crafter dropping to 0V, V
cssubstantially also 0V is in.Therefore, it is high level that state becomes Qr, and Qs is low level, Ys and Yr is high level, and the voltage on two electric capacity is nearly all 0V, returns initial state, continues like this, just creates the output signal of vibration.
Voltage V wherein on electric capacity
cs, V
crwith their mean value V
mean; The node voltage V of Qs and Qr
qs, V
qrshown in waveform half figure as right in Fig. 3.
Refer to the charging interval T1 of electric capacity Cs in the preamble, charging voltage V
max1, and the charging interval T2 of electric capacity Cr, charging voltage V
max2.If choose the electric capacity C of same capacitance and onesize charging current I
c, so charging interval T1 and T2, charging voltage V
max1and V
max2all should be equal, be referred to as T and V
max.
T1＝T2＝T＝C×(V
max/I
c) (1)
The cycle T osc of relaxation oscillator can be expressed as:
T
osc＝T1+T2＝2×C×(V
max/Ic)＝2C(V
max/I
c) (2)
The frequency f of relaxation oscillator
osccan be expressed as:
f
osc＝1/T
osc＝I
c/(2C V
max) (3)
Sawtooth waveforms charging voltage V in addition on electric capacity
maxby voltage feedback unit output voltage V
fbcontrol, meet relational expression:
V
max＝βV
fb(4)
And the charging current I of electric capacity
cby the control of the current source cell that resistance controls, meet relational expression:
I
c＝kV
ctrl/R (5)
Wherein, k is the proportionality coefficient of current mirror, V
ctrlfor reference voltage, R is for trimming resistance.
Charging/discharging voltage on electric capacity is sawtooth voltage, and sawtooth voltage is carried out Fourier expansion, and its DC quantity is the half of sawtooth waveforms peak value, after being entered into voltage feedback unit, meets relational expression:
V
fb＝A
ol×(V
max/2－V
ctrl) (6)
Wherein, A
olthe gain of voltage feedback unit differential amplifier, V
maxand V
ctrlthe voltage of two inputs.
According to formula (4) and (6), can obtain:
Owing to meeting 1 < < A
ol× β/2, can obtain V
max=2V
ctrl(8)
F can be obtained according to formula (3), (5), (8)
osc=k/ (4CR)
Because k and temperature and supply voltage have nothing to do, therefore output frequency is only by electric capacity C with trim resistance R and determine.Suitable C and R is set as required, produces and export oscillator frequency.
Fig. 4 is the circuit diagram of comparator in two electric capacity relaxation oscillator unit of the present embodiment, and comparator circuit structure is simple, is made up of PMOS MP1 and NMOS tube MN1.The drain electrode of MP1 and MN1 is connected together as output Y, and source electrode connects VDD-to-VSS respectively.The grid of MP1 receives the output of active filter circuit, and the grid of MN1 connects one end of electric capacity.After enable signal is effective, V
fbbe stabilized in a fixed voltage value, suppose now I
ccharge to electric capacity C, Q point is low level.The pull-down current flowing through MN1 pipe is smaller, and the work of MP1 pipe is in linear zone, electric current is larger, Y is pulled to high level, and along with the voltage rise on electric capacity, the voltage of MN1 tube grid also rises, flow through the electric current of MN1 pipe also along with increase, when voltage rise is to the pull-up current making the pull-down current of MN1 pipe be greater than MP1, the level of Y point is declined, to reach the object of voltage compare.
Fig. 5 is the structure chart of the current source cell that the resistance of the present embodiment controls.Reference current source I
refthe voltage flowing through R1 generation is added to the positive input terminal of the amplifier of source electrode input, and the output of amplifier receives the grid of MN1, and the source electrode of MN1 receives the negative input end of amplifier again, forms a negative feedback loop, ensures the stable of amplifier output voltage.The V that the pressure drop that the electric current flowing through MN1 produces on adjustable resistance R2 inputs as active filter
ctrlvoltage, then the current mirror flowing through MN1 is gone out the constant current I of in two capacitor relaxation oscillator capacitor charging
csand I
cr.Ensure that the input reference voltage of capacitance charging current and active filter has identical temperature characterisitic.Because the sawtooth voltage on electric capacity in active filter circuit can be coupled to V
ctrlon voltage, I
refwith V
ctrladd an amplifier between voltage can reduce and recalcitrate noise.
Fig. 6 is the circuit diagram of the current source cell that the resistance of the present embodiment controls.The current source cell that described resistance controls specifically by NMOS tube, MN1 and MN2, and PMOS MP1, MP2, MP3, MP4, MP5, MP6, MP7, MP8, resistance R1 and adjustable resistance R2 forms.The grid of MP1 and drain interconnection form node vbias, and source electrode connects power supply.MP2 and MP3 grid meets vbias, and source electrode connects power supply, and the drain electrode of MN1 is connected with the drain electrode of MP2, and form node V2, the drain electrode of MN2 is connected with the drain electrode of MP3, forms node V4.The grid leak short circuit of MN1, source electrode forms node V1, and V1 connecting resistance R1 is to ground, and the grid of MN2 meets V2, source electrode forms node V3, and V3 meets adjustable resistance R2 to ground.The grid of MP4 meets V4, and drain electrode meets V3, and source electrode connects power supply.From current reference source I
refthe electric current that mirror image is come adds that the electric current flowing through MP4 is as electric current I
c, I
cthe pressure drop that electric current produces on adjustable resistance R2 is as the negative input end input voltage of active filter circuit.Electric current on MP5 mirror image MP3, the electric current on MP6 mirror image MP4, two pipe drain electrodes connect together, generation current I
cs, MP7 and the MP8 generation current I of same structure
cr.Such guarantee I
cs=I
cr=I
c.MN1, MN2 and MP4 form negative feedback, ensure in different temperatures, and under supply voltage, each metal-oxide-semiconductor is operated in saturation region, and charging and discharging currents, linear relationship between feedback regulation elements reference voltage and resistance R.
Fig. 7 is the circuit diagram that the average voltage of the present embodiment produces active filter circuit in circuit unit, described active filter circuit, is made up of the amplifier of cascodes and an output filter capacitor.Specifically by PMOS, MP1, MP2, MP3, MP4, MP5, MP6, MP7, NMOS tube MN1, MN2, MN3, MN4, MN5, MN6, MN7, electric capacity C forms.MP1, MP2 are as inputting pipe, signal is respectively the sawtooth voltage on the reference voltage of current source cell and switching capacity that self-resistance controls, the drain electrode of MP4 pipe connects the source electrode of MP1 and MP2, for circuit provides bias current, and the electric current of MP4 comes as MP3, MN3, MN4 mirror image from current reference unit, owing to adopting accordion structure, the source electrode of MN1 and the drain electrode of MN5 are received in the drain electrode of MP1, the drain electrode of MP2 receives the source electrode of MN2 and the drain electrode of MN6, the source ground of MN5 and MN6.The drain electrode of MN1 and MN2 is linked together by MP5 and MP6 of current mirror form, has carried out the output that both-end turns single-ended, and the drain electrode of MN2 meets a filter capacitor C as output, to filter the high fdrequency component of sawtooth signal input, realizes the output of average voltage.The simple bias circuit that the gate bias voltage of MN1 and MN2 pipe is made up of MP7 and MN7 obtains.
Fig. 8 is the comparison diagram of the temperature characterisitic of traditional relaxation oscillator and relaxation oscillator of the present invention, as can be seen from the figure, the relaxation oscillator not introducing average voltage feedback is acted upon by temperature changes very large, along with temperature change from-40 DEG C to 120 DEG C, the output frequency of oscillator also raises gradually, the highest 17MHZ that is elevated to, and the impact of comparator change time of delay on oscillator output frequencies that the relaxation oscillator with average voltage feedback of the present invention can well suppress variations in temperature to cause, make output frequency be basically stable at about 10M.
Above-described embodiment is illustrative principle of the present invention and effect thereof only, but not for limiting the present invention.Any person skilled in the art scholar all without prejudice under spirit of the present invention and category, can modify above-described embodiment or changes.Therefore, such as have in art usually know the knowledgeable do not depart from complete under disclosed spirit and technological thought all equivalence modify or change, must be contained by claim of the present invention.
Claims (7)
1. one kind has the relaxation oscillator of average voltage feedback, comprise two electric capacity relaxation oscillator unit and average voltage generating circuit unit, it is characterized in that: described two electric capacity relaxation oscillator unit comprise two symmetrical current sources, two comparators, two charge and discharge capacitances, two transmission gates, two inverters and a S-R latch; Described average voltage produces circuit unit and comprises active filter circuit and a current source that an amplifier and electric capacity forms and the generating circuit from reference voltage that an adjustable resistance is formed;
Described average voltage produces in circuit unit, the pressure drop that current source produces on adjustable resistance as the reference voltage, be input to the inverting input of amplifier in active filter circuit, the output of active filter circuit is connected to the positive input terminal of comparator in two capacitor relaxation pierce circuit;
In described two electric capacity relaxation oscillator unit, what adopt is the circuit structure of mutual symmetry, for half of circuit, the output of current source is connected to charge and discharge capacitance, charging current is provided to electric capacity, and the discharge and recharge of electric capacity is controlled by the output of R-S latch, the switch of the output of R-S latch controls transfer door simultaneously, voltage on charge and discharge capacitance is sent to the input of active filter circuit by timesharing, the average voltage that active filter circuit produces by comparator is compared with the voltage on charge and discharge capacitance, output a control signal to R-S latch, circuit structure half of is in addition same as above.
2. the relaxation oscillator with average voltage feedback according to claim 1, is characterized in that: when the output frequency of described oscillator is stablized, and the value of output frequency is only relevant with the capacitance of charge and discharge capacitance with the resistance of adjustable resistance.
3. the relaxation oscillator with average voltage feedback according to claim 2, is characterized in that: the output frequency of described oscillator is: f
osc=K/ (4CR), wherein, f
oscfor the output frequency of described oscillator, C is the capacitance of charge and discharge capacitance, and R is the resistance of adjustable resistance, and K is proportionality coefficient.
4. the relaxation oscillator with average voltage feedback according to claim 1, is characterized in that: described charge and discharge capacitance is intermetallic electric capacity, and adjustable resistance is made up of jointly polycrystalline resistor and diffusion resistance.
5. the relaxation oscillator with average voltage feedback according to claim 1, is characterized in that: the current value of two current sources in described two electric capacity relaxation oscillator unit and a current source in average voltage generating circuit unit is equal, namely meets I
cs=I
cr=I
c, and by resistance control current source cell produce, specifically by NMOS tube MN1 and MN2, and PMOS MP1, MP2, MP3, MP4, MP5, MP6, MP7, MP8, resistance R1 and adjustable resistance R2 forms; The grid of PMOS MP1 and drain interconnection form node vbias, source electrode connects power supply, PMOS MP2 and MP3 grid meet vbias, source electrode connects power supply, the drain electrode of NMOS tube MN1 is connected with the drain electrode of PMOS MP2, form node V2, the drain electrode of NMOS tube MN2 is connected with the drain electrode of PMOS MP3, forms node V4; The grid leak short circuit of NMOS tube MN1, source electrode forms node V1, and V1 connecting resistance R1 is to ground, and the grid of NMOS tube MN2 meets V2, source electrode forms node V3, and V3 meets adjustable resistance R2 to ground; The grid of PMOS MP4 meets V4, and drain electrode meets V3, and source electrode connects power supply; From current reference source I
refthe electric current that mirror image is come adds that the electric current flowing through PMOS MP4 is as I
celectric current, I
cthe pressure drop that electric current produces on adjustable resistance R2 is as the negative input end input voltage of active filter circuit; Electric current on PMOS MP5 mirror image MP3, the electric current on PMOS MP6 mirror image MP4, two pipe drain electrodes connect together, generation current I
cs, the PMOS MP7 of same structure and MP8 generation current I
cr.
6. the relaxation oscillator with average voltage feedback according to claim 1, it is characterized in that: the comparator circuit in described pair of electric capacity relaxation oscillator unit is made up of PMOS MP1 and NMOS tube MN1, the drain electrode of PMOS MP1 and NMOS tube MN1 is connected together as output Y, the source electrode of PMOS MP1 and NMOS tube MN1 connects VDD-to-VSS respectively, the grid of PMOS MP1 receives the output of active filter circuit, and the grid of NMOS tube MN1 connects the one end rushing electric capacity.
7. the relaxation oscillator with average voltage feedback according to claim 1, is characterized in that: described average voltage produces the active filter circuit in circuit unit, by PMOS MP1, MP2, MP3, MP4, MP5, MP6, MP7, NMOS tube MN1, MN2, MN3, MN4, MN5, MN6, MN7 and electric capacity C forms, PMOS MP1, MP2 is as inputting pipe, signal is respectively the sawtooth voltage on the reference voltage of current source cell and charge and discharge capacitance that self-resistance controls, the drain electrode of PMOS MP4 connects the source electrode of MP1 and MP2, and for circuit provides bias current, and the electric current of PMOS MP4 comes as PMOS MP3, NMOS tube MN3, MN4 is from the mirror image of current reference unit, owing to adopting accordion structure, the source electrode of NMOS tube MN1 and the drain electrode of MN5 are received in the drain electrode of PMOS MP1, the source electrode of NMOS tube MN2 and the drain electrode of MN6 are received in the drain electrode of PMOS MP2, the source ground of NMOS tube MN5 and MN6, the drain electrode of NMOS tube MN1 and MN2 is linked together by the PMOS MP5 of current mirror form and PMOS MP6, carry out the output that both-end turns single-ended, the drain electrode of NMOS tube MN2 meets a filter capacitor C as output, and the simple bias circuit that the gate bias voltage of NMOS tube MN1 and MN2 pipe is made up of PMOS MP7 and NMOS tube MN7 obtains.
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