CN103684354A - Ring-shaped oscillation circuit, ring-shaped oscillator and realization method thereof - Google Patents
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Abstract
The invention discloses a ring-shaped oscillation circuit, a ring-shaped oscillator and a realization method thereof, relating to the technical field of telecommunications. A technical problem that the required precision of a ring-shaped oscillation circuit device is high in the prior art is solved. The circuit comprises a current bias generating circuit and a ring-shaped oscillator level circuit. The ring-shaped oscillator level circuit comprises at least one level of first type of inverter and at least one level of second type of inverter. The current bias generating circuit is coupled with the first type of inverter. The output end of the first type of inverter is connected with the input end of the second type of inverter. The output end of the second type of inverter is connected with the input end of the first type of inverter.
Description
Technical Field
The invention relates to the technical field of telecommunication, in particular to a ring oscillator circuit, a ring oscillator and an implementation method thereof.
Background
For most SOC (System on a Chip) designs, an oscillator is an essential component, which can provide a clock to the Chip. In various types of oscillators, the ring oscillator does not need an external crystal, does not need an inductance-capacitance tuning circuit, and can work only by connecting odd inverters in series and connecting the output of the last stage to the input of the first stage. In consideration of the characteristics of simple structure and low power consumption, the ring oscillator is widely applied to occasions with low frequency precision requirements. However, the power supply voltage and the ambient temperature have a large influence on the output frequency of the ring oscillator, and therefore, the ring oscillator cannot meet the requirement of a system with higher accuracy on the clock frequency.
In order to achieve higher frequency accuracy, a plurality of technical schemes perform structural optimization design on a ring oscillator, wherein a common structure is that the ring oscillator is formed by a current-limited inverter, so that the oscillation frequency of the oscillator is related to the current, and the reference current generating unit is improved, so that the power supply voltage and the ambient temperature characteristic of the output frequency are improved. However, the accuracy of the final output frequency of such schemes depends on whether the reference current generation unit design can exactly cancel the corresponding voltage and temperature coefficients. Since the temperature characteristic of the device has a large process dependency, and the under-compensation or over-compensation cannot achieve a desired result, it is difficult to design the device to achieve a better temperature and voltage characteristic for practical design, and when the coefficient design is not reasonable, for example, the compensation is not reasonable, the temperature or voltage characteristic may be deteriorated. Therefore, the output frequency of the common ring oscillator varies greatly with the supply voltage and the ambient temperature, and cannot meet the system requirement of high frequency precision.
In addition, for a ring oscillator scheme composed of current-limited inverters, a current generation circuit needs to be designed reasonably, and a proper temperature coefficient is configured to compensate with the temperature characteristic of the oscillator, so that the final temperature characteristic is sensitive to the value of devices in the circuit. Because the designed result depends too much on the device size and other design skills in the circuit design, in the actual design, some factors which are difficult to control, such as the mismatching of the layout, the deviation of the process, and the like, can cause that the expected compensation effect cannot be achieved.
Disclosure of Invention
The invention provides a ring oscillator circuit, a ring oscillator and an implementation method thereof, aiming at solving the technical problems of high precision required by devices and larger design difficulty caused by the purpose of temperature compensation and power supply voltage compensation in the ring oscillator circuit in the prior art.
A ring oscillator circuit comprising: a current bias generating circuit and a ring oscillator stage circuit;
the ring oscillator stage circuit comprises at least one stage of first inverter and at least one stage of second inverter;
the current bias generating circuit is coupled with the first inverter; the output end of the first inverter is connected with the input ends of the two inverters, and the output end of the second inverter is connected with the input end of the first inverter;
wherein the first inverter is primarily of a current limited inverter type; the second inverter is constituted by a cmos inverter.
The current bias generating circuit comprises a first PMOS, a second PMOS, a first NMOS, a second NMOS and a resistor R; wherein,
the grid electrodes of the first PMOS and the second PMOS are connected together to form a current mirror; the grid electrode of the second PMOS is connected with the drain electrode of the second PMOS, the grid electrode of the first NMOS is connected with the drain electrode of the first PMOS, the grid electrode of the second NMOS is connected with the grid electrode of the first NMOS, the drain electrode of the second NMOS is connected with the drain electrode of the second PMOS, the source electrode of the first NMOS is grounded, the source electrode of the second NMOS is connected with one end of a resistor R, and the other end of the resistor R is connected with the ground.
The first inverter comprises a third PMOS, a third NMOS and at least one COMS inverter; the current bias generating circuit is coupled with the first inverter, and specifically comprises:
the grid electrode of the third PMOS is connected with the grid electrode of the second PMOS, and the grid electrode of the third NMOS is connected with the grid electrode of the first NMOS; and the power supply and the ground of the first CMOS inverter in the at least one COMS inverter are respectively connected with the drain electrode of the third PMOS and the drain electrode of the third NMOS.
The output of the first kind of inverter is connected with the input of two kinds of inverters to, the output of the second kind of inverter is connected with the input of first kind of inverter, specifically includes:
the COMS inverters of the first and second inverters are connected in series;
the output end of the last CMOS inverter after the first inverter is connected in series is connected with the input end of the first CMOS inverter after the second inverter is connected in series, and the output end of the last CMOS inverter after the second inverter is connected in series is connected back to the input end of the first CMOS inverter of the first inverter.
A ring oscillator comprising the ring oscillator circuit of.
A method for implementing a ring oscillator, comprising:
the current of the power supply is biased to be the current of the positive temperature coefficient irrelevant to the power supply voltage through a current bias generating circuit;
controlling a first inverter in a ring oscillator stage circuit by using the current with the positive temperature coefficient;
the first inverter is controlled by the current of the positive temperature coefficient to generate the inverter characteristics of positive power supply voltage, negative temperature coefficient and time delay; the second inverter generates the inverter characteristics of negative power supply voltage, positive temperature coefficient and time delay through the series connection of the COMS inverters;
by the interaction of the inverter characteristic of the first inverter with the inverter characteristic of the second inverter, a ring oscillator whose output frequency is temperature compensated and whose supply voltage is compensated is formed.
The simplicity of the scheme design provided by the invention is realized, and the oscillator is formed by adopting two inverters, so that the temperature compensation effect can be achieved without intentionally setting a temperature coefficient. The purpose of power supply voltage compensation can be achieved without device design such as transistor matching and the like. And the current bias circuit works in a subthreshold region, so that the working current is small, the mirrored current provides power for the inverter, the power consumption is also small, the inverter with limited current can not directly drive an external module generally, the inverter is connected behind the ring oscillation stage to increase the drive in the prior art, and in the design, the inverter with increased drive behind is a part of the ring oscillation stage, so that the number of inverters in an inverter chain is saved, and the lower power consumption can be achieved.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention and not to limit the invention. In the drawings:
in order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a circuit diagram of a ring oscillator circuit according to embodiment 1 of the present invention;
fig. 2 is a flowchart of a method provided in embodiment 3 of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention. Furthermore, the following embodiments are all alternatives of the present invention, and the arrangement order of the embodiments and the numbering of the embodiments are not related to the order of the preferred execution.
Example 1
The present embodiment provides a ring oscillator circuit, including: a current bias generation circuit 100 and a ring oscillator stage circuit 200;
ring oscillator stage circuit 200 includes at least one stage of a first inverter type 210 and at least one stage of a second inverter type 211; the first inverter 210 is functionally used for limiting current, and is a current-limited inverter; the second inverter 211 comprises a cmos inverter.
The current bias generating circuit 100 is coupled to the first inverter 210; the output terminal of the first inverter 210 is connected to the input terminal of the second inverter 211, and the output terminal of the second inverter 211 is connected to the input terminal of the first inverter 210.
In order to provide a current with a positive temperature coefficient and a magnitude independent of a power supply voltage to the first inverter 210, the current bias generating circuit 100 provided in the embodiment includes a first PMOS103, a second PMOS104, a first NMOS102, a second NMOS101, and a resistor R105; as shown in figure 1 of the drawings, in which,
the gates of the first PMOS103 and the second PMOS104 are connected together to form a current mirror; the gate of the second PMOS104 is connected with the drain of the second PMOS104, the gate and the drain of the first NMOS102 are connected together and are connected with the drain of the first PMOS103, the gate of the second NMOS101 is connected with the gate of the first NMOS102, the drain of the second NMOS101 is connected with the drain of the second PMOS104, the source of the first NMOS102 is grounded, the source of the second NMOS101 is connected with one end of a resistor R105, and the other end of the resistor R105 is grounded.
Specifically, the first inverter 210 comprises a third PMOS204, a third NMOS205 and at least one cmos 201 inverter; the current bias generating circuit 100 is coupled to the first inverter 210, and specifically includes:
the gate of the third PMOS204 is connected with the gate of the second PMOS104, and the gate of the third NMOS205 is connected with the gate of the first NMOS 102;
the power and ground of a first CMOS inverter 201 of the at least one CMOS inverter 201 are connected to the drain of the third PMOS204 and the drain of the third NMOS205, respectively.
In a preferred embodiment, the output terminal of the first inverter 210 is connected to the input terminals of the second inverter 211, and the output terminal of the second inverter 211 is connected to the input terminal of the first inverter 210, which specifically includes:
the COMS inverters of the first inverter 210 and the second inverter 211 are connected in series;
the output end of the last CMOS inverter of the first inverter 210 after being connected in series is connected to the input end of the first CMOS inverter of the second inverter 211 after being connected in series, and the output end of the last CMOS inverter of the second inverter 211 after being connected in series is connected back to the input end of the first CMOS inverter of the first inverter 210.
Wherein, the first inverter comprises a COMS inverter; the COMS inverter chain composed of the first inverter and the second inverter has odd-numbered stages.
The following describes the ring oscillator circuit provided in this embodiment with reference to fig. 1 as an example. Comprising a current bias generating circuit 100 and a ring oscillator stage 200, wherein the ring oscillator stage 200 comprises at least one current limited inverter (e.g., a first inverter 210 as shown in fig. 1) and at least one CMOS inverter (e.g., a second inverter 211 as shown in fig. 1). A circuit diagram of a three-stage ring oscillator circuit consisting of a one-stage current-limited inverter and a two-stage CMOS inverter is shown in fig. 1. In practice, the number of stages of the inverter chain formed by the two inverters can be five or seven or other odd-numbered stages, i.e. the odd-numbered stages means that the total number of the first inverter and the second inverter is odd.
The current bias generating circuit 100 is composed of a first PMOS103, a second PMOS104, a first NMOS102, a second NMOS101, and a resistor R105, wherein gates of the first PMOS103 and the second PMOS104 are connected together to form a current mirror, while a gate of the second PMOS104 is connected to a drain thereof, a gate and a drain of the first NMOS102 are connected together and to a drain of the first PMOS103, a gate of the second NMOS101 is connected to a gate of the first NMOS102, a drain of the second NMOS101 is connected to a drain of the second PMOS104, a source of the first NMOS102 is grounded, a source of the second NMOS101 is connected to one end of a resistor R105, and the other end of the resistor R105 is connected to ground.
The ring oscillator stage circuit 200 is composed of a third PMOS204, a third NMOS205, and three sets of inverters 201, 202, 203, wherein a gate of the third PMOS204 is connected to a gate of the second PMOS104, a gate of the third NMOS205 is connected to a gate of the first NMOS102, a power supply and a ground of the first CMOS inverter 201 are respectively connected to drains of the third PMOS204 and the third NMOS205, an output of the inverter 204 is connected to an input terminal of the second CMOS inverter 202 (i.e., a first inverter of the second inverter), an output of the second CMOS inverter 202 is connected to an input terminal of the third inverter 203 (i.e., a last CMOS inverter after serial connection of inverters of the second inverter), and an output of the third CMOS inverter is connected back to an input terminal of the first CMOS inverter 201 (i.e., the inverter 201 in fig. a first inverter after serial connection of inverters of the first inverter, and also a last inverter).
Referring to fig. 1, the principle of the ring oscillator circuit provided in this embodiment is as follows: first, the current bias circuit 100 generates a current on R105 through the VGS difference between the first NMOS102 and the second NMOS101, the magnitude of the current is independent of the power voltage, the current has a positive temperature coefficient, and flows through the second PMOS 104/second NMOS101 branch, and due to the 1:1 mirror relationship between the first PMOS103 and the second PMOS104, the same current flows through the first PMOS 103/first NMOS102 branch. The current mirror formed by the second PMOS104 tube and the third PMOS204 tube mirrors the current of the second PMOS104 to the branch of the third PMOS 204. The current mirror formed by the first NMOS102 and the third NMOS205 mirrors the current of the first NMOS102 to the branch of the third NMOS205, so the charging current of the first-stage inverter 201 is the current flowing through the second PMOS104, the discharging current of the first-stage inverter 201 is the current flowing through the third NMOS204, the charging and discharging current value characteristics determine the delay characteristics of the first-stage inverter, the first-stage inverter 201 is connected with the following common COMS inverters 202 and 203 in output to form a ring oscillator chain, and the final oscillation frequency is determined by the total delay of the inverter chain.
The value of the current I generated by the current bias circuit 100 in the branches PMOS103/NMOS102 and PMOS104/NMOS101 is the difference between VGS of the NMOS102 transistor and VGS of the NMOS104 transistor, which is compared with the resistance of the upper resistor R105, as shown in the following formula (1)
Since NMOS102 and NMOS101 operate in the subthreshold region, equation (1) can be further written as
Wherein, M is the ratio of the width-length ratio of MN2 to MN1, VT is a thermal voltage with a positive temperature coefficient, and n is a subthreshold slope factor. When the resistor is a poly resistor, the resistor has a negative temperature coefficient, and thus, the current has a positive temperature coefficient. Through a PMOS current mirror, the current of the inverter with limited first-stage current is in direct proportion to the temperature, and the time delay of the inverter is reduced along with the rise of the temperature; the threshold voltage of the inverter of this stage increases as the supply voltage increases, causing the inverter delay to increase as the supply voltage increases.
The second inverter in the inverter chain is a common CMOS inverter, and the delay time of this inverter increases with the temperature and decreases with the supply voltage.
The temperature and voltage characteristics of the two inverters are exactly in opposite phases, and the two inverters are adopted in an oscillator loop, so that the effects of temperature compensation and voltage compensation can be realized. By adjusting the temperature coefficient of the current generating circuit, targeted compensation of the temperature and voltage characteristics of the oscillator can be performed. Therefore, the temperature and voltage compensation function of the ring oscillation circuit is insensitive to the value of specific devices in the circuit, so that the purpose of temperature and voltage compensation can be achieved when the ring oscillation circuit is used.
In the ring oscillator circuit provided by the embodiment, because the temperature characteristics and the power supply voltage characteristics of the first inverter delay and the second inverter delay are just opposite, the total delay of the inverter chain achieves the purpose of compensation on the temperature characteristics and the power supply voltage characteristics, so that the output frequency of the oscillator achieves the purposes of temperature compensation and power supply voltage compensation.
Example 2
This embodiment provides a ring oscillator including the ring oscillation circuit described in embodiment 1, and the details of the ring oscillator are not repeated herein.
Example 3
The embodiment provides a method for implementing a ring oscillator, as shown in fig. 2, including:
103, controlling the first inverter by the current of the positive temperature coefficient to generate the inverter characteristics of positive power supply voltage, negative temperature coefficient and time delay;
a ring oscillator with temperature compensated output frequency and supply voltage compensated output frequency is formed by the interaction of the inverter characteristics of the first inverter and the inverter characteristics of the second inverter, step 105.
For example: referring to fig. 1, first, the current bias circuit 100 generates a current on R105 through the VGS difference between the first NMOS102 and the second NMOS101, the magnitude of the current is independent of the power voltage, the current has a positive temperature coefficient, and the current flows through the second PMOS 104/second NMOS101 branch, and the same current flows through the first PMOS 103/first NMOS102 branch due to the 1:1 mirror relationship between the first PMOS103 and the second PMOS 104. The current mirror formed by the second PMOS104 tube and the third PMOS204 tube mirrors the current of the second PMOS104 to the branch of the third PMOS 204. The current mirror formed by the first NMOS102 and the third NMOS205 mirrors the current of the first NMOS102 to the branch of the third NMOS205, so the charging current of the first-stage inverter 201 is the current flowing through the second PMOS104, the discharging current of the first-stage inverter 201 is the current flowing through the third NMOS204, the charging and discharging current value characteristics determine the delay characteristics of the first-stage inverter, the first-stage inverter 201 is connected with the following common COMS inverters 202 and 203 in output to form a ring oscillator chain, and the final oscillation frequency is determined by the total delay of the inverter chain.
For the implementation of each step, please refer to the ring oscillator circuit in embodiment 1, which is not described herein.
The implementation method provided by the invention adopts two inverters which can generate opposite temperature and power supply voltage characteristics, so that the temperature compensation effect can be achieved without intentionally setting a temperature coefficient. The technical effects of power supply voltage compensation and low power consumption can be achieved without the need of device design such as transistor matching and the like.
In the above method provided by the embodiment of the present invention, although the order of executing the steps is given, the order is only one preferred embodiment of the present invention. Obviously, a person skilled in the art may make various equivalent changes to the execution order of the steps of the method according to the above method, that is, the steps or some of the steps in the method according to the embodiment of the present invention may be executed in other orders or simultaneously. For example: step 104 is executed first, and then step 103 is executed; or step 103 and step 104 may be performed simultaneously. The order of execution of the steps described in the method above is therefore not limited to the one provided in the examples.
While the invention has been described in connection with what is presently considered to be the most practical and preferred embodiment, it is to be understood that the invention is not to be limited to the disclosed embodiment, but on the contrary, is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims; the person skilled in the art will be able to modify the solutions presented in the above embodiments or to substitute them for some of the technical features described above. Any modification, equivalent replacement or improvement made within the spirit and principle of the present invention should be included in the protection scope of the claims of the present invention.
Claims (8)
1. A ring oscillator circuit, comprising: a current bias generating circuit and a ring oscillator stage circuit;
the ring oscillator stage circuit comprises at least one stage of first inverter and at least one stage of second inverter;
the current bias generating circuit is coupled with the first inverter; the output end of the first phase inverter is connected with the input ends of the two phase inverters, and the output end of the second phase inverter is connected with the input end of the first phase inverter.
2. The ring oscillator circuit of claim 1 wherein the first inverter comprises a current limited inverter; the second inverter comprises a cmos inverter.
3. The ring oscillator circuit of claim 1 or 2, wherein the current bias generation circuit comprises a first PMOS, a second PMOS, a first NMOS, a second NMOS, and a resistor R; wherein,
the grid electrodes of the first PMOS and the second PMOS are connected together to form a current mirror; the grid electrode of the second PMOS is connected with the drain electrode of the second PMOS, the grid electrode of the first NMOS is connected with the drain electrode of the first PMOS, the grid electrode of the second NMOS is connected with the grid electrode of the first NMOS, the drain electrode of the second NMOS is connected with the drain electrode of the second PMOS, the source electrode of the first NMOS is grounded, the source electrode of the second NMOS is connected with one end of a resistor R, and the other end of the resistor R is connected with the ground.
4. The ring oscillator circuit of claim 3 wherein the first inverter comprises a third PMOS, a third NMOS, and at least one COMS inverter; the current bias generating circuit is coupled with the first inverter, and specifically comprises:
the grid electrode of the third PMOS is connected with the grid electrode of the second PMOS, and the grid electrode of the third NMOS is connected with the grid electrode of the first NMOS;
and the power supply and the ground of the first CMOS inverter in the at least one COMS inverter are respectively connected with the drain electrode of the third PMOS and the drain electrode of the third NMOS.
5. The ring oscillator circuit according to claim 4, wherein the output terminal of the first inverter is connected to the input terminals of the two inverters, and the output terminal of the second inverter is connected to the input terminal of the first inverter, and further comprising:
the COMS inverters of the first and second inverters are connected in series;
the output end of the last CMOS inverter after the first inverter is connected in series is connected with the input end of the first CMOS inverter after the second inverter is connected in series, and the output end of the last CMOS inverter after the second inverter is connected in series is connected back to the input end of the first CMOS inverter of the first inverter.
6. The ring oscillator circuit of claim 1 or 2, wherein the first inverter comprises a cmos inverter;
the number of the COMS inverter chain formed by the first inverter and the second inverter is odd.
7. A ring oscillator comprising the ring oscillator circuit of any one of claims 1 to 6.
8. A method for implementing a ring oscillator, comprising:
the current of the power supply is biased to be the current of the positive temperature coefficient irrelevant to the power supply voltage through a current bias generating circuit;
controlling a first inverter in a ring oscillator stage circuit by using the current with the positive temperature coefficient;
the first inverter is controlled by the current of the positive temperature coefficient to generate the inverter characteristics of positive power supply voltage, negative temperature coefficient and time delay; the second inverter generates the inverter characteristics of negative power supply voltage, positive temperature coefficient and time delay through the series connection of the COMS inverters;
by the interaction of the inverter characteristic of the first inverter with the inverter characteristic of the second inverter, a ring oscillator whose output frequency is temperature compensated and whose supply voltage is compensated is formed.
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