CN104836438B - A kind of switch circuit devices and drive circuit - Google Patents
A kind of switch circuit devices and drive circuit Download PDFInfo
- Publication number
- CN104836438B CN104836438B CN201510220585.2A CN201510220585A CN104836438B CN 104836438 B CN104836438 B CN 104836438B CN 201510220585 A CN201510220585 A CN 201510220585A CN 104836438 B CN104836438 B CN 104836438B
- Authority
- CN
- China
- Prior art keywords
- switch
- input
- output end
- connects
- control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Abstract
The present invention relates to a kind of data or the input and output technical field of signal, more particularly to a kind of switch circuit devices and drive circuit, switch circuit devices include first switch device, second switch device, first switch device includes first switch and second switch, and first switch ON time is less than second switch ON time；Second switch device includes the 3rd switch and the 4th switch, and the 3rd switch conduction times are less than the 4th switch conduction times；Using first switch and the 3rd fast response characteristic switched, input/output unit quick response, first switch and the 3rd switch are realized because operational characteristic can flow through larger electric current, can cause the larger driving current of the acquisition of input/output unit.The present invention, which only increases first switch and the 3rd switch, can solve technical problem, without taking excessive chip area, cost explanation, while use the relatively good first switch of electrostatic protection ability and the 3rd switch, strengthen the conducting homogeneity of drive circuit.
Description
Technical field
The present invention relates to a kind of data or the input and output technical field of signal, more particularly to a kind of switch circuit devices
And drive circuit.
Background technology
I/O (input/output abbreviation, i.e. input/output port) circuit be in electronic system must not must one
Circuit unit, each equipment can have a special I/O circuit in electronic system, and each I/O circuits have one and its
The I/O address matched somebody with somebody, for handling the input/output information of oneself.I/O circuits are control unit and external equipment, the company of memory
Connect and be required for realizing by interface equipment with data exchange, usual I/O circuits are required to an I/O driving in the design process
Circuit, the drive circuit to provide one meet I/O circuits work driving current.A kind of as shown in figure 1, conventional I/O
Drive circuit, in order to obtain larger driving current, the first PMOS of I/O drive circuits and the first NMOS just need bigger chi
It is very little.Using large-sized first PMOS and the first NMOS, then following drawback be present：1st, the first PMOS and the first NMOS size increases
Greatly, causing the first PMOS and the first NMOS to take in the circuit board, chip area is larger, increases the cost of manufacture of circuit board；2nd,
One PMOS and the first NMOS sizes, then the first PMOS and the first NMOS parasitic capacitance can increase, the drive circuit of prime is driving
Dynamic first PMOS and the first NMOS sizes, required time is just longer, and larger leakage can be produced in the turn on process of long period
Electric current, be output to the current potential of output device from logic low 0 to logically high 1 or from response needed for logically high 1 to logic low 0 when
Between it is also very long, circuit is accordingly relatively slow, and power consumption increase；3rd, the first PMOS and the first NMOS antistatic effects are weaker, and electric current is led
Logical uniformity is poor.
In order to reduce the first PMOS and the first NMOS parasitic capacitance, using circuit as shown in Figure 2, by multistage anti-phase
Device strengthens the driving force of prime, accelerates response speed.But such a technical scheme the drawbacks of bringing is that multistage phase inverter is same
Area, the cost of more circuit layouts can be increased, in addition, also but in drawbacks described above in terms of antistatic effect.
The content of the invention
In view of the shortcomings of the prior art, the present invention provides that to take chip area in a kind of circuit board small, and cost is low, corresponding speed
The switch circuit devices and drive circuit that degree is fast while antistatic effect is strong.
Technical solution of the present invention is as follows.
A kind of switch circuit devices, wherein, including first switch device and second switch device, the first switch device
Control terminal, input, output end connect the control terminal of the second switch device, input, output end respectively, described first
The ON time of switching device is less than the ON time of the second switch device；The first switch device is in control signal
In the conduction state and one scheduled current of output under effect, and shut-off is switched under conducting state in the second switch device
State.
A kind of drive circuit, applied to data or the input/output unit of signal, wherein, including
First input end, to receive the first input signal and export；
Second input, to receive the second input signal and export；
Control unit, the first input end and second input are connected respectively, to receive described first respectively
Input signal and second input signal, and formed respectively according to first input signal and second input signal logical
The second control signal crossed the first control signal of the first control output end output and exported by the second control output end；
First switch device, in the presence of first control signal controllably in conducting state or shut-off shape
Switch between state；Under the first switch device is in the conduction state so that an output device connects a power end；
The first switch device includes first switch and second switch, and the ON time of the first switch is less than described
The ON time of second switch；The first switch it is in the conduction state in the presence of first control signal and export one
First scheduled current, and switch to off state under conducting state in the second switch；
Second switch device, in the presence of second control signal controllably on or off state it
Between switch；Under the second switch device is in the conduction state so that the output device is with connecting a power supply；
The second switch device includes the 3rd switch and the 4th switch, and the described 3rd ON time switched is less than described
The ON time of 4th switch；Described 3rd switchs in the conduction state in the presence of second control signal and output one
Second scheduled current, and switched in the described 4th and switch to off state under conducting state.
A kind of above-mentioned drive circuit, wherein：In the first switch device, the first switch is mainly by the first N-type
Controllable silicon is formed, and the second switch is mainly formed by the first PMOS；
The control terminal of the first N-type controllable silicon connects first control output end, input by one first phase inverter
End connects the power end, and output end connects the output device；
The grid of first PMOS connects first control output end, and input connects the power end, output
End connects the output device；
In the second switch device, the 3rd switch is mainly formed by the second N-type controllable silicon, the 4th switch master
To be formed by the second NMOS tube；
The controllable control terminal of second N-type connects second control output end, the input connection output dress
Put, output end is with connecting the power supply；
The grid of second NMOS tube connects second control output end, and input connects the output device, defeated
Go out end with connecting the power supply.
A kind of above-mentioned drive circuit, wherein：In the first switch device, the first switch is mainly by the first p-type
Controllable silicon is formed, and the second switch is mainly formed by the first PMOS；
The controllable control terminal of first p-type connects first control output end, and input connects the power end,
Output end connects the output device；
The grid of first PMOS connects first control output end, and input connects the power end, output
End connects the output device；
In the second switch device, the 3rd switch is mainly formed by the second p-type controllable silicon, the 4th switch master
To be formed by the second NMOS tube；
The controllable control terminal of second p-type connects second control output end, input by one second phase inverter
End connects the output device, and output end is with connecting the power supply；
The grid of second NMOS tube connects second control output end, and input connects the output device, defeated
Go out end with connecting the power supply.
A kind of above-mentioned drive circuit, wherein：In the first switch device, the first switch is mainly by the first p-type
Controllable silicon is formed, and the second switch is mainly formed by the first PMOS；
The controllable control terminal of first p-type connects first control output end, and input connects the power end,
Output end connects the output device；
The grid of first PMOS connects first control output end, and input connects the power end, output
End connects the output device；
In the second switch device, the 3rd switch is mainly formed by the second N-type controllable silicon, the 4th switch master
To be formed by the second NMOS tube；
The controllable control terminal of second N-type connects second control output end, the input connection output dress
Put, output end is with connecting the power supply；
The grid of second NMOS tube connects second control output end, and input connects the output device, defeated
Go out end with connecting the power supply.
A kind of above-mentioned drive circuit, wherein：In the first switch device, the first switch is mainly by the first N-type
Controllable silicon is formed, and the second switch is mainly formed by the first PMOS；
The controllable control terminal of first N-type connects first control output end, input by one the 3rd phase inverter
End connects the power end, and output end connects the output device；
The grid of first PMOS connects first control output end, and input connects the power end, output
End connects the output device；
In the second switch device, the 3rd switch is mainly formed by the second p-type controllable silicon, the 4th switch master
To be formed by the second NMOS tube；
The controllable control terminal of second N-type connects second control output end, input by one the 4th phase inverter
End connects the output device, and output end is with connecting the power supply；
The grid of second NMOS tube connects second control output end, and input connects the output device, defeated
Go out end with connecting the power supply.
A kind of above-mentioned drive circuit, wherein：Described control unit includes：One NAND gate, the 3rd of the NAND gate are defeated
Enter end and connect the first input end, the 4th input connects second input by a phase inverter, and output end forms institute
State the first control output end；
One nor gate, the 5th input of the nor gate connect the first input end, described in the connection of the 6th input
Second input, output end form second control output end.
A kind of above-mentioned drive circuit, wherein：One first electric capacity is connected in the input of the first switch；In described
The input of three switches connects one second electric capacity.
A kind of above-mentioned drive circuit, wherein：In the input of first control output end and the first switch device
One first level converter of series connection between end.
A kind of above-mentioned drive circuit, wherein：In the input of second control output end and the second switch device
Connected between end a second electrical level conversion equipment.
Compared with prior art, the purpose of the present invention is：
In the present invention, first switch device is mainly formed by first switch and second switch, the conducting of the first switch
Time is less than the ON time of the second switch；Second switch device is mainly formed by the 3rd switch and the 4th switch, described
The ON time of 3rd switch is less than the ON time of the described 4th switch；Utilize first switch and the 3rd quick response switched
Characteristic, the response speed that input/output unit is exceedingly fast is realized, while first switch and the 3rd is switched because operational characteristic can flow
Larger electric current is crossed, the larger driving current of the acquisition of input/output unit can be caused.The present invention only increases first and opened
Close and the 3rd switch can solve technical problem, without taking excessive chip area, cost explanation, while use electrostatic protection
The relatively good first switch of ability and the 3rd switch, strengthen the conducting homogeneity of drive circuit.
Brief description of the drawings
Fig. 1 is a kind of connection diagram of input and output drive circuit in the prior art；
Fig. 2 is the connection diagram of another input and output drive circuit in the prior art；
Fig. 3 is a kind of a kind of connection diagram of embodiment of drive circuit in the present invention；
Fig. 4 is the structural design drawing of N-type controllable silicon in the present invention；
Fig. 5 is a kind of a kind of connection diagram of embodiment of drive circuit in the present invention；
Fig. 6 is the structural design drawing of p-type controllable silicon in the present invention；
Fig. 7 is a kind of a kind of connection diagram of embodiment of drive circuit in the present invention；
Fig. 8 is a kind of a kind of connection diagram of embodiment of drive circuit in the present invention.
Embodiment
The invention will be further described with specific embodiment below in conjunction with the accompanying drawings, but not as limiting to the invention.
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete
Site preparation describes, it is clear that described embodiment is only part of the embodiment of the present invention, rather than whole embodiments.It is based on
Embodiment in the present invention, those of ordinary skill in the art obtained on the premise of creative work is not made it is all its
His embodiment, belongs to the scope of protection of the invention.
It should be noted that in the case where not conflicting, the feature in embodiment and embodiment in the present invention can phase
Mutually combination.
The invention will be further described with specific embodiment below in conjunction with the accompanying drawings, but not as limiting to the invention.
A kind of switch circuit devices, wherein, including first switch device and second switch device, the first switch device
Control terminal, input, output end connect the control terminal of the second switch device, input, output end respectively, described first
The ON time of switching device is less than the ON time of the second switch device；The first switch device is in a control signal
In the presence of it is in the conduction state and export a scheduled current, and be switched off in the second switch device under conducting state
State.
The present invention operation principle be：A kind of switch circuit devices provided by the invention, by first switch device and second
Switching device is parallel with one another, and the first switch break-over of device time is less than the second switch break-over of device time, in first switch device
Under part is in the conduction state, because first switch device is different from the technique of second switch device, cause second switch device latencies
Turned on after the scheduled time of first switch device one, while after second switch break-over of device, the pressure drop at first switch device both ends
It is relatively low, cause first switch device to be off, during the normal use of circuit, only second switch device is led
It is logical.First switch device only turns in circuit initial instant quick response in the conduction state, while first switch device
With larger electrostatic protection ability.By the quick response of first switch device, the driving force of circuit output is effectively improved
And response speed, while the electrostatic protection ability by whole circuit is improved, this circuit arrangement only more increases first switch devices
Part, you can realize technical problem, cost is relatively low.
As shown in figure 3, a kind of drive circuit, applied to data or the input/output unit of signal, wherein, including
First input end, to receive the first input signal and export, and the first input end can be data input pin.
Second input, to receive the second input signal and export, and second input can be that control signal inputs
End.
Control unit, the first input end and second input are connected respectively, to receive described first respectively
Input signal and second input signal, and formed respectively according to first input signal and second input signal logical
The second control signal crossed the first control signal of the first control output end output and exported by the second control output end；
First switch device, in the presence of first control signal controllably in conducting state or shut-off shape
Switch between state；Under the first switch device is in the conduction state so that an output device connects a power end；
The first switch device includes first switch and second switch, and the ON time of the first switch is less than described
The ON time of second switch；The first switch it is in the conduction state in the presence of first control signal and export one
First scheduled current, and switch to off state under conducting state in the second switch；
Second switch device, in the presence of second control signal controllably on or off state it
Between switch；Under the second switch device is in the conduction state so that the output device is with connecting a power supply；
The second switch device includes the 3rd switch and the 4th switch, and the described 3rd ON time switched is less than described
The ON time of 4th switch；Described 3rd switchs in the conduction state in the presence of second control signal and output one
Second scheduled current, and switched in the described 4th and switch to off state under conducting state.
The present invention operation principle be：
When first input end exports high level, in the state of the second input exports low level, first switch device turns on,
Second switch device disconnects so that output device connects power end, when first input end exports low level, the output of the second input
In the state of high level, first switch device disconnects, second switch device conducting so that output device (such as o pads) connects
Power supply.Wherein first switch device is mainly formed by first switch and second switch, and the ON time of the first switch is small
In the ON time of the second switch；Second switch device is mainly formed by the 3rd switch and the 4th switch, and the described 3rd opens
The ON time of pass is less than the ON time of the described 4th switch；Using first switch and the 3rd switch fast response characteristic,
So that input/output unit has the response speed that is exceedingly fast, at the same first switch and the 3rd switch because operational characteristic can carry compared with
Big electric current, input/output unit can be caused to obtain larger driving current.The present invention only increases first switch and
Three switches can solve technical problem, without taking excessive chip area, cost explanation, while use electrostatic protection ability ratio
Preferable first switch and the 3rd switch, strengthen the conducting homogeneity of drive circuit.
With continued reference to Fig. 3, a kind of drive circuit embodiment in the present invention, wherein：In the first switch device,
The first switch is mainly formed by the first N-type controllable silicon, and the second switch is mainly formed by the first PMOS；
The control terminal of the first N-type controllable silicon connects first control output end, input by one first phase inverter
End connects the power end, and output end connects the output device；
The grid of first PMOS connects first control output end, and input connects the power end, output
End connects the output device；
In the second switch device, the 3rd switch is mainly formed by the second N-type controllable silicon, the 4th switch master
To be formed by the second NMOS tube；
The controllable control terminal of second N-type connects second control output end, the input connection output dress
Put, output end is with connecting the power supply；
The grid of second NMOS tube connects second control output end, and input connects the output device, defeated
Go out end with connecting the power supply.Wherein VDD is power end, and GND is for power supply.
The operation principle of the present embodiment is：When first input end exports high level, and the second input exports low level,
The first control signal and the second control signal are formed in the presence of control unit, wherein the first control signal is low level, second
Control signal is high level, and then the grid of the first PMOS of first switch is low level, the control terminal of the first N-type controllable silicon
For high level, because the control terminal of the first N-type controllable silicon causes the first N-type controlled silicon conducting in the presence of high level, conducting
First N-type controllable silicon can enable the level of output device to be drawn high from low level to close to power end within the extremely short time
Level, while a larger Transient Currents can be provided so that the output state of first input end is reacted to by moment
On output device, but the first N-type controllable silicon typically all has inherent voltage, and its inherent voltage is typically larger than 1V, in the first N-type
A scheduled time (being usually the inherent delay time of PMOS) interval after controlled silicon conducting, the grid of the first PMOS is low
Turned in the presence of level, the voltage of output device is stable at the voltage of power end, because the first PMOS and the first N-type are controllable
Silicon is in parallel, and the pressure drop at the first PMOS both ends is identical with the first N-type controllable silicon both ends pressure drop, two side pressures after the conducting of the first PMOS
Drop is smaller (both ends pressure drop is typically smaller than the inherent voltage of N-type controllable silicon after PMOS conducting) so that the first N-type controllable silicon both ends
Pressure drop be less than inherent voltage, cause the first N-type controllable silicon to be off.Only the first PMOS is in the conduction state,
Second switch device is constantly in off-state in the process.
When first input end exports low level, and the second input exports high level, formed in the presence of control unit
First control signal and the second control signal, wherein the first control signal is high level, the second control signal is high level, and then
The grid of second NMOS tube of second switch is low level, and the control terminal of the second N-type control silicon is high level, because the second N-type is controllable
The control terminal of silicon causes the second N-type controlled silicon conducting in the presence of high level, and the second N-type controllable silicon of conducting can be extremely short
Time in enable the level of output device to pulled down to the low level close to power supply ground from high level, but the second N-type
Controllable silicon typically all has inherent voltage, and its inherent voltage is typically larger than 1V, the pre- timing of one after the second N-type controlled silicon conducting
Between in the inherent delay time of NMOS tube (be usually), the grid of the 2nd NMOS times turns in the presence of high level, output
The voltage of device is stable at the voltage on power supply ground, because the second NMOS tube is in parallel with the second N-type controllable silicon, the second NMOS tube both ends
Pressure drop it is identical with the second N-type controllable silicon both ends pressure drop, the second NMOS tube conducting after both ends pressure drop it is smaller (typically smaller than N-type can
Control the inherent voltage of silicon) so that the pressure drop at the second N-type controllable silicon both ends is less than inherent voltage, causes the second N-type controllable silicon to be in
Off-state, only the second NMOS tube are in the conduction state.First switch device is constantly in off-state in the process.
In above-described embodiment, because N-type controllable silicon can bear larger Transient Currents, therefore it can to input defeated
Going out device has a larger driving current, meanwhile, in the state of circuit size size is not changed, only increase a N
Type controllable silicon can improve the capability of fast response of circuit.In addition, because controllable silicon has a stronger electrostatic protection ability, energy
Enough improve the electrostatic protection of circuit.
As shown in figure 4, a kind of structural representation of N-type controllable silicon, is entered by TI and T2 electric currents equivalent in N-type controllable silicon
Row amplification, larger driving current output can be achieved.Because N-type controllable silicon can bear larger Transient Currents, therefore can
To cause input/output unit that there is a larger driving current.
As shown in figure 5, a kind of above-mentioned drive circuit, wherein：In the first switch device, the first switch is main
Formed by the first p-type controllable silicon, the second switch is mainly formed by the first PMOS；
The controllable control terminal of first p-type connects first control output end, and input connects the power end,
Output end connects the output device；
The grid of first PMOS connects first control output end, and input connects the power end, output
End connects the output device；
In the second switch device, the 3rd switch is mainly formed by the second p-type controllable silicon, the 4th switch master
To be formed by the second NMOS tube；
The controllable control terminal of second p-type connects second control output end, input by one second phase inverter
End connects the output device, and output end is with connecting the power supply；
The grid of second NMOS tube connects second control output end, and input connects the output device, defeated
Go out end with connecting the power supply.
The operation principle of above-described embodiment is similar to the operation principle of the embodiment shown in Fig. 3, only according to p-type controllable silicon
Working characteristics difference, by control unit output may be such that the control signal of p-type controlled silicon conducting can solve technology and ask
Topic.Do not repeat herein.
As shown in fig. 6, a kind of structural representation of p-type controllable silicon, is entered by TI and T2 electric currents equivalent in p-type controllable silicon
Row amplification, larger driving current output can be achieved.Because p-type controllable silicon can bear larger Transient Currents, therefore can
To cause input/output unit that there is a larger driving current.
As shown in fig. 7, a kind of above-mentioned drive circuit, wherein：In the first switch device, the first switch is main
Formed by the first p-type controllable silicon, the second switch is mainly formed by the first PMOS；
The controllable control terminal of first p-type connects first control output end, and input connects the power end,
Output end connects the output device；
The grid of first PMOS connects first control output end, and input connects the power end, output
End connects the output device；
In the second switch device, the 3rd switch is mainly formed by the second N-type controllable silicon, the 4th switch master
To be formed by the second NMOS tube；
The controllable control terminal of second N-type connects second control output end, the input connection output dress
Put, output end is with connecting the power supply；
The grid of second NMOS tube connects second control output end, and input connects the output device, defeated
Go out end with connecting the power supply.
The operation principle of above-described embodiment is similar to the operation principle of the embodiment shown in Fig. 3 or the embodiment described in Fig. 4,
Do not repeat herein.
As shown in figure 8, a kind of above-mentioned drive circuit, wherein：In the first switch device, the first switch is main
Formed by the first N-type controllable silicon, the second switch is mainly formed by the first PMOS；
The controllable control terminal of first N-type connects first control output end, input by one the 3rd phase inverter
End connects the power end, and output end connects the output device；
The grid of first PMOS connects first control output end, and input connects the power end, output
End connects the output device；
In the second switch device, the 3rd switch is mainly formed by the second p-type controllable silicon, the 4th switch master
To be formed by the second NMOS tube；
The controllable control terminal of second N-type connects second control output end, input by one the 4th phase inverter
End connects the output device, and output end is with connecting the power supply；
The grid of second NMOS tube connects second control output end, and input connects the output device, defeated
Go out end with connecting the power supply.
The operation principle of above-described embodiment is similar to the operation principle of the embodiment shown in Fig. 3 or the embodiment described in Fig. 4,
Do not repeat herein.
In the present invention, different circuit connecting modes is formed by N-type controllable silicon, p-type controllable silicon, NMOS, PMOS, passed through
Control unit exports different control signals, to realize its technical problem.Operation principle has elaborated in the above-described embodiments,
Do not repeat herein.
A kind of above-mentioned drive circuit, wherein：Described control unit includes：One NAND gate, the 3rd of the NAND gate are defeated
Enter end and connect the first input end, the 4th input connects second input by a phase inverter, and output end forms institute
State the first control output end；
One nor gate, the 5th input of the nor gate connect the first input end, described in the connection of the 6th input
Second input, output end form second control output end.
Control unit is formed by NAND gate and nor gate, when the first input signal and the difference of the second input signal, shape
Exported into the first different control signals and the second control signal, be only that the first input signal is high level, the in the present invention
Two input signals be the state of low-voltage and the first input signal be low level, the second input signal be that low level state is done
Illustrate, and the first input signal be low level, the state of the second input signal high level and the first input signal be high level,
Second input signal is that high level state does not illustrate, because the first input signal is low level, the second input signal high level
State and the first input signal are high level, the second input signal is under high level state, and output device is without output, so do not do
Explain in detail.
A kind of above-mentioned drive circuit, wherein：One first electric capacity is connected in the input of the first switch；In described
The input of three switches connects one second electric capacity.It is in circuit in electrostatic test pattern, by the first electric capacity and the second electricity
The electrostatic protection ability of the detection decision circuitry of appearance.
A kind of above-mentioned drive circuit, wherein：In the input of first control output end and the first switch device
One first level converter of series connection between end.
A kind of above-mentioned drive circuit, wherein：In the input of second control output end and the second switch device
Connected between end a second electrical level conversion equipment.
First level converter is converted into and first switch device to the first control signal for exporting control unit
The voltage signal output of matching；Such as first control signal under high level state its export voltage it is relatively small, can not drive
Dynamic first switch device, voltage magnitude of first control signal under high level state is improved by the first level converter.
Similarly the effect of second electrical level converting unit is same, does not repeat herein.
Preferred embodiments of the present invention are the foregoing is only, not thereby limit embodiments of the present invention and protection model
Enclose, to those skilled in the art, should can appreciate that all with made by description of the invention and diagramatic content
Scheme obtained by equivalent substitution and obvious change, should be included in protection scope of the present invention.
Claims (20)
- A kind of 1. drive circuit, applied to data or the input/output unit of signal, it is characterised in that：IncludingFirst input end, to receive the first input signal and export；Second input, to receive the second input signal and export；Control unit, the first input end and second input are connected respectively, to receive first input respectively Signal and second input signal, and formed respectively by according to first input signal and second input signal First control signal of one control output end output and the second control signal exported by the second control output end；First switch device, in the presence of first control signal controllably in conducting state or off state it Between switch；Under the first switch device is in the conduction state so that an output device connects a power end；The first switch device includes first switch and second switch, and the ON time of the first switch is less than described second The ON time of switch；The first switch it is in the conduction state in the presence of first control signal and export one first Scheduled current, and switch to off state under conducting state in the second switch；Second switch device, controllably to be cut in the presence of second control signal between on or off state Change；Under the second switch device is in the conduction state so that the output device is with connecting a power supply；The second switch device includes the 3rd switch and the 4th switch, and the ON time of the 3rd switch is less than the described 4th The ON time of switch；Described 3rd switchs in the conduction state in the presence of second control signal and output one second Scheduled current, and switched in the described 4th and switch to off state under conducting state；In the first switch device,The first switch is mainly formed by the first N-type controllable silicon, and the second switch is mainly formed by the first PMOS；The control terminal of the first N-type controllable silicon connects first control output end by one first phase inverter, and input connects The power end is connect, output end connects the output device；The grid of first PMOS connects first control output end, and input connects the power end, and output end connects Connect the output device；In the second switch device, it is described 3rd switch mainly formed by the second N-type controllable silicon, it is described 4th switch mainly by Second NMOS tube is formed；The controllable control terminal of second N-type connects second control output end, and input connects the output device, defeated Go out end with connecting the power supply；The grid of second NMOS tube connects second control output end, and input connects the output device, output end With connecting the power supply.
- A kind of 2. drive circuit according to claim 1, it is characterised in that：Described control unit includes：One NAND gate, the 3rd input of the NAND gate connect the first input end, and the 4th input passes through a phase inverter Second input is connected, output end forms first control output end；One nor gate, the 5th input of the nor gate connect the first input end, the 6th input connection described second Input, output end form second control output end.
- A kind of 3. drive circuit according to claim 1, it is characterised in that：One is connected in the input of the first switch First electric capacity；One second electric capacity is connected in the input of the described 3rd switch.
- A kind of 4. drive circuit according to claim 1, it is characterised in that：In first control output end and described the One first level converter of series connection between the input of one switching device.
- A kind of 5. drive circuit according to claim 1, it is characterised in that：In second control output end and described the Connected between the input of two switching devices a second electrical level conversion equipment.
- A kind of 6. drive circuit, applied to data or the input/output unit of signal, it is characterised in that：IncludingFirst input end, to receive the first input signal and export；Second input, to receive the second input signal and export；Control unit, the first input end and second input are connected respectively, to receive first input respectively Signal and second input signal, and formed respectively by according to first input signal and second input signal First control signal of one control output end output and the second control signal exported by the second control output end；First switch device, in the presence of first control signal controllably in conducting state or off state it Between switch；Under the first switch device is in the conduction state so that an output device connects a power end；The first switch device includes first switch and second switch, and the ON time of the first switch is less than described second The ON time of switch；The first switch it is in the conduction state in the presence of first control signal and export one first Scheduled current, and switch to off state under conducting state in the second switch；Second switch device, controllably to be cut in the presence of second control signal between on or off state Change；Under the second switch device is in the conduction state so that the output device is with connecting a power supply；The second switch device includes the 3rd switch and the 4th switch, and the ON time of the 3rd switch is less than the described 4th The ON time of switch；Described 3rd switchs in the conduction state in the presence of second control signal and output one second Scheduled current, and switched in the described 4th and switch to off state under conducting state；In the first switch device,The first switch is mainly formed by the first p-type controllable silicon, and the second switch is mainly formed by the first PMOS；The controllable control terminal of first p-type connects first control output end, and input connects the power end, output End connects the output device；The grid of first PMOS connects first control output end, and input connects the power end, and output end connects Connect the output device；In the second switch device, it is described 3rd switch mainly formed by the second p-type controllable silicon, it is described 4th switch mainly by Second NMOS tube is formed；The controllable control terminal of second p-type connects second control output end by one second phase inverter, and input connects The output device is connect, output end is with connecting the power supply；The grid of second NMOS tube connects second control output end, and input connects the output device, output end With connecting the power supply.
- A kind of 7. drive circuit according to claim 6, it is characterised in that：Described control unit includes：One NAND gate, the 3rd input of the NAND gate connect the first input end, and the 4th input passes through a phase inverter Second input is connected, output end forms first control output end；One nor gate, the 5th input of the nor gate connect the first input end, the 6th input connection described second Input, output end form second control output end.
- A kind of 8. drive circuit according to claim 6, it is characterised in that：One is connected in the input of the first switch First electric capacity；One second electric capacity is connected in the input of the described 3rd switch.
- A kind of 9. drive circuit according to claim 6, it is characterised in that：In first control output end and described the One first level converter of series connection between the input of one switching device.
- A kind of 10. drive circuit according to claim 6, it is characterised in that：In second control output end with it is described Connected between the input of second switch device a second electrical level conversion equipment.
- A kind of 11. drive circuit, applied to data or the input/output unit of signal, it is characterised in that：IncludingFirst input end, to receive the first input signal and export；Second input, to receive the second input signal and export；Control unit, the first input end and second input are connected respectively, to receive first input respectively Signal and second input signal, and formed respectively by according to first input signal and second input signal First control signal of one control output end output and the second control signal exported by the second control output end；First switch device, in the presence of first control signal controllably in conducting state or off state it Between switch；Under the first switch device is in the conduction state so that an output device connects a power end；The first switch device includes first switch and second switch, and the ON time of the first switch is less than described second The ON time of switch；The first switch it is in the conduction state in the presence of first control signal and export one first Scheduled current, and switch to off state under conducting state in the second switch；Second switch device, controllably to be cut in the presence of second control signal between on or off state Change；Under the second switch device is in the conduction state so that the output device is with connecting a power supply；The second switch device includes the 3rd switch and the 4th switch, and the ON time of the 3rd switch is less than the described 4th The ON time of switch；Described 3rd switchs in the conduction state in the presence of second control signal and output one second Scheduled current, and switched in the described 4th and switch to off state under conducting state；In the first switch device,The first switch is mainly formed by the first p-type controllable silicon, and the second switch is mainly formed by the first PMOS；The controllable control terminal of first p-type connects first control output end, and input connects the power end, output End connects the output device；The grid of first PMOS connects first control output end, and input connects the power end, and output end connects Connect the output device；In the second switch device, it is described 3rd switch mainly formed by the second N-type controllable silicon, it is described 4th switch mainly by Second NMOS tube is formed；The controllable control terminal of second N-type connects second control output end, and input connects the output device, defeated Go out end with connecting the power supply；The grid of second NMOS tube connects second control output end, and input connects the output device, output end With connecting the power supply.
- A kind of 12. drive circuit according to claim 11, it is characterised in that：Described control unit includes：One NAND gate, the 3rd input of the NAND gate connect the first input end, and the 4th input passes through a phase inverter Second input is connected, output end forms first control output end；One nor gate, the 5th input of the nor gate connect the first input end, the 6th input connection described second Input, output end form second control output end.
- A kind of 13. drive circuit according to claim 11, it is characterised in that：Connected in the input of the first switch One first electric capacity；One second electric capacity is connected in the input of the described 3rd switch.
- A kind of 14. drive circuit according to claim 11, it is characterised in that：In first control output end with it is described One first level converter of series connection between the input of first switch device.
- A kind of 15. drive circuit according to claim 11, it is characterised in that：In second control output end with it is described Connected between the input of second switch device a second electrical level conversion equipment.
- A kind of 16. drive circuit, applied to data or the input/output unit of signal, it is characterised in that：IncludingFirst input end, to receive the first input signal and export；Second input, to receive the second input signal and export；Control unit, the first input end and second input are connected respectively, to receive first input respectively Signal and second input signal, and formed respectively by according to first input signal and second input signal First control signal of one control output end output and the second control signal exported by the second control output end；First switch device, in the presence of first control signal controllably in conducting state or off state it Between switch；Under the first switch device is in the conduction state so that an output device connects a power end；The first switch device includes first switch and second switch, and the ON time of the first switch is less than described second The ON time of switch；The first switch it is in the conduction state in the presence of first control signal and export one first Scheduled current, and switch to off state under conducting state in the second switch；Second switch device, controllably to be cut in the presence of second control signal between on or off state Change；Under the second switch device is in the conduction state so that the output device is with connecting a power supply；The second switch device includes the 3rd switch and the 4th switch, and the ON time of the 3rd switch is less than the described 4th The ON time of switch；Described 3rd switchs in the conduction state in the presence of second control signal and output one second Scheduled current, and switched in the described 4th and switch to off state under conducting state；In the first switch device,The first switch is mainly formed by the first N-type controllable silicon, and the second switch is mainly formed by the first PMOS；The controllable control terminal of first N-type connects first control output end by one the 3rd phase inverter, and input connects The power end is connect, output end connects the output device；The grid of first PMOS connects first control output end, and input connects the power end, and output end connects Connect the output device；In the second switch device, it is described 3rd switch mainly formed by the second p-type controllable silicon, it is described 4th switch mainly by Second NMOS tube is formed；The controllable control terminal of second N-type connects second control output end by one the 4th phase inverter, and input connects The output device is connect, output end is with connecting the power supply；The grid of second NMOS tube connects second control output end, and input connects the output device, output end With connecting the power supply.
- A kind of 17. drive circuit according to claim 16, it is characterised in that：Described control unit includes：One NAND gate, the 3rd input of the NAND gate connect the first input end, and the 4th input passes through a phase inverter Second input is connected, output end forms first control output end；One nor gate, the 5th input of the nor gate connect the first input end, the 6th input connection described second Input, output end form second control output end.
- A kind of 18. drive circuit according to claim 16, it is characterised in that：Connected in the input of the first switch One first electric capacity；One second electric capacity is connected in the input of the described 3rd switch.
- A kind of 19. drive circuit according to claim 16, it is characterised in that：In first control output end with it is described One first level converter of series connection between the input of first switch device.
- A kind of 20. drive circuit according to claim 16, it is characterised in that：In second control output end with it is described Connected between the input of second switch device a second electrical level conversion equipment.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510220585.2A CN104836438B (en) | 2015-05-04 | 2015-05-04 | A kind of switch circuit devices and drive circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510220585.2A CN104836438B (en) | 2015-05-04 | 2015-05-04 | A kind of switch circuit devices and drive circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN104836438A CN104836438A (en) | 2015-08-12 |
| CN104836438B true CN104836438B (en) | 2018-03-02 |
Family
ID=53814122
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510220585.2A Active CN104836438B (en) | 2015-05-04 | 2015-05-04 | A kind of switch circuit devices and drive circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN104836438B (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105576946B (en) * | 2015-12-28 | 2018-09-25 | 上海数明半导体有限公司 | Power tube drive circuit and method |
| CN111146931B (en) * | 2019-12-23 | 2021-12-14 | 广东美的白色家电技术创新中心有限公司 | Drive circuit of power device and electronic equipment |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104467095A (en) * | 2014-12-09 | 2015-03-25 | 芯荣半导体有限公司 | Constant-current and constant-voltage charger chip based on ACOT framework |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5101741B2 (en) * | 2011-04-08 | 2012-12-19 | シャープ株式会社 | Semiconductor device and inverter, converter and power conversion device using the same |
-
2015
- 2015-05-04 CN CN201510220585.2A patent/CN104836438B/en active Active
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104467095A (en) * | 2014-12-09 | 2015-03-25 | 芯荣半导体有限公司 | Constant-current and constant-voltage charger chip based on ACOT framework |
Also Published As
| Publication number | Publication date |
|---|---|
| CN104836438A (en) | 2015-08-12 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN106157867B (en) | Shift register cell, driving method, gate driving circuit and display device | |
| CN102208909A (en) | Level shift circuit | |
| CN107181482A (en) | input and output receiving circuit | |
| CN110289848A (en) | Voltage level converting | |
| CN104836438B (en) | A kind of switch circuit devices and drive circuit | |
| CN104731161B (en) | The stacking clock distribution of low-power equipment | |
| CN107066021B (en) | A kind of button multiplexing circuit and electronic equipment | |
| CN101494450B (en) | Level transfer circuit | |
| CN107908220A (en) | A kind of generating circuit from reference voltage suitable for wide power voltage scope | |
| CN208797824U (en) | Output driving circuit and chip | |
| CN101958652B (en) | Power supply multigroup output circuit | |
| CN209313715U (en) | Double mode isolation control circuit | |
| CN203261300U (en) | Radio-frequency variable attenuator | |
| CN106788493A (en) | A kind of low speed transmitter circuit | |
| CN107546976A (en) | Charge pump circuit and charge pump | |
| CN201323560Y (en) | High-capacity switch driving circuit | |
| CN206878701U (en) | Differential charge pump circuit | |
| CN207588827U (en) | A kind of self-locking power switch device | |
| CN206878802U (en) | High Pressure Difference level shifting circuit | |
| CN208241644U (en) | A kind of transmission gate circuit that high input voltage is isolated | |
| CN104600797B (en) | Battery management circuit and terminal | |
| CN206077358U (en) | Bidirectional digital signal level-conversion circuit | |
| CN207233006U (en) | A kind of antenna switch circuit and smart card | |
| CN101197125A (en) | Level shift circuit and display using same | |
| CN110120805A (en) | Logic function block, logic circuit, integrated circuit and electronic device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| EXSB | Decision made by sipo to initiate substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |