CN111146931B

CN111146931B - Drive circuit of power device and electronic equipment

Info

Publication number: CN111146931B
Application number: CN201911340918.XA
Authority: CN
Inventors: 刘利书; 冯宇翔
Original assignee: Midea Group Co Ltd; Guangdong Midea White Goods Technology Innovation Center Co Ltd
Current assignee: Midea Group Co Ltd; Guangdong Midea White Goods Technology Innovation Center Co Ltd
Priority date: 2019-12-23
Filing date: 2019-12-23
Publication date: 2021-12-14
Anticipated expiration: 2039-12-23
Also published as: CN111146931A

Abstract

The application discloses drive circuit and electronic equipment of power device, wherein, this drive circuit includes: a control signal input terminal for inputting a control signal; the driving signal output end is connected with the power device; the first switch assembly is connected between the driving power supply signal and the ground signal and is connected with the control signal input end and the driving signal output end; the second switch assembly is connected between the driving power supply signal and the ground signal and is connected with the control signal input end and the driving signal output end; the switching time of the first switching component is shorter than that of the second switching component, and the switching time is a time interval of pulling up or pulling down the signal potential output by the driving signal output end. Through the mode, the power device with the high-frequency switching characteristic can be rapidly started and closed, and the power device can be continuously driven under the condition of conduction.

Description

Drive circuit of power device and electronic equipment

Technical Field

The present disclosure relates to power devices, and particularly to a driving circuit of a power device and an electronic device.

Background

The power semiconductor device is the basis of power electronic technology, is the core of power electronic equipment, and during the working process, there are two kinds of power loss: the switching loss and the conduction loss of the device are mainly the on-off loss when the device works at high frequency. In practical applications, the device is required to be turned on and off in a limited time, the voltage and current change is completed instantaneously, otherwise the device fails and other system components are likely to be damaged. Therefore, as a switching device, the power semiconductor device must have the characteristics of high switching speed, large current and voltage bearing capability, small operating loss, and the like.

With the development of Si (silicon) -based power devices for decades, the switching performance has approached the theoretical limit, and if the performance is further improved, the cost is increased greatly. Conventional Si-based power devices have failed to meet the need for faster switching speeds, higher power efficiency, and lower losses. Therefore, the wide bandgap semiconductor materials SiC (silicon carbide) and GaN (gallium nitride) become ideal materials for new power electronic devices. The wide-bandgap semiconductor material represented by GaN has the characteristics of wide band gap, high electron drift velocity, high thermal conductivity, high voltage resistance and the like, and the advantages enable the GaN-based switching device to have lower loss and better characteristics.

Disclosure of Invention

In order to solve the above problems, the present application provides a driving circuit of a power device and an electronic apparatus, which can ensure that the power device with high frequency switching characteristics can be turned on and off rapidly, and can also ensure that the power device is driven continuously under the condition of being turned on.

The technical scheme adopted by the application is as follows: there is provided a driving circuit of a power device, the driving circuit including: a control signal input terminal for inputting a control signal; the driving signal output end is connected with the power device; the first switch assembly is connected between the driving power signal and the ground signal, connected with the control signal input end and the driving signal output end and used for responding to the control signal to conduct a path between the driving power signal and the driving signal output end or a path between the ground signal and the driving signal output end so as to switch the driving power signal or the ground signal to the driving signal output end to drive the power device; the second switch assembly is connected between the driving power signal and the ground signal, connected with the control signal input end and the driving signal output end and used for responding to the control signal to conduct a path between the driving power signal and the driving signal output end or a path between the ground signal and the driving signal output end so as to switch the driving power signal or the ground signal to the driving signal output end to drive the power device; the switching time of the first switching component is shorter than that of the second switching component, and the switching time is a time interval of pulling up or pulling down the signal potential output by the driving signal output end.

And the size of the switch tube in the first switch assembly is smaller than that of the switch tube in the second switch assembly.

The switch tube is an MOS tube, and the size of the switch tube represents the width/length ratio of the MOS tube; or the switch tube is a triode, and the size of the switch tube represents the area of an emitter region or a collector region of the triode.

Wherein, first switch module includes: the input end of the inverting circuit is connected with the control signal input end; the control end of the first switch tube is connected with the output end of the inverter circuit, the input end of the first switch tube is connected with a driving power supply signal, and the output end of the first switch tube is connected with a driving signal output end; and the control end of the second switch tube is connected with the output end of the inverter circuit, the input end of the second switch tube is connected with a ground signal, and the output end of the second switch tube is connected with the driving signal output end.

One of the first switch tube and the second switch tube is an N-type switch tube, and the other of the first switch tube and the second switch tube is a P-type switch tube.

Wherein, the inverter circuit includes: the input end of the inverter is connected with the control signal input end; the input end of the voltage rising/reducing circuit is connected with the output end of the phase inverter, and the output end of the voltage rising/reducing circuit is connected with the control ends of the first switch tube and the second switch tube.

Wherein, the inverter circuit includes: the input end of the first inverter is connected with the control signal input end; the input end of the first voltage rising/reducing circuit is connected with the output end of the first phase inverter, and the output end of the first voltage rising/reducing circuit is connected with the control end of the first switching tube; the input end of the second inverter is connected with the control signal input end; and the input end of the second voltage rising/reducing circuit is connected with the output end of the second phase inverter, and the output end of the second voltage rising/reducing circuit is connected with the control end of the second switching tube.

Wherein, the second switch module includes: the control end of the third switching tube is connected with the control signal input end, the input end of the third switching tube is connected with the driving power supply signal, and the output end of the third switching tube is connected with the driving signal output end; and the control end of the fourth switching tube is connected with the control signal input end, the input end of the fourth switching tube is connected with a ground signal, and the output end of the fourth switching tube is connected with the driving signal output end.

One of the third switching tube and the fourth switching tube is an N-type switching tube, and the other of the third switching tube and the fourth switching tube is a P-type switching tube.

Another technical scheme adopted by the application is as follows: an electronic device is provided, the electronic device including: a power device; and the driving circuit is connected with the power device to drive the power device to be switched on and switched off, and is the driving circuit.

The power device is a GaN power device or a SiC power device.

The application provides a drive circuit of power device includes: the control signal input end is used for inputting a control signal; the driving signal output end is connected with a power device; the first switch assembly is used for responding to the control signal to conduct a path between the driving power supply signal and the driving signal output end or a path between the ground signal and the driving signal output end, so that the driving power supply signal or the ground signal is switched to the driving signal output end to drive the power device; the second switch component is used for responding to the control signal to conduct a path between the driving power supply signal and the driving signal output end or a path between the ground signal and the driving signal output end, so that the driving power supply signal or the ground signal is switched to the driving signal output end to drive the power device. Because the switching time of the first switching component is shorter than that of the second switching component, the first switching component is short in opening and conducting time, a driving power supply signal can be rapidly input to the driving signal output end to drive the power device, then the second switching component is conducted, and the driving power supply signal is continuously input to the driving signal output end to continuously drive the power device. Through the mode, the power device with the high-frequency switching characteristic can be rapidly started and closed, and the power device can be continuously driven under the condition of conduction.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts. Wherein:

fig. 1 is a schematic structural diagram of a first embodiment of a driving circuit of a power device provided in the present application;

FIG. 2 is a schematic diagram of the switching time of the switching tube provided in the present application;

fig. 3 is a schematic structural diagram of a second embodiment of a driving circuit of a power device provided in the present application;

fig. 4 is a schematic structural diagram of a third embodiment of a driving circuit of a power device provided in the present application;

fig. 5 is a schematic structural diagram of a fourth embodiment of a driving circuit of a power device provided in the present application;

fig. 6 is a schematic structural diagram of a fifth embodiment of a driving circuit of a power device provided in the present application;

fig. 7 is a schematic structural diagram of a sixth embodiment of a driving circuit of a power device provided in the present application;

fig. 8 is a schematic structural diagram of a seventh embodiment of a driving circuit of a power device provided in the present application;

fig. 9 is a schematic structural diagram of an electronic device provided in the present application.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It is to be understood that the specific embodiments described herein are merely illustrative of the application and are not limiting of the application. It should be further noted that, for the convenience of description, only some of the structures related to the present application are shown in the drawings, not all of the structures. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

The terms "first", "second", etc. in this application are used to distinguish between different objects and not to describe a particular order. Furthermore, the terms "include" and "have," as well as any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements listed, but may alternatively include other steps or elements not listed, or inherent to such process, method, article, or apparatus.

Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. It is explicitly and implicitly understood by one skilled in the art that the embodiments described herein can be combined with other embodiments.

Wide bandgap semiconductor materials SiC (silicon carbide) and GaN (gallium nitride) are ideal materials for new power electronic devices. The wide-bandgap semiconductor material represented by GaN has the characteristics of wide band gap, high electron drift velocity, high thermal conductivity, high voltage resistance and the like, and the advantages enable the GaN-based switching device to have lower loss and better characteristics.

Taking a GaN FET (Field Effect Transistor) as an example, it has a faster switching speed than a Si MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), but there are some factors that need special attention: low threshold voltage, low upper gate-source voltage vgs (max), reverse conducting, etc. These disadvantages result in that the conventional driving circuit for MOS power device is not suitable for GaN power device. Because the GaN power device is usually used at a high-frequency switching frequency (above MHz), especially after the switching frequency reaches 10MHz, a large delay (tens of nanoseconds) of a conventional gate driving circuit accounts for an excessively large proportion of a switching period, even resulting in a logic error, thereby limiting the increase of the switching frequency.

Referring to fig. 1, fig. 1 is a schematic structural diagram of a first embodiment of a driving circuit of a power device provided in the present application, where the driving circuit 10 includes a control signal input terminal 11, a driving signal output terminal 12, a first switching element 13, and a second switching element 14.

The control signal input end 11 is used for inputting a control signal; the driving signal output terminal 12 is connected to a power device (not shown).

The first switch component 13 is connected between the driving power signal and the ground signal, and is connected to the control signal input terminal 11 and the driving signal output terminal 12, and is configured to respond to the control signal to turn on a path between the driving power signal and the driving signal output terminal, or a path between the ground signal and the driving signal output terminal, so as to switch the driving power signal or the ground signal to the driving signal output terminal 12 to drive the power device.

Wherein, the second switch component 14 is similar to the first switch component 13, the second switch component 14 is connected between the driving power signal and the ground signal, and is connected with the control signal input terminal 11 and the driving signal output terminal 12, and is used for responding to the control signal to conduct the path between the driving power signal and the driving signal output terminal, or the path between the ground signal and the driving signal output terminal, so as to switch the driving power signal or the ground signal to the driving signal output terminal 12 to drive the power device.

Alternatively, the control signal in this embodiment may be a high-level signal or a low-level signal, and is used to turn on or off the switching tubes in the first switching assembly 13 and the second switching assembly 14, so that the driving power signal or the low signal is input to the driving signal output end 12.

The first switch assembly 13 and the second switch assembly 14 are parallel to each other, and the functions of the two switch assemblies are the same. In this embodiment, the switching time of the first switching element 13 is shorter than the switching time of the second switching element 14, and the switching time is a time interval during which the signal potential output by the driving signal output terminal is pulled high or low.

In particular, the switching time of the switching tube in the first switching assembly 13 is smaller than the switching time of the switching tube in the second switching assembly 14.

As shown in fig. 2, fig. 2 is a schematic diagram of switching time of the switching tube provided in the present application, taking a triode as an example, an upper diagram of fig. 2 shows a schematic diagram of input current variation, and a lower diagram of fig. 2 shows a schematic diagram of output current variation.

The switching time of the switch stem can be on time, off time, or the sum of the on time and the off time. That is, the on time of the switch tube in the first switch assembly 13 is less than the on time of the switch tube in the second switch assembly 14, or the off time of the switch tube in the first switch assembly 13 is less than the off time of the switch tube in the second switch assembly 14, or the sum of the on time and the off time of the switch tube in the first switch assembly 13 is less than the sum of the on time and the off time of the switch tube in the second switch assembly 14.

The on time includes a delay time td (t0-t1) and a rise time tr (t1-t2), and the off time includes a storage time ts (t3-t4) and a fall time tf (t4-t5), it is understood that the on time of the switching tube in the first switching assembly 13 is less than the on time of the switching tube in the second switching assembly 14, which may be the delay time td (t0-t1) of the switching tube in the first switching assembly 13, the rise time tr (t1-t2), or the sum of the two times is less than the switching tube in the second switching assembly 14; the off time of the switch tube in the first switch module 13 is less than that of the second switch module 14, and it may be that the storage time ts (t3-t4), the falling time tf (t4-t5) or the sum of the two of the switch tube in the first switch module 13 is less than that of the second switch module 14.

Among them, there are various methods for reducing the switching time of the switching assembly, for example, the design parameters of the switching tube in the switching assembly can be changed, such as adjusting the size of the switching tube; the peripheral circuits of the switch tube can be changed, such as setting an accelerating circuit, such as an accelerating capacitor and the like.

Taking the delay time as an example, the delay time is mainly a time constant for charging the emitter and collector barrier capacitances. The main measures for shortening the delay time can reduce the areas of an emitter and a collector (reducing barrier capacitance) and the size of reverse bias of a base (enabling the emitter to enter forward bias to turn on a transistor) from the design of a device; for transistor use, the amplitude of the input base current pulse can be increased to speed up the charging of the junction capacitance.

Taking the rise time as an example, the rise time is the time required for the transistor to reach critical saturation (i.e. collector bias 0) after the base minority carrier charges are accumulated to a certain degree. The main measures for shortening the rise time are that from the design of the device, the minority carrier lifetime of the base electrode can be normal (the accumulation of minority carriers is accelerated), the base electrode width and the junction area can be reduced (the quantity of the base electrode minority carrier charges during critical saturation can be reduced), and the characteristic frequency of the transistor can be improved (a certain minority carrier concentration gradient can be established at the base electrode as soon as possible, so that the collector current can be saturated); for transistor use, the amplitude of the base input current pulse can be increased to increase the speed of base injection of minority carriers.

Taking the storage time as an example, the storage time is the time required for the transistor to exit from the oversaturated state (collector forward biased) to the critical saturated state (collector 0 biased), i.e. the time during which the excess stored charge in the base and collector disappears. And the disappearance of the excessive minority carrier storage charges is mainly completed by means of recombination, so that from the design of the device, the minority carrier lifetime of the collector can be shortened by doping Au and the like on the collector (so as to reduce the excessive storage charges of the collector and accelerate the disappearance of the excessive storage charges), and the thickness of the epitaxial layer can be reduced as much as possible (so as to reduce the excessive storage charges of the collector). In terms of transistor usage, the main measures for shortening the storage time are to prevent the amplitude of the base input current pulse from being too large (so as to avoid the transistor from being saturated too deeply, so that the excessive stored charges are reduced), and to increase the base extraction current (so as to accelerate the disappearance speed of the excessive stored charges).

Taking the fall time as an example, the course of the fall time is opposite to the course of the rise time, i.e., a course of letting the stored charge in the base gradually disappear at critical saturation. Therefore, to reduce the fall time, the stored charge should be reduced (reduced junction area, reduced base width) and the base extraction current should be increased.

Optionally, in another embodiment, the size of the switching tube in the first switching assembly 13 is smaller than the size of the switching tube in the second switching assembly 14. Through the above analysis, when reducing the size of the switching tube in the first switching assembly 13, it is possible to:

1. reducing the area of the emitter or collector;

2. reducing the base width or reducing the junction area;

3. the collector is doped with Au or the like to shorten the minority carrier lifetime of the collector or reduce the thickness of the epitaxial layer.

The size of the switching tube may affect the on-off time of the switching tube, and specifically, the smaller the size of the switching tube, the shorter the on-off time of the switching tube is, and conversely, the larger the size of the switching tube, the longer the on-off time of the switching tube is. The switching tube can be a MOS tube or a triode.

In an embodiment, the switch is a MOS transistor manufactured by a CMOS process, and the size of the switch represents a width/length ratio of the MOS transistor, that is, the width/length ratio of the MOS transistor in the first switch component 13 is smaller than that of the MOS transistor in the second switch component 14.

In another embodiment, the switching transistor is a triode (e.g., BJT, bipolar junction transistor) and represents the area of the emitter or collector region of the triode, i.e., the area of the emitter or collector region of the triode in the first switching component 13 is smaller than the area of the emitter or collector region of the triode in the second switching component 14.

The following description will be given by taking a MOS transistor as an example.

The conduction characteristic of the MOS tube is as follows: the NMOS characteristic, Vgs greater than a certain value turns on, and is suitable for the case of grounded source (low side driving), as long as the gate voltage reaches a certain voltage (e.g. 4V or 10V). PMOS characteristics, Vgs is turned on when it is smaller than a certain value, and is suitable for use in the case where the source is connected to VCC (high-side drive).

Whether NMOS or PMOS, there is an on-resistance after turn-on, so that while current flows between DS (drain and source), there is a voltage across the two terminals, so that current dissipates energy at this resistance, which is called the on-loss. The MOS transistor with small on-resistance is selected to reduce the on-loss.

The MOS transistor is not completed instantaneously when being turned on or off. The voltage at two ends of the MOS tube has a descending or ascending process, the flowing current has an ascending or descending process, and the loss of the MOS tube in the period of time is the product of the voltage and the current, namely the switching loss.

The MOS transistor generally has the following two parameters:

td (on): the on-delay time, the time from when there is an input voltage rise to 10% to when Vds (drain-source voltage) drops to 90% of its amplitude.

Td (off): off delay time, the time from when there is a drop in input voltage to 90% to when Vds rises to its off voltage 10%.

In addition, although the switching tube having a small size has a short on/off time, the switching tube has a low output capability after being turned on. On the contrary, the switching tube with large size has longer on and off time, but has stronger output capability after being turned on.

Therefore, in this embodiment, by arranging the switching tubes of two sizes in parallel, when the switching is required, since the first switching element 13 has a short conduction time, the driving power signal can be rapidly input to the driving signal output end 12 to drive the power device, then the second switching element 14 is turned on, and then the driving power signal is continuously input to the driving signal output end 12 to continuously drive the power device.

Referring to fig. 3, fig. 3 is a schematic structural diagram of a second embodiment of a driving circuit of a power device provided in the present application, where the driving circuit 10 includes a control signal input terminal 11, a driving signal output terminal 12, a first switching element 13, and a second switching element 14.

The first switch assembly 13 includes an inverter circuit 131, a first switch tube M1 and a second switch tube M2. The input end of the inverter circuit 131 is connected to the control signal input end 11, the control end of the first switch tube M1 is connected to the output end of the inverter circuit 131, the input end of the first switch tube M1 is connected to the driving power signal, and the output end of the first switch tube M1 is connected to the driving signal output end 12. The control terminal of the second switch transistor M2 is connected to the output terminal of the inverter circuit 131, the input terminal of the second switch transistor M2 is connected to the ground signal, and the output terminal of the second switch transistor M2 is connected to the driving signal output terminal 12.

Optionally, in an embodiment where the first switching transistor M1 and the second switching transistor M2 are MOS transistors, the control terminals of the first switching transistor M1 and the second switching transistor M2 correspond to the gate (G) of the MOS transistor, and the input terminals and the output terminals of the first switching transistor M1 and the second switching transistor M2 correspond to the source (S) and the drain (D), or the drain and the source, respectively, of the MOS transistor.

The second switch assembly 14 includes a third switch tube M3 and a fourth switch tube M4. The control end of the third switch tube M3 is connected with the control signal input end 11, the input end of the third switch tube M3 is connected with the driving power supply signal, and the output end of the third switch tube M3 is connected with the driving signal output end 12; the control end of the fourth switching tube M4 is connected to the control signal input end 11, the input end of the fourth switching tube M4 is connected to the ground signal, and the output end of the fourth switching tube M4 is connected to the driving signal output end 12.

Optionally, in an embodiment where the third switching transistor M3 and the fourth switching transistor M4 are MOS transistors, control terminals of the third switching transistor M3 and the fourth switching transistor M4 correspond to gates (G) of the MOS transistors, and input terminals and output terminals of the third switching transistor M3 and the fourth switching transistor M4 correspond to sources (S) and drains (D) of the MOS transistors, or drains and sources, respectively.

In the present embodiment, one of the first switch tube M1 and the second switch tube M2 is an N-type switch tube, and the other of the first switch tube M1 and the second switch tube M2 is a P-type switch tube. One of the third switching tube M3 and the fourth switching tube M4 is an N-type switching tube, and the other of the third switching tube M3 and the fourth switching tube M4 is a P-type switching tube. In the present embodiment, the sizes of the first switching tube M1 and the second switching tube M2 are smaller than the sizes of the third switching tube M3 and the fourth switching tube M4.

In the embodiment, M1 is NMOS, M2 is PMOS, M3 is PMOS, and M4 is NMOS. The specific working principle of the circuit is as follows:

when the power device needs to be turned on, the control signal input by the control signal input terminal 11 is at a low level, and changes to a high level after passing through the inverter circuit 131, the high level signal turns M1 on and M2 off, and further, M1 is on and inputs the driving power signal to the driving signal output terminal 12 to drive the power device. Meanwhile, the low-level control signal input from the control signal input terminal 11 turns M3 on, turns M4 off, and turns M3 on, so that the driving power signal is input to the driving signal output terminal 12 to drive the power device.

When the power device needs to be turned off, the control signal input from the control signal input terminal 11 is at a high level, and after passing through the inverter circuit 131, the control signal becomes at a low level, the low level signal turns off M1 and turns on M2, and further, M2 is turned on so that the ground signal is input to the driving signal output terminal 12, so that the power device is turned off. Meanwhile, the control signal of high level input by the control signal input terminal 11 turns off M3, turns on M4, and turns on M4, so that the ground signal is input to the driving signal output terminal 12, and the power device is turned off.

Referring to fig. 4, fig. 4 is a schematic structural diagram of a third embodiment of a driving circuit of a power device provided in the present application, where the driving circuit 10 includes a control signal input terminal 11, a driving signal output terminal 12, a first switching element 13, and a second switching element 14.

The first switch assembly 13 includes a first switch tube M1 and a second switch tube M2. The control end of the first switch tube M1 is connected to the control signal input end 11, the input end of the first switch tube M1 is connected to the driving power signal, and the output end of the first switch tube M1 is connected to the driving signal output end 12. The control end of the second switch tube M2 is connected to the control signal input end 11, the input end of the second switch tube M2 is connected to the ground signal, and the output end of the second switch tube M2 is connected to the driving signal output end 12.

In the present embodiment, the sizes of the first switching tube M1 and the second switching tube M2 are smaller than the sizes of the third switching tube M3 and the fourth switching tube M4.

In the embodiment, M1 is NMOS, M2 is PMOS, M3 is NMOS, and M4 is PMOS. The specific working principle of the circuit is as follows:

when the power device needs to be turned on, the control signal input by the control signal input terminal 11 is at a high level, the high level signal turns M1 on and M2 off, and further, M1 is turned on so that the driving power signal is input to the driving signal output terminal 12 to drive the power device. Meanwhile, the control signal of high level input by the control signal input terminal 11 turns on M3, turns off M4, and turns on M3, so that the driving power signal is input to the driving signal output terminal 12 to drive the power device.

When the power device needs to be turned off, the control signal input from the control signal input terminal 11 is at a low level, the low level signal turns off M1 and turns on M2, and further, M2 is turned on so that the ground signal is input to the driving signal output terminal 12, so that the power device is turned off. Meanwhile, the low-level control signal input from the control signal input terminal 11 turns off M3, turns on M4, and turns on M4, so that the ground signal is input to the driving signal output terminal 12, and the power device is turned off.

Referring to fig. 5, fig. 5 is a schematic structural diagram of a fourth embodiment of a driving circuit of a power device provided in the present application, where the driving circuit 10 includes a control signal input terminal 11, a driving signal output terminal 12, a first switching element 13, and a second switching element 14.

The first switch assembly 13 includes an inverter N, a buck/boost circuit 132, a first switch M1, and a second switch M2. The input end of the phase inverter N is connected to the control signal input end 11, the input end of the step-up/step-down circuit 132 is connected to the output end of the phase inverter N, the control end of the first switch tube M1 is connected to the output end of the step-up/step-down circuit 132, the input end of the first switch tube M1 is connected to the driving power supply signal, and the output end of the first switch tube M1 is connected to the driving signal output end 12. The control terminal of the second switch M2 is connected to the output terminal of the buck/boost circuit 132, the input terminal of the second switch M2 is connected to the ground signal, and the output terminal of the second switch M2 is connected to the driving signal output terminal 12.

when the power device needs to be turned on, the control signal input by the control signal input terminal 11 is at a low level, and becomes at a high level after passing through the inverter N, and is further raised by the step-up/step-down circuit 132, the high level signal turns on the M1 and turns off the M2, and further, the M1 is turned on so that the driving power signal is input to the driving signal output terminal 12 to drive the power device. Meanwhile, the low-level control signal input from the control signal input terminal 11 turns M3 on, turns M4 off, and turns M3 on, so that the driving power signal is input to the driving signal output terminal 12 to drive the power device.

When the power device needs to be turned off, the control signal input by the control signal input terminal 11 is at a high level, passes through the inverter N and then becomes at a low level, and is further reduced by the step-up/step-down circuit 132, the low level signal turns off M1 and turns on M2, and further, the M2 is turned on so that the ground signal is input to the driving signal output terminal 12, so that the power device is turned off. Meanwhile, the control signal of high level input by the control signal input terminal 11 turns off M3, turns on M4, and turns on M4, so that the ground signal is input to the driving signal output terminal 12, and the power device is turned off.

In another embodiment, two inverters and two step-up/down circuits may also be respectively adopted, as shown in fig. 6, fig. 6 is a schematic structural diagram of a fifth embodiment of the driving circuit of the power device provided by the present application. The driving circuit 10 includes a control signal input terminal 11, a driving signal output terminal 12, a first switching element 13 and a second switching element 14.

The first switch assembly 13 includes a first inverter N1, a first buck/boost circuit 132a, a second inverter N2, a second buck/boost circuit 132b, a first switch M1, and a second switch M2. The input end of the first inverter N1 is connected to the control signal input end 11, the input end of the first step-up/step-down circuit 132a is connected to the output end of the first inverter N1, the control end of the first switch tube M1 is connected to the output end of the first step-up/step-down circuit 132a, the input end of the first switch tube M1 is connected to the driving power signal, and the output end of the first switch tube M1 is connected to the driving signal output end 12. The input end of the second inverter N2 is connected to the control signal input end 11, the input end of the second step-up/step-down circuit 132b is connected to the output end of the second inverter N2, the control end of the second switch transistor M2 is connected to the output end of the second step-up/step-down circuit 132b, the input end of the second switch transistor M2 is connected to the ground signal, and the output end of the second switch transistor M2 is connected to the driving signal output end 12.

When the power device needs to be turned on, the control signal input by the control signal input terminal 11 is at a low level, and becomes at a high level after passing through the first inverter N1 and the second inverter N2, and is further raised by the first step-up/step-down circuit 132a and the second step-up/step-down circuit 132b, the high level signal turns on the M1 and turns off the M2, and further, the M1 is turned on so that the driving power signal is input to the driving signal output terminal 12 to drive the power device. Meanwhile, the low-level control signal input from the control signal input terminal 11 turns M3 on, turns M4 off, and turns M3 on, so that the driving power signal is input to the driving signal output terminal 12 to drive the power device.

When the power device needs to be turned off, the control signal input by the control signal input terminal 11 is at a high level, passes through the first inverter N1 and the second inverter N2, then becomes at a low level, and is further reduced by the first step-up/step-down circuit 132a and the second step-up/step-down circuit 132b, the low level signal turns off M1 and turns on M2, and further, M2 is turned on so that the ground signal is input to the driving signal output terminal 12, so that the power device is turned off. Meanwhile, the control signal of high level input by the control signal input terminal 11 turns off M3, turns on M4, and turns on M4, so that the ground signal is input to the driving signal output terminal 12, and the power device is turned off.

Referring to fig. 7, fig. 7 is a schematic structural diagram of a sixth embodiment of a driving circuit of a power device provided in the present application, where the driving circuit 10 includes a control signal input terminal 11, a driving signal output terminal 12, a first switching element 13, and a second switching element 14.

In the embodiment, M1 is PMOS, M2 is NMOS, M3 is NMOS, and M4 is PMOS. The specific working principle of the circuit is as follows:

when the power device needs to be turned on, the control signal input by the control signal input terminal 11 is at a high level, and changes to a low level after passing through the inverter N, and further decreases through the step-up/step-down circuit 132, the low level signal turns M1 on and M2 off, and further, M1 turns on so that the driving power signal is input to the driving signal output terminal 12 to drive the power device. Meanwhile, the control signal of high level input by the control signal input terminal 11 turns on M3, turns off M4, and turns on M3, so that the driving power signal is input to the driving signal output terminal 12 to drive the power device.

When the power device needs to be turned off, the control signal input by the control signal input terminal 11 is at a high level, and becomes at a high level after passing through the inverter N, and is further raised by the step-up/step-down circuit 132, the high level signal turns off M1 and turns on M2, and further, the M2 is turned on so that the ground signal is input to the driving signal output terminal 12, so that the power device is turned off. Meanwhile, the low-level control signal input from the control signal input terminal 11 turns off M3, turns on M4, and turns on M4, so that the ground signal is input to the driving signal output terminal 12, and the power device is turned off.

Referring to fig. 8, fig. 8 is a schematic structural diagram of a seventh embodiment of a driving circuit of a power device provided in the present application, where the driving circuit 10 includes a control signal input terminal 11, a driving signal output terminal 12, a first switching element 13, a second switching element 14, and a signal processor 15.

The signal processor 15 is configured to receive an input signal, and convert the input signal into control signals corresponding to different levels, so as to control the switching tubes in the first switching assembly 13 or the second switching assembly 14 to be turned on or off.

It will be appreciated that in this embodiment, the first switch assembly 13 and the second switch assembly 14 are juxtaposed and function identically. However, in the present embodiment, the size of the switching tube in the first switching assembly 13 is smaller than that in the second switching assembly 14.

Different from the prior art, the driving circuit of the power device provided by the application comprises: the control signal input end is used for inputting a control signal; the driving signal output end is connected with a power device; the first switch assembly is used for responding to the control signal to conduct a path between the driving power supply signal and the driving signal output end or a path between the ground signal and the driving signal output end, so that the driving power supply signal or the ground signal is switched to the driving signal output end to drive the power device; the second switch component is used for responding to the control signal to conduct a path between the driving power supply signal and the driving signal output end or a path between the ground signal and the driving signal output end, so that the driving power supply signal or the ground signal is switched to the driving signal output end to drive the power device. Because the switching time of the first switching component is shorter than that of the second switching component, the first switching component has short conduction time, can quickly input the driving power supply signal to the driving signal output end to drive the power device, then the second switching component is conducted, and then continuously inputs the driving power supply signal to the driving signal output end to continuously drive the power device. Through the mode, the power device with the high-frequency switching characteristic can be rapidly started and closed, and the power device can be continuously driven under the condition of conduction.

Referring to fig. 9, fig. 9 is a schematic structural diagram of an electronic device 80 provided in the present application, where the electronic device includes a power device 81 and a driving circuit 82.

Alternatively, the power device 81 is a power device having a high-frequency switching characteristic, such as a SiC power device, a GaN power device, or the like.

The driving circuit 82 is connected to the power device 81 for controlling the power device 81 to be turned on and off to drive the power device 81, and the driving circuit 82 is a circuit as in the above embodiments of fig. 1 to 7, and has similar structure and principle, and is not described again here.

The above description is only for the purpose of illustrating embodiments of the present application and is not intended to limit the scope of the present application, and all modifications of equivalent structures and equivalent processes, which are made according to the content of the present specification and the accompanying drawings, or which are directly or indirectly applied to other related technical fields, are also included in the scope of the present application.

Claims

1. A driving circuit of a power device, the driving circuit comprising:

a control signal input terminal for inputting a control signal;

the driving signal output end is connected with the power device;

a first switch component, connected between a driving power signal and a ground signal, and connecting the control signal input terminal and the driving signal output terminal, for responding to the control signal to conduct a path between the driving power signal and the driving signal output terminal or a path between the ground signal and the driving signal output terminal, so as to switch the driving power signal or the ground signal to the driving signal output terminal to drive the power device;

a second switch component, connected between the driving power signal and the ground signal, and connected between the control signal input terminal and the driving signal output terminal, for responding to the control signal to conduct a path between the driving power signal and the driving signal output terminal or a path between the ground signal and the driving signal output terminal, so as to switch the driving power signal or the ground signal to the driving signal output terminal to drive the power device;

when the second switch component conducts a path between the driving power signal and the driving signal output end, the first switch component keeps conducting the path between the driving power signal and the driving signal output end;

wherein the size of the switch tube in the first switch assembly is smaller than the size of the switch tube in the second switch assembly.

2. The drive circuit according to claim 1,

the switch tube is an MOS tube, and the size of the switch tube represents the width/length ratio of the MOS tube; or

The switch tube is a triode, and the size of the switch tube represents the area of an emitter region or a collector region of the triode.

3. The drive circuit according to claim 1,

the first switch assembly includes:

the input end of the inverting circuit is connected with the control signal input end;

the control end of the first switch tube is connected with the output end of the inverter circuit, the input end of the first switch tube is connected with the driving power supply signal, and the output end of the first switch tube is connected with the driving signal output end;

and the control end of the second switch tube is connected with the output end of the inverter circuit, the input end of the second switch tube is connected with the ground signal, and the output end of the second switch tube is connected with the driving signal output end.

4. The drive circuit according to claim 3,

5. The drive circuit according to claim 3,

the inverter circuit includes:

the input end of the phase inverter is connected with the control signal input end;

the input end of the voltage rising/reducing circuit is connected with the output end of the phase inverter, and the output end of the voltage rising/reducing circuit is connected with the control ends of the first switch tube and the second switch tube.

6. The drive circuit according to claim 3,

the inverter circuit includes:

the input end of the first inverter is connected with the control signal input end;

the input end of the first voltage rising/reducing circuit is connected with the output end of the first phase inverter, and the output end of the first voltage rising/reducing circuit is connected with the control end of the first switching tube;

the input end of the second inverter is connected with the control signal input end;

and the input end of the second voltage rising/reducing circuit is connected with the output end of the second phase inverter, and the output end of the second voltage rising/reducing circuit is connected with the control end of the second switching tube.

7. The drive circuit according to claim 1,

the second switch assembly includes:

a control end of the third switching tube is connected with the control signal input end, an input end of the third switching tube is connected with the driving power supply signal, and an output end of the third switching tube is connected with the driving signal output end;

and the control end of the fourth switching tube is connected with the control signal input end, the input end of the fourth switching tube is connected with the ground signal, and the output end of the fourth switching tube is connected with the driving signal output end.

8. The drive circuit according to claim 7,

9. An electronic device, characterized in that the electronic device comprises:

a power device;

a driving circuit connected to the power device to drive the power device on and off, the driving circuit being as claimed in any one of claims 1 to 8.

10. The electronic device of claim 9,

the power device is a GaN power device or a SiC power device.