CN104795452B - Schottky rectifier and preparation method thereof - Google Patents
Schottky rectifier and preparation method thereof Download PDFInfo
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- CN104795452B CN104795452B CN201410020540.6A CN201410020540A CN104795452B CN 104795452 B CN104795452 B CN 104795452B CN 201410020540 A CN201410020540 A CN 201410020540A CN 104795452 B CN104795452 B CN 104795452B
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- 229920005591 polysilicon Polymers 0.000 claims abstract description 84
- 229910052751 metal Inorganic materials 0.000 claims abstract description 46
- 239000002184 metal Substances 0.000 claims abstract description 46
- 239000012535 impurity Substances 0.000 claims abstract description 38
- 238000007254 oxidation reaction Methods 0.000 claims abstract description 30
- 239000000758 substrate Substances 0.000 claims abstract description 25
- 238000000137 annealing Methods 0.000 claims description 32
- 238000002347 injection Methods 0.000 claims description 18
- 239000007924 injection Substances 0.000 claims description 18
- 238000000151 deposition Methods 0.000 claims description 17
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 15
- 239000010936 titanium Substances 0.000 claims description 15
- 229910052719 titanium Inorganic materials 0.000 claims description 15
- 230000008021 deposition Effects 0.000 claims description 11
- 238000004519 manufacturing process Methods 0.000 claims description 11
- 238000000034 method Methods 0.000 claims description 11
- 238000002513 implantation Methods 0.000 claims description 9
- 238000001312 dry etching Methods 0.000 claims description 7
- 238000005229 chemical vapour deposition Methods 0.000 claims description 6
- 238000005516 engineering process Methods 0.000 claims description 6
- 238000005530 etching Methods 0.000 claims description 6
- 230000003647 oxidation Effects 0.000 claims description 6
- 230000008859 change Effects 0.000 claims description 5
- 239000000126 substance Substances 0.000 claims description 3
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- 229910052760 oxygen Inorganic materials 0.000 claims description 2
- 239000001301 oxygen Substances 0.000 claims description 2
- 230000004888 barrier function Effects 0.000 abstract description 35
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- 230000009471 action Effects 0.000 abstract description 3
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- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 239000004411 aluminium Substances 0.000 description 1
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- 239000010953 base metal Substances 0.000 description 1
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
- H01L29/8725—Schottky diodes of the trench MOS barrier type [TMBS]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
- H01L29/6609—Diodes
- H01L29/66143—Schottky diodes
Abstract
The invention discloses a kind of Schottky rectifier and preparation method thereof.The Schottky rectifier includes one first conductivity type substrate, and is formed at first conductive type conduction layer on the first conductivity type substrate surface；At least one groove being formed in first conductive type conduction layer, the sidewall oxide being formed in each groove and bottom oxidization layer, the polysilicon being deposited in groove, the polysilicon doping have the second conductive type impurity；The metal layer on the first conductive type conduction layer surface is formed at, wherein on the depth direction of groove, from the top of groove to the bottom of groove, the doping concentration of second conductive type impurity is lower by height in the polysilicon.Allow original work to be speeded away Schottky barrier area with the reversed electric field on Schottky barrier in the present invention, undertaken by depletion layer, the electric leakage for so avoiding original electric field action on Schottky barrier and producing, makes the overall of device reversely pressure-resistant greatly improve.
Description
Technical field
The present invention relates to a kind of rectifying device and preparation method thereof, more particularly to a kind of high pressure resistant Schottky rectifier and
Its production method.
Background technology
As a kind of most common semiconductor diode, rectifier diode is because it is with unilateral conduction, in reverse bias
Under be resistant to high voltage withstanding, thus be widely used in power rectifier, electric current steering, the electric equipment products field such as wave chopping.With
Mobile digital product, such as mobile phone, tablet computer etc. widely uses, low forward voltage drop, and the rectifying device of reaction is even more at a high speed
Indispensable component in these products.Schottky diode is a kind of rectifier diode therein, its forward and reverse conversion speed
Degree is fast, and forward conduction voltage drop is lower with respect to the PN junction of silicon materials, also a large amount of extensively on AC DC conversion electric power, solar energy
Use.
Traditional Schottky rectifying device employs mesa technology（Such as the structure shown in Fig. 1, mark 10 represent N-type lining
Bottom, 11 represent N+ doped layers, and 12 represent metal）, metal（Such as aluminium, molybdenum）With the silicon materials of doping（Such as n-type doping）It is bonded
Schottky barrier, with rectification characteristic, anode is metal for it, cathode for doping semiconductor.Different metals is selected, can be obtained
To different forward voltages.Since Schottky junction structure is single current-carrying minor structure, the carrier of anode injection drift region is electronics, and
And minority carrier is not present in drift region, therefore without reverse recovery time, have the advantages that switching speed is fast and be widely used in
In high-speed rectifier circuit.But the Schottky barrier of half contact of gold is unilateral knot, be have also been introduced while device speed is improved
Larger reverse leakage, therefore, traditional schottky it is pressure-resistant generally within hectovolt.Needed for those high reverse pressure-resistant
And the device application of low reverse leakage requirement, traditional schottky obviously can not be met the requirements.
Introduced to improve deficiency, existing Schottky rectifier existing for traditional table top Schottky junction structure on traditional structure
MOS（In the industry to the abbreviation of field-effect tube）Structure.
In conventional schottky structure, trench MOS structure is added, the depletion layer pinch off produced using mos capacitance
Schottky barrier area, inside the reversed electric field introduction means in Schottky barrier area, to improve the anti-backward voltage energy of Schottky
Power.Fig. 2 is the Schottky rectifying device using planar technology conceptual design, adds trench MOS structure inside it.In Fig. 2
1A is highly doped substrate, and 1B is conductive layer, metal 1D covering conductive layer 1B and groove 1C regions；Metal 1D and N-type conductive layer 1B
Schottky barrier is formed after contact, this subregion is Schottky barrier area.MOS structure is led by metal 1D, groove 1C and N-type
Electric layer 1B is formed, and in groove 1C, oxide layer 1G and the doped polycrystalline silicon materials 1H inserted form the grid of MOS structure, and enclose
Around Schottky barrier area.Top metal 1D is the anode of Schottky rectifier, and base substrate 1A is cathode.When anode 1D adds just
To voltage, i.e. when metal 1D biases positive voltage, at this moment, MOS structure will not have an impact Schottky barrier, Schottky rectifier
For forward conduction, there is low forward conduction voltage；When anode plus negative voltage, i.e. metal 1D negative voltage bias, Schottky gesture
Base is in reverse bias, bears reversed electric field, and at this moment, mos capacitance will produce depletion layer 1E, which raises with backward voltage
Extension, is finally touched in conductive layer 1B, and is extended downwards, by Schottky barrier area pinch off, as shown in figure 3, at this moment, Schottky gesture
The reversed electric field for building area is incorporated in the inside of conductive layer 1B by the depletion layer 1E that mos capacitance produces, its effect is to have adjusted MOS ditches
Electric field distribution in groove, reduces the electric field strength of schottky barrier junction, reduces the reverse leakage of Schottky rectifier on the whole
Electric current.The backward voltage of Schottky rectifying device can be accomplished hundreds of volts by the structure, while have less reverse leakage current again.
Although existing MOS structure Schottky rectifier improves the endurance of backward voltage, but can from Fig. 2 and Fig. 3
Find out, in the case of reverse-biased, the depletion layer 1E that mos capacitance produces produces serious bending 1F in channel bottom, in the bending part
Reversed electric field high concentration, causes device to shift to an earlier date avalanche breakdown, can not do height by pressure-resistant.
The improved method of existing MOS structure Schottky rectifier, as shown in Figure 4, for it is as described above the problem of, it is existing
Improved method is into structure wide at the top and narrow at the bottom, from the structure shown in Fig. 4 as can be seen that due to the width on groove top by trench design
Degree is more than the width of lower trench, i.e. inner side bent angle of the inner side bent angle of trench bottom surfaces and side than the groove structure shown in Fig. 3
Bigger, therefore bending of the depletion layer of mos capacitance generation in bottom slows down（To mark 2F to represent）, thereby reduce the region
Electric field strength, the inner angle is bigger, and electric field is smaller.It is pressure-resistant than shown in Fig. 3 according to the different designs of medial angle, reverse breakdown
Groove structure can improve 15-40%.The shortcomings that this structure is that its top dimension must design big as far as possible, could be obtained
To more effectively slowing down channel bottom electric field.This design is unfavorable for reducing the area of device, in addition, electric field caused by bending is not
It is eliminated, still remains.
The content of the invention
The technical problem to be solved in the present invention is in order to overcome Schottky rectifier in the prior art it is reverse it is pressure-resistant not enough
A kind of high, the defects of reverse leakage is larger, there is provided high pressure resistant Schottky rectifier and preparation method thereof.
The present invention is to solve above-mentioned technical problem by following technical proposals：
A kind of Schottky rectifier, it includes one first conductivity type substrate, its feature is that the Schottky rectifier is also
Including：
It is formed at first conductive type conduction layer on the first conductivity type substrate surface；
At least one groove being formed in first conductive type conduction layer,
The sidewall oxide and bottom oxidization layer being formed in each groove, the wherein sidewall oxide are formed at groove
On side wall, which is formed at the bottom of groove；
The polysilicon being deposited in groove, the polysilicon doping have the second conductive type impurity；
The metal layer on the first conductive type conduction layer surface is formed at,
Wherein, the thickness of the bottom oxidization layer is more than the thickness of the sidewall oxide, and on the depth direction of groove,
From the top of groove to the bottom of groove, the doping concentration of second conductive type impurity is lower by height in the polysilicon.
In the present invention, the doping concentration of the second conductive type impurity of polysilicon is to be lower from top to bottom by height in groove,
So as caused by mos capacitance, the depletion layer of groove sidepiece（Depletion layer between groove）Tilted with trenched side-wall in certain
Angle, it is wide at the top and narrow at the bottom（I.e. close to the metal layer depletion layer apart from groove side wall farther out, and away from the metal layer depletion layer
Side wall apart from groove is nearer）, compared with the prior art middle depletion layer can make ditch in the design parallel with groove of groove sidepiece
Depletion layer between groove is at top（Close to the position of metal layer, rather than the position away from metal layer）More rapidly touch, it is fast immediately
Speed down extends, pinch off Schottky barrier area, allows original work to be speeded away Xiao Te with reversed electric field on Schottky barrier
Base barrier region, is undertaken by depletion layer.Since the depletion layer is by inversion layer and conductive layer（Such as p-type inversion layer and low-doped
N-type conductive layer）Between contact produce, its reversed electric field ability to bear is much larger than Schottky barrier, so avoids original
The electric leakage for carrying out electric field action on Schottky barrier and producing, makes the overall of device reversely pressure-resistant greatly improve.
It is preferably located at the doping concentration of the second conduction type impurity in the polysilicon of the top of the groove and is located at groove
The ratio between doping concentration of the second conduction type impurity is 3 in the polysilicon of bottom:1 to 1:1.It is highly preferred that it is located at groove
The doping concentration of second conduction type impurity and the second conduction in the polysilicon of channel bottom in the polysilicon at top
The ratio between doping concentration of type impurity is 2.5:1 to 1.5:1.Concentration at the top of polysilicon to bottom is lower to be gradual by height
Change, wherein, the polysilicon positioned at the top of the groove is that the polysilicon positioned at channel bottom is close close to the metal layer polysilicon
The polysilicon of the bottom oxidization layer.
Preferably, the ratio between the gash depth and the thickness of the bottom oxidization layer are 5:2 to 3:1.
Preferably, the ratio between thickness of the spacing of adjacent trenches and the bottom oxidization layer is less than or equal to 2.5.
Preferably, in terms of the first conductive layer overlook direction, which can be designed to the annular of closure, can also design
For strip-shaped grooves.
Preferably, the doping concentration of the first conductive type impurity of first conductivity type substrate is 0.001ohmcm-
0.01ohm·cm。
Preferably, the doping concentration of the first conductive type impurity of first conductive type conduction layer is 0.5ohmcm-
3ohm·cm。
Preferably, the thickness of first conductive type conduction layer is 3 μm -15 μm.
Preferably, the width of groove be 0.5 μm -2.5 μm, gash depth be 1.5 μm -12 μm, trench spacing for 1.3 μm -
10μm。
Preferably, the thickness of the bottom oxidization layer is 0.5 μm -4 μm.
Preferably, the thickness of the sidewall oxide is 0.5-5000。
Preferably, which includes titanium layer, and/or, the thickness of the titanium layer is 0.3 μm -1.0 μm.In the present invention, adopt
By the use of titanium as schottky metal, main function is to combine to form schottky barrier junction with silicon.Relatively low forward direction can be obtained using titanium
Pressure drop.
A kind of production method of Schottky rectifier, its feature is, comprises the following steps：
One first conductive type conduction layer is formed on the surface of one first conductivity type substrate；
At least one groove is formed in first conductive type conduction layer；
Form sidewall oxide in each trench and bottom oxidization layer, the wherein sidewall oxide are formed at the side of groove
On wall, which is formed at the bottom of groove, and the thickness of the bottom oxidization layer is more than the thickness of the sidewall oxide；
Depositing polysilicon in the trench, and the second conductive type impurity doping is carried out to the polysilicon；
Metal layer is formed on the first conductive type conduction layer surface,
Wherein, the injection of the second conductive type impurity is successively carried out three times by the way of ion implanting so that in groove
On depth direction, from the top of groove to the bottom of groove, in the polysilicon doping concentration of second conductive type impurity by
Height is lower.
Preferably, the second conductive type impurity doping of polysilicon comprises the following steps：
With the first injection condition to the polysilicon carry out the second conductive type impurity doping, and under the first annealing conditions into
Row high temperature promotes, and wherein first injection condition is：Implantation dosage is 1e13/cm2-8e13/cm2, Implantation Energy 50keV-
150keV, first annealing conditions are：950 DEG C -1100 DEG C of annealing temperature, annealing time are -150 minutes 30 minutes；
Complete ion implanting first and the second conductive type impurity doping carried out to the polysilicon with the second injection condition afterwards,
And made annealing treatment under the second annealing conditions, wherein second injection condition is：Implantation dosage is 1e14/cm2-9e14/cm2, note
It is 35keV-80keV to enter energy, which is：700-1000 DEG C of annealing temperature, annealing time are 10-60 minutes；
Complete ion implanting twice and the second conductive type impurity doping carried out to the polysilicon with the 3rd injection condition afterwards,
And made annealing treatment under the 3rd annealing conditions, wherein the 3rd injection condition is：Implantation dosage is 1e15/cm2-5e15/cm2, note
It is 15keV-50keV to enter energy, and the 3rd annealing conditions are：500-800 DEG C of annealing temperature, annealing time are 10-60 minutes.
In the present invention, in order to be formed from top to bottom, the polysilicon doping of concentration from high to low, first time ion implanting
Doped ions are first allowed to reach deep trench lower part, therefore Implantation Energy is higher, then to promote for a long time again, when having enough
Between, allow ion to penetrate into down to channel bottom, certain concentration is not easy too high, is not so unable to control the low-doped requirement in bottom.It
Ion implanting correspondingly requires that concentration is high, energy ratio is small for the first time to the afterwards twice, and the time is accordingly short, prevents ion from down expanding
Must be too deep, and keep concentration ratio lower trench will height.Last time ion implanting wants concentration highest, and dosage is maximum, then the time
It is most short（Backing off fire can）.
Preferably, which is formed by following steps：
Use chemical vapor deposition in the trench deposited oxide layer trench fill to be expired；
Dry etching is used to cause the thickness of the remaining oxide layer of channel bottom for 0.5 μm -4 μm to make come etching oxidation layer
For the bottom oxidization layer.
Preferably, which is formed by following steps：
Thermal oxidation technology is used to form thickness on the sidewalls of the trench as 0.5-5000Oxide layer to be used as the side
Wall oxide layer.
Preferably, polysilicon is filled by following steps：
Using low pressure chemical phase technique, deposition thickness is 1.2 μm -6 μm of polysilicon so that in groove completely in the trench
Polysilicon is filled, and polysilicon is covered in the surface of first conductive type conduction layer and is higher by first conductive type conduction layer
1 μm -1.5 μm of surface, wherein deposition temperature be 600 DEG C -640 DEG C, it is preferable that deposition temperature be 620 DEG C, deposition time 60
- 240 minutes minutes；
Using plasma dry etching by the first conductive type conduction layer surface polysilicon completely etch so that
Obtain on the surface of first conductive type conduction layer without residual polycrystalline silicon, i.e., polysilicon is filled with only in groove, and depositing
When the polysilicon that is formed on the surface of first conductive type conduction layer all etched away.It is advanced after depositing polysilicon
Unnecessary polysilicon is etched after row ion implanting again, injection cause can be prevented by one of polysilicon plasma etching and more
The contamination or damage that doped polycrystal silicon region introduces, are also possible to prevent on the first conductive layer surface those and need not carry out polysilicon to mix
Miscellaneous region is influenced by ion implanting.
Preferably, groove is formed by dry etching.It is highly preferred that the width of groove is 0.5 μm -2.5 μm, gash depth
For 1.5 μm -12 μm, trench spacing is 1.3 μm -10 μm.
Preferably, metal layer is formed on the first conductive type conduction layer surface using chemical vapor deposition, the metal
Layer covers the surface of first conductive type conduction layer and the surface of polysilicon.It is preferred that moved back after completing metal layer deposit
Fire（Here annealing, is the alloy for metal and silicon, and formation is shallow to dissolve each other, and reduces golden-half contact resistance）, annealing temperature 600
DEG C -650 DEG C, the time is 30-90 seconds.It is preferred that the metal layer is titanium layer.It is preferred that the thickness of the metal layer is 0.3 μm -1.0
μm。
On the basis of common knowledge of the art, above-mentioned each optimum condition, can be combined, each preferably real up to the present invention
Example.
Material therefor of the present invention is commercially available.
The positive effect of the present invention is：In the present invention, the doping concentration of polysilicon in trench-gate is designed
High, the low gradual transition of lower part concentration into top concentration, under grid voltage effect, the depletion layer that mos capacitance produces also is formed
The pattern that top is wide, lower part is narrow, its effect are to allow depletion layer when reversed bias voltage acts on, and accelerate pinch off Schottky barrier area, will
High electric field removes Schottky barrier area；In the present invention, the introducing of bottom thick oxide layer, can extend the depletion layer of mos capacitance
Inside between the groove in the first conductive layer is blocked in, with reference to inclined depletion layer, in breakdown, it is exhausted Schottky rectifier
Layer can be in parallel to the linear of substrate, avoid in existing groove MOS Schottky rectifier, depletion layer expands to trench bottom
Cause high local fields behind portion.It resulting in a kind of reversely pressure-resistant higher Schottky rectifier.
Brief description of the drawings
Fig. 1-4 is the structure diagram of the Schottky rectifier of the prior art.
Fig. 5 is the structure diagram of the Schottky rectifier of one embodiment of the invention.
Fig. 6-9 is the change schematic diagram with voltage of the depletion layer of the Schottky rectifier of one embodiment of the invention.
Figure 10-14 is the processing step schematic diagram for the Schottky rectifier for making one embodiment of the invention.
Embodiment
The present invention is further illustrated below by the mode of embodiment, but does not therefore limit the present invention to the reality
Apply among a scope.The experimental method of actual conditions is not specified in the following example, according to conventional methods and conditions, or according to business
Product specification selects.
With reference to figure 5, which includes one first conductivity type substrate 100, and
It is formed at first conductive type conduction layer 101 on 100 surface of the first conductivity type substrate；
At least one groove being formed in first conductive type conduction layer 101,
The sidewall oxide 103 and bottom oxidization layer 104 being formed in each groove, wherein 103 shape of sidewall oxide
Into on the side wall of groove, which is formed at the bottom of groove；
The polysilicon 105 being deposited in groove, the polysilicon doping have the second conductive type impurity；
The titanium layer 106 on 101 surface of the first conductive type conduction layer is formed at,
Wherein, the thickness of the bottom oxidization layer 104 is more than the thickness of the sidewall oxide 103, and in the depth of groove
On direction, from the top of groove to the bottom of groove, the doping concentration of second conductive type impurity is become by height in the polysilicon
It is low.
Wherein titanium layer 106 is used as schottky metal, which further includes the anode gold being formed on titanium layer 106
Belong to layer 107 and the cathode metal layer 108 for being formed at 100 bottom surface of the first conductivity type substrate.
When metal layer applies forward voltage, Schottky barrier is forward bias, similar to the whole potential barrier of normal Schottky
Forward conduction.When metal layer adds backward voltage, Schottky barrier is reverse-biased, and at this moment, MOS structure will be to Schottky barrier area
Have an impact：Polysilicon is filled with the trench, and when its upper part metal negative voltage bias, inversion layer will be produced in groove periphery,
Depletion layer 109 is produced between the inversion layer and the first conductive type conduction layer（See the dotted line of Fig. 6）.When the p-type polycrystalline in groove
Silicon（That is grid）From top to down, concentration is reduced by height for doping, will cause electrical potential difference, i.e. grid top potential is high, and lower part potential is low,
The width of peripheral depletion layer is caused to produce difference indirectly, its width gradually narrows from the width from top to down（Such as the W1 in Fig. 6>
W2）, it is in deflected condition with groove side.See Fig. 6.
When backward voltage increases, positioned at top, depletion width becomes larger, and the depletion layer between last two groove mutually touches, and sees
Fig. 7；When backward voltage further increases, the depletion layer after touching is in the first conductive type conduction layer gradually toward the first conductive-type
The direction of type substrate continues to extend, until depletion layer is linearly, the straight line is parallel with titanium layer, Fig. 8.When backward voltage is further
Improve, depletion layer continues to extend downward, in state is bent downwardly, with reference to figure 9, at this moment, by adjusting Schottky rectifier not
With reverse pressure-resistant design load, adjust gash depth, channel bottom oxidated layer thickness, polysilicon doping in trench spacing and groove
Numerical value between concentration, it is possible to achieve when allowing the depletion layer of extension to be in foregoing near linear, device punctures just,
Schottky rectifier produces reverse-conducting, as shown in Figure 8.The effect so designed is：In device reverse breakdown, depletion layer exists
Between groove and groove, on channel bottom, eliminate in existing MOS structure Schottky rectifier, depletion layer is located at groove
Bottom and the buckling phenomenon produced, avoid the high local fields intensity that curved depletion layer produces, prevent in high backward voltage
Under, electric leakage that high local fields can produce, and device may be caused to puncture in advance, therefore, MOS structure Schottky of the invention is whole
Device is flowed, its anti-reflective is greatly improved to voltage capability, can meet the needs of high voltage type rectification application.
In the present invention, the effect of certain thickness bottom thick oxide layer is, when reverse bias voltage raises, to stop
Depletion layer avoids depletion layer and generates bending around channel bottom, in turn result in the region toward channel bottom Quick Extended
Electric field concentration phenomenon, also avoids device and produces electric leakage or puncture in advance.
In the present invention, doping concentration is gradual design in groove, its effect is produced by mos capacitance, groove sidepiece
Depletion layer and groove are oblique, and wide at the top and narrow at the bottom, as shown in Figure 6 and Figure 7, middle depletion layer is in channel side compared with the prior art
Portion's design parallel with groove, can be such that the depletion layer between groove is more rapidly touched at top, down extend rapidly immediately, pinch off
Schottky barrier area, that is, allow original work to be speeded away Schottky barrier area with the reversed electric field on Schottky barrier, by consuming
Layer is use up to undertake.Since the depletion layer is produced by being contacted between such as p-type inversion layer and for example low-doped N-type conductive layer
, its reversed electric field ability to bear is much larger than Schottky barrier, so avoids original electric field action on Schottky barrier
And the electric leakage produced, greatly improve the totally reversely pressure-resistant of device.
With reference to figure 10-14, the production method of the Schottky rectifier, comprises the following steps：
One first conductive type conduction layer 101 is formed on the surface of one first conductivity type substrate 100；
At least one groove 102 is formed in first conductive type conduction layer 101；
Form sidewall oxide 103 in each trench and bottom oxidization layer 104, the wherein sidewall oxide 103 are formed
In on the side wall of groove, which is formed at the bottom of groove, and the thickness of the bottom oxidization layer is more than the side wall oxygen
Change the thickness of layer；
Depositing polysilicon 105 in the trench, and the second conductive type impurity doping is carried out to the polysilicon, etch away spilling
The unnecessary polysilicon of groove；
Titanium layer 106 is formed on 101 surface of the first conductive type conduction layer, re-forms 107 He of anode metal layer afterwards
Cathode metal layer 108, final Schottky rectifier are as shown in Figure 5.
Wherein, the injection of the second conductive type impurity is successively carried out three times by the way of ion implanting so that in groove
On depth direction, from the top of groove to the bottom of groove, in the polysilicon doping concentration of second conductive type impurity by
Height is lower.
Below with specific craft embodiment, illustrate the manufacture craft of the Schottky rectifier of the present invention again.
1st, in N-type substrate（That is the first conductivity type substrate）Upper formation N-type epitaxy layer（That is the first conductive type conduction layer）,
N-type substrate is high-concentration dopant, and doping concentration 0.005ohmcm, the doping concentration of N-type epitaxy layer is 2.0ohmcm, thick
Spend for 10 μm.
2nd, in N-type epitaxy layer, routinely technique carries out photoetching, then forms multiple grooves, groove using dry etching
Width is 2 μm, and gash depth is 8 μm, and trench spacing is 3 μm.
3rd, using chemical vapor deposition method deposited oxide layer in the trench, until groove is filled, then using dry method
Oxide layer in etching technics etching groove, it is 3 μm to ensure bottom thickness；Use thermal oxidation technology, in the trench growth oxidation
Layer, thickness 1000, form the gate oxide of MOS structure（That is sidewall oxide）.
4th, polysilicon is inserted in the trench, it is thick using low pressure chemical phase technique depositing polysilicon material, polycrystalline silicon deposit
Spend for 6 μm, deposition temperature is 620 DEG C, controls deposition time, ensures to be filled up completely polysilicon in groove, and be higher by N-type epitaxy layer
Upper face is less than 1 μm.
5th, p-type doping is carried out to polysilicon using ion implantation, injection is divided into three times, injects for the first time：Ion is boron,
Dosage is 5e13/cm2, energy 120keV carries out high temperature propulsion after ion implanting, temperature be 1000 DEG C of times be 120 minutes；
Second of ion implanting be：Boron ion, dosage 8e14/cm2, energy 60keV, then thermal anneal process is carried out, temperature 900
DEG C, the time is 60 minutes；Third time ion implanting is carried out again, and injection condition is:Ion is boron fluoride, dosage 5e15/cm2, energy
30keV is measured, then carries out thermal anneal process, temperature is：600℃.
6th, etching polysilicon is carried out using dry process, removes epi-layer surface polysilicon, retain polysilicon in groove.
7th, chemical vapor deposition method deposit Titanium, deposition thickness 5000 are used on epitaxial layer, Titanium covering N
The polysilicon region of type epitaxial layer and groove, after completing metal layer deposit, then carries out thermal annealing, and annealing temperature is 625 DEG C, the time
For 40 seconds.
8th, second layer metal is deposited on schottky metal as Schottky rectifier anode, the 3rd is deposited in substrate lower part
Layer metal is Schottky rectifier anode, completes the making of Schottky rectifier（Final Schottky rectifier such as Fig. 5 institutes
Show）.
In above-mentioned MOS Schottky rectifier structures, the cathode of the highly doped substrate connection Schottky rectifier of N-type；
The first conductive layer of n-type doping is formed on substrate（That is the first conductive type conduction layer）, Xiao Te is formed on the first conductive layer top
Base Metal, the schottky metal are connected to the anode of Schottky rectifier, which forms Xiao with first layer conductive layer
Special base potential barrier；Multiple grooves are formed in first conductive layer, form bottom thick oxide layer and side thin oxide layer in the trench,
And insert from top to bottom, the p-type polysilicon material of gradual doping, the oxide layer and doped polycrystalline silicon materials in groove form MOS
The grid of structure.When Schottky rectifier reverse bias（Cathode bias positive voltage), between groove mos capacitance produce depletion layer with
The rapid extension of voltage rise, and then mutually touch, and continue to extend, last pinch off Schottky barrier area, at this moment, reversely partially
The electric field for putting voltage generation departs from rapidly Schottky such as barrier region, shifts to inside Schottky rectifier, i.e., electric field is by mos capacitance
The PN junction that p-type inversion layer and the first N-type conductive layer are formed undertakes, in this way, avoiding the intrinsic low breakdown of Schottky barrier, carries
High Schottky rectifier it is reverse pressure-resistant.In the present invention, the doping concentration of polysilicon in trench-gate is designed to top
Concentration is high, the low gradual transition of lower part concentration, and under grid voltage effect, the depletion layer that mos capacitance produces also is produced as in Fig. 6
The pattern that top shown in dotted line is wide, lower part is narrow, its effect is to allow depletion layer when reversed bias voltage acts on, and accelerates pinch off Schottky
Barrier region, Schottky barrier area is removed by high electric field；In the present invention, the introducing of bottom thick oxide layer, can be by the consumption of mos capacitance
Layer extension is blocked in inside between the groove in the first conductive layer to the greatest extent, and with reference to inclined depletion layer, Schottky rectifier is puncturing
When, its depletion layer can be in parallel to the linear of substrate, avoid in existing groove MOS Schottky rectifier, depletion layer expands
Cause high local fields after opening up channel bottom.
In the present invention, by adjusting gash depth, ratio between trench spacing and channel bottom thick oxide layer thickness, is adjusted
The gradual doping concentration parameter of polysilicon gate, may finally reach following effect in whole groove：Apply backward voltage in device
In the case of, when Schottky rectifier punctures, depletion layer is extended between the groove inside the first conductive layer, away from Xiao
Special base barrier region, and linearly, no high local fields produce, which can meet the needs of high-breakdown-voltage parameter.
The MOS structure Schottky diode manufactured and designed by the present invention, it is reversely pressure-resistant can to reach 200V-1000V.
In order to clearly illustrate the structures such as each doped region, various oxide layers, polysilicon, above-mentioned each portion in attached drawing
The size divided is not drawn to describe, it should be understood by those skilled in the art that the ratio in attached drawing is not limitation of the present invention.
In addition, in contrast above-mentioned surface and bottom surface, "up" and "down" are also all, and surface, the such statement in bottom surface be in order to
The convenience of description, is also not construed as limitation of the present invention, and those skilled in the art combine specification and drawings
Description clearly understood that the principle of the present invention.
Although the foregoing describing the embodiment of the present invention, it will be appreciated by those of skill in the art that these
It is merely illustrative of, protection scope of the present invention is defined by the appended claims.Those skilled in the art is not carrying on the back
On the premise of from the principle of the present invention and essence, various changes or modifications can be made to these embodiments, but these are changed
Protection scope of the present invention is each fallen within modification.
Claims (13)
1. a kind of Schottky rectifier, it includes one first conductivity type substrate, it is characterised in that the Schottky rectifier also wraps
Include：
It is formed at first conductive type conduction layer on the first conductivity type substrate surface；
At least one groove being formed in first conductive type conduction layer,
The sidewall oxide and bottom oxidization layer being formed in each groove, the wherein sidewall oxide are formed at the side wall of groove
On, which is formed at the bottom of groove；
The polysilicon being deposited in groove, the polysilicon doping have the second conductive type impurity；
The metal layer on the first conductive type conduction layer surface is formed at,
Wherein, the thickness of the bottom oxidization layer is more than the thickness of the sidewall oxide, and on the depth direction of groove, from ditch
The top of groove to the bottom of groove, the doping concentration of second conductive type impurity is lower by height in the polysilicon.
2. Schottky rectifier as claimed in claim 1, it is characterised in that second is conductive in the polysilicon of the top of the groove
The doping concentration of type impurity and the doping concentration of the second conduction type impurity in the polysilicon of channel bottom
The ratio between be 3:1 to 1:1, the concentration at the top of the polysilicon at top to bottom polysilicon is lower as gradual change by height, wherein, it is located at
The polysilicon of the top of the groove is close to the metal layer polysilicon, and the polysilicon positioned at channel bottom is close to the bottom oxidization layer
Polysilicon.
3. Schottky rectifier as claimed in claim 2, it is characterised in that second is conductive in the polysilicon of the top of the groove
The doping concentration of type impurity and the doping concentration of the second conduction type impurity in the polysilicon of channel bottom
The ratio between be 2.5:1 to 1.5:1.
4. Schottky rectifier as claimed in claim 1, it is characterised in that the gash depth and the thickness of the bottom oxidization layer
The ratio between be 5:2 to 3:1；
And/or the ratio between thickness of the spacing of adjacent trenches and the bottom oxidization layer is less than or equal to 2.5；
And/or in terms of the first conductive layer overlook direction, which is the annular or strip-shaped grooves of closure.
5. the Schottky rectifier as described in claim 1-4 any one, it is characterised in that first conductivity type substrate
The doping concentration of first conductive type impurity is 0.001ohmcm-0.01ohmcm；
And/or the doping concentration of the first conductive type impurity of first conductive type conduction layer is 0.5ohmcm-3ohm
cm。
6. the Schottky rectifier as described in claim 1-4 any one, it is characterised in that first conductive type conduction layer
Thickness be 3 μm -15 μm；
And/or the width of groove is 0.5 μm -2.5 μm, gash depth is 1.5 μm -12 μm, and trench spacing is 1.3 μm -10 μm；
And/or the thickness of the bottom oxidization layer is 0.5 μm -4 μm；
And/or the thickness of the sidewall oxide is
And/or the metal layer includes titanium layer；
And/or the thickness of the titanium layer is 0.3 μm -1.0 μm.
7. a kind of production method of Schottky rectifier, it is characterised in that comprise the following steps：
One first conductive type conduction layer is formed on the surface of one first conductivity type substrate；
At least one groove is formed in first conductive type conduction layer；
Form sidewall oxide in each trench and bottom oxidization layer, the wherein sidewall oxide are formed at the side wall of groove
On, which is formed at the bottom of groove, and the thickness of the bottom oxidization layer is more than the thickness of the sidewall oxide；
Depositing polysilicon in the trench, and the second conductive type impurity doping is carried out to the polysilicon；
Metal layer is formed on the first conductive type conduction layer surface,
Wherein, successively carry out the second conductive type impurity three times by the way of ion implanting injects the depth caused in groove
On direction, from the top of groove to the bottom of groove, the doping concentration of second conductive type impurity is become by height in the polysilicon
It is low.
8. production method as claimed in claim 7, it is characterised in that polysilicon the second conductive type impurity doping include with
Lower step：
Second conductive type impurity doping carries out the polysilicon with the first injection condition, and height is carried out under the first annealing conditions
Temperature promotes, and wherein first injection condition is：Implantation dosage is 1e13/cm2-8e13/cm2, Implantation Energy 50keV-
150keV, first annealing conditions are：950 DEG C -1100 DEG C of annealing temperature, annealing time are -150 minutes 30 minutes；
Complete to carry out the polysilicon the second conductive type impurity doping with the second injection condition after ion implanting first, and
Made annealing treatment under second annealing conditions, wherein second injection condition is：Implantation dosage is 1e14/cm2-9e14/cm2, inject energy
Measure and be for 35keV-80keV, second annealing conditions：700-1000 DEG C of annealing temperature, annealing time are 10-60 minutes；
Complete to carry out the polysilicon the second conductive type impurity doping with the 3rd injection condition after ion implanting twice, and
Made annealing treatment under 3rd annealing conditions, wherein the 3rd injection condition is：Implantation dosage is 1e15/cm2-5e15/cm2, inject energy
Measure and be for 15keV-50keV, the 3rd annealing conditions：500-800 DEG C of annealing temperature, annealing time are 10-60 minutes.
9. production method as claimed in claim 7, it is characterised in that the bottom oxidization layer is formed by following steps：
Use chemical vapor deposition in the trench deposited oxide layer trench fill to be expired；
Dry etching is used to cause the thickness of the remaining oxide layer of channel bottom for 0.5 μm -4 μm to be used as this come etching oxidation layer
Bottom oxidization layer；
And/or the sidewall oxide is formed by following steps：
Use thermal oxidation technology formed on the sidewalls of the trench thickness forOxide layer to be used as the side wall oxygen
Change layer.
10. production method as claimed in claim 7, it is characterised in that fill polysilicon by following steps：
Using low pressure chemical phase technique, deposition thickness is 1.2 μm -6 μm of polysilicon so as to be filled up completely in groove in the trench
Polysilicon, and polysilicon is covered in the surface of first conductive type conduction layer and is higher by the table of first conductive type conduction layer
1 μm -1.5 μm of face, wherein deposition temperature are 600 DEG C -640 DEG C；
Using plasma dry etching is by the etching completely of the polysilicon on the first conductive type conduction layer surface so that should
Without residual polycrystalline silicon on the surface of first conductive type conduction layer.
11. production method as claimed in claim 10, it is characterised in that deposition temperature is 620 DEG C.
12. production method as claimed in claim 10, it is characterised in that deposition time is -240 minutes 60 minutes.
13. the production method as described in any one in claim 7-12, it is characterised in that ditch is formed by dry etching
Groove；
And/or the width of groove is 0.5 μm -2.5 μm；
And/or gash depth is 1.5 μm -12 μm；
And/or trench spacing is 1.3 μm -10 μm；
And/or metal layer is formed on the first conductive type conduction layer surface using chemical vapor deposition, metal layer covering
The surface of first conductive type conduction layer and the surface of polysilicon；
And/or anneal after completing metal layer deposit, annealing temperature is 600 DEG C -650 DEG C, and the time is 30-90 seconds；
And/or the metal layer is titanium layer；
And/or the thickness of the metal layer is 0.3 μm -1.0 μm.
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| CN106601789B (en) * | 2016-12-05 | 2018-03-30 | 苏州捷芯威半导体有限公司 | A kind of gallium nitride based schottky barrier rectifier |
| CN108010910A (en) * | 2017-11-21 | 2018-05-08 | 重庆大学 | A kind of groove-shaped Schottky contacts super barrier rectifier and preparation method thereof |
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| CN103378171A (en) * | 2012-04-28 | 2013-10-30 | 朱江 | Groove Schottky semiconductor device and preparation method thereof |
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| CN103378171A (en) * | 2012-04-28 | 2013-10-30 | 朱江 | Groove Schottky semiconductor device and preparation method thereof |
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