CN104795336A - 一种半导体塑封工艺 - Google Patents

一种半导体塑封工艺 Download PDF

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Publication number
CN104795336A
CN104795336A CN201510210631.0A CN201510210631A CN104795336A CN 104795336 A CN104795336 A CN 104795336A CN 201510210631 A CN201510210631 A CN 201510210631A CN 104795336 A CN104795336 A CN 104795336A
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China
Prior art keywords
plastic package
substrate
plastic packaging
chip
metal
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CN201510210631.0A
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English (en)
Inventor
包增利
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Hitech Semiconductor Wuxi Co Ltd
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Hitech Semiconductor Wuxi Co Ltd
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Priority to CN201510210631.0A priority Critical patent/CN104795336A/zh
Publication of CN104795336A publication Critical patent/CN104795336A/zh
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/561Batch processing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/52Mounting semiconductor bodies in containers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/16Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

本发明提供一种半导体塑封工艺,包括以下步骤:步骤一:将芯片安装到基板上,芯片电极区通过金属凸点与基板上的电极区连接;步骤二:用金属线将元件与金属框架上的引脚连接,步骤三:用塑封底填料将基板塑封起来,形成凹槽两侧带有外延开槽的塑封壳体,增加了凹槽区域气体的流通能力,降低了不良产品,节约了设备的维护成本。

Description

一种半导体塑封工艺
技术领域
本发明涉及半导体技术领域,特别涉及一种半导体塑封工艺。
背景技术
现有塑封模具根据外观设计了凹槽,但是排气口无法在指定时间内排除模具的空气,导致塑封底填料无法完全填充模具,造成塑封的大量不良。
发明内容
针对现有塑封工艺中塑封模具的局限导致塑封不良品等问题,本发明提供一种半导体塑封工艺,为了达到上述目的,本发明采用以下技术方案:一种半导体塑封工艺,包括以下步骤:步骤一:将芯片安装到基板上,芯片电极区通过金属凸点与基板上的电极区连接;步骤二:用金属线将元件与金属框架上的引脚连接,步骤三:用塑封底填料将基板塑封起来,形成凹槽两侧带有外延开槽的塑封壳体。
优选地,步骤四中采用的塑封填料为环氧树脂。
本发明的有益效果:通过增加塑封模具凹槽两侧的外延开槽,增加了凹槽区域气体的流通能力,降低了不良产品,节约了设备的维护成本。
具体实施方式
一种半导体塑封工艺,包括以下步骤:步骤一:将芯片安装到基板上,芯片电极区通过金属凸点与基板上的电极区连接;步骤二:用金属线将元件与金属框架上的引脚连接,步骤三:用塑封底填料将基板塑封起来,形成凹槽两侧带有外延开槽的塑封壳体。
优选的,步骤四中采用的塑封填料为环氧树脂。

Claims (2)

1.一种半导体塑封工艺,其特征在于:包括以下步骤:步骤一:将芯片安装到基板上,芯片电极区通过金属凸点与基板上的电极区连接;步骤二:用金属线将元件与金属框架上的引脚连接,步骤三:用塑封底填料将基板塑封起来,形成凹槽两侧带有外延开槽的塑封壳体。
2.根据权利要求1所述的一种半导体塑封工艺,其特征在于:步骤四中采用的塑封填料为环氧树脂。
CN201510210631.0A 2015-04-29 2015-04-29 一种半导体塑封工艺 Pending CN104795336A (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201510210631.0A CN104795336A (zh) 2015-04-29 2015-04-29 一种半导体塑封工艺

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201510210631.0A CN104795336A (zh) 2015-04-29 2015-04-29 一种半导体塑封工艺

Publications (1)

Publication Number Publication Date
CN104795336A true CN104795336A (zh) 2015-07-22

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CN201510210631.0A Pending CN104795336A (zh) 2015-04-29 2015-04-29 一种半导体塑封工艺

Country Status (1)

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CN (1) CN104795336A (zh)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20010013641A1 (en) * 2000-02-14 2001-08-16 Masanori Onodera Mounting substrate and mounting method for semiconductor device
US20020038905A1 (en) * 2000-09-29 2002-04-04 Kabushiki Kaisha Toshiba Semiconductor device provided in thin package and method for manufacturing the same
CN101223634A (zh) * 2005-07-13 2008-07-16 首尔半导体株式会社 形成模铸部件的模具及使用此模具制造模铸部件的方法
CN103730443A (zh) * 2013-12-31 2014-04-16 天水华天科技股份有限公司 带焊球面阵列四边无引脚ic芯片堆叠封装件及生产方法
CN203765958U (zh) * 2014-03-02 2014-08-13 深圳市华龙精密模具有限公司 一种带排气槽的半导体塑封模具的上模成型条结构

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20010013641A1 (en) * 2000-02-14 2001-08-16 Masanori Onodera Mounting substrate and mounting method for semiconductor device
US20020038905A1 (en) * 2000-09-29 2002-04-04 Kabushiki Kaisha Toshiba Semiconductor device provided in thin package and method for manufacturing the same
CN101223634A (zh) * 2005-07-13 2008-07-16 首尔半导体株式会社 形成模铸部件的模具及使用此模具制造模铸部件的方法
CN103730443A (zh) * 2013-12-31 2014-04-16 天水华天科技股份有限公司 带焊球面阵列四边无引脚ic芯片堆叠封装件及生产方法
CN203765958U (zh) * 2014-03-02 2014-08-13 深圳市华龙精密模具有限公司 一种带排气槽的半导体塑封模具的上模成型条结构

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