CN104779790A - Switched inductance quasi-Z source DC-DC converter circuit - Google Patents

Abstract

The invention provides a switched inductance type quasi-Z source DC-DC converter circuit, the circuit includes a voltage source, a first inductance, a first diode, a first capacitor, a second inductance, a third inductance, a second A switched inductance impedance network composed of the diode, the third diode and the fourth diode, the second capacitor, the switch tube, the fourth inductor, the output capacitor and the load. In the present invention, the voltage source, the first inductance, the first capacitor and the switch tube are serially connected in sequence to form a first-stage boost circuit; the second capacitor, the switched inductance impedance network and the switch tube are connected in series to form a second-stage boost circuit; Four inductors, output capacitors and loads constitute the output circuit. The whole circuit structure is simple, only one switch tube is used, it has high output voltage gain and low capacitor voltage stress, the power supply current and load current are continuous, the output and input share the same ground, and the circuit does not have start-up surge current and switch tube The inrush current at the moment of opening.

Description

A Switched Inductance Type Quasi-Z Source DC-DC Converter Circuit

technical field

The invention relates to the technical field of power electronic circuits, in particular to a switch inductance type quasi-Z source DC-DC converter circuit.

Background technique

In fuel cells and photovoltaic power generation, due to the low DC voltage provided by a single solar cell or a single fuel cell, which is generally only about tens of volts, it cannot meet the electricity demand of existing electrical equipment, such as the LED drive with centralized DC power supply. A high DC input voltage of hundreds of volts is required in the circuit, so it is often necessary to connect multiple batteries in series to achieve the required high voltage. However, on the one hand, this greatly reduces the reliability of the entire system, and on the other hand, it is necessary to solve the problem of series voltage equalization. For this reason, a high-gain DC-DC converter capable of converting low voltage to high voltage is required. The Z-source DC-DC converter proposed in recent years is a DC-DC converter with high voltage gain, but the circuit has high capacitive voltage stress, and its capacitive voltage stress is equal to the output voltage, and its power supply current Discontinuous, the output and the input do not share the same ground, and there is a large start-up inrush current problem when the circuit starts, thus limiting the practical application of the circuit.

Contents of the invention

The purpose of the present invention is to overcome the deficiencies of the above-mentioned prior art, and provide a switch inductance type quasi-Z source DC-DC converter circuit, the specific technical scheme is as follows.

A switched inductance type quasi-Z source DC-DC converter circuit, comprising a voltage source, a first inductance, a first diode, a first capacitor, a switched inductance impedance network, a second capacitor, a switch tube, a fourth inductance, an output capacitance and load. The switch inductor impedance network is composed of a second inductor, a third inductor, a second diode, a third diode and a fourth diode; the voltage source, the first inductor, the first capacitor and the switch tube are sequentially The first step-up circuit is formed in series; the second capacitor, the switch inductor impedance network and the switch tube are connected in series to form the second step-up circuit; the fourth inductance, output capacitor and load form an output circuit.

Further, the anode of the voltage source is connected to one end of the first inductance; the other end of the first inductance is respectively connected to the anode of the first diode and the cathode of the first capacitor; The cathode is respectively connected to the positive pole of the second capacitor, one end of the second inductor and the anode of the third diode; the other end of the second inductor is respectively connected to the anode of the second diode and the anode of the fourth diode ; The cathode of the second diode is respectively connected with the cathode of the third diode and one end of the third inductor; the cathode of the fourth diode is respectively connected with the other end of the third inductor and the anode of the first capacitor 1. The drain of the switch tube is connected to one end of the fourth inductance; the other end of the fourth inductance is connected to the positive pole of the output capacitor and one end of the load; the negative pole of the voltage source is connected to the negative pole of the second capacitor and the output capacitor respectively. The negative pole of the load, the other end of the load and the source of the switch tube are connected.

Compared with the prior art, the circuit of the present invention has the following advantages and technical effects: the structure of the entire circuit of the present invention is simple, the voltage gain is higher, and the voltage stress of the capacitor in the circuit does not exceed the output voltage; it has a good inhibitory effect on the starting surge current , the moment the switch tube is turned on, the output capacitor will not generate an inrush current to the switch tube, which improves reliability; and the input power supply current and load current are continuous, and the output and input realize a common ground, so the circuit of the present invention is more suitable for fuel New energy power generation technologies such as battery power generation and photovoltaic power generation, as well as LED drive power circuits for centralized DC power supply.

Description of drawings

FIG. 1 is a switch inductance quasi-Z source DC-DC converter circuit in a specific embodiment of the present invention.

Fig. 2a and Fig. 2b are the equivalent circuit diagrams of a switched inductance quasi-Z source DC-DC converter circuit shown in Fig. 1 during the turn-on and turn-off periods of the switch tube S, respectively.

Fig. 3a is a graph comparing the gain curve of the circuit of the present invention with the gain curve of the basic boost circuit.

Fig. 3b is a comparison diagram between the gain curve of the circuit of the present invention in Fig. 3a and the gain curve of the basic boost circuit when the duty cycle d is less than 0.4.

FIG. 4 shows the ratio of the voltage of the first capacitor and the voltage of the second capacitor to the output voltage in the circuit of the present invention varies with the duty cycle d.

Fig. 5 is the main working waveform diagram of the switching inductance type quasi-Z source DC-DC converter circuit in the example.

Detailed ways

The specific implementation of the present invention will be further described below in conjunction with the accompanying drawings, but the implementation and protection of the present invention are not limited thereto. If there are any parts that are not specifically described in detail below, those skilled in the art can refer to the prior art.

Referring to Fig. 1, a switched inductance type quasi-Z source DC-DC converter circuit according to the present invention includes a voltage source V _i , a first inductor L ₁ , a first diode D ₁ , and a first capacitor C ₁ , the second capacitor C ₂ , the switched inductor impedance network composed of the second inductor L ₂ , the third inductor L ₃ , the second diode D ₂ , the third diode D ₃ and the fourth diode D ₄ ( As shown by the dotted line box in FIG. 1 ), the switch tube S, the fourth inductor L ₄ , the output capacitor C _f and the load _RL . According to the switch inductance type quasi-Z source DC-DC converter circuit of the present invention, the voltage source V _i , the first inductance L ₁ , the first capacitor C ₁ and the switch tube S are sequentially connected in series to form a first-stage boost circuit ; The second capacitor C ₂ , the switched inductance impedance network and the switch tube S are sequentially connected in series to form a second stage boost circuit; the fourth inductor L ₄ , the output capacitor C _f and the load _RL form an output circuit. When the switch tube S is turned on, the third diode _D3 and the fourth diode _D4 are both turned on, and the first diode _D1 and the second diode _D2 are both turned off, so The voltage source V _i and the first capacitor C ₁ charge and store energy for the first inductor L ₁ ; the second capacitor C ₂ charges and store energy for the second inductor L ₂ and the third inductor L ₃ respectively; at the same time, the second The capacitor C ₂ and the fourth inductor L ₄ supply power to the output capacitor C _f and the load _RL . When the switch tube S is turned off, both the first diode _D1 and the second diode _D2 are turned on, and the third diode _D3 and the fourth diode _D4 are both turned off, The voltage source V _i charges and stores energy to the second capacitor C ₂ together with the first inductance L ₁ to form a loop; the inductance in the switched inductance impedance network charges and stores energy to the first capacitor C ₁ to form a loop; at the same time, the voltage source Together with the first inductor L ₁ and the inductor in the switched inductor impedance network, V _i supplies power to the fourth inductor L ₄ , the output capacitor C _f and the load R _L to form a loop. The whole circuit structure is simple, only one switch tube is used, it has high output voltage gain and low capacitor voltage stress, the power supply current and load current are continuous, the output and input share the same ground, and the circuit does not have start-up current impact and switching The inrush current problem at the moment the tube is turned on.

The specific connection of the circuit shown in Figure 1 is as follows: the positive pole of the voltage source is connected to one end of the first inductance; the other end of the first inductance is respectively connected to the anode of the first diode and the negative pole of the first capacitor; The cathode of the first diode is respectively connected to the positive pole of the second capacitor, one end of the second inductance and the anode of the third diode; the other end of the second inductance is respectively connected to the anode of the second diode and the anode of the first diode The anodes of the four diodes are connected; the cathode of the first diode is respectively connected with the cathode of the third diode and one end of the third inductance; the cathode of the fourth diode is respectively connected with the other end of the third inductance, the third inductance The positive pole of a capacitor, the drain pole of the switching tube are connected to one end of the fourth inductance; the other end of the fourth inductance is connected to the positive pole of the output capacitor and one end of the load; the negative pole of the voltage source is respectively connected to the second capacitor The negative pole, the negative pole of the output capacitor, the other end of the load and the source of the switch tube are connected.

Fig. 2a and Fig. 2b show the working process diagram of the circuit of the present invention. Figure 2a and Figure 2b are the equivalent circuit diagrams of the switching tube S in the on and off periods respectively. The solid line in the figure indicates the part of the converter where current flows, and the dotted line indicates the part of the converter where no current flows.

Working process of the present invention is as follows:

Stage 1, as shown in Figure 2a: the switch tube S is turned on, at this time the third diode _D3 and the fourth diode _D4 are both turned on, and the first diode _D1 and the second diode _D2 are both turned on off. The circuit forms four loops, namely: the voltage source V _i and the first capacitor C ₁ charge and store energy for the first inductor L ₁ together to form a loop; the second capacitor C ₂ charges and stores energy for the second inductor L ₂ , A loop is formed; the second capacitor C ₂ charges and stores energy to the third inductor L ₃ to form a loop; the second capacitor C ₂ and the fourth inductor L ₄ supply power to the output capacitor C _f and the load _RL to form a loop.

Stage 2, as shown in Figure 2b: the switch tube S is turned off, at this time the first diode D ₁ and the second diode D ₂ are both turned on, and the third diode D ₃ and the fourth diode D ₄ are both turned off. The circuit forms three loops, namely: the voltage source V _i and the first inductor _L1 charge and store energy for the second capacitor _C2 together to form a loop; the inductance in the switched inductance impedance network charges and stores energy for the first capacitor _C1 , forming a loop; the voltage source V _i together with the first inductor L ₁ and the inductor in the switched inductor impedance network supply power to the fourth inductor L ₄ , the output capacitor C _f and the load R _L , forming a loop.

In summary, it is assumed that the on-duty ratio of the switching tube S is d, and the switching period is T _s . Due to the symmetry of the switch inductor impedance network, that is, the inductances of the second inductor L ₂ and the third inductor L ₃ are equal. Therefore, there is v _L2 = v _L3 = v _L , v _L2 and v _L3 are the voltages of the second inductor _L2 and the third inductor _L3 respectively, and set v _L to be the voltage of the inductor in the switched inductor impedance network, v _L1 and v _L4 are the voltages of the first inductor L ₁ and the fourth inductor L ₄ respectively, V _C1 and V _C2 are the voltages of the first capacitor C ₁ and the second capacitor C ₂ respectively, and v _S is the drain and source of the switching tube S voltage between poles. In a switching period T _s , let the output voltage be V _o . When the converter enters the steady-state operation, the following voltage relationship derivation process is obtained.

During the conduction period of the switch tube S, it corresponds to the working situation described in stage 1, so the following formula is given:

v _L1 ＝V _i +V _C1 (1)

v _L2 ＝v _L3 ＝v _L ＝V _C2 (2)

v _L4 ＝v _S -V _o ＝-V _o (3)

The conduction time of the switch tube S is dT _s .

When the switch tube S is turned off, it corresponds to the working situation described in stage 2, so the following formula is given:

v _L1 ＝V _i -V _C2 (4)

${\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; L</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; L</span>}\mathrm{<span\; class="notranslate">\; 3</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; L</span>}}<span\; class="notranslate">\; =</span><span\; class="notranslate">\; -</span>\frac{\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; 2</span>}}{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; C</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 5</span>}<span\; class="notranslate">\; )</span>$

v _S ＝V _C1 +V _C2 (6)

v _L4 ＝v _S -V _o ＝V _C1 +V _C2 -V _o (7)

The turn-off time of the switch tube S is (1-d)T _s .

According to the above circuit analysis and the symmetry of the switching inductance impedance network, the inductance L ₁ , inductance L ₂ and inductance L ₃ are respectively applied to the inductance volt-second conservation principle, and the parallel verticals (1), (2), (4) and ( 5) Available:

(V _i +V _C1 )dT _s +(V _i -V _C2 )(1-d)T _s =0 (8)

${\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; C</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}\mathrm{<span\; class="notranslate">\; d</span>}{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; +</span><span\; class="notranslate">\; (</span><span\; class="notranslate">\; -</span>\frac{\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; 2</span>}}{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; C</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; 1</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; d</span>}<span\; class="notranslate">\; )</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 0</span>}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 9</span>}<span\; class="notranslate">\; )</span>$

Therefore, the relationship between the voltage V _C1 of the first capacitor _C1 and the voltage V _C2 of the second capacitor _C2 and the voltage source V _i can be obtained as follows:

${\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; C</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; d</span>}}{\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; d</span>}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; d</span>}}^{\mathrm{<span\; class="notranslate">\; 2</span>}}}{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 10</span>}<span\; class="notranslate">\; )</span>$

${\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; C</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; d</span>}}{\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; d</span>}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; d</span>}}^{\mathrm{<span\; class="notranslate">\; 2</span>}}}{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 11</span>}<span\; class="notranslate">\; )</span>$

Combining formulas (3) and (7), and applying the principle of inductance volt-second conservation to the fourth inductance _L4 , it can be obtained:

(-V _o )dT _s +(V _C1 +V _C2 -V _o )(1-d)T _s ＝0 (12)

Substituting formula (10) and (11) into formula (12), the gain factor expression of the circuit of the present invention can be obtained as:

$\mathrm{<span\; class="notranslate">\; G</span>}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; o</span>}}}{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}}<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; d</span>}}^{\mathrm{<span\; class="notranslate">\; 2</span>}}}{\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; d</span>}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; d</span>}}^{\mathrm{<span\; class="notranslate">\; 2</span>}}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 13</span>}<span\; class="notranslate">\; )</span>$

Let the voltage V _S be the voltage between the drain and the source when the switch tube S is turned off, then the equations (6), (10) and (11) have:

${\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; S</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; C</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; C</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; d</span>}}{\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; d</span>}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; d</span>}}^{\mathrm{<span\; class="notranslate">\; 2</span>}}}{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 14</span>}<span\; class="notranslate">\; )</span>$

From the denominators of the formulas (10), (11), (13) and (14), it can be known that the working range of the conduction duty ratio d of the switching tube S in the circuit of the present invention cannot exceed 0.414. As shown in Fig. 3 a, it is the comparison figure that the gain curve of the circuit of the present invention and the gain curve of the basic step-up circuit change with the duty ratio d; Fig. 3 b is the gain curve of the circuit gain curve of the present invention and the basic step-up circuit in Fig. 3 a The comparison diagram in the range where the duty ratio d is less than 0.4, the solid line in the figure represents the gain curve of the circuit of the present invention, and the dotted line represents the gain curve of the basic boost circuit. It can be seen from the figure that the gain G of the circuit of the present invention can reach very high when the duty cycle d does not exceed 0.4. Therefore, in comparison, the gain of the circuit of the present invention is relatively high.

By formula (10), (11) and (13) can obtain the voltage V _C1 of the first capacitor in the circuit of the present invention and the voltage V _C2 of the second capacitor and the relational expression of output voltage V _o respectively:

${\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; C</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; d</span>}}{\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; d</span>}}^{\mathrm{<span\; class="notranslate">\; 2</span>}}}{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; o</span>}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 15</span>}<span\; class="notranslate">\; )</span>$

${\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; C</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; d</span>}}{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; o</span>}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 16</span>}<span\; class="notranslate">\; )</span>$

Figure 4 shows the situation that the ratios of the voltage V _C1 of the first capacitor and the voltage V _C2 of the second capacitor to the output voltage V _o vary with the duty cycle d in the circuit of the present invention. In the figure, the solid line represents the curve of the ratio of the voltage V _C1 of the first capacitor to the output voltage V _o with the duty cycle d; the dotted line represents the ratio of the voltage V _C2 of the second capacitor to the output voltage V _o with the duty cycle d changing curves. It can be seen from the figure that the maximum values of the capacitor voltages V _C1 and V _C2 will not exceed the output voltage V _o within the allowable working range of the duty cycle d. Therefore, the capacitive voltage stress in the circuit of the present invention is relatively low.

As shown in Figure 5, it is the main waveform diagram when the circuit of the present invention is working. In the figure, V _g is the drive of the switch tube, and i _L1 , i _L2 , i _L3 and i _L4 are respectively the first inductance L ₁ and the second inductance L ₂ , the currents of the third inductor L ₃ and the fourth inductor L ₄ . Since the current of the inductor _L1 is the power supply current, and the current of the inductor _L4 is the load current, it can be seen from the figure that the power supply current and the load current are continuous.

In addition, due to the characteristics of the topological structure of the circuit itself of the present invention, when it is started, the first inductance L ₁ and the second inductance L ₂ and the third inductance L ₃ in the switched inductance impedance network have an inhibitory effect on the start-up surge current, which is beneficial to The soft start of the converter reduces the impact damage to the device; similarly, due to the existence of the fourth inductor L ₄ , the output capacitor will not cause a current impact on the switch tube when the switch tube is turned on.

To sum up, the circuit of the present invention has higher voltage gain and lower capacitive voltage stress, only one switch tube is used, the power supply current and load current are continuous, the output and input share the same ground, and there is no start-up surge current and The inrush current at the moment the switch tube is turned on.

The above-mentioned embodiment is a preferred embodiment of the present invention, but the embodiment of the present invention is not limited by the embodiment, and any other changes, modifications, substitutions and combinations made without departing from the spirit and principle of the present invention , simplification, all should be equivalent replacement methods, and are all included in the protection scope of the present invention.

Claims (3)

1. a switched inductors type accurate Z source DC-DC converter circuit, is characterized in that comprising voltage source (V _i), the first inductance (L ₁), the first diode (D ₁), the first electric capacity (C ₁), the second electric capacity (C ₂), switched inductors impedance network, switching tube (S), the 4th inductance (L ₄), output capacitance (C _f) and load (R _l); Described switched inductors impedance network is by the second inductance (L ₂), the 3rd inductance (L ₃), the second diode (D ₂), the 3rd diode (D ₃) and the 4th diode (D ₄) form; Described voltage source (V _i), the first inductance (L ₁), the first electric capacity (C ₁) and switching tube (S) be followed in series to form first order booster circuit; Described second electric capacity (C ₂), switched inductors impedance network and switching tube (S) be followed in series to form second level booster circuit; Described 4th inductance (L ₄), output capacitance (C _f) and load (R _l) form output circuit.

2. a kind of accurate Z source of switched inductors type according to claim 1 DC-DC converter circuit, is characterized in that described voltage source (V _i) positive pole and the first inductance (L ₁) one end connect; Described first inductance (L ₁) the other end respectively with the first diode (D ₁) anode and the first electric capacity (C ₁) negative pole connect; Described first diode (D ₁) negative electrode respectively with the second electric capacity (C ₂) positive pole, the second inductance (L ₂) one end and the 3rd diode (D ₃) anode connect; Described second inductance (L ₂) the other end respectively with the second diode (D ₂) anode and the 4th diode (D ₄) anode connect; Described second diode (D ₂) negative electrode respectively with the 3rd diode (D ₃) negative electrode and the 3rd inductance (L ₃) one end connect; Described 4th diode (D ₄) negative electrode respectively with the 3rd inductance (L ₃) the other end, the first electric capacity (C ₁) positive pole, the drain electrode of switching tube (S) and the 4th inductance (L ₄) one end connect; Described 4th inductance (L ₄) the other end respectively with output capacitance (C _f) positive pole and load (R _l) one end connect; Described voltage source (V _i) negative pole respectively with the second electric capacity (C ₂) negative pole, output capacitance (C _f) negative pole, load (R _l) the other end be connected with the source electrode of switching tube (S).

3. a kind of accurate Z source of switched inductors type according to claim 1 DC-DC converter circuit, is characterized in that:

When switching tube (S) conducting, described 3rd diode (D ₃) and the 4th diode (D ₄) all conductings, described first diode (D ₁) and the second diode (D ₂) all turn off, voltage source (V _i) and the first electric capacity (C ₁) together to the first inductance (L ₁) charging energy-storing; Described second electric capacity (C ₂) respectively to the second inductance (L ₂) and the 3rd inductance (L ₃) charging energy-storing; Meanwhile, the second electric capacity (C ₂) and the 4th inductance (L ₄) give output capacitance (C together _f) and load (R _l) power supply;

When switching tube (S) turns off, described first diode (D ₁) and the second diode (D ₂) all conductings, described 3rd diode (D ₃) and the 4th diode (D ₄) all turn off, described voltage source (V _i) and the first inductance (L ₁) give the second electric capacity (C together ₂) charging energy-storing, form loop; Inductance in switched inductors impedance network gives the first electric capacity (C ₁) charging energy-storing, form loop; Meanwhile, voltage source (V _i) and the first inductance (L ₁), inductance in switched inductors impedance network gives the 4th inductance (L together ₄), output capacitance (C _f) and load (R _l) power supply.