CN105939126B - A kind of quasi- Z-source inverter of switched inductors type mixing - Google Patents

Abstract

The present invention provides a switched inductance hybrid quasi-Z source inverter circuit, including a voltage source, which is composed of a first inductance, a second inductance, a fourth diode, a fifth diode and a sixth diode Switching inductance unit, a switching boost unit composed of a first capacitor, a first diode, a second diode and a MOS transistor S, composed of a third inductance, a second capacitor, a third capacitor and a third diode The quasi-Z source unit, three-phase inverter bridge, output filter inductor, filter capacitor and load. The whole circuit combines the single-stage buck-boost characteristics of the switching boost unit and the quasi-Z source unit and the characteristics of parallel charging and series discharging of the switching inductor, which has a higher output voltage gain, and the output and input share the same ground, reducing the inverter The voltage stress of the switching devices in the bridge, and the circuit does not have the inrush current at startup and the inrush current at the moment when the switch tube is turned on.

Description

A Switched Inductance Hybrid Quasi-Z Source Inverter

technical field

The invention relates to the technical field of power electronic circuits, in particular to a switching inductance hybrid quasi-Z source inverter circuit.

Background technique

In fuel cell power generation and photovoltaic power generation, due to the low DC voltage provided by a single solar cell or a single fuel cell, it cannot meet the electricity demand of existing electrical equipment, nor can it meet the needs of grid connection. It is often necessary to combine multiple batteries connected in series to achieve the desired voltage. On the one hand, this method greatly reduces the reliability of the entire system, and on the other hand, it needs to solve the problem of series voltage equalization. For this reason, a high-gain converter circuit capable of converting a low voltage to a high voltage is required. The Z-source boost converter proposed in recent years is a high-gain converter circuit, but the circuit has a high impedance network capacitance voltage stress, the power supply current is discontinuous, the output and input do not share the same ground, and there are The problem of a large start-up inrush current limits the practical application of this circuit.

Contents of the invention

The purpose of the present invention is to overcome the deficiencies of the above-mentioned prior art, and provide a switching inductance type hybrid quasi-Z source inverter circuit, and the specific technical scheme is as follows.

A switched inductance hybrid quasi-Z source inverter circuit, including a voltage source, a switched inductance unit, a switch boost unit, a quasi-Z source unit, a three-phase inverter bridge, an output filter inductor, a filter capacitor and a three-phase load on the AC side . The switching inductance unit is composed of a first inductance, a second inductance, a fourth diode, a fifth diode and a sixth diode; the switching boost unit is composed of a first capacitor, a first diode, The MOS transistor S and the second diode are formed; the quasi-Z source unit is formed by the third inductor, the second capacitor, the third capacitor and the third diode.

In the above-mentioned switched inductance type hybrid quasi-Z source inverter circuit, the anode of the voltage source is connected to one end of the first inductance and the anode of the fourth diode; the cathode of the fourth diode is respectively connected to the first The cathode of the fifth diode is connected to one end of the second inductance; the other end of the first inductance is respectively connected to the anode of the fifth diode and the anode of the sixth diode; the cathode of the sixth diode respectively connected to the other end of the second inductance, the anode of the first diode and the drain of the MOS transistor S; the source of the MOS transistor S is respectively connected to the anode of the second diode and the cathode of the first capacitor; The cathode of the first diode is respectively connected to the positive pole of the first capacitor, the negative pole of the third capacitor and the anode of the third diode; the cathode of the third diode is respectively connected to the positive pole of the second capacitor and the first capacitor. One end of the three inductors is connected; the positive pole of the third capacitor is respectively connected to the other end of the third inductor and the positive terminal of the three-phase inverter bridge; the negative pole of the voltage source is respectively connected to the cathode of the second diode, the first The negative poles of the two capacitors are connected to the negative terminals of the three-phase inverter bridge.

Compared with the prior art, the circuit of the present invention has the following advantages and technical effects: the output voltage gain of the circuit of the present invention is higher, which reduces the voltage stress of the switching device in the inverter bridge; it has a good inhibitory effect on the starting surge current, The reliability is improved; and the output and input share the same ground, so it is more suitable for application in fuel cell power generation, photovoltaic power generation and other new energy power generation technology fields.

Description of drawings

Fig. 1 is a switch inductance hybrid quasi-Z source inverter circuit in a specific embodiment of the present invention.

Fig. 2 is a simplified equivalent circuit for modal analysis of a switched inductance hybrid quasi-Z source inverter shown in Fig. 1.

Fig. 3a and Fig. 3b are the equivalent circuit diagrams of a switching inductance hybrid quasi-Z source inverter shown in Fig. 1 when its three-phase inverter bridge is through and non-through.

Fig. 4a is a graph comparing the boost factor curve of the circuit of the present invention with the boost factor curves of a switched inductor Z-source inverter, a quasi-Z-source inverter based on diode secondary expansion, and a traditional Z-source inverter.

Fig. 4b is a graph showing the relationship between the modulation coefficient M of the four inverters and the output voltage gain G of the AC side.

Fig. 4c is a comparative diagram of voltage stress of switching devices in four kinds of inverters.

Fig. 4d shows the simulation results of related variables on the DC side and the AC side of the circuit of the present invention, taking V _i =20V and the through-duty ratio D=0.2 as an example.

Detailed ways

The technical solution of the present invention has been described in detail above, and the specific implementation of the present invention will be further described below in conjunction with the accompanying drawings.

Referring to Fig. 1 , a switched inductance hybrid quasi-Z source inverter circuit according to the present invention includes a voltage source V _i , a switched inductance unit, a switched boost unit, a quasi-Z source network, a three-phase inverter bridge, Output filter inductor, filter capacitor and three-phase symmetrical load. The switch inductance unit is composed of a first inductance L ₁ , a second inductance L ₂ , a fourth diode D ₄ , a fifth diode D ₅ and a sixth diode D ₆ ; the switch boost unit is composed of The first capacitor C ₁ , the first diode D ₁ , the MOS transistor S and the second diode D ₂ are formed; the quasi-Z source network is composed of the third inductor L ₃ , the second capacitor C ₂ , and the third capacitor C ₃ and the third diode D ₃ constitutes. When the inverter bridge is straight-through (equivalent to S ₁ being closed) and the MOS transistor S is conducting, the first diode D ₁ , the second diode D ₂ , the third diode D ₃ and the fifth diode The tubes _D5 are all turned off, the fourth diode _D4 and the sixth diode _D6 are turned on, and the load on the AC side of the three-phase inverter bridge is short-circuited. The second capacitor C ₂ charges the third inductor L ₃ ; the voltage source V _i together with the first capacitor C ₁ and the third capacitor C ₃ charges and stores energy to the first inductor L ₁ and the second inductor L ₂ connected in parallel. When the inverter bridge is non-through (equivalent to _S1 being turned off) and the MOS tube S is turned off, the load on the AC side of the inverter bridge is connected to the main circuit. The first diode D ₁ , the second diode D ₂ , the third diode D ₃ and the fifth diode D ₅ are all conducting, and the fourth diode D ₄ and the sixth diode _D6 turns off. The voltage source V _i together with the first inductance L ₁ and the second inductance L ₂ charge and store energy to the first capacitor C ₁ and the second capacitor C ₂ connected in parallel to form a loop; the third inductance L ₃ and the third capacitor C ₃ in parallel to form a loop; at the same time, the voltage source V _i together with the first inductor L ₁ , the second inductor L ₂ and the third inductor L ₃ supplies power to the load on the AC side through the three-phase inverter bridge. The whole circuit has a simple structure, high output voltage gain, and the output and input share the same ground, and the circuit does not have the problem of starting current impact and current impact at the moment when the switch tube is turned on.

The specific connection of the circuit of the present invention is as follows: the anode of the voltage source is connected to one end of the first inductance and the anode of the fourth diode; the cathode of the fourth diode is connected to the cathode of the fifth diode and the first diode respectively. One end of the two inductors is connected; the other end of the first inductor is connected to the anode of the fifth diode and the anode of the sixth diode respectively; the cathode of the sixth diode is connected to the other end of the second inductor respectively 1. The anode of the first diode is connected to the drain of the MOS transistor S; the source of the MOS transistor S is respectively connected to the anode of the second diode and the cathode of the first capacitor; The cathode is respectively connected to the positive pole of the first capacitor, the negative pole of the third capacitor and the anode of the third diode; the cathode of the third diode is respectively connected to the positive pole of the second capacitor and one end of the third inductor; the The anode of the third capacitor is respectively connected to the other end of the third inductance and the positive terminal of the three-phase inverter bridge; the cathode of the voltage source is respectively connected to the cathode of the second diode, the cathode of the second capacitor and the three-phase inverter Connect to the negative terminal of the transformer bridge.

Fig. 3a and Fig. 3b show the working process diagram of the circuit of the present invention. Figure 3a and Figure 3b are the equivalent circuit diagrams of the inverter bridge through and non-through period respectively. The solid line in the figure indicates the part where current flows in the converter, and the dotted line indicates the part where no current flows in the converter.

Working process of the present invention is as follows:

Stage 1, as shown in Figure 3a: when the inverter bridge is straight-through (equivalent to S ₁ being closed) and the MOS transistor S is conducting, the first diode D ₁ , the second diode D ₂ , and the third diode D ₃ and the fifth diode _D5 are both turned off, the fourth diode _D4 and the sixth diode _D6 are turned on, and the load on the AC side of the three-phase inverter bridge is short-circuited. The circuit forms two loops, respectively: the second capacitor C ₂ charges the third inductor L ₃ to form a loop; the voltage source V _i together with the first capacitor C ₁ and the third capacitor C ₃ charges the parallel connected first inductor L ₁ Charge and store energy with the second inductor _L2 to form a loop.

Phase 2, as shown in Figure 3b: when the inverter bridge is not straight-through (equivalent to _S1 being turned off) and the MOS tube S is turned off, the load on the AC side of the inverter bridge is connected to the main circuit. The first diode D ₁ , the second diode D ₂ , the third diode D ₃ and the fifth diode D ₅ are all conducting, and the fourth diode D ₄ and the sixth diode _D6 turns off. The circuit forms four loops, namely: the voltage source V _i together with the first inductance L ₁ and the second inductance L ₂ charge and store energy to the first capacitor C ₁ and the second capacitor C ₂ connected in parallel to form a loop; The three inductors L ₃ and the third capacitor C ₃ are connected in parallel to form a loop; at the same time, the voltage source V _i together with the first inductor L ₁ , the second inductor L ₂ and the third inductor L ₃ supplies the AC side load through the three-phase inverter bridge powered by.

In summary, when the inverter bridge is through, the MOS transistor S is turned on, and when the inverter bridge is not through, the MOS transistor S is turned off. Therefore, if the direct duty cycle of the inverter bridge is set as D, then the conduction duty cycle of the MOS transistor S is also D, and the switching period is set as T _s . And set V _L1 , V _L2 and V _L3 to be the voltages across the first inductance L ₁ , the second inductance L ₂ and the third inductance L ₃ respectively, and V _C1 , V _C2 and V _C3 to be the first capacitors C ₁ , The voltages of the second capacitor _C2 and the third capacitor _C3 , V _S is the voltage between the drain and the source of the MOS transistor S, and V _PN is the DC side chain voltage of the inverter bridge. When the inverter enters the steady-state operation, the following voltage relationship derivation process is obtained.

Phase 1: During the direct connection of the inverter bridge (equivalent to _S1 being closed) and the conduction period of the MOS tube, the corresponding equivalent circuit is shown in Figure 3a, so the following formula is given:

V _{L1_on} ＝V _{L2_on} ＝V _i +V _C1 +V _C3 (1)

V _{L3_on} = V _C2 (2)

V _S =V _PN =0 (3)

The through time of the inverter bridge and the conduction time of the MOS transistor S are DT _s .

Phase 2: The inverter bridge is non-through (equivalent to S ₁ off) and the MOS tube S is off, the corresponding equivalent circuit is shown in Figure 3b, so the following formula is given:

V _{L1_off} +V _{L2_off} =V _i -V _C1 (4)

V _{L3_off} = - V _C3 (5)

V _C1 = V _C2 (6)

V _S = V _C1 (7)

V _PN =V _C1 +V _C3 (8)

The non-through time of the inverter bridge and the turn-off time of the MOS transistor S are (1-D)T _s .

According to the above analysis, the first inductance L ₁ , the second inductance L ₂ and the third inductance L ₃ are respectively applied to the principle of conservation of inductance volt-seconds, and formula (1), formula (2), formula (4) and formula ( 5) Available:

V _i +(2D-1)V _C1 +DV _C3 =(1-D)V _{L2_off} (9)

V _i +(2D-1)V _C1 +DV _C3 =(1-D)V _{L1_off} (10)

DV _C2 = (1-D) V _C3 (11)

Therefore, formula (6), formula (7), formula (8), formula (9), formula (10) and formula (11) can draw the voltage V C1 of the first capacitance _C1 and the voltage V _C1 of the second capacitance C The relationship between the voltage V _C2 voltage source V _i of ₂ is:

The relationship between the voltage V _C3 of the third capacitor C ₃ and the power supply voltage V _i is:

The voltage between the drain and source at both ends of the MOS transistor S is:

The DC side chain voltage V _PN of the inverter bridge is:

Then the boost factor (Boost Factor) B of the inverter circuit of the present invention is:

The corresponding AC side output voltage gain G is:

G＝MB＝(0～∞) (17)

As shown in Figure 4a, it is a comparison diagram of the boost factor curve of the circuit of the present invention and the boost factor curve of the switched inductor Z-source inverter, the quasi-Z-source inverter based on the diode secondary expansion, and the traditional Z-source inverter; The figure includes the boost factor curve of the circuit of the present invention, the boost factor curve of the switched inductance Z source inverter, the boost factor curve of the quasi Z source inverter based on the diode secondary expansion, and the traditional Z source inverter The boost factor curve. It can be seen from the figure that when the duty cycle D of the circuit of the present invention does not exceed 0.26, the boost factor B can reach a large value, which is obviously higher than that of other inverter topologies, and the duty cycle of the circuit of the present invention is The ratio D will not exceed 0.26.

Figure 4b is a graph of the relationship between the modulation coefficient M of the four inverters and the output voltage gain G on the AC side. The inverter circuit can use a larger modulation coefficient M to modulate the inverter, thereby improving the DC voltage utilization rate of the inverter and improving the quality of the output voltage waveform on the AC side.

Figure 4c is a comparison of the voltage stress of the switching devices in the four inverters. It can be seen from the figure that the voltage stress of the switching devices in the inverter bridge of the circuit of the present invention is smaller than that of the other three inverter topologies, thereby reducing the use of switching devices. device cost.

Fig. 4d shows the simulation results of related variables on the DC side and the AC side of the circuit of the present invention, taking V _i =20V and the through-duty ratio D=0.2 as an example. When D=0.2, boost factor B=5, inverter bridge DC link voltage V _PN =B*V _i =100V, capacitor voltage V _C1 =V _C3 =80V, V _C2 =20V, voltage VS at both ends of the switch S= 80V. In addition, the waveforms of the inductor current i _L1 , i _L2 and i _L3 , the waveforms of the output phase voltage V _phase and the output line voltage V _line on the AC side, and the voltage V _RL at both ends of the three-phase symmetrical resistive load are also shown in Figure 4d. waveform.

In summary, the circuit of the present invention has a higher output voltage gain, and the output and input share the same ground, which reduces the voltage stress of the switching device in the inverter bridge, and the circuit does not have a start-up inrush current and an inrush current at the moment the switch tube is turned on .

The above-mentioned embodiment is a preferred embodiment of the present invention, but the embodiment of the present invention is not limited by the embodiment, and any other changes, modifications, substitutions and combinations made without departing from the spirit and principle of the present invention , simplification, all should be equivalent replacement methods, and are all included in the protection scope of the present invention.

Claims (1)

1. a kind of switched inductors type mixes quasi- Z-source inverter circuit, it is characterised in that including voltage source（V_i）, switched inductors unit, Boost switching unit, quasi- Z source units, three phase inverter bridge, output inductor, filter capacitor and three phase symmetry load；It is described to open Inductance unit is closed by the first inductance（L₁）, the second inductance（L₂）, the 4th diode（D₄）, the 5th diode（D₅）With the six or two pole Pipe（D₆）It constitutes；The boost switching unit is by the first capacitance（C₁）, the first diode（D₁）, metal-oxide-semiconductor（S）With the second diode （D₂）It constitutes；The quasi- Z source units are by third inductance（L₃）, the second capacitance（C₂）, third capacitance（C₃）With third diode（D₃） It constitutes；The voltage source（V_i）Anode with the first inductance（L₁）One end and the 4th diode（D₄）Anode connection；Described Four diodes（D₄）Cathode respectively with the 5th diode（D₅）Cathode and the second inductance（L₂）One end connection；Described first Inductance（L₁）The other end respectively with the 5th diode（D₅）Anode and the 6th diode（D₆）Anode connection；Described 6th Diode（D₆）Cathode respectively with the second inductance（L₂）The other end, the first diode（D₁）Anode and metal-oxide-semiconductor（S）Leakage Pole connects；The metal-oxide-semiconductor（S）Source electrode respectively with the second diode（D₂）Anode and the first capacitance（C₁）Cathode connection；Institute State the first diode（D₁）Cathode respectively with the first capacitance（C₁）Anode, third capacitance（C₃）Cathode and third diode （D₃）Anode connection；The third diode（D₃）Cathode respectively with the second capacitance（C₂）Anode and third inductance（L₃） One end connection；The third capacitance（C₃）Anode respectively with third inductance（L₃）The other end and three phase inverter bridge anode Property end connection；The voltage source（V_i）Cathode respectively with the second diode（D₂）Cathode, second capacitance（C₂）Cathode and The negative polarity end of three phase inverter bridge connects；When the bridge arm direct pass exchange side load short circuits while metal-oxide-semiconductor of three phase inverter bridge（S）Conducting When, first diode（D₁）, the second diode（D₂）, third diode（D₃）With the 5th diode（D₅）It is turned off, the 4th Diode（D₄）With the 6th diode（D₆）Conducting, the second capacitance（C₂）To third inductance（L₃）Charging；The voltage source（V_i）With First capacitance（C₁）With third capacitance（C₃）Together to the first inductance in parallel（L₁）With the second inductance（L₂）Charging energy-storing；When three The bridge arm of phase inverter bridge is non-straight to be connected into exchange lateral load while metal-oxide-semiconductor（S）When shutdown, first diode（D₁）, second Diode（D₂）, third diode（D₃）With the 5th diode（D₅）It is both turned on, the 4th diode（D₄）With the 6th diode（D₆） Shutdown, the voltage source（V_i）With the first inductance（L₁）With the second inductance（L₂）Together to the first capacitance in parallel（C₁）With second Capacitance（C₂）Charging energy-storing, forming circuit；Third inductance（L₃）With third capacitance（C₃）Parallel connection, forming circuit；Meanwhile voltage source （V_i）With the first inductance（L₁）, the second inductance（L₂）With third inductance（L₃）It is supplied together to exchange lateral load by three phase inverter bridge Electricity.