CN104779277A - 一种异质结场阻结构的igbt及其制备方法 - Google Patents

一种异质结场阻结构的igbt及其制备方法 Download PDF

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CN104779277A
CN104779277A CN201410304469.4A CN201410304469A CN104779277A CN 104779277 A CN104779277 A CN 104779277A CN 201410304469 A CN201410304469 A CN 201410304469A CN 104779277 A CN104779277 A CN 104779277A
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杨凡力
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Shanghai Tiniu Technology Co.,Ltd.
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/72Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7393Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
    • H01L29/7395Vertical transistors, e.g. vertical IGBT
    • H01L29/7398Vertical transistors, e.g. vertical IGBT with both emitter and collector contacts in the same substrate side
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234Bipolar junction transistors [BJT]
    • H01L29/66325Bipolar junction transistors [BJT] controlled by field-effect, e.g. insulated gate bipolar transistors [IGBT]
    • H01L29/66333Vertical insulated gate bipolar transistors

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Abstract

本发明公开了一种异质结场阻结构的IGBT,其包括发射极、栅极、漂移区、缓冲区、异质结集电极和金属焊接层,所述异质结集电极设置于IGBT底部,所述缓冲区和漂移区依次叠加在集电极上,所述发射极和栅极设置于漂移区顶部,发射极和栅极并排设置,所述集电极表面还设有金属焊接层。本发明还公开了一种异质结场阻结构IGBT的制备方法。本发明的优点在于用简单的方法制造异质结IGBT的集电区,降低接触电阻和饱和压降。

Description

一种异质结场阻结构的IGBT及其制备方法
技术领域
本发明涉及IGBT,尤其涉及一种异质结场阻结构的IGBT及其制备方法。
背景技术
绝缘栅双极型晶体管(IGBT),它是八十年代初诞生,九十年代迅速发展起来的新型复合电力电子器件。1980年之后国际上主流的半导体功率器件由可控硅发展为更先进的IGBT。
IGBT通常有三种结构,穿通型IGBT、非穿通型IGBT和场阻型IGBT,其中,非穿通型IGBT和场阻型IGBT采用FZ单晶硅片,在完成IGBT正面工艺后,硅片减薄,然后背面高能N型离子注入和P型离子注入,然后退火。此结构的主要缺点:为降低背面空穴的注入效率,背面P型离子注入剂量不会太高,带来的结果就是集电极的接触电阻会很大。
发明内容
鉴于目前IGBT存在的上述不足,本发明提供一种异质结场阻结构的IGBT及其制备方法,能够在保证空穴的注入效率的同时,提高背面P型杂质的掺杂浓度,降低IGBT背面集电极的接触电阻。
为达到上述目的,本发明采用如下技术方案:
一种异质结场阻结构的IGBT,包括发射极、栅极、漂移区、缓冲区、异质结集电极和金属焊接层,所述异质结集电极设置于IGBT底部,所述缓冲区和漂移区依次叠加在异质结集电极上,所述发射极和栅极设置于漂移区顶部,发射极和栅极并排设置,所述金属焊接层设置于异质结电极表面。
作为优选方案,所述栅极的材料为二氧化硅。
作为优选方案,所述发射极的材料为锗单质。
作为优选方案,所述集电极分为P-Si层和P-Ge层,所述P-Ge层设置于P-Si层下,所述P-Ge层的厚度为1~5000埃,P-Ge的掺杂剂量为1012~2×1016cm-2
一种制备本发明所述的IGBT方法,其包括如下步骤:
在单晶硅片上完成正面工艺,形成发射极和栅极;
将单晶硅的背面减薄,
将VA族或VIA族元素离子注入单晶硅的背面形成缓冲层;
将锗蒸发至所述缓冲层的表面,形成锗层;
将P型杂质离子注入所述锗层形成集电极;
将所述集电极进行退火;
将退火后的集电极表面金属化,形成一层金属镀层。
作为优选方案,所述正面工艺包括如下操作:
P型体和N+注入推进;
进行沟槽刻蚀;
进行通道氧化和多晶硅沉积;
介质沉积;
接触孔刻蚀;
正面金属化;
硅片正面钝化。
作为优选方案,所述锗蒸发的步骤为蒸发或溅射。
作为优选方案,所述退火的步骤包括炉管退火、快速退火和激光退火中的任意一种。
作为优选方案,所述金属镀层的成分为AlTiNiAg。
本发明的IGBT的优点在于:用简单的方法制造异质结IGBT的集电极,降低了接触电阻和饱和压降。
附图说明
为了更清楚地说明本发明实施例中的技术方案,下面将对实施例中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本发明的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。
图1为本发明所述的一种异质结场阻结构的IGBT的结构示意图;
图中,1、发射极;2、栅极;3、漂移区;4、缓冲区;5、异质结集电极;51、P-Si层;52、P-Ge层;6、金属焊接层。
具体实施方式
下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。
本发明所述的异质结场阻结构的IGBT结构如图1所示,包括发射极1、栅极2、漂移区3、缓冲区4和集电极5,所述分为P-Si层51和P-Ge层52的集电极5设置于IGBT底部,P-Si层51设置于P-Ge层52上,P-Ge层的厚度为1~5000埃,P-Ge的掺杂剂量为1012~2×1016cm-2;所述缓冲区4和漂移区3依次叠加在集电极5上,集电极5表面还设有金属焊接层6,所述发射极1和栅极2设置于漂移区3顶部,发射极1和栅极2并排设置。
本发明还提供了一种制备异质结场阻结构的IGBT的方法,包括如下步骤:
步骤一、在单晶硅片上进行P型体和N+注入推进,然后进行沟槽刻蚀,再进行栅氧化和多晶硅沉积;接下来进行二氧化硅等介质的沉积;然后再接触孔刻蚀;进而进行正面金属化;最后进行硅片正面钝化;完成IGBT的正面加工工艺,形成发射极和栅极;
步骤二、将完成步骤一加工后的单晶硅片通过抛光的方法减薄至所需的厚度,此厚度取决于器件的反向击穿电压;
步骤三、将VA族或VIA族元素离子注入单晶硅片的背面形成缓冲层,比如磷离子、硒离子等;
步骤四、将锗通过蒸发或溅射的方法镀至所述缓冲层的表面,形成锗层;
步骤五、将P型杂质离子通过常规手段注入锗层内形成集电极;
步骤六、将所述集电极进行炉管退火,也可以通过激光退火或快速退火的方式退火;
步骤七、将退火后的集电极表面通过常规手段进行金属化,镀上AlTiNiAg的焊接层。
本发明的IGBT的优点在于:用简单的方法制造异质结IGBT的集电极,降低了接触电阻和饱和压降。比如,采用此方法,可以将常规方法制作的IGBT的饱和压降从2.0~2.5V降低到1.5~2.0V。
以上所述,仅为本发明的具体实施方式,但本发明的保护范围并不局限于此,任何熟悉本领域技术的技术人员在本发明公开的技术范围内,可轻易想到的变化或替换,都应涵盖在本发明的保护范围之内。因此,本发明的保护范围应以所述权利要求的保护范围为准。

Claims (8)

1.一种异质结场阻结构的IGBT,其特征在于,包括发射极、栅极、漂移区、缓冲区、异质结集电极和金属焊接层,所述异质结集电极设置于IGBT底部,所述缓冲区和漂移区依次叠加在异质结集电极上,所述发射极和栅极设置于漂移区顶部,发射极和栅极并排设置,所述金属焊接层设置于异质结电极表面。
2.根据权利要求1所述的IGBT,其特征在于,所述发射极的材料为锗单质。
3.根据权利要求1所述的IGBT,其特征在于,所述集电极分为P-Si层和P-Ge层,所述P-Ge层设置于P-Si层下,所述P-Ge层的厚度为1~5000埃,P-Ge的掺杂剂量为1012~2×1016cm-2
4.一种如权利要求1或2或3所述的IGBT制备方法,其特征在于,包括如下步骤:
在单晶硅片上完成正面工艺,形成发射极和栅极;
将单晶硅的背面减薄,
将VA族或VIA族元素离子注入单晶硅的背面形成缓冲层;
将锗蒸发至所述缓冲层的表面,形成锗层;
将P型杂质离子注入所述锗层形成集电极;
将所述集电极进行退火;
将退火后的集电极表面金属化,形成一层金属镀层。
5.根据权利要求4所述的IGBT制备方法,其特征在于,所述正面工艺包括如下操作:
P型体和N+注入推进;
进行沟槽刻蚀;
进行栅极氧化和多晶硅沉积;
介质沉积;
接触孔刻蚀;
正面金属化;
硅片正面钝化。
6.根据权利要求4所述的IGBT制备方法,其特征在于,所述锗蒸发的步骤为蒸发或溅射。
7.根据权利要求4所述的IGBT制备方法,其特征在于,所述退火的步骤包括炉管退火、快速退火和激光退火中的任意一种。
8.根据权利要求4所述的IGBT制备方法,其特征在于,所述金属镀层的成分为AlTiNiAg。
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110112213A (zh) * 2019-05-24 2019-08-09 厦门中能微电子有限公司 绝缘栅双极型晶体管

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CN102376767A (zh) * 2010-08-12 2012-03-14 英飞凌科技奥地利有限公司 具有减小的短路电流的晶体管器件
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JP2008053752A (ja) * 2007-11-08 2008-03-06 Mitsubishi Electric Corp 電力用半導体装置
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110112213A (zh) * 2019-05-24 2019-08-09 厦门中能微电子有限公司 绝缘栅双极型晶体管

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