CN104657311A - PowerPC based multi-processor communication architecture - Google Patents
PowerPC based multi-processor communication architecture Download PDFInfo
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- CN104657311A CN104657311A CN201310588416.5A CN201310588416A CN104657311A CN 104657311 A CN104657311 A CN 104657311A CN 201310588416 A CN201310588416 A CN 201310588416A CN 104657311 A CN104657311 A CN 104657311A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4027—Coupling between buses using bus bridges
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
- G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
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Abstract
The invention discloses a PowerPC based multi-processor communication architecture. The PowerPC based multi-processor communication architecture comprises a main processor PowerPC, a plurality of secondary processor units and a plurality of remote control computers. The PowerPC based multi-processor communication architecture has the advantages that the data can be transmitted between different processor units at different transmission speed through different communication interfaces; the main processor module and the secondary processor modules are clear in division of work, the processing is fast, and the processing capacity is high; in addition, all modules can be manufactured into daughter cards, and therefore, the modularization and engineering of the multi-processor communication architecture can be achieved.
Description
Technical field
The present invention proposes a kind of multiprocessor communication architecture based on PowerPC, achieve different communication interface, different transmission speed, difference from the exchanges data between processor, and difference carries out exchanges data by pci bus and primary processor PowerPC between processor, improve the transmission speed between different processor and processing power, this multiprocessor communication architecture based on PowerPC can be used for the fields such as Aero-Space, industrial automation, machine-building.
Background technology
Along with the development of science and technology, telecommunication controls in field widespread uses such as Aero-Space, industrial automation, machine-building.But the data transmission Long-distance Control related between multiprocessor, different communication interface is a difficult point of current technology.
Slow for the communication speed between conventional multi-processor, the problem that external communication interface is single, the present invention proposes a kind of multiprocessor communication architecture based on PowerPC, and advantage is to carry out exchanges data by pci bus between multiprocessor.Pci bus is a kind of high performance 32/64 BITBUS network with multichannel address wire and data line, and it supports 64 bit data transmission, multibus master control and linear burst mode, and its message transmission rate reaches 132MB/S; Utilize multiple process chip towards PCI local bus can tectonic system machine, workstation, interconnected peripherals and board, thus substantially increase data rate between multiprocessor.
Multiprocessor communication architecture based on PowerPC be use high speed dual port RAM be connected between processor and pci bus as data transmit buffering, the terminal being pci interface circuit and transmitting from data between processor, factor data conflict when effectively can solve principal and subordinate processor transmission and the loss of data that causes, realize the Long-distance Control of data transmission.
In addition, rich and varied from the external communication interface of processor, meet remote control computer communication need.Multiprocessor communication architecture based on PowerPC can be used for Aero-Space, industrial automation, machine-building, etc. various fields, therefore, control to be a trend of future development based on the multiprocessor communication architecture of PowerPC and telecommunication on this basis.
Summary of the invention
The object of the present invention is to provide a kind of multiprocessor communication architecture based on PowerPC, achieve between multiprocessor and carry out exchanges data by pci bus, substantially increase from the exchanges data speed between processor.In addition, enrich from the external communication interface type of processor module, the exchanges data between different communication interface can be realized.
For achieving the above object, the present invention is achieved through the following technical solutions: a kind of multiprocessor communication architecture based on PowerPC, it is characterized in that, comprise, one primary processor PowerPC, multiple from processor unit and multiple remote control computer, wherein, should from processor unit primarily of a pci interface circuit, one dual port RAM buffer circuit, one from processor, one communication interface converting unit and a CPLD form, this pci interface circuit connects this dual port RAM buffer circuit, continuous connection should from processor, connect this communication interface converting unit again, this pci interface circuit is also connected with this primary processor PowerPC by pci bus, in order to realize this primary processor PowerPC and to be somebody's turn to do from the communication between processor, this communication interface converting unit is also connected with this remote control computer, in order to realize this from the communication between processor and this remote control computer, this CPLD respectively with this pci interface circuit, this dual port RAM circuit and should be connected from processor, utilize this pci interface circuit of CPLD logic control, this conversion from read-write sequence between processor and this dual port RAM circuit.
Compared with prior art, the invention has the advantages that: the division of labor of principal and subordinate processor module is clear and definite, and processing speed is fast, and processing power is strong, and modules can be made into the form of subcard, thus realizes modularization, the through engineering approaches of multiprocessor communication architecture.
Accompanying drawing explanation
Fig. 1 is structural representation of the present invention.
Embodiment
Below in conjunction with drawings and Examples, the present invention is elaborated.
Refer to Fig. 1, shown in figure is multiprocessor communication architecture entire block diagram based on PowerPC, comprise main processor modules and 4 from processor module, main processor modules comprises primary processor PowerPC1, comprise pci interface circuit 301(311 from processor module, 321,331), dual port RAM buffer circuit 302(312,322,332), CPLD303(313,323,333), from processor 304(314,324,334), communication interface converting unit 305(315,325,335) and remote control computer 41(42,43,44).
Primary processor PowerPC1 is the central processing unit of this system, and the present embodiment adopts MPC8349 as main process, and its integrated level is high, has superpower processing power and processing speed, and its pci bus externally exports with 32 forms, supports that 4 PCI are from equipment.Primary processor PowerPC1 connects through pci bus 2 and 4 pci interface circuit 301,311,321,331, and the pci bus achieving master and slave processor die interblock is interconnected.Main processor modules is core with MPC8349, extends out 4 MT46V32M16, realizes DDR SDRAM at a high speed and accesses.Local bus is expanded a slice MX29LV040CTI and is configured as BSP, and two panels S29GL512 loads as system image and data store.Be equipped with RS232 interface and be used for program burn writing and state echo, be equipped with Ethernet interface and be used for program on-line debugging.
Send instructions for 41 times for remote control computer, set forth the embodiment of multiprocessor communication: steering order is transferred to communication interface converting unit 305 by communication bus by remote control computer 41, communication interface converting unit 305 is connected after Data Format Transform with from processor 304, be connected after data processing with on the right side of dual port RAM buffer circuit 302 by local bus from processor 304, pci interface circuit 301 is connected with on the left of dual port RAM buffer circuit 302 by local bus, namely pci interface circuit 301 and from processor 304 can respectively by the left of dual port RAM buffer circuit 302 and right side port access dual port RAM.CPLD303 is for realizing pci interface circuit 301, dual port RAM buffer circuit 302 and changing from the read-write sequence between processor 304 three.Local bus data are converted to after pci bus data layout through pci interface circuit 301 and are connected with primary processor PowerPC1 by pci bus 2, primary processor PowerPC1 can connect 4 PCI from equipment, the data distributing that therefore pci interface circuit 301 can be transmitted gives remaining PCI from equipment, and by being handed down to from processor 314(from processor 324 or from processor 334 after dual port RAM buffer circuit buffering), remote control computer 42(remote control computer 43 or remote control computer 44 can be handed down to as required again from processor).Said process achieves a remote control computer 41 and issues the process of data to other from processor (or remote control computer), and remote control computer 41 receives that other are similar from the process of processor (or remote control computer); The data of all the other remote control computers 42,43,44 send similar to remote control computer 41 to reception, are not repeated.
In the present invention, each processor is described below respectively:
1) primary processor PowerPC is the Embedded ideal basic platform of RISC, and integrated level is high, and processing speed is fast, and processing power is strong, uses widely in high-end product.Utilize the pci bus of PowerPC processor self can connect 4 PCI from equipment, using PowerPC processor as PCI main equipment, 4 PCI can be realized from the exchanges data between equipment.
2) from processor 304,314,324,334 as data remote transmission controller, and the data write dual port RAM transmitted by remote control computer reads for pci interface circuit; Also can read the data in dual port RAM simultaneously, and send the data to remote control computer.
3) from processor 304,314,324,334 carry out exchanges data by primary processor PowerPC by pci bus, from being connected high speed dual port RAM between processor with pci bus as data transmit buffering.Be connected from processor by the data address bus of data address bus with dual port RAM right-hand member, the data address bus of dual port RAM left end is connected with the data address bus of pci interface circuit, like this, the data that need be sent to pci bus from processor are first sent to dual port RAM and cushion, afterwards pci interface circuit again from the dual port RAM other end by digital independent; Equally, when primary processor sends data to from processor, first transfer data in dual port RAM by pci interface circuit, by data address bus, the other end of data from dual port RAM is read again from processor.
Below only have expressed embodiments of the present invention, it describes comparatively concrete and detailed, but can not therefore be construed as limiting the scope of the patent.It should be pointed out that for the person of ordinary skill of the art, without departing from the inventive concept of the premise, can also make some distortion and improvement, these all belong to protection scope of the present invention.Therefore, the protection domain of patent of the present invention should be as the criterion with claims.
Claims (3)
1. the multiprocessor communication architecture based on PowerPC, it is characterized in that, comprise, one primary processor PowerPC, multiple from processor unit and multiple remote control computer, wherein, should from processor unit primarily of a pci interface circuit, one dual port RAM buffer circuit, one from processor, one communication interface converting unit and a CPLD form, this pci interface circuit connects this dual port RAM buffer circuit, continuous connection should from processor, connect this communication interface converting unit again, this pci interface circuit is also connected with this primary processor PowerPC by pci bus, in order to realize this primary processor PowerPC and to be somebody's turn to do from the communication between processor, this communication interface converting unit is also connected with this remote control computer, in order to realize this from the communication between processor and this remote control computer, this CPLD respectively with this pci interface circuit, this dual port RAM circuit and should be connected from processor, utilize this pci interface circuit of CPLD logic control, this conversion from read-write sequence between processor and this dual port RAM circuit.
2. a kind of multiprocessor communication architecture based on PowerPC according to claim 1, it is characterized in that, this communication interface converting unit has a plurality of communication interface change-over circuit.
3. a kind of multiprocessor communication architecture based on PowerPC according to claim 2, is characterized in that, this communication interface change-over circuit is CAN, RS485, RS422, ARINC429 or 1553B change-over circuit.
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| CN201310588416.5A CN104657311A (en) | 2013-11-21 | 2013-11-21 | PowerPC based multi-processor communication architecture |
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| CN201310588416.5A CN104657311A (en) | 2013-11-21 | 2013-11-21 | PowerPC based multi-processor communication architecture |
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Citations (6)
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| GB2390927A (en) * | 1999-10-01 | 2004-01-21 | Agilent Technologies Inc | Multi-processor interconnection and management |
| CN102290823A (en) * | 2011-08-26 | 2011-12-21 | 东北大学 | Alternating tidal current computing method and device for light high-voltage direct current transmission system |
| CN102521200A (en) * | 2011-12-13 | 2012-06-27 | 四川赛狄信息技术有限公司 | System for configuring multi-processor in single Flash in embedded manner |
| CN102622324A (en) * | 2012-02-29 | 2012-08-01 | 江西省电力科学研究院 | Design method of direct memory access interface for DSP (digital signal processor) system and PC (personal computer) |
| CN103064360A (en) * | 2012-11-15 | 2013-04-24 | 上海航空电器有限公司 | Data transmission long-range control system based on duel-port random-access memory (RAM) |
| CN203012455U (en) * | 2012-11-15 | 2013-06-19 | 上海航空电器有限公司 | Data transmission remote control system based on double-port RAM (Random access memory) |
-
2013
- 2013-11-21 CN CN201310588416.5A patent/CN104657311A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2390927A (en) * | 1999-10-01 | 2004-01-21 | Agilent Technologies Inc | Multi-processor interconnection and management |
| CN102290823A (en) * | 2011-08-26 | 2011-12-21 | 东北大学 | Alternating tidal current computing method and device for light high-voltage direct current transmission system |
| CN102521200A (en) * | 2011-12-13 | 2012-06-27 | 四川赛狄信息技术有限公司 | System for configuring multi-processor in single Flash in embedded manner |
| CN102622324A (en) * | 2012-02-29 | 2012-08-01 | 江西省电力科学研究院 | Design method of direct memory access interface for DSP (digital signal processor) system and PC (personal computer) |
| CN103064360A (en) * | 2012-11-15 | 2013-04-24 | 上海航空电器有限公司 | Data transmission long-range control system based on duel-port random-access memory (RAM) |
| CN203012455U (en) * | 2012-11-15 | 2013-06-19 | 上海航空电器有限公司 | Data transmission remote control system based on double-port RAM (Random access memory) |
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