CN103064360A - Data transmission long-range control system based on duel-port random-access memory (RAM) - Google Patents
Data transmission long-range control system based on duel-port random-access memory (RAM) Download PDFInfo
- Publication number
- CN103064360A CN103064360A CN2012104584417A CN201210458441A CN103064360A CN 103064360 A CN103064360 A CN 103064360A CN 2012104584417 A CN2012104584417 A CN 2012104584417A CN 201210458441 A CN201210458441 A CN 201210458441A CN 103064360 A CN103064360 A CN 103064360A
- Authority
- CN
- China
- Prior art keywords
- microprocessor
- bus
- data transmission
- data
- control system
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P90/00—Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
- Y02P90/02—Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]
Landscapes
- Multi Processors (AREA)
- Small-Scale Networks (AREA)
Abstract
The invention discloses a data transmission long-range control system. The system comprises a PowerPC processor and a second microprocessor. A first microprocessor and a second microprocessor are connected with the PowerPC processor through peripheral component interconnect (PCI) bus interfaces. The second microprocessor is connected with a long-range control module of an upper computer through a controller area network (CAN) bus. A duel-port RAM is connected between the first microprocessor and the second microprocessor. In the data transmission long-range control system, the processors are clear in division, fast in processing speed, and strong in processing capability so that the problem of scarce capacity of a single processor is solved, data exchange between multiple processors through a PCI bus is realized, and processing capacity and transmission speed between the processors are greatly improved.
Description
Technical field
The present invention is a kind of data transmission tele-control system based on dual port RAM, and it can be used for the fields such as aviation, industrial automation, the vehicles, Medical Instruments, machine-building, building control, instrument and meter for automation.
Background technology
Along with scientific and technical development, Long-distance Control, in widespread uses such as aviation, industrial automation, Medical Instruments, building control, Smart Homes, has become indispensable part in people's life.Yet the data transmission Long-distance Control between multiprocessor is a difficult point of current technology.
Pci bus is a kind of high performance 32/64 bus with multichannel address wire and data line.It applies as interconnection mechanism between highly integrated peripheral control device, peripheral plug-in card and processor.The PCI local bus is supported 64 bit data transmission, multibus master control and linear burst mode, and its message transmission rate is 132MB/S, and this provides advantage to its development.Another reason that promotes the pci bus development is that it can reduce costs, with coming tectonic system machine, workstation, peripherals and board towards the process chip of PCI local bus in a large number, and its superior performance, processing power, transmission speed are all very high.Visible pci bus successfully meets job requirement, can realize data high-speed transmission exchange between multiprocessor.
Because the pci bus processing power is strong, transmission speed is fast, so processor tends to cause the data collision latch up phenomenon while by pci bus, carrying out data transmission, make between processor the speed of transmitting data by pci bus greatly reduce, and can cause loss of data.
Based on the problems referred to above, the present invention proposes a kind of data transmission tele-control system based on dual port RAM, and advantage is to realize to carry out exchanges data by pci bus between multiprocessor, has greatly improved processing power and transmission speed between processor.This disposal route is to use the high speed dual port RAM to be connected between processor and pci bus to cushion as data transmission, improve data transmission capabilities, and resolving data conflicts and the loss of data that causes effectively, realize the Long-distance Control of data transmission, and improve the real-time of data transmission Long-distance Control.
The data transmission tele-control system is for various fields such as aviation field, industrial automation, the vehicles, Medical Instruments, machine-building, building control, instrument and meter for automations, and therefore, the data transmission Long-distance Control is a trend of future development.
Summary of the invention
The object of the present invention is to provide a kind of data transmission tele-control system based on dual port RAM, realize carrying out exchanges data by pci bus between multiprocessor, greatly improved processing power and transmission speed between processor.
For achieving the above object, the present invention realizes by following technical scheme: a kind of data transmission tele-control system based on dual port RAM comprises the first microprocessor be connected with monitored module, for directly monitoring each monitored module; It is characterized in that this system also comprises PowerPC processor and the second microprocessor, between first microprocessor, the second microprocessor and PowerPC processor, by pci bus interface, connect, described PowerPC processor is the data transmission central processing unit, and the data message of uploading through pci bus is processed; Carry out exchanges data by pci bus between first microprocessor, the second microprocessor and PowerPC processor, the second microprocessor is connected and carries out remote transmission with the host computer remote control module by the CAN bus, is connected dual port RAM between first microprocessor, the second microprocessor and pci bus interface and cushions as data transmission.
Described first microprocessor is connected with the pci interface circuit by the first dual port RAM, and the pci interface circuit is connected with the PowerPC processor by pci bus, and the pci interface circuit also is connected with the second microprocessor by the second dual port RAM.First microprocessor is connected with a plurality of monitored modules by inner RS485 or inner CAN bus, and described a plurality of monitored modules are connected with the CPLD module by the discrete magnitude signal wire, and described CPLD module is connected with first microprocessor.The second microprocessor is connected with the host computer remote control module by the CAN interface circuit, and the CAN interface circuit is comprised of CAN controller, optical coupling isolation circuit and CAN transceiver.Wherein, the second microprocessor connects respectively at two CAN controllers, and these two CAN controllers are connected with two CAN transceivers respectively by photoelectric isolation module, and described two CAN transceivers are connected with the host computer remote control module by the CAN bus.The PowerPC processor is connected with the RS232 interface with Ethernet interface.
The invention has the advantages that each processor division of labor is clear and definite, processing speed is fast, and processing power is strong, has solved the problem of single-processor processing power deficiency; Use the PowerPC processor as central processing unit, it is high that the PowerPC processor has integrated level, and very strong embedded performance is arranged, and excellent performance, lower energy loss and lower heat dissipation capacity are arranged, there is superpower processing speed, the plurality of advantages such as processing power is strong; Use the bridge of pci bus as exchanges data between three processors, pci bus is a kind of high performance 32/64 bus with multichannel address wire and data line, its superior performance, processing power, transmission speed are all very high, can realize data high-speed transmission exchange between multiprocessor; Use the CAN bus to carry out remote transmission control, the CAN bus has higher traffic rate and stronger antijamming capability, has highly reliable and good fault monitoring ability, and can realize transmission range far away, can reach 3 km~10km.
The peripheral control module by each state of a control command to microprocessor, carry out the Data Control management, data upload to the PowerPC modular circuit by pci bus and carry out the data processing after the dual port RAM buffering, then after uploading to the dual port RAM buffering by pci bus, pass through the CAN module, the CAN module is comprised of DSP, CAN controller, light-coupled isolation, CAN transceiver, CAN modular design two-way CAN bus, embodied two redundancy designs, by the CAN bus, carries out remote transmission.
The accompanying drawing explanation
Below with reference to drawings and Examples, the present invention is described in detail
.
Fig. 1 is a kind of data transmission tele-control system allomeric function block diagram based on dual port RAM of the present invention.
Embodiment
As shown in Figure 1, for the data transmission tele-control system allomeric function block diagram based on dual port RAM of the present invention, comprise monitored module 1, CPLD module 4, first microprocessor 6, the first dual port RAM 8, the second dual port RAM 17, pci interface circuit 12, PowerPC module 10, ethernet module 14, RS232 module 19, the second microprocessor 21, CAN controller 24, light-coupled isolation module 25, CAN transceiver 28.
The main control module that first microprocessor 6 is system, CPLD module 4 is passed through data address bus, IO discrete magnitude signal, read-write enable signal external address chip selection signal 5 carries out exchanges data with first microprocessor 6, CPLD module 4 can be carried out exchanges data with a plurality of discrete magnitude control modules, as supply voltage has or not, the on off state of door, the discrete magnitude signals such as the on off state of lamp can carry out exchanges data by discrete magnitude signal wire 2 and CPLD module 4, CPLD module 4 is carried out address decoding by the discrete magnitude signal condition collected through the CPLD logic, deposit in and extend out in address, the present invention adopts DSP2812 as first microprocessor 6, each address width is 16, can deposit 16 measures of dispersion certificates, and the extendible external address space>1M of DSP2812, can store a large amount of discrete magnitude signals.
First microprocessor 6 can communicate with a plurality of monitored modules 1 by inner RS485, inner CAN bus 3, and monitored module 1 can be intelligent switch, industrial automation instrument, Medical Instruments, mechanical device, building control, aviation robotization control etc.
First microprocessor 6 carries out exchanges data by data address bus 7 and the first dual port RAM 8, carry out exchanges data by data address bus 9 between the first dual port RAM 8 and pci interface circuit 12, the second dual port RAM 8 is as the buffering device of data transmission between microprocessor and pci bus, for avoiding data transmission conflict.
The central processing unit that PowerPC processor 10 is this system, integrated level is high, there is superpower processing power and processing speed, the PowerPC processor carries out exchanges data by pci bus 11 and the first dual port RAM 8, the first dual port RAM 17, the first dual port RAM 8, the first dual port RAM 17 connect the pci interface circuit by data address bus 9,16, convert pci bus 11 to and carry out exchanges data with PowerPC processor 10.PowerPC processor 10 mainly by the PowerPC chip extend out SDRAM, Flash, the NVRAM storer forms, DUART interface connection RS232 module 19 by PowerPC processor 10 converts RS232 bus 22 to, state echo while connecting computer for debugging and PowerPC burning journey, Ethernet interface by the PowerPC module connects ethernet module 14 expansion Ethernets 18, connects the network interface of computer for debugging and the typing of PowerPC modular program.
Carry out exchanges data by pci bus between first microprocessor 6, the second microprocessor 21 and PowerPC processor, be connected the first dual port RAM 8 as the data transmission impact damper between first microprocessor 6 and pci interface circuit, be connected the second dual port RAM 17 as the data transmission impact damper between the second microprocessor 21 and pci interface circuit, making between pci bus and processor to carry out the high-speed data exchange becomes possibility, and has greatly improved the ability of exchanges data.
The second microprocessor 21 is as the remote data transmission control unit (TCU), data after PowerPC processor 10 is processed are carried out exchanges data through pci bus and the second dual port RAM 17, microprocessor 21 is processed data and is connected to host computer remote control module 29 by CAN bus 30 carries out remote transmission, and the CAN interface circuit is comprised of CAN controller 24, optical coupling isolation circuit 25 and CAN transceiver 28.
In the present invention, each processor is described below respectively:
1) first microprocessor 6 carries out communication with monitored module 1, directly monitor each monitored module, can expand the discrete magnitude signal port by CPLD, the discrete magnitude signal interpretation, in the address date of microprocessor, is realized to the directly monitored module of control of microprocessor 1;
2) PowerPC processor 10 is the Embedded ideal basic platforms of RISC, integrated level is high, very strong embedded performance is arranged, excellent performance, lower energy loss and lower heat dissipation capacity are arranged, have superpower processing speed, processing power is strong, and it has general processor, embedded controller and kernel are arranged again, use very extensive in high-end product.Utilize the PowerPC processor as the data transmission central processing unit, by the data message upload process, but and a large amount of information such as malfunction of stored record, can also be by PowerPC module expansion industry ethernet interface, RS232 interface, USB interface etc.;
3) the second microprocessor 21 is as the remote data transmission control unit (TCU), and the data after the PowerPC processor is processed are carried out exchanges data through pci bus and the second microprocessor 21, and the second microprocessor 21 is processed data carry out remote transmission by the CAN bus.The CAN bus is a kind of serial communication protocol, there is higher traffic rate and stronger antijamming capability, now be widely used in various fields, the CAN bus protocol has become the STD bus of Computer Controlled System for Vehicle and built-in industrial control area net(CAN), has highly reliable and good fault monitoring ability.The present invention adopts two redundancy designs, and expansion two-way CAN bus, improve reliability, when wherein a road CAN bus is damaged, system can but be changed to another road CAN bus automatically, and the transmission that does not affect data is controlled, carry out remote transmission by the CAN bus, transmission range can reach 3 km~10km;
4) carry out exchanges data by pci bus between three microprocessors, be connected the high speed dual port RAM between microprocessor and pci bus and cushion as data transmission.Microprocessor is connected with the data address bus of dual port RAM one end by data address bus, the data address bus of the dual port RAM other end is connected with the data address bus of pci interface circuit, like this, the data that microprocessor is sent to pci bus using need first are sent in dual port RAM as impact damper, and the pci interface circuit reads data from the dual port RAM other end more afterwards; On the contrary, when pci bus sends data to microprocessor, first by data address bus, transfer data in dual port RAM, microprocessor reads required data by data address bus again from the other end of dual port RAM.
A kind of data transmission tele-control system based on dual port RAM of the present invention is characterized in that:
A) the data transmission tele-control system utilizes CAN bus and the host computer of the two remainings of two-way to carry out exchanges data, the CAN bus is a kind of serial communication protocol, there is higher traffic rate and stronger antijamming capability, now be widely used in the various fields such as industrial automation, the vehicles, Medical Instruments, machine-building, building control, instrument and meter for automation.The CAN bus protocol has become the STD bus of Computer Controlled System for Vehicle and built-in industrial control area net(CAN), there is highly reliable and good fault monitoring ability, adopt the CAN bus of two remainings to embody high reliability, when a road CAN bus is damaged, system can but be changed to another road CAN bus automatically, and the transmission that does not affect data is controlled, and the transmission range of CAN bus can reach 3 km~10km, can realize the Long-distance Control of relative broad range, can also increase repeater and realize farther transmission range;
B) carry out exchanges data by pci bus between three microprocessors, be connected the high speed dual port RAM between microprocessor and pci bus and cushion as data transmission.When data a large amount of between processor are directly carried out exchanges data by pci bus, there will be serious data latch up phenomenon, can effectively solve the data blockage problem by dual port RAM, improve processing speed and transmittability, and utilize dual port RAM can also solve the asynchronous problem of clock, for circuit design has been economized many troubles; The data that microprocessor is sent to pci bus using need first are sent in dual port RAM as impact damper, and the pci interface circuit reads data from the dual port RAM other end more afterwards; On the contrary, when pci bus sends data to microprocessor, first by data address bus, transfer data in dual port RAM, microprocessor reads required data by data address bus again from the other end of dual port RAM.
C) the PowerPC processor is as central processing unit, the PowerPC processor is the Embedded ideal basic platform of RISC, integrated level is high, very strong embedded performance is arranged, excellent performance, lower energy loss and lower heat dissipation capacity are arranged, there is superpower processing speed, processing power is strong, it has general processor, and embedded controller and kernel are arranged again, in high-end product, uses very extensive.
In the present invention, each module is prior art, does not repeat them here, and according to a particular embodiment of the invention, the model of PowerPC processor is MPC8245, and the model of first microprocessor is TMS320F2812, and the model of the second microprocessor is SMJ320F240.
Claims (6)
1. the data transmission tele-control system based on dual port RAM, comprise the first microprocessor be connected with monitored module; It is characterized in that this system also comprises PowerPC processor and the second microprocessor, between first microprocessor, the second microprocessor and PowerPC processor, by pci bus interface, connect, the second microprocessor is connected with the host computer remote control module by the CAN bus, between first microprocessor, the second microprocessor and pci bus interface, is connected dual port RAM.
2. data transmission tele-control system as claimed in claim 1, it is characterized in that described first microprocessor is connected with the pci interface circuit by the first dual port RAM, the pci interface circuit is connected with the PowerPC processor by pci bus, and the pci interface circuit also is connected with the second microprocessor by the second dual port RAM.
3. data transmission tele-control system as claimed in claim 1, it is characterized in that first microprocessor is connected with a plurality of monitored modules by inner RS485 or inner CAN bus, described a plurality of monitored module is connected with the CPLD module by the discrete magnitude signal wire, and described CPLD module is connected with first microprocessor.
4. data transmission tele-control system as claimed in claim 1, is characterized in that the second microprocessor is connected with the host computer remote control module by the CAN interface circuit, and the CAN interface circuit is comprised of CAN controller, optical coupling isolation circuit and CAN transceiver.
5. data transmission tele-control system as claimed in claim 4, it is characterized in that the second microprocessor connects respectively at two CAN controllers, these two CAN controllers are connected with two CAN transceivers respectively by photoelectric isolation module, and described two CAN transceivers are connected with the host computer remote control module by the CAN bus.
6. data transmission tele-control system as claimed in claim 1, is characterized in that the PowerPC processor is connected with the RS232 interface with Ethernet interface.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201210458441.7A CN103064360B (en) | 2012-11-15 | 2012-11-15 | A kind of data transfer tele-control system based on dual port RAM |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201210458441.7A CN103064360B (en) | 2012-11-15 | 2012-11-15 | A kind of data transfer tele-control system based on dual port RAM |
Publications (2)
Publication Number | Publication Date |
---|---|
CN103064360A true CN103064360A (en) | 2013-04-24 |
CN103064360B CN103064360B (en) | 2017-11-10 |
Family
ID=48107022
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201210458441.7A Active CN103064360B (en) | 2012-11-15 | 2012-11-15 | A kind of data transfer tele-control system based on dual port RAM |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN103064360B (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104657311A (en) * | 2013-11-21 | 2015-05-27 | 上海航空电器有限公司 | PowerPC based multi-processor communication architecture |
CN105206024A (en) * | 2015-09-25 | 2015-12-30 | 杭州中道医疗设备有限公司 | Multi-frequency and multi-protocol data communication box based on internet-of-things technology |
CN108594708A (en) * | 2018-04-24 | 2018-09-28 | 苏州赛腾精密电子股份有限公司 | I/O control cards and I/O method for transmitting signals |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7178000B1 (en) * | 2004-03-18 | 2007-02-13 | Emc Corporation | Trace buffer for DDR memories |
CN101021451A (en) * | 2007-03-30 | 2007-08-22 | 株洲南车时代电气股份有限公司 | Train running monitoring device comprehensive test method and comprehensive testbench |
CN201504120U (en) * | 2009-09-25 | 2010-06-09 | 重庆荣凯川仪仪表有限公司 | Intelligent device for monitoring power supply |
CN102290823A (en) * | 2011-08-26 | 2011-12-21 | 东北大学 | Alternating tidal current computing method and device for light high-voltage direct current transmission system |
CN102622324A (en) * | 2012-02-29 | 2012-08-01 | 江西省电力科学研究院 | Design method of direct memory access interface for DSP (digital signal processor) system and PC (personal computer) |
CN203012455U (en) * | 2012-11-15 | 2013-06-19 | 上海航空电器有限公司 | Data transmission remote control system based on double-port RAM (Random access memory) |
-
2012
- 2012-11-15 CN CN201210458441.7A patent/CN103064360B/en active Active
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7178000B1 (en) * | 2004-03-18 | 2007-02-13 | Emc Corporation | Trace buffer for DDR memories |
CN101021451A (en) * | 2007-03-30 | 2007-08-22 | 株洲南车时代电气股份有限公司 | Train running monitoring device comprehensive test method and comprehensive testbench |
CN201504120U (en) * | 2009-09-25 | 2010-06-09 | 重庆荣凯川仪仪表有限公司 | Intelligent device for monitoring power supply |
CN102290823A (en) * | 2011-08-26 | 2011-12-21 | 东北大学 | Alternating tidal current computing method and device for light high-voltage direct current transmission system |
CN102622324A (en) * | 2012-02-29 | 2012-08-01 | 江西省电力科学研究院 | Design method of direct memory access interface for DSP (digital signal processor) system and PC (personal computer) |
CN203012455U (en) * | 2012-11-15 | 2013-06-19 | 上海航空电器有限公司 | Data transmission remote control system based on double-port RAM (Random access memory) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104657311A (en) * | 2013-11-21 | 2015-05-27 | 上海航空电器有限公司 | PowerPC based multi-processor communication architecture |
CN105206024A (en) * | 2015-09-25 | 2015-12-30 | 杭州中道医疗设备有限公司 | Multi-frequency and multi-protocol data communication box based on internet-of-things technology |
CN108594708A (en) * | 2018-04-24 | 2018-09-28 | 苏州赛腾精密电子股份有限公司 | I/O control cards and I/O method for transmitting signals |
Also Published As
Publication number | Publication date |
---|---|
CN103064360B (en) | 2017-11-10 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN102857397B (en) | The how main asynchronous duplex differential bus of one and the means of communication | |
CN106603358B (en) | A kind of high-speed bus system and implementation method based on MLVDS interface | |
CN201604665U (en) | Communication interface equipment of train control center | |
CN102253913B (en) | Device for carrying out state acquisition and output control on multi-board-card port | |
CN102420877B (en) | Multi-mode high-speed intelligent asynchronous serial port communication module and realizing method thereof | |
CN103840993A (en) | Dual-redundancy CAN bus data transmission method | |
CN109932966B (en) | Real-time efficient data transmission method based on M-LVDS bus | |
CN105281433A (en) | Distribution terminal communication system | |
CN203590251U (en) | FlexRay control system based on serial RapidIO bus | |
CN103064360A (en) | Data transmission long-range control system based on duel-port random-access memory (RAM) | |
CN101106504A (en) | Distributed communication system for intelligent independent robot based on CAN bus | |
CN203012455U (en) | Data transmission remote control system based on double-port RAM (Random access memory) | |
CN102419739A (en) | Multi-main-bus arbitration sharing device and arbitration method | |
CN209433225U (en) | Processing unit for train network input-output system | |
CN201287733Y (en) | Synchronous control communication set for electric locomotive brake system | |
CN201111326Y (en) | TCN gateway | |
CN102724090A (en) | Process field bus (PROFIBUS) DP/PA integrated embedded slave node communication device based on DP controller with integrated 8031 core (DPC31) | |
CN204065816U (en) | A kind of PROFIBUS-DPV1 communication main station | |
CN204089864U (en) | A kind of gateway for connecting MVB and CAN | |
CN207543138U (en) | A kind of data transmission system of more industrial bus | |
CN107965343B (en) | Transparent hydraulic support electrichydraulic control communication system | |
CN202102335U (en) | Blade server based on Loongson 3A central processing unit (CPU) | |
CN101662405A (en) | Communication circuit of CAN bus | |
CN203193664U (en) | WorldFIP-CAN gateway device | |
CN203193666U (en) | WorldFIP-RS485 gateway device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant | ||
TR01 | Transfer of patent right | ||
TR01 | Transfer of patent right |
Effective date of registration: 20230921 Address after: 201514 floor 3, building 3, No. 368 Huida Road, Zhangyan Town, Jinshan District, Shanghai Patentee after: SHANGHAI HANGKAI ELECTRONIC TECHNOLOGY Co.,Ltd. Address before: 201101 No. 6629 Zhong Chun Road, Shanghai, Minhang District Patentee before: SHANGHAI AVIATION ELECTRIC Co.,Ltd. |