CN104600166A - LED chip structure and preparation method thereof - Google Patents
LED chip structure and preparation method thereof Download PDFInfo
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- CN104600166A CN104600166A CN201310535653.5A CN201310535653A CN104600166A CN 104600166 A CN104600166 A CN 104600166A CN 201310535653 A CN201310535653 A CN 201310535653A CN 104600166 A CN104600166 A CN 104600166A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
- H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/38—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
- H01L33/382—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape the electrode extending partially in or entirely through the semiconductor body
Abstract
The invention discloses an LED chip structure and a preparation method thereof. The LED chip structure comprises a substrate, and an epitaxial layer positioned on the substrate; the epitaxial layer comprises a first area layer, a quantum well active layer and a second area layer. The LED chip structure further comprises a slot which extends from the second area layer to the second area layer or extending into the first area layer, a first electrode which is formed in the slot and in contact with the first area layer, and a second electrode which is formed on the second area layer. According to the LED chip structure, the area of an etching are of an LED chip can be reduced, the effective lighting area of the LED chip can be increased, and as a result, the lighting efficiency is increased.
Description
Technical field
The present invention relates to technical field of semiconductors, be specifically related to power semiconductor device technology field, particularly relate to a kind of LED chip construction and preparation method thereof.
Background technology
Light-emitting diode (Light Emitting Diodes, be called for short LED) be a kind of semiconductor electronic component that can be luminous, because having that volume is little, the life-span is long, reaction speed is fast, direction degree of controllability is high, good stability, low in energy consumption, non-thermal radiation, the advantage such as pollutant sources without noxious substances such as mercurys, along with the popularization of light-emitting diode, its structure becomes more and more, and brightness is also more and more brighter.
Fig. 1 shows the front plan view of light-emitting diode chip for backlight unit transversary in prior art.Two electrodes of the light-emitting diode chip for backlight unit of transversary are in the same side of light-emitting diode chip for backlight unit, and P electrode 16 is in the P type gallium nitride region of emitting diode epitaxial layer, and N electrode 15 is distributed over the n type gallium nitride region 12 etching and expose.
Fig. 2 to show in prior art light-emitting diode transversary along AA in Fig. 1
1the profile in direction, can find from Fig. 2, when making N electrode 15, etch away mqw active layer 13 and the p-type gallium nitride layer 14 of whole N-type region, N-type region etch areas area is large, this region can not be luminous, cause bright dipping effective area to decline, because this reducing brightness and the luminous efficiency of light-emitting diode.
Summary of the invention
In view of this, the embodiment of the present invention provides a kind of LED chip construction and preparation method thereof, carrys out chip structure of optimized emission diode and preparation method thereof, thus increases bright dipping effective area, improves brightness and the luminous efficiency of light-emitting diode.
Embodiments provide a kind of LED chip construction, described LED chip construction comprises:
Substrate;
Be positioned at the epitaxial loayer on substrate, wherein, described epitaxial loayer comprises the second area layer of the first area layer with the first conduction type stacking in turn, mqw active layer and second conduction type contrary with described first conduction type;
It is characterized in that
Described LED chip construction also comprises:
Groove, extends to described first area layer from described second area layer or extends into described first area layer;
First electrode, formed in the trench, contact with first area layer, and with second area layer and mqw active layer electric insulation;
Second electrode, is formed on described second area layer.
Further, described LED chip construction also comprises dielectric insulation layer, serves as a contrast on the inwall of described groove.
Further, described LED chip construction also comprises the first transparency conducting layer and the second transparency conducting layer, described first transparency conducting layer lining is on the inwall of described dielectric insulation layer, described second transparency conducting layer is formed between described second area layer and the second electrode, and with the first transparency conducting layer electric insulation.
Further, the material of described first transparency conducting layer and the material of described second transparency conducting layer are selected from following group: tin indium oxide, zinc oxide, nickel/billon.
Further, the material of described mqw active layer comprises InGaN or gallium nitride, and the material of described dielectric insulation layer comprises silicon dioxide, silicon nitride or silicon oxynitride.
Further, described first conduction type is N-type, and described first area layer is n type gallium nitride layer; Described second conduction type is P type, and described second area layer is P type gallium nitride layer.
Further, described first conduction type is P type, and described first area layer is P type gallium nitride layer; Described second conduction type is N-type, and described second area layer is n type gallium nitride layer.
On the other hand, embodiments provide a kind of preparation method of LED chip construction, described method comprises:
Substrate is formed the second area layer of the first area layer of the first conduction type, mqw active layer and second conduction type contrary with described first conduction type successively;
Etch into described first area layer from described second area layer or etching enters described first area layer, form groove;
Form the first electrode in the trench, described first electrode contact with first area layer and with second area layer and mqw active layer electric insulation;
Described second area layer forms the second electrode.
Further, described method also comprises:
The inwall of described groove forms dielectric insulation layer.
Further, the first electrode is formed in the trench in step, described first electrode contact with first area layer and with second area layer and mqw active layer electric insulation before, described first area layer is etched into from described second area layer or etching enters described first area layer in step, after forming groove, described method also comprises:
The inwall of described groove forms dielectric insulation layer.
Further, after step forms dielectric insulation layer on the inwall of described groove, described method also comprises:
The inwall of described dielectric insulation layer is formed the first transparency conducting layer;
Described second area layer forms the second transparency conducting layer, and with the first transparency conducting layer electric insulation;
Described second transparency conducting layer forms the second electrode.
Further, described first conduction type is N-type, and described first area layer is n type gallium nitride layer; Described second conduction type is P type, and described second area layer is P type gallium nitride layer.
Further, described first conduction type is P type, and described first area layer is P type gallium nitride layer; Described second conduction type is N-type, and described second area layer is n type gallium nitride layer.
The LED chip construction that the embodiment of the present invention provides and preparation method, groove structure is formed by extending to described first area layer from second area layer or extending into first area layer, and formation contacts the first electrode with second area layer and mqw active layer electric insulation with first area layer in the trench, second area layer is formed the second electrode, thus reduce the area of light-emitting diode chip for backlight unit etch areas, the efficient lighting area of light-emitting diode chip for backlight unit is increased, improves brightness and the luminous efficiency of light-emitting diode.
Accompanying drawing explanation
Exemplary embodiment of the present invention will be described in detail by referring to accompanying drawing below, the person of ordinary skill in the art is more clear that above-mentioned and other feature and advantage of the present invention, in accompanying drawing:
Fig. 1 is the front plan view of the light-emitting diode chip for backlight unit transversary according to prior art;
Fig. 2 be according to the light-emitting diode chip for backlight unit transversary of prior art along AA in Fig. 1
1the profile in direction;
Fig. 3 is the front plan view of LED chip construction according to a first embodiment of the present invention;
Fig. 4 is the profile along BB1 direction in Fig. 3 of LED chip construction according to a first embodiment of the present invention;
Fig. 5 is the lateral cross-sectional view of LED chip construction according to a second embodiment of the present invention;
Fig. 6 is the flow chart of LED chip construction preparation method according to a third embodiment of the present invention.
Embodiment
Below in conjunction with drawings and Examples, the present invention is described in further detail.Be understandable that, specific embodiment described herein is only for explaining the present invention, but not limitation of the invention.It also should be noted that, for convenience of description, illustrate only part related to the present invention in accompanying drawing but not full content.
The embodiment of the present invention provides LED chip construction and preparation method thereof, owing to improving the structure of light-emitting diode chip for backlight unit, lighting area is increased, improve luminous efficiency, this light-emitting diode chip for backlight unit may be used for having in the light-emitting diode of illumination and Presentation Function, this light-emitting diode includes, but are not limited to, such as: can be LED energy-saving lamp, LED torch, decorative LED lamp, the outdoor large-screen of light-emitting diode, light-emitting diode roll titles billboard, lumination of light emitting diode indicator light of back light source in LED LCD TV and electrical equipment etc.
Figure 3 illustrates the first embodiment of the present invention.
Fig. 3 is the lateral cross-sectional view of LED chip construction according to a first embodiment of the present invention.Fig. 4 be LED chip construction according to a first embodiment of the present invention along BB in Fig. 3
1the profile in direction.Present composition graphs 3 and 4 describes the first embodiment of the present invention.
As shown in Figure 4, the structure of described light-emitting diode chip for backlight unit comprises: substrate 20, the epitaxial loayer be positioned on substrate 20, wherein, described epitaxial loayer comprises n type gallium nitride layer 21 stacking in turn, mqw active layer 22 and P type gallium nitride layer 23, groove 24, N electrode 25 and P electrode 26.
Described groove 24 extends to described n type gallium nitride layer 21 from described P type gallium nitride layer 23 or extends into described n type gallium nitride layer 21, described N electrode 25 is formed in described groove 24, contact with n type gallium nitride layer 21, and with mqw active layer 22 and P type gallium nitride layer 23 electric insulation, described P electrode 26 is formed on described P type gallium nitride layer 23.
Compare prior art in Fig. 1, the embodiment of the present invention is by means of only etching P type gallium nitride layer 23 and quantum well layer 22 thus form groove 24, and and then in the trench formed N electrode 25, instead of whole N-type region is etched, thus the area making light-emitting diode chip for backlight unit etch away reduces, therefore, the LED chip construction that the embodiment of the present invention provides effectively can increase the lighting area of light-emitting diode chip for backlight unit, thus improves the luminous efficiency of light-emitting diode chip for backlight unit.
In the present embodiment, described substrate 20 can be wherein a kind of in Sapphire Substrate, silicon carbide substrates, silicon substrate, patterned substrate, at described substrate 20 growing epitaxial layers.Described epitaxial loayer comprises n type gallium nitride layer 21 stacking in turn from down to up, mqw active layer 22 and P type gallium nitride layer 23.
In the present embodiment, described n type gallium nitride layer 21 has N-type conduction type, described P type gallium nitride layer 23 has P-type conduction type, and described n type gallium nitride layer 21 and described P type gallium nitride layer 23 form the PN junction of light-emitting diode, thus make light-emitting diode have unilateral conduction.Preferred described mqw active layer 22 is formed, for increasing the absorption efficiency of light alternately by InGaN (InGaN) and gallium nitride (GaN).
In a preferred embodiment of the present embodiment, as shown in Figure 4, described LED chip construction also comprises dielectric insulation layer 27, serves as a contrast on the inwall of described groove 24.Make described N electrode 25 and mqw active layer 22 and P type gallium nitride layer 23 electric insulation.The material of described N electrode 25 comprises: titanium (Ti), chromium (Cr), platinum (Pt), gold (Au), nickel (Ni) or aluminium (Al), the material of described dielectric insulation layer 27 can comprise: silicon dioxide (SiO
2), silicon nitride (Si
3n
4) or silicon oxynitride (SiON).
In another preferred embodiment of the present embodiment, as shown in Figure 4, described LED chip construction also comprises the first transparency conducting layer 28 and the second transparency conducting layer 29, described first transparency conducting layer 28 serves as a contrast on the inwall of described dielectric insulation layer 27, described second transparency conducting layer 29 is formed between described P type gallium nitride layer 23 and P electrode 26, and with the first transparency conducting layer 28 electric insulation.
When diode forward is conducted electricity, after many sons are diffused into the other side region, PN junction border accumulates, and have certain CONCENTRATION DISTRIBUTION.The quantity of electric charge of accumulation changes with the change of applied voltage, and when PN junction forward voltage strengthens, forward current is along with increasing, and this will have more carrier accumulation to get up to meet the requirement of electric current increasing; And when forward voltage reduces, forward current reduces, the hole of the electronics or N district that are accumulated in P district will reduce relatively, like this, just correspondingly will have " being filled with " and " releasing " of charge carrier.Therefore, be accumulated in the electronics in P district or the hole in N district to describe with regard to the diffusion capacitance of available PN junction with the change of applied voltage.Diffusion capacitance reflects situation about accumulating in diffusion process at applied voltage effect download stream.In the preferred embodiment of the present embodiment, described first transparency conducting layer 28 and the second transparency conducting layer 29 can make diffusion capacitance more even.
Described first transparency conducting layer 28 and the second transparency conducting layer 29 have the character that visible light transmissivity is high and electric conductivity is good, preferably, the material that described first transparency conducting layer 28 is selected comprises: tin indium oxide (ITO), zinc oxide (ZnO), nickel/gold (Ni/Au) alloy, wherein, the light transmittance of described nickel/gold can reach nine ten ten to percent 8 percent.
The structure of the light-emitting diode chip for backlight unit that first embodiment of the invention provides, reduces the etching area in light-emitting diode chip for backlight unit N-type region territory, and the efficient lighting area of light-emitting diode chip for backlight unit is increased, thus improves luminous efficiency.
Figure 5 illustrates the second embodiment of the present invention.
Fig. 5 is the profile of LED chip construction according to a second embodiment of the present invention.As shown in Figure 5, the structure of described light-emitting diode chip for backlight unit comprises: substrate 30, the epitaxial loayer be positioned on substrate 30, wherein, described epitaxial loayer comprises n type gallium nitride layer 31 stacking in turn, mqw active layer 32 and P type gallium nitride layer 33, groove 34, N electrode 35 and P electrode 36.
Described groove 34 extends to described n type gallium nitride layer 31 from described P type gallium nitride layer 33 or extends into described n type gallium nitride layer 31, described N electrode 35 is formed in described groove 34, contact with n type gallium nitride layer 31, and with mqw active layer 32 and P type gallium nitride layer 33 electric insulation, described P electrode 36 is formed on described P type gallium nitride layer 33.
In a preferred embodiment of the present embodiment, as shown in Figure 5, described LED chip construction also comprises dielectric insulation layer 37, serves as a contrast on the inwall of described groove 34, makes described N electrode 35 and mqw active layer 32 and P type gallium nitride layer 33 electric insulation.
In another preferred embodiment of the present embodiment, as shown in Figure 5, described LED chip construction also comprises the first transparency conducting layer 38 and the second transparency conducting layer 39, described first transparency conducting layer 38 serves as a contrast on the inwall of described dielectric insulation layer 37, described second transparency conducting layer 39 is formed between described P type gallium nitride layer 33 and P electrode 36, and with the first transparency conducting layer 38 electric insulation.
In second embodiment of the invention, by being replaced by the P type of the N-type in first embodiment of the invention, P type N-type replaces, and just can obtain the second embodiment of the present invention, so this is no longer going to repeat them.
The structure of the light-emitting diode chip for backlight unit that second embodiment of the invention provides, reduce the area that light-emitting diode chip for backlight unit etches in territory, p type island region, the efficient lighting area of light-emitting diode chip for backlight unit is increased, thus improves brightness and the luminous efficiency of light-emitting diode chip for backlight unit.
Figure 6 illustrates the third embodiment of the present invention.
Fig. 6 is preparation method's flow chart of LED chip construction according to a third embodiment of the present invention.As shown in Figure 6, details are as follows for this realization flow:
The second area layer of step 61, the first area layer that substrate is formed the first conduction type successively, mqw active layer and second conduction type contrary with described first conduction type.
In a preferred embodiment of the present embodiment, described first conduction type is N-type, and described first area layer is n type gallium nitride layer; Described second conduction type is P type, and described second area layer is P type gallium nitride layer.
In another preferred embodiment of the present embodiment, described first conduction type is P type, and described first area layer is P type gallium nitride layer; Described second conduction type is N-type, and described second area layer is n type gallium nitride layer.
Step 62, etch into described first area layer from described second area layer or etching enters described first area layer, form groove.
In this step, described etching preferably can adopt in dry etching and wet etching any one, wherein, described dry etching can be that sputtering etch with ion beam etching, plasma etching, high pressure plasma, wherein one in high density plasma etch, reactive ion etching etc.; Described wet etching utilize the chemical reaction between solution and pre-etachable material to remove part that not masked membrane material shelters and reach etching object.
Step 63, form the first electrode in the trench, described first electrode contact with first area layer and with second area layer and mqw active layer electric insulation.
Step 64, on described second area layer, form the second electrode.
In a preferred embodiment of the invention, before step 64, after step 63, described method also comprises:
The inwall of described groove forms dielectric insulation layer.
The material of described dielectric insulation layer comprises: silicon dioxide (SiO
2), silicon nitride (Si
3n
4) or silicon oxynitride (SiON).
In another preferred embodiment of the invention, after step forms dielectric insulation layer on the inwall of described groove, described method also comprises:
The inwall of described dielectric insulation layer is formed the first transparency conducting layer;
Described second area layer forms the second transparency conducting layer, and with the first transparency conducting layer electric insulation;
Described second transparency conducting layer forms the second electrode.
The material that described first transparency conducting layer and the second transparency conducting layer are selected comprises: tin indium oxide (ITO), zinc oxide (ZnO), nickel/gold (Ni/Au) alloy.
Structure of light-emitting diode chip for backlight unit provided by the invention and preparation method thereof, reduces the area of light-emitting diode chip for backlight unit etch areas, and the efficient lighting area of light-emitting diode chip for backlight unit is increased, thus improves brightness and the luminous efficiency of light-emitting diode chip for backlight unit.
Note, above are only preferred embodiment of the present invention and institute's application technology principle.Skilled person in the art will appreciate that and the invention is not restricted to specific embodiment described here, various obvious change can be carried out for a person skilled in the art, readjust and substitute and can not protection scope of the present invention be departed from.Therefore, although be described in further detail invention has been by above embodiment, the present invention is not limited only to above embodiment, when not departing from the present invention's design, can also comprise other Equivalent embodiments more, and scope of the present invention is determined by appended right.
Claims (12)
1. a LED chip construction, comprises
Substrate;
Be positioned at the epitaxial loayer on substrate, wherein, described epitaxial loayer comprises the second area layer of the first area layer with the first conduction type stacking in turn, mqw active layer and second conduction type contrary with described first conduction type;
It is characterized in that,
Described LED chip construction also comprises:
Groove, extends to described first area layer from described second area layer or extends into described first area layer;
First electrode, formed in the trench, contact with first area layer, and with second area layer and mqw active layer electric insulation;
Second electrode, is formed on described second area layer.
2. LED chip construction according to claim 1, is characterized in that, described LED chip construction also comprises dielectric insulation layer, serves as a contrast on the inwall of described groove.
3. LED chip construction according to claim 2, it is characterized in that, described LED chip construction also comprises the first transparency conducting layer and the second transparency conducting layer, described first transparency conducting layer lining is on the inwall of described dielectric insulation layer, described second transparency conducting layer is formed between described second area layer and the second electrode, and with the first transparency conducting layer electric insulation.
4. LED chip construction according to claim 3, is characterized in that, the material of described first transparency conducting layer and the material of described second transparency conducting layer are selected from following group: tin indium oxide, zinc oxide, nickel/billon.
5. LED chip construction according to claim 2, is characterized in that, the material of described mqw active layer comprises InGaN and gallium nitride, and the material of described dielectric insulation layer comprises silicon dioxide, silicon nitride or silicon oxynitride.
6. the LED chip construction according to any one of claim 1-5, is characterized in that, described first conduction type is N-type, and described first area layer is n type gallium nitride layer; Described second conduction type is P type, and described second area layer is P type gallium nitride layer.
7. the LED chip construction according to any one of claim 1-5, is characterized in that, described first conduction type is P type, and described first area layer is P type gallium nitride layer; Described second conduction type is N-type, and described second area layer is n type gallium nitride layer.
8. a preparation method for LED chip construction, is characterized in that, described method comprises:
Substrate is formed the second area layer of the first area layer of the first conduction type, mqw active layer and second conduction type contrary with described first conduction type successively;
Etch into described first area layer from described second area layer or etching enters described first area layer, form groove;
Form the first electrode in the trench, described first electrode contact with first area layer and with second area layer and mqw active layer electric insulation;
Described second area layer forms the second electrode.
9. the preparation method of LED chip construction according to claim 8, it is characterized in that, the first electrode is formed in the trench in step, described first electrode contact with first area layer and with second area layer and mqw active layer electric insulation before, described first area layer is etched into from described second area layer or etching enters described first area layer in step, after forming groove, described method also comprises:
The inwall of described groove forms dielectric insulation layer.
10. the preparation method of LED chip construction according to claim 9, is characterized in that, after step forms dielectric insulation layer on the inwall of described groove, described method also comprises:
The inwall of described dielectric insulation layer is formed the first transparency conducting layer;
Described second area layer forms the second transparency conducting layer, and with the first transparency conducting layer electric insulation;
Described second transparency conducting layer forms the second electrode.
The preparation method of 11. LED chip construction according to claim 8, is characterized in that, described first conduction type is N-type, and described first area layer is n type gallium nitride layer; Described second conduction type is P type, and described second area layer is P type gallium nitride layer.
The preparation method of 12. LED chip construction according to claim 8, is characterized in that, described first conduction type is P type, and described first area layer is P type gallium nitride layer; Described second conduction type is N-type, and described second area layer is n type gallium nitride layer.
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| CN106206901A (en) * | 2016-08-31 | 2016-12-07 | 聚灿光电科技股份有限公司 | LED chip and manufacture method thereof |
| CN106486572A (en) * | 2015-09-02 | 2017-03-08 | 新世纪光电股份有限公司 | Light-emitting diode chip for backlight unit |
| USD872701S1 (en) | 2017-12-12 | 2020-01-14 | Genesis Photonics Inc. | LED chip |
| US10580934B2 (en) | 2016-08-18 | 2020-03-03 | Genesis Photonics Inc. | Micro light emitting diode and manufacturing method thereof |
| CN112614920A (en) * | 2020-12-28 | 2021-04-06 | 厦门市三安光电科技有限公司 | Light emitting diode chip and preparation method thereof |
| CN113544865A (en) * | 2019-12-31 | 2021-10-22 | 重庆康佳光电技术研究院有限公司 | Light emitting diode chip, display panel and electronic equipment |
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