CN104538485A - Preparation method of double-sided battery - Google Patents
Preparation method of double-sided battery Download PDFInfo
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- CN104538485A CN104538485A CN201410621635.3A CN201410621635A CN104538485A CN 104538485 A CN104538485 A CN 104538485A CN 201410621635 A CN201410621635 A CN 201410621635A CN 104538485 A CN104538485 A CN 104538485A
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- 238000002360 preparation method Methods 0.000 title claims abstract description 25
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 48
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 33
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 33
- 239000010703 silicon Substances 0.000 claims abstract description 33
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims abstract description 23
- 239000000377 silicon dioxide Substances 0.000 claims abstract description 23
- 235000012239 silicon dioxide Nutrition 0.000 claims abstract description 22
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims abstract description 14
- BHEPBYXIRTUNPN-UHFFFAOYSA-N hydridophosphorus(.) (triplet) Chemical compound [PH] BHEPBYXIRTUNPN-UHFFFAOYSA-N 0.000 claims abstract description 11
- 238000006243 chemical reaction Methods 0.000 claims abstract description 10
- 229910052757 nitrogen Inorganic materials 0.000 claims abstract description 7
- CURLTUGMZLYLDI-UHFFFAOYSA-N Carbon dioxide Chemical compound O=C=O CURLTUGMZLYLDI-UHFFFAOYSA-N 0.000 claims description 24
- 238000000034 method Methods 0.000 claims description 18
- XYFCBTPGUUZFHI-UHFFFAOYSA-N Phosphine Chemical compound P XYFCBTPGUUZFHI-UHFFFAOYSA-N 0.000 claims description 12
- 229910002092 carbon dioxide Inorganic materials 0.000 claims description 12
- 239000001569 carbon dioxide Substances 0.000 claims description 12
- 230000008569 process Effects 0.000 claims description 8
- 229910000085 borane Inorganic materials 0.000 claims description 6
- 229910000073 phosphorus hydride Inorganic materials 0.000 claims description 6
- UORVGPXVDQYIDP-UHFFFAOYSA-N trihydridoboron Substances B UORVGPXVDQYIDP-UHFFFAOYSA-N 0.000 claims description 6
- 230000014759 maintenance of location Effects 0.000 claims description 3
- 238000009792 diffusion process Methods 0.000 abstract description 26
- 238000005334 plasma enhanced chemical vapour deposition Methods 0.000 abstract 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 5
- 229910004205 SiNX Inorganic materials 0.000 description 5
- 230000004888 barrier function Effects 0.000 description 5
- 229910052796 boron Inorganic materials 0.000 description 5
- 238000000151 deposition Methods 0.000 description 5
- 230000008021 deposition Effects 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 5
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 229910052698 phosphorus Inorganic materials 0.000 description 4
- 239000011574 phosphorus Substances 0.000 description 4
- 238000007650 screen-printing Methods 0.000 description 4
- 239000000463 material Substances 0.000 description 3
- 230000007246 mechanism Effects 0.000 description 3
- 238000001465 metallisation Methods 0.000 description 3
- 230000008901 benefit Effects 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 239000004411 aluminium Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000003667 anti-reflective effect Effects 0.000 description 1
- 238000000429 assembly Methods 0.000 description 1
- 230000000712 assembly Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000002800 charge carrier Substances 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 229910021419 crystalline silicon Inorganic materials 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 239000002019 doping agent Substances 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 235000008216 herbs Nutrition 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 238000010248 power generation Methods 0.000 description 1
- 238000005215 recombination Methods 0.000 description 1
- 230000006798 recombination Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 210000002268 wool Anatomy 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Photovoltaic Devices (AREA)
Abstract
The invention discloses a preparation method of a double-sided battery. The preparation method comprises the following steps: forming a boracic silicon dioxide layer on the first surface of a silicon wafer through plasma-enhanced chemical vapour deposition; forming a phosphorous silicon dioxide layer on the second surface of the silicon wafer through the plasma-enhanced chemical vapour deposition; and putting the silicon wafer into a high-temperature diffusion furnace, and introducing nitrogen into the high-temperature diffusion furnace to carry out diffusion on the silicon wafer. When the preparation method adopted by the invention is adopted, problems that the surface doping concentration of the battery is lowered and contact resistance is increased due to secondary diffusion can be effectively reduced, and the open-circuit voltage and the conversion efficiency of the double-sided battery can be effectively improved.
Description
Technical field
The invention belongs to solar cell preparation field, relate in particular to a kind of preparation method of double-side cell.
Background technology
Two-sided crystal silicon solar energy battery adopts double-sided metal grid line structure, and the tow sides of battery can light generate electricity simultaneously, and the electric energy that thus can significantly increase unit are exports.This two-sided battery structure, compared with traditional one side aluminium back surface field battery structure, indirectly, significantly improves unit of electrical energy and exports, reach the effect of single-sided high-efficiency solar cell power generation, considerably reduce the cost of electricity-generating of every watt, solar cell.
For P-type silicon, traditional double-side cell preparation flow is as follows:
RCA cleaning → phosphorus diffusingsurface barrier deposition → boron diffusion → phosphorus diffusingsurface barrier layer removal → boron diffusingsurface barrier deposition → phosphorus diffusion → boron diffusingsurface barrier layer removes → and two-sidedly carry out SiNx deposition → two-sided silk screen printing grid line and dry → burn down into cell metallization altogether.
Often need in the production technology of conventional double-side cell to carry out phosphorus diffusion and boron spreads two pyroprocesses, before High temperature diffusion each time, all need to carry out stop to non-diffusing face isolate, and then remove barrier layer, processing step is miscellaneous, and diffusion uniformity is poor.In addition, the diffusion profile after second time high-temperature diffusion process can make first time High temperature diffusion changes, as surface dopant concentration reduce, junction depth increases, and also can cause that the contact resistance of double-side cell increases, electrical contact performance decline.Meanwhile, multiple high temp process easily causes the impurity concentration of silicon substrate to increase, and the bluk recombination of battery aggravates thereupon, finally shows as the decline of battery open circuit voltage and conversion efficiency.
Therefore, need a kind of double-side cell preparation technology being different from prior art, solve the defect that just can be obtained double-side cell in prior art by twice high-temperature diffusion process.
Summary of the invention
Just can double-side cell be obtained in order to solve in prior art by twice high-temperature diffusion process, and the problem of double-side cell inefficiency, the invention provides a kind of preparation method of double-side cell.
According to an aspect of the present invention, provide a kind of preparation method of double-side cell, wherein, described method comprises step:
A) pecvd process is adopted to form boracic silicon dioxide layer at the first surface of silicon chip;
B) pecvd process is adopted to form phosphorous silicon dioxide layer at the second surface of described silicon chip;
C) described silicon chip is placed in high temperature dispersing furnace, and passes into nitrogen in described high temperature dispersing furnace, described silicon chip is spread.
According to a specific embodiment of the present invention, described step a) forms boracic silicon dioxide layer for using trimethyl borine and carbon dioxide to carry out PECVD to the first surface of described silicon chip further;
The flow of described trimethyl borine is 500sccm ~ 550sccm;
The flow of described carbon dioxide is 300sccm ~ 330sccm.
According to another embodiment of the present invention, described step a) in carry out PECVD time be 400s ~ 450s.
According to another embodiment of the present invention, described step a) in carry out PECVD reaction temperature be 200 DEG C ~ 220 DEG C.
According to another embodiment of the present invention, described step b) form phosphorous silicon dioxide layer for using phosphine and carbon dioxide to carry out PECVD to the second surface of described silicon chip further;
The flow of described phosphine is 50sccm ~ 100sccm;
The flow of described carbon dioxide is 300sccm ~ 330sccm.
According to another embodiment of the present invention, described step b) in carry out PECVD time be 380s ~ 400s.
According to another embodiment of the present invention, described step b) in carry out PECVD reaction temperature be 200 DEG C ~ 220 DEG C.
According to another embodiment of the present invention, at described step c) in, the flow of described nitrogen is 21L/min.
According to another embodiment of the present invention, wherein, the temperature in described high temperature dispersing furnace is 850 DEG C ~ 1000 DEG C, and temperature retention time is 30min ~ 60min.
Double-side cell preparation method provided by the invention, adopts following technological process: two-sided making herbs into wool → one side PECVD deposits phosphorous silicon dioxide layer → one side PECVD and deposits boron doped silica layer → two-sided diffusion altogether → two-sided and carry out SiNx deposition → two-sided silk screen printing grid line and dry → burn down into cell metallization altogether.A High temperature diffusion does not then need to form separator, simplifies preparation technology; It once completes diffusion, and diffusion uniformity is good.In addition, the problem such as the reduction of battery surface doping content, junction depth increase that One Diffusion Process there will not be secondary to spread to cause, effectively can improve open circuit voltage and the conversion efficiency of prepared double-side cell.
Accompanying drawing explanation
By reading the detailed description done non-limiting example done with reference to the following drawings, other features, objects and advantages of the present invention will become more obvious:
Figure 1 shows that the schematic flow sheet of an embodiment of the preparation method according to a kind of double-side cell provided by the invention;
Fig. 2 (a) and Fig. 2 (b) is depicted as the structural representation of the double-side cell of various substrates.
In accompanying drawing, same or analogous Reference numeral represents same or analogous parts.
Embodiment
Disclosing hereafter provides many different embodiments or example is used for realizing different structure of the present invention.Of the present invention open in order to simplify, hereinafter the parts of specific examples and setting are described.In addition, the present invention can in different example repeat reference numerals and/or letter.This repetition is to simplify and clearly object, itself does not indicate the relation between discussed various embodiment and/or setting.It should be noted that parts illustrated in the accompanying drawings are not necessarily drawn in proportion.Present invention omits the description of known assemblies and treatment technology and process to avoid unnecessarily limiting the present invention.
With reference to figure 1, Figure 1 shows that the schematic flow sheet of an embodiment of the preparation method according to a kind of double-side cell provided by the invention.
Step S101, adopts PECVD (Plasma Enhanced Chemical Vapor Deposition, plasma enhanced chemical vapor deposition) technique to form boracic silicon dioxide layer at the first surface of silicon chip.With reference to figure 2 (a) and Fig. 2 (b), described silicon chip is N-type silicon chip or P-type silicon sheet.
Preferably, trimethyl borine (TMB) and carbon dioxide (CO is used
2) PECVD formation boracic silicon dioxide layer 200 is carried out to the first surface of described silicon chip 100.Wherein, the flow of described trimethyl borine is 500sccm ~ 550sccm, such as: 500sccm, 525sccm or 550sccm.The flow of described carbon dioxide is 300sccm ~ 330sccm, such as: 300sccm, 315sccm or 330sccm.
Preferably, carrying out the PECVD time when forming boracic silicon dioxide layer 200 is 400s ~ 450s, such as: 400s, 425s or 450s.Preferably, the reaction temperature forming boracic silicon dioxide layer 200 is 200 DEG C ~ 220 DEG C, such as: 200 DEG C, and 210 DEG C or 220 DEG C.
After forming boracic silicon dioxide layer 200, perform step S102, adopt pecvd process to form phosphorous silicon dioxide layer 300 at the second surface of described silicon chip 100.
Preferably, phosphine (PH is used
3) and carbon dioxide (CO
2) PECVD is carried out to the second surface of described silicon chip 100 form phosphorous silicon dioxide layer 300.Wherein, the flow of described phosphine is 50sccm ~ 100sccm, such as: 50sccm, 75sccm or 100sccm.The flow of described carbon dioxide is 300sccm ~ 330sccm, such as: 300sccm, 315sccm or 330sccm.
Preferably, carrying out the PECVD time when forming phosphorous silicon dioxide layer 300 is 280s ~ 400s, such as: 380s, 390s or 400s.Preferably, the reaction temperature forming phosphorous silicon dioxide layer 300 is 200 DEG C ~ 220 DEG C, such as: 200 DEG C, and 210 DEG C or 220 DEG C.
Step S102 form respectively boracic silicon dioxide layer 200 and phosphorous silicon dioxide layer 300, needs afterwards to carry out High temperature diffusion process to silicon chip 100 after receiving on the two sides of silicon chip 100.Therefore, continue to perform step S103, described silicon chip is placed in high temperature dispersing furnace, and passes into nitrogen (N in described high temperature dispersing furnace
2), described silicon chip is spread.By a high-temperature diffusion process, a step completes the two sides diffusion of double-side cell.
Preferably, the flow passing into the nitrogen in high temperature dispersing furnace is 21L/min.Preferably, the temperature in described high temperature dispersing furnace is 850 DEG C ~ 1000 DEG C, such as: 850 DEG C, and 923 DEG C or 1000 DEG C.Preferably, the temperature retention time of silicon chip 100 in described high temperature dispersing furnace is 30min ~ 60min, such as: 30min, 45min or 60min.
After High temperature diffusion, deposit SiNx film respectively again on the two sides of silicon chip 100, SiNx film not only has antireflective function, has passivation crystalline silicon emitter surface in addition, reduces the effect of the compound of charge carrier.
Optionally, after deposition SiNx film, silk screen printing is carried out respectively to the two sides of silicon chip 100 and forms grid line and dry, finally burn down into the metallization of double-side cell altogether, so far prepare finished product double-side cell.Be appreciated that except by except silk screen printing, other usual ways can also be adopted to form the electrode of double-side cell, the mode of such as electroplating.
The preparation method of double-side cell provided by the invention, can complete the Double side diffusion of battery by high-temperature diffusion process, technique is simple, and diffusion uniformity is good; Avoid secondary and spread the problems such as the battery surface doping content caused is low, the increase of metal grid lines contact resistance; And make the double-side cell photoelectric conversion efficiency that is prepared from high.
Although describe in detail about example embodiment and advantage thereof, being to be understood that when not departing from the protection range of spirit of the present invention and claims restriction, various change, substitutions and modifications can being carried out to these embodiments.For other examples, those of ordinary skill in the art should easy understand maintenance scope in while, the order of processing step can change.
In addition, range of application of the present invention is not limited to the technique of the specific embodiment described in specification, mechanism, manufacture, material composition, means, method and step.From disclosure of the present invention, to easily understand as those of ordinary skill in the art, for the technique existed at present or be about to develop, mechanism, manufacture, material composition, means, method or step later, wherein their perform the identical function of the corresponding embodiment cardinal principle that describes with the present invention or obtain the identical result of cardinal principle, can apply according to the present invention to them.Therefore, claims of the present invention are intended to these technique, mechanism, manufacture, material composition, means, method or step to be included in its protection range.
Claims (9)
1. a preparation method for double-side cell, wherein, described method comprises step:
A) pecvd process is adopted to form boracic silicon dioxide layer at the first surface of silicon chip;
B) pecvd process is adopted to form phosphorous silicon dioxide layer at the second surface of described silicon chip;
C) described silicon chip is placed in high temperature dispersing furnace, and passes into nitrogen in described high temperature dispersing furnace, described silicon chip is spread.
2. preparation method according to claim 1, wherein, described step a) forms boracic silicon dioxide layer for using trimethyl borine and carbon dioxide to carry out PECVD to the first surface of described silicon chip further;
The flow of described trimethyl borine is 500sccm ~ 550sccm;
The flow of described carbon dioxide is 300sccm ~ 330sccm.
3. preparation method according to claim 1 and 2, wherein, described step a) in carry out PECVD time be 400s ~ 450s.
4. preparation method according to claim 3, wherein, described step a) in carry out PECVD reaction temperature be 200 DEG C ~ 220 DEG C.
5. preparation method according to claim 1, wherein, described step b) form phosphorous silicon dioxide layer for using phosphine and carbon dioxide to carry out PECVD to the second surface of described silicon chip further;
The flow of described phosphine is 50sccm ~ 100sccm;
The flow of described carbon dioxide is 300sccm ~ 330sccm.
6. preparation method according to claim 1 or 5, wherein, described step b) in carry out PECVD time be 380s ~ 400s.
7. preparation method according to claim 6, wherein, described step b) in carry out PECVD reaction temperature be 200 DEG C ~ 220 DEG C.
8. preparation method according to claim 1, wherein, at described step c) in, the flow of described nitrogen is 21L/min.
9. the preparation method according to claim 1 or 8, wherein, the temperature in described high temperature dispersing furnace is 850 DEG C ~ 1000 DEG C, and temperature retention time is 30min ~ 60min.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201410621635.3A CN104538485A (en) | 2014-11-06 | 2014-11-06 | Preparation method of double-sided battery |
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| CN201410621635.3A CN104538485A (en) | 2014-11-06 | 2014-11-06 | Preparation method of double-sided battery |
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| CN201410621635.3A Pending CN104538485A (en) | 2014-11-06 | 2014-11-06 | Preparation method of double-sided battery |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105576081A (en) * | 2016-03-02 | 2016-05-11 | 江西展宇新能源股份有限公司 | Manufacturing method for black silicon double-face cell |
| CN105702809A (en) * | 2016-04-07 | 2016-06-22 | 南昌大学 | Method for preparing doped silicon of solar battery with low temperature vapor deposited solid diffusion source |
| CN105826432A (en) * | 2016-05-17 | 2016-08-03 | 南昌大学 | Method for preparing n-type crystalline silica double-side solar cell |
| CN107425091A (en) * | 2016-05-24 | 2017-12-01 | 上海凯世通半导体股份有限公司 | The doping method of double-side cell |
| CN107425092A (en) * | 2016-05-24 | 2017-12-01 | 上海凯世通半导体股份有限公司 | The doping method of double-side cell |
| CN111048623A (en) * | 2019-12-20 | 2020-04-21 | 中节能太阳能科技（镇江）有限公司 | Emitter preparation method for improving sheet resistance uniformity |
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| CN102971867A (en) * | 2010-04-26 | 2013-03-13 | 福特沃特法国电力新能源分布公司 | Method for preparing an n+pp+ or p+nn+ structure on silicon wafers |
| CN103872167A (en) * | 2012-12-18 | 2014-06-18 | 北京汉能创昱科技有限公司 | Silicon-based thin-film solar battery and preparation method thereof |
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2014
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| US4377901A (en) * | 1980-06-16 | 1983-03-29 | U.S. Philips Corporation | Method of manufacturing solar cells |
| CN102971867A (en) * | 2010-04-26 | 2013-03-13 | 福特沃特法国电力新能源分布公司 | Method for preparing an n+pp+ or p+nn+ structure on silicon wafers |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105576081A (en) * | 2016-03-02 | 2016-05-11 | 江西展宇新能源股份有限公司 | Manufacturing method for black silicon double-face cell |
| CN105702809A (en) * | 2016-04-07 | 2016-06-22 | 南昌大学 | Method for preparing doped silicon of solar battery with low temperature vapor deposited solid diffusion source |
| CN105826432A (en) * | 2016-05-17 | 2016-08-03 | 南昌大学 | Method for preparing n-type crystalline silica double-side solar cell |
| CN107425091A (en) * | 2016-05-24 | 2017-12-01 | 上海凯世通半导体股份有限公司 | The doping method of double-side cell |
| CN107425092A (en) * | 2016-05-24 | 2017-12-01 | 上海凯世通半导体股份有限公司 | The doping method of double-side cell |
| CN111048623A (en) * | 2019-12-20 | 2020-04-21 | 中节能太阳能科技（镇江）有限公司 | Emitter preparation method for improving sheet resistance uniformity |
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