CN104470195A - Printed circuit board and method of manufacturing the same - Google Patents
Printed circuit board and method of manufacturing the same Download PDFInfo
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- CN104470195A CN104470195A CN201410471805.4A CN201410471805A CN104470195A CN 104470195 A CN104470195 A CN 104470195A CN 201410471805 A CN201410471805 A CN 201410471805A CN 104470195 A CN104470195 A CN 104470195A
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- layer
- via hole
- insulation
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K26/00—Working by laser beam, e.g. welding, cutting or boring
- B23K26/36—Removing material
- B23K26/38—Removing material by boring or cutting
- B23K26/382—Removing material by boring or cutting by boring
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K26/00—Working by laser beam, e.g. welding, cutting or boring
- B23K26/36—Removing material
- B23K26/40—Removing material taking account of the properties of the material involved
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4647—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits by applying an insulating layer around previously made via studs
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K2101/00—Articles made by soldering, welding or cutting
- B23K2101/36—Electric or electronic devices
- B23K2101/40—Semiconductor devices
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K2103/00—Materials to be soldered, welded or cut
- B23K2103/16—Composite materials, e.g. fibre reinforced
- B23K2103/166—Multilayered materials
- B23K2103/172—Multilayered materials wherein at least one of the layers is non-metallic
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/096—Vertically aligned vias, holes or stacked vias
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
- H05K2203/025—Abrading, e.g. grinding or sand blasting
Abstract
Disclosed herein are a printed circuit board and a method of manufacturing the same. According to a preferred embodiment of the present invention, the printed circuit board includes: a base substrate; an inner layer build-up layer formed on the base substrate and including a first inner layer circuit layer, a second inner layer circuit layer, an inner layer insulating layer, and an inner layer via having a tapered section; and an outer layer build-up layer formed on the inner layer build-up layer and including an outer layer circuit layer, an outer layer insulating layer, and an outer layer via having a rectangular section.
Description
The cross reference of related application
This application claims the rights and interests that the autograph submitted on September 16th, 2013 is the korean patent application No.10-2013-0111110 of " Printed circuit board and manufacturing methods " (" Printed Circuit Board And Method Of Manufacturing The Same "), its full content is all herein incorporated by reference.
Technical field
The present invention relates to a kind of Printed circuit board and manufacturing methods.
Background technology
Along with the latest development of electronics industry, the demand for multi-functional and very thin and small electronic component increases fast.Therefore, increase is needed to be used for the wiring density of the printed circuit board (PCB) of installing electronic elements and to reduce its thickness.Recently, due to the demand tendency of very thin and small electronic product in quick growth, the production of printed circuit board (PCB) is also in increase, this increase is by using combined method (build-up method) to realize, namely between minimum circuit layer, realize bonding by being only connected to each other by required circuit layer, instead of realized by the method implementing processing electroplating ventilating hole on multilayer board.The example of the via hole (via) adopting combined method to be formed on a printed circuit comprises alternating expression via hole, O type circle via hole, stack via hole etc.Wherein, stack via hole, for form via hole on via hole, can be formed according to the order of the upper via hole on lower via hole, circuit pattern, upper insulating barrier and lower insulating barrier.In addition, the via hole (via hole) forming stack via hole can by laser drill machine work (U.S. Patent No. 7485411).
Summary of the invention
The Printed circuit board and manufacturing methods that the present invention is devoted to provide one can prevent micro-hole (dimple) and occurs.
In addition, the present invention is devoted to provide a kind of Printed circuit board and manufacturing methods that can reduce operational issue.
According to the preferred embodiment of the present invention, a kind of printed circuit board (PCB) is provided, comprises: substrate; Inner-layer combination layer, this inner-layer combination layer is formed on the substrate and comprises the first internal layer circuit layer, the second internal layer circuit layer, inner insulation layer and have the internal layer via hole of tapered cross-section; And outer layer combination layer, this outer layer combination layer to be formed on described inner-layer combination layer and to comprise outer circuit layer, outer insulation and have the outer via hole of square-section.
Described inner-layer combination layer can comprise at least one in described first internal layer circuit layer, the second internal layer circuit layer, inner insulation layer and internal layer via hole.
Described inner-layer combination layer can comprise: the first internal layer circuit layer, and this first internal layer circuit layer is formed on the substrate; Inner insulation layer, this inner insulation layer is formed on described substrate and described first internal layer circuit layer; Internal layer via hole, this internal layer via hole is formed on described first internal layer circuit layer, and is formed as running through by described inner insulation layer; And the second internal layer circuit layer, this second internal layer circuit layer is formed on described inner insulation layer and described internal layer via hole.
Described outer layer combination layer can comprise: outer insulation, and described outer insulation is formed on described inner-layer combination layer; Outer via hole, this outer via hole is formed on described inner-layer combination layer, and is formed as running through by described outer insulation; And outer circuit layer, this outer circuit layer is formed on described outer insulation and described outer via hole.
Described outer insulation can be made up of photosensitive insulating material.
Two surfaces of described substrate all can be formed with described inner-layer combination layer and described outer layer combination layer.
According to the another kind of preferred implementation of the present invention, a kind of method manufacturing printed circuit board (PCB) is provided, comprises: prepared substrate; Form inner-layer combination layer on the substrate, this inner-layer combination layer comprises the first internal layer circuit layer, the second internal layer circuit layer, inner insulation layer and has the internal layer via hole of tapered cross-section; And form outer layer combination layer on described inner-layer combination layer, this outer layer combination layer comprises outer circuit layer, outer insulation and has the outer via hole of square-section.
Described inner-layer combination layer can comprise at least one in described first internal layer circuit layer, the second internal layer circuit layer, inner insulation layer and internal layer via hole.
The step forming described inner-layer combination layer can comprise: form described first internal layer circuit layer on the substrate; Described first internal layer circuit layer forms described inner insulation layer; And, described inner insulation layer is formed described internal layer via hole and described second internal layer circuit layer.
The step forming described internal layer via hole and described second internal layer circuit layer can comprise: in described inner insulation layer, form the internal layer via hole with tapered cross-section by using laser drilling machine; Inner-layer conducting layer and described internal layer via hole is formed by forming electric conducting material in described inner insulation layer and described internal layer via hole; Described inner-layer conducting layer forms the first body against corrosion, and this first body passivation against corrosion is wherein formed with the region of described second internal layer circuit layer; Expose the described inner-layer conducting layer of (exposing) by etching by described first body against corrosion and form described second internal layer circuit layer; And, remove described first body against corrosion.
The step forming described internal layer via hole and described second internal layer circuit layer can comprise: in described inner insulation layer, form the internal layer via hole with tapered cross-section by using laser drilling machine; Described inner insulation layer is formed the first anti-plate body, and this first anti-plate body makes the region being wherein formed with described internal layer via hole and described second internal layer circuit layer expose; Described internal layer via hole and described second internal layer circuit layer is formed by being formed by the described internal layer via hole of described first anti-plate body exposure and described inner insulation layer; And, remove described first anti-plate body.
The step forming described outer layer combination layer can comprise: on described inner-layer combination layer, form described outer via hole; Form outer insulation, this outer insulation is formed on described inner-layer combination layer, and described outer via hole embeds in described outer insulation; And, described outer insulation and described outer via hole form described outer circuit layer.
The step forming described outer via hole can comprise: on described inner-layer combination layer, form photosensitive body against corrosion; By exposure (expose) and development (develop) described photosensitive body against corrosion, form the opening with square-section and also expose the region being wherein formed with described outer via hole; Described outer via hole is formed by forming insulating material in described opening; The top of polishing and smooth described outer via hole; And, remove described photosensitive body against corrosion.
Manufacture the method for printed circuit board (PCB) can also comprise: after the described outer insulation of formation, polishing smooth described outer insulation and described outer via hole.
The step forming described outer circuit layer can comprise: form outer layer conductive layer by forming insulating material in described outer insulation and described outer via hole; Described outer layer conductive layer is formed the second body against corrosion is wherein formed with described outer circuit layer region with passivation; Outer circuit layer is formed by the outer layer conductive layer of described second body exposure against corrosion by etching; And, remove described second body against corrosion.
The step forming described outer circuit layer can comprise: in described outer via hole, form the second anti-plate body, and this second anti-plate body makes described outer insulation and is wherein formed with the region exposure of described outer circuit layer; Described outer circuit layer is formed by forming electric conducting material in the described outer insulation exposed by described second anti-plate body and described outer via hole; And, remove described second anti-plate body.
The step forming described outer layer combination layer can comprise: on described inner-layer combination layer, form the outer insulation be made up of photosensitive insulating material; Form outer via hole, this outer via hole is formed as running through by described outer insulation; And, described outer insulation and described outer via hole form described outer circuit layer.
The step forming described outer via hole can comprise: by exposing and the described outer insulation and form skin-pass hole of developing, and this skin-pass hole has square-section and the region making wherein to be formed with described outer via hole exposes; Described outer via hole is formed by forming electric conducting material in described skin-pass hole; And, polishing the top of smooth described outer insulation and described outer via hole.
The step forming described outer circuit layer can comprise: form outer layer conductive layer by forming insulating material in described outer insulation and described outer via hole; Described outer layer conductive layer is formed the second body against corrosion is wherein formed with described outer circuit layer region with passivation; Described outer circuit layer is formed by the described outer layer conductive layer of described second body exposure against corrosion by etching; And, remove described second body against corrosion.
The step forming described outer circuit layer comprises: on described outer via hole, form the second anti-plate body, and this second anti-plate body makes described outer insulation and is wherein formed with the region exposure of described outer circuit layer; Outer circuit layer is formed by forming electric conducting material in the described outer insulation exposed by described second anti-plate body and described outer via hole; And, remove described second anti-plate body.
Two surfaces of described substrate are all formed with described inner-layer combination layer and described outer layer combination layer.
Accompanying drawing explanation
By the detailed description below in conjunction with accompanying drawing, above and other aspect of the present invention, feature and advantage more clearly will be understood, wherein:
Fig. 1 represents the exemplary plot according to the printed circuit board (PCB) of a kind of preferred implementation of the present invention;
Fig. 2 to Figure 24 represents the exemplary plot according to the method for the manufacture printed circuit board (PCB) of a kind of preferred implementation of the present invention;
Figure 25 is the exemplary plot of the printed circuit board (PCB) represented according to the another kind of preferred implementation of the present invention;
Figure 26 to Figure 30 is the exemplary plot of the method for the manufacture printed circuit board (PCB) represented according to the another kind of preferred implementation of the present invention.
Embodiment
By below in conjunction with the detailed description of accompanying drawing to preferred implementation, will more clearly understand object of the present invention, feature and advantage.In all of the figs, identical reference marker for representing same or analogous parts, and omits its repeat specification.In addition, in the following description, term " first ", " second ", " side ", " opposite side " etc. are for making particular elements and miscellaneous part distinguish, but the structure of these parts should not be construed as the restriction by term.In addition, in explanation of the present invention, when can determine correlation technique detailed description can fuzzy purport of the present invention time, its description will by omitting.
Below, the preferred embodiment of the present invention is described in detail with reference to the accompanying drawings.
Fig. 1 represents the exemplary plot according to the printed circuit board (PCB) of a kind of preferred implementation of the present invention.
With reference to Fig. 1, printed circuit board (PCB) 100 can comprise substrate (base substrate) 110, inner-layer combination layer (inner layer build-up layer) 120 and outer layer combination layer (outer layer build-up layer) 140.
Substrate 110 can be made up of the composite polymer resin (composite polymer resin) being used as interlayer dielectic usually.Such as, substrate 110 adopts prepreg (prepreg), thus can make the thinner of print circuit plates making.Alternatively, substrate 110 can adopt ABF film (ajinomoto build up film) and easily implement fine circuitry.In addition, substrate 110 can use epoxy (epoxy based resin), as FR-4 and Bismaleimide Triazine (bismaleimide triazine) (BT), but the preferred embodiment of the present invention is not limited to this.In addition, substrate 110 can use copper clad laminate (copper clad laminate) (CCL) to be formed.Although substrate 110 shown in the preferred embodiment for the present invention is formed as single insulating barrier, be not limited to this.That is, substrate 110 can be the combination layer being configured to comprise at least one layer insulating and circuit layer and via hole.
Inner-layer combination layer 120 is formed on described substrate 110.According to the preferred embodiment of the present invention, inner-layer combination layer 120 comprises the first internal layer circuit layer 121, first inner insulation layer 122, first internal layer via hole 123, second internal layer circuit layer 125, second inner insulation layer 126, second internal layer via hole 127 and the 3rd internal layer circuit layer 128.
First internal layer circuit layer 121 is formed on substrate 110.
First inner insulation layer is formed on substrate 110 and the first internal layer circuit layer 121.
First internal layer via hole 123 is formed in the first inner insulation layer 122.First internal layer circuit layer 121 can be electrically connected to the second internal layer circuit layer 125 by running through by the first inner insulation layer 122 by the first internal layer via hole 123.That is, a side surface of the first internal layer via hole 123 can be bonded to the second internal layer circuit layer 125, and opposite side surface can be bonded to the first internal layer circuit layer 121.According to the preferred embodiment of the present invention, the cross section of the first internal layer via hole 123 has conical by its shape.That is, a side surface of the first internal layer via hole 123 can have the diameter larger than the diameter on its opposite side surface.According to the preferred embodiment of the present invention, laser drilling machine can be used to be formed to form the first internal layer via hole 123, first internal layer via hole (not shown).In this case, due to the characteristic of laser drilling machine, the first internal layer via hole (not shown) is formed as having tapered cross-section.Therefore, the first internal layer via hole 123 formed by filled with conductive material being entered the first internal layer via hole (not shown) is also formed as having tapered cross-section.
Second internal layer circuit layer 125 is formed on the first inner insulation layer 122 and the first internal layer via hole 123.Second internal layer circuit layer 125 is bonded to a side surface of the first internal layer via hole 123.
Second inner insulation layer 126 is formed on the first inner insulation layer 122 and the first internal layer via hole 123.
Second internal layer via hole 127 is formed on the second inner insulation layer 126.Second internal layer circuit layer 125 can be electrically connected to the 3rd internal layer circuit layer 128 by running through by the second inner insulation layer 126 by the second internal layer via hole 127.That is, a side surface of the second internal layer via hole 127 can be bonded to the 3rd internal layer circuit layer 128, and opposite side surface can be bonded to the second internal layer circuit layer 125.According to the preferred embodiment of the present invention, laser drilling machine can be used to be formed to form the second internal layer via hole 127, second internal layer via hole (not shown).Therefore, with the first internal layer via hole 123 similarly, the second internal layer via hole 127 also can have conical by its shape.That is, a side surface of the second internal layer via hole 127 can have the diameter larger than the diameter on its opposite side surface.
3rd internal layer circuit layer 128 is formed on the second inner insulation layer 126 and the second internal layer via hole 127.
During the preferred embodiment of the present invention illustrates, inner-layer combination layer 120 comprises dielectric layers and three layers of circuit layer, but is not limited to this.That is, those skilled in the art selectively, make inner-layer combination layer 120 be made up of multilayer dielectric layer and circuit layer.
Outer layer combination layer (outer layer build-up layer) 140 is formed on inner-layer combination layer 120, the superiors in the combination layer as printed circuit board (PCB) 100.According to the preferred embodiment of the present invention, outer layer combination layer 140 comprises outer insulation 142, outer via hole 141 and outer circuit layer 144.
Outer insulation 142 is formed on the second inner insulation layer 126 and the 3rd internal layer circuit layer 128.
Outer via hole 141 is formed in outer insulation 142.3rd internal layer circuit layer 128 can be electrically connected to outer circuit layer 144 by running through by outer insulation 142 by outer via hole 141.That is, a side surface of outer via hole 141 can be bonded to outer circuit layer 144, and opposite side surface can be bonded to the 3rd internal layer circuit layer 128.According to the preferred embodiment of the present invention, the cross section of outer via hole 141 has rectangular shape.That is, a side surface of outer via hole 141 and opposite side surface can have identical diameter.According to the preferred embodiment of the present invention, in order to form outer via hole 141, can by implementing to expose on photosensitive body against corrosion (photosensitive resist) (not shown) and developing and form the opening being used for outer via hole 141.In this case, the opening be formed on photosensitive body (not shown) against corrosion has square-section.Thus, filled with conductive material is entered the opening of photosensitive body (not shown) against corrosion, and form the outer via hole 141 with square-section by the top polishing to opening.
Outer circuit layer 144 is formed on outer insulation 142 and outer via hole 141.Outer circuit layer 144 is bonded to a side surface of outer via hole 141.
According to the preferred embodiment of the present invention, the first internal layer circuit layer 121, first internal layer via hole 123, second internal layer circuit layer 125, second internal layer via hole 127, the 3rd internal layer circuit layer 128, outer via hole 141 and outer circuit layer 144 can be made up of electric conducting material.Such as, described electric conducting material can be copper.But electric conducting material is not limited to copper, but may be used for any electric conducting material on the circuit that uses in field of circuit boards.
First inner insulation layer 122, second inner insulation layer 126 and outer insulation 142 are made up of the composite polymer resin being used as interlayer dielectic usually.Such as, the first inner insulation layer 122, second inner insulation layer 126 and outer insulation 142 can be made up of epoxy, such as prepreg, ABF film, FR-4 and Bismaleimide Triazine (BT).
In printed circuit board (PCB) according to the preferred embodiment of the present invention, internal layer via hole has the tapered cross-section by laser drill machine work, and outer via hole has the square-section by exposure and developing process.The advantage with the printed circuit board (PCB) of aforementioned structure will illustrate in its manufacture method.
Fig. 2 to Figure 24 represents the exemplary plot according to the method for the manufacture printed circuit board (PCB) of a kind of preferred implementation of the present invention.
First, Fig. 2 to Figure 12 shows the sequence forming inner-layer combination layer on substrate.
With reference to Fig. 2, provide a kind of substrate 110.
Substrate 110 can be made up of the composite polymer resin being used as interlayer dielectic usually.Such as, substrate 110 adopts prepreg, thus can make the thinner of print circuit plates making.Alternatively, substrate 110 can adopt ABF film and easily implement fine circuitry.In addition, substrate 110 can use epoxy, and as FR-4 and Bismaleimide Triazine (BT), but the preferred embodiment of the present invention is not limited to this.In addition, substrate 110 can use copper clad laminate (CCL) to be formed.Although substrate 110 shown in the preferred embodiment for the present invention is formed as single insulating barrier, be not limited to this.That is, substrate 110 can be the combination layer being configured to comprise at least one layer insulating and circuit layer and via hole.
Substrate 110 can be provided with the first internal layer circuit layer 121.This first internal layer circuit layer 121 can be made up of electric conducting material.Such as, the first internal layer circuit layer 121 can be made of copper.But the material forming the first internal layer circuit layer 121 is not limited to copper, but any electric conducting material for circuit in field of circuit boards can not be used limitedly.According to the preferred embodiment of the present invention, the first internal layer circuit layer 121 can comprise circuit pattern and be electrically connected on the pad (pad) of via hole.
With reference to Fig. 3, substrate 110 and the first internal layer circuit layer 121 are provided with the first inner insulation layer 122.
First inner insulation layer 122 can be made up of the composite polymer resin being used as interlayer dielectic usually.Such as, the first inner insulation layer 122 can be made up of epoxy, such as prepreg, ABF film, FR-4 and Bismaleimide Triazine (BT).
With reference to Fig. 4, the first inner insulation layer 122 is provided with the first internal layer via hole 131.
First internal layer via hole 131 can be formed by using laser drill machine work first inner insulation layer 122.By laser drill machine work first internal layer via hole 131, thus make it have tapered cross-section.That is, the top of the first internal layer via hole 131 can be formed as having the diameter being greater than its underpart diameter.First internal layer via hole 131 can be formed on the first internal layer circuit layer 121.
Fig. 5 to Fig. 7 represents the exemplary plot forming the method for the second internal layer circuit layer according to the preferred embodiment of the present invention.
With reference to Fig. 5, be formed with the first internal layer via hole 123 and the first inner-layer conducting layer 124.
First internal layer via hole 123 and the first inner-layer conducting layer 124 can be formed by plating (plate) first inner insulation layer 122 and the first internal layer via hole 131 simultaneously.Herein, the first internal layer via hole 123 and the first inner-layer conducting layer 124 can be made up of the electric conducting material for circuit, as copper.First internal layer via hole 123 and the first inner-layer conducting layer 124 can be formed by the one that can be used in the plating of field of circuit boards, silk screen print method (screen printing method) and ink-jet method (inkjet method) etc.
According to the preferred embodiment of the present invention, the first inner-layer conducting layer 124 can be formed on the first inner insulation layer 122, and the first internal layer via hole 123 can be formed in the first internal layer via hole 131.
With reference to Fig. 6, the first body against corrosion (first etching resist) 310 is formed on the first inner-layer conducting layer 124.
First body 310 against corrosion can be provided with opening, and the region of being removed by etching (etching) is exposed by this opening.Namely as shown in Figure 6, the first body 310 against corrosion can form pattern and make region passivation, and the second internal layer circuit layer (not shown) is then formed in this region.
With reference to Fig. 7, define the second internal layer circuit layer 125.
Second internal layer circuit layer 125 can be formed by etching first inner-layer conducting layer 124 (Fig. 6) that be exposed by the first body 310 against corrosion.That is, in the first inner-layer conducting layer 124, can be the second internal layer circuit layer 125 by the region (Fig. 6) of the first body 310 against corrosion passivation.After enforcement etching, the first body 310 against corrosion is by removing.Just as described above, the second internal layer circuit layer 125 can pass through masking method (tenting method) and be formed according to the preferred embodiment of the present invention.
Fig. 8 and Fig. 9 is the exemplary plot of the method for the formation second internal layer circuit layer represented according to the another kind of preferred implementation of the present invention.
With reference to Fig. 8, the first anti-plate body (first plating resist) 320 is formed on the first inner insulation layer 122.
First anti-plate body 320 can be set to region (Fig. 7) and the opening with formation second internal layer circuit layer 125, exposes the first internal layer via hole 131 by this opening.
With reference to Fig. 9, be formed with the second internal layer circuit layer 125 and the first internal layer via hole 123.
Second internal layer circuit layer 125 and the first internal layer via hole 123 can be formed by the opening of plating first anti-plate body 320 simultaneously.Herein, the second internal layer circuit layer 125 and the first internal layer via hole 123 can be made up of the electric conducting material for circuit, as copper.Second internal layer circuit layer 125 and the first internal layer via hole 123 can by being formed for the one in the plating of field of circuit boards, silk screen print method and ink-jet method etc.
Then, as shown in Figure 7, when the first anti-plate body 320 is by after removing, the second internal layer circuit layer 125 and the first internal layer via hole 123 can be formed.
Just as described above, can use half addition (semi additive process) (SAP) method be passed through according to the second internal layer circuit layer 125 of the another kind of preferred implementation of the present invention and the first internal layer via hole 123 and be formed.
With reference to Figure 10, the first inner insulation layer 122 and the second internal layer circuit layer 125 are provided with the second inner insulation layer 126.
Second inner insulation layer 126 can be made up of the composite polymer resin being used as interlayer dielectic usually.Such as, the second inner insulation layer 126 can be made up of epoxy, such as prepreg, ABF film, FR-4 and Bismaleimide Triazine (BT).In addition, the second inner insulation layer 126 can have substrate shape or thin layer shape.
With reference to Figure 11, the second inner insulation layer 126 is provided with the second internal layer via hole 132.
Second internal layer via hole 132 can be formed by using laser drill machine work second inner insulation layer 126.By laser drill machine work second internal layer via hole 132, thus make it have tapered cross-section.That is, the top of the second internal layer via hole 132 can be formed as having the diameter being greater than its underpart diameter.Second internal layer via hole 132 can be formed on the first internal layer circuit layer 121.
With reference to Figure 12, the second inner insulation layer 126 and the second internal layer via hole 132 are provided with the second internal layer via hole 127 and the 3rd internal layer circuit layer 128.
Second internal layer via hole 127 and the 3rd internal layer circuit layer 128 can be formed by using the method for above-mentioned formation first internal layer via hole 123 and the second internal layer circuit layer 125.
According to above-mentioned Fig. 2 to Figure 12, substrate 110 can be set to have inner-layer combination layer 120.Be formed with dielectric layers and three layers of circuit layer shown in the preferred embodiment of the present invention, but those skilled in the art selectively, freely implement the quantity of insulating barrier that inner-layer combination layer 120 comprises and circuit layer.
Figure 13 to 24 represents the sequence forming outer layer combination layer.
With reference to Figure 13, the second inner insulation layer 126 and the 3rd internal layer circuit layer 128 are provided with photosensitive body against corrosion 330.Positive resist body can be any positivity type or negativity type.Such as, described photosensitive body 330 against corrosion can be dry film.
With reference to Figure 14, photosensitive body 330 against corrosion is provided with opening 331.
The opening 331 of photosensitive body against corrosion 330 can be formed in the region of outer via hole (not shown) formation.The opening 331 of photosensitive body against corrosion 330 is formed by exposure and developing process.Therefore, the opening 331 of photosensitive body against corrosion 330 can be formed as having square-section.That is, the opening 331 of photosensitive body against corrosion 330 can be formed as its upper and lower and has identical diameter.The opening 331 of photosensitive body against corrosion 330 can be formed on the 3rd internal layer circuit layer 128.
With reference to Figure 15, be formed with outer via hole 141.
Outer via hole 141 can be formed by the opening 331 of the photosensitive body 330 against corrosion of plating.At this, outer via hole 141 can be made up of the electric conducting material for circuit, as copper.In addition, outer via hole 141 can by being formed for any one in the plating of field of circuit boards, silk screen print method and ink-jet method etc.The lower surface of outer via hole 141 is bonded to the 3rd internal layer circuit layer 128.
With reference to Figure 16, the top of the outer via hole 141 of polishing.
As shown in figure 15, outer via hole 141 can cover on the top of photosensitive body against corrosion 330.In addition, although not shown, outer via hole 141 can be formed on the upper surface of the opening 331 of photosensitive body against corrosion 330 deficiently.Therefore, the upper flat of outer via hole 141 can be made by polishing.
Just as described above, can remove by the top of the outer via hole 141 of polishing the micro-hole (dimple) being formed in outer via hole top.In addition, there is micro-hole in the outer circuit layer (not shown) that can prevent from being formed in outer via hole 141 top by micro-hole of removing on outer via hole 141.
In addition, when outer via hole 141 is formed as plural number, all outer via holes can be formed as having unified height.
With reference to Figure 17, photosensitive body 330 (Figure 16) against corrosion can by removing.
When removing photosensitive body 330 (Figure 16) against corrosion, outer via hole 141 is retained on the 3rd internal layer circuit layer 128 with form of bio-carrier.
With reference to Figure 18, the second inner insulation layer 126 and the 3rd internal layer circuit layer 128 can be provided with outer insulation 142.Outer insulation 142 can be made up of the composite polymer resin being used as interlayer dielectic usually.Such as, outer insulation can be made up of epoxy, such as prepreg, ABF film, FR-4, Bismaleimide Triazine (BT) etc.
With reference to Figure 19, the upper surface of outer insulation 142 and outer via hole 141 is by polishing.
As shown in figure 18, outer insulation 142 can be formed as having the thickness less than the thickness of outer via hole 141.In addition, although not shown, outer insulation 142 is formed as having the thickness being greater than outer via hole 141 thickness, the top of outer via hole 141 can be fenced up.Thus outer insulation 142 and outer via hole 141 can flatten whole by polishing.Smooth by this, outer insulation 142 has embedding outer via hole 141 wherein, but can be formed as outside upper surface is exposed to.
Figure 20 to Figure 22 is the exemplary plot of the method forming outer circuit layer according to the preferred embodiment of the present invention.
With reference to Figure 20, outer insulation 142 and outer via hole 141 are provided with outer layer conductive layer 143.
Outer layer conductive layer 143 can be formed by plating outer insulation 142 and outer via hole 141.Outer layer conductive layer 143 can be made up of the electric conducting material for circuit, as copper.Outer layer conductive layer 143 can by being formed for any one in the plating of field of circuit boards, silk screen print method and ink-jet method etc.
With reference to Figure 21, outer layer conductive layer 143 is provided with the second body 340 against corrosion.
Second body 340 against corrosion is provided with opening, and the region of removing by etching is exposed by this opening.That is, the second body 340 against corrosion can form pattern to make region passivation, and outer circuit layer (not shown) is then formed in this region.
With reference to Figure 22, be formed with outer circuit layer 144.
Outer circuit layer 144 can be formed by etching the outer layer conductive layer 143 (Figure 21) that be exposed by the second body 340 (Figure 21) against corrosion.That is, can be outer circuit layer 144 by the outer layer conductive layer 143 of the second body 340 (Figure 21) against corrosion passivation.After the etch is completed, the second body 340 (Figure 21) against corrosion is by removing.
Figure 23 to Figure 24 is the exemplary plot of the method for the formation outer circuit layer 144 represented according to the another kind of preferred implementation of the present invention.
With reference to Figure 23, outer insulation 142 and outer via hole 141 are provided with the second anti-plate body 350.
Second anti-plate body 350 can be provided with opening, and the region for the formation of outer circuit layer 144 (Figure 22) is exposed by this opening.
With reference to Figure 24, be formed with outer circuit layer 144.
Outer circuit layer 144 can be formed by the opening of plating second anti-plate body 350.Outer layer conductive layer 143 can be made up of the electric conducting material for circuit.Outer layer conductive layer 143 can by being formed for any one in the plating of field of circuit boards, silk screen print method and ink-jet method etc.
Then, as shown in figure 22, when the second anti-plate body 350 is by removal, outer circuit layer 144 can be formed.
According to the description of the above method to Figure 13 to Figure 24, outer layer combination layer 140 can be formed on inner-layer combination layer 120.
As shown in figure 22, manufacture the method for printed circuit board (PCB) according to the preferred embodiment of the present invention, the printed circuit board (PCB) 100 comprising inner-layer combination layer 120 and outer layer combination layer 140 can be formed, wherein, inner-layer combination layer 120 comprises the internal layer via hole with tapered cross-section, and outer layer combination layer 140 comprises the outer via hole with square-section.
The preferred embodiment of the present invention is described as the side surface that inner-layer combination layer and outer layer combination layer are formed in substrate, but is not limited to this.Those skilled in the art selectively, make inner-layer combination layer and outer layer combination layer be formed in a side surface and two surfaces of substrate separately.
The method of printed circuit board (PCB) and manufacture printed circuit board (PCB) according to the preferred embodiment of the present invention, before formation outer circuit layer, outer via hole by polishing, thus will remove micro-hole of outer via hole.Can prevent from micro-hole appears in outer circuit layer by micro-hole of removing on outer via hole.In addition, when formation has the internal layer via hole of the inner-layer combination layer of multilayer, use laser drill machine work can reduce than use exposure and developing process and operate (handling), thus reduce owing to operating the problem caused.That is, the method of printed circuit board (PCB) and manufacture printed circuit board (PCB) according to the preferred embodiment of the present invention, method for drilling holes is applied to inner-layer combination layer, exposure and developing process and glossing are applied to outer layer combination layer, thus remove micro-hole necessarily, therefore, solve operational issue and nick problem simultaneously.
Figure 25 is the exemplary plot of the printed circuit board (PCB) represented according to the another kind of preferred implementation of the present invention.
With reference to Figure 25, printed circuit board (PCB) 200 can comprise substrate 110, inner-layer combination layer 120 and outer layer combination layer 150.
Substrate 110 can be made up of the composite polymer resin being used as interlayer dielectic usually.Such as, substrate 110 can use the formation such as prepreg, ABF film, FR-4, Bismaleimide Triazine (BT), copper clad laminate (CCL).
Substrate 110 shown in the preferred embodiment for the present invention is formed as single insulating barrier, but is not limited to this.That is, substrate 110 can be the combination layer being configured to comprise at least one layer insulating and circuit layer and via hole.
Inner-layer combination layer 120 is formed on described substrate 110.According to the preferred embodiment of the present invention, inner-layer combination layer 120 comprises the first internal layer circuit layer 121, first inner insulation layer 122, first internal layer via hole 123, second internal layer circuit layer 125, second inner insulation layer 126, second internal layer via hole 127 and the 3rd internal layer circuit layer 128.
First internal layer circuit layer 121 is formed on substrate 110.
First inner insulation layer 122 is formed on substrate 110 and the first internal layer circuit layer 121.
First internal layer via hole 123 is formed in the first inner insulation layer 122.First internal layer via hole 123 can make one side surface can be bonded to the second internal layer circuit layer 125 by running through by the first inner insulation layer 122, and opposite side surface can be bonded to the first internal layer circuit layer 121.According to the preferred embodiment of the present invention, laser drilling machine can be used to be formed to form the first internal layer via hole 123, first internal layer via hole (not shown).In this case, due to the characteristic of laser drilling machine, the first internal layer via hole (not shown) is formed as having tapered cross-section.Therefore, the first internal layer via hole 123 formed by filled with conductive material being entered the first internal layer via hole (not shown) is also formed as having tapered cross-section.That is, a side surface of the first internal layer via hole 123 can be formed as having the diameter larger than the diameter on its opposite side surface.
Second internal layer circuit layer 125 is formed on the first inner insulation layer 122 and the first internal layer via hole 123.Second internal layer circuit layer 125 is bonded to a side surface of the first internal layer via hole 123.
Second inner insulation layer 126 is formed on the first inner insulation layer 122 and the first internal layer via hole 123.
Second internal layer via hole 127 is formed in the second inner insulation layer 126.Second internal layer via hole 127 can make one side surface can be bonded to the 3rd internal layer circuit layer 128 by running through by the second inner insulation layer 126, and opposite side surface can be bonded to the second internal layer circuit layer 125.According to the preferred embodiment of the present invention, with the first internal layer via hole 123 similarly, the second internal layer via hole 127 can use laser drilling machine formed and thus there is conical by its shape.That is, a side surface of the second internal layer via hole 127 can have the diameter larger than the diameter on its opposite side surface.
3rd internal layer circuit layer 128 is formed on the second inner insulation layer 126 and the second internal layer via hole 127.
During the preferred embodiment of the present invention illustrates, inner-layer combination layer 120 comprises dielectric layers and three layers of circuit layer, but those skilled in the art selectively, makes inner-layer combination layer 120 be configured to comprise multiple insulating barrier and circuit layer.
Outer layer combination layer 150 is formed on inner-layer combination layer 120, as the superiors in the combination layer of printed circuit board (PCB) 200.According to the preferred embodiment of the present invention, outer layer combination layer 150 comprises outer insulation 152, outer via hole 151 and outer circuit layer 154.
Outer insulation 152 is formed on the second inner insulation layer 126 and the 3rd internal layer circuit layer 128.Outer insulation 152 can be made up of photosensitive insulating material.This photosensitive insulating material can be any one of positivity type and negativity type.
Outer via hole 151 is formed in outer insulation 152.3rd internal layer circuit layer 128 can be electrically connected to outer circuit layer 154 by running through by outer insulation 152 by outer via hole 151.That is, a side surface of outer via hole 151 can be bonded to outer circuit layer 154, and opposite side surface can be bonded to the 3rd internal layer circuit layer 128.According to the preferred embodiment of the present invention, the cross section of outer via hole 151 has rectangular shape.That is, a side surface of outer via hole 151 and opposite side surface can have identical diameter.According to the preferred embodiment of the present invention, in order to form outer via hole 151, skin-pass hole (not shown) can be formed by enforcement exposure on the outer insulation 152 be made up of photosensitive insulating material and developing process.In this case, skin-pass hole (not shown) is formed as having square-section by exposure and developing process.Thus, by filled with conductive material being entered skin-pass hole (not shown), and its top of polishing and the outer via hole 151 formed also has square-section.
Outer circuit layer 154 is formed on outer insulation 152 and outer via hole 151.Outer circuit layer 154 is bonded to a side surface of outer via hole 151.
According to the preferred embodiment of the present invention, first internal layer circuit layer 121, first internal layer via hole 123, second internal layer circuit layer 125, second internal layer via hole 127, the 3rd internal layer circuit layer 128, outer via hole 151 and outer circuit layer 154 can be made up of the electric conducting material for circuit, as copper, this electric conducting material is used for field of circuit boards.
In addition, the first inner insulation layer 122 and the second inner insulation layer 126 are made up of the composite polymer resin being used as interlayer dielectic usually.
Figure 26 to Figure 30 is the exemplary plot of the method for the manufacture printed circuit board (PCB) represented according to the another kind of preferred implementation of the present invention.
Inner-layer combination layer 120 according to the printed circuit board (PCB) 200 of the another kind of preferred implementation of the present invention can be formed by the method identical with Fig. 2 to Figure 12.Therefore, the method forming inner-layer combination layer 120 illustrates with reference to Fig. 2 to Figure 12, will omit the description to it.
With reference to Figure 26, outer insulation 152 is formed on inner-layer combination layer 120.
According to the preferred embodiment for the present invention, outer insulation 152 can be made up of photosensitive insulating material.Such as, outer insulation 152 can be formed by dry film.
With reference to Figure 27, outer insulation 152 is provided with skin-pass hole 161.
Skin-pass hole 161 can be formed by enforcement exposure on outer insulation 152 and developing process.Therefore, skin-pass hole 161 can be formed as having square-section, and wherein, the upper and lower in skin-pass hole 161 has identical diameter.Because outer via hole (not shown) is formed on the 3rd internal layer circuit layer 128, thus skin-pass hole 161 can be formed on tertiary circuit layer 128.
With reference to Figure 28, be formed with outer via hole 151.
Outer via hole 151 can be formed by the skin-pass hole 161 of plating outer insulation 152.At this, outer via hole 151 can be made up of the electric conducting material for circuit, as copper.The method forming outer via hole 151 is not limited to plating, but can be the method that in field of circuit boards, any one forms circuit or via hole.
The outer via hole 151 formed can be bonded to the 3rd internal layer circuit layer 128.
With reference to Figure 29, the outer via hole 151 of polishing.
As shown in figure 28, outer via hole 151 can be fenced up by the top of outer insulation 152.In addition, although not shown, outer via hole 151 can be formed on the upper surface in skin-pass hole 161 deficiently.Therefore, the top of outer via hole 151 or outer via hole 151 and outer insulation 152 can be smooth by polishing.
Just as described above, can remove by the top of the outer via hole 151 of polishing the micro-hole being formed in outer via hole 151 top.In addition, there is micro-hole in the outer circuit layer (not shown) that can prevent from being formed in outer via hole 151 top by micro-hole of removing on outer via hole 151.
In addition, when outer via hole 151 is formed as plural number, all outer via holes can be formed as having unified height.
With reference to Figure 30, outer insulation 152 and outer via hole 151 are provided with outer circuit layer 154.
Any one method of the formation outer circuit layer that this outer circuit layer 154 can describe by referring to Figure 20 to 24 is formed.
Outer layer combination layer 150 can be formed by above-mentioned formation outer insulation 152, outer via hole 151 and outer circuit layer 154.
According to the method for the manufacture printed circuit board (PCB) of the another kind of preferred implementation of the present invention, as shown in figure 30, the printed circuit board (PCB) 200 comprising inner-layer combination layer 120 and outer layer combination layer 150 can be formed, wherein, inner-layer combination layer 120 comprises the internal layer via hole with tapered cross-section, and outer layer combination layer 150 comprises the outer via hole with square-section.In addition, the outer insulation 152 of outer layer combination layer 150 can be made up of photosensitive insulating material.
The method of printed circuit board (PCB) and manufacture printed circuit board (PCB) according to the preferred embodiment of the present invention, method for drilling holes is applied to inner-layer combination layer, exposure and developing process and glossing are applied to outer layer combination layer, thus remove micro-hole necessarily, therefore, solve operational issue and nick problem simultaneously.In addition, by using the outer insulation be made up of photosensitive insulating material, the number of processes forming outer layer combination layer reduces, thus reduces cost and time.
The preferred embodiment for the present invention describes masking method and SAP method by way of example, using the method as formation internal layer circuit layer and outer circuit layer, but is not limited to this.Internal layer circuit layer and outer circuit layer can also be formed by the known any means of field of circuit boards.
The method of printed circuit board (PCB) and manufacture printed circuit board (PCB) according to the preferred embodiment of the present invention, when outer via hole is formed, can remove micro-hole by using exposure and developing process and glossing.
The method of printed circuit board (PCB) and manufacture printed circuit board (PCB) according to the preferred embodiment of the present invention, when the internal layer via hole of the inner-layer combination layer with sandwich construction is formed, can reduce operational issue by using laser drill.
The method of printed circuit board (PCB) and manufacture printed circuit board (PCB) according to the preferred embodiment of the present invention, the minimizing of operational issue and the elimination in micro-hole can solve simultaneously.
Although for showing that object discloses embodiments of the present invention, should be understood that, the present invention is not limited to these execution modes, and when not departing from spirit of the present invention, those skilled in the art can make various amendment, interpolation and replacement.
Correspondingly, any and all modifications, modification or equivalence arrange all should be thought of as and are included in protection scope of the present invention, and concrete protection range of the present invention is disclosed by appended claims.
Claims (21)
1. a printed circuit board (PCB), comprising:
Substrate;
Inner-layer combination layer, this inner-layer combination layer is formed on the substrate and comprises the first internal layer circuit layer, the second internal layer circuit layer, inner insulation layer and have the internal layer via hole of tapered cross-section; And
Outer layer combination layer, this outer layer combination layer to be formed on described inner-layer combination layer and to comprise outer circuit layer, outer insulation and have the outer via hole of square-section.
2. printed circuit board (PCB) according to claim 1, wherein, described inner-layer combination layer comprises at least one in described first internal layer circuit layer, the second internal layer circuit layer, inner insulation layer and internal layer via hole.
3. printed circuit board (PCB) according to claim 1, wherein, described inner-layer combination layer comprises:
First internal layer circuit layer, this first internal layer circuit layer is formed on the substrate;
Inner insulation layer, this inner insulation layer is formed on described substrate and described first internal layer circuit layer;
Internal layer via hole, this internal layer via hole is formed on described first internal layer circuit layer, and is formed as running through by described inner insulation layer; And
Second internal layer circuit layer, this second internal layer circuit layer is formed on described inner insulation layer and described internal layer via hole.
4. printed circuit board (PCB) according to claim 1, wherein, described outer layer combination layer comprises:
Outer insulation, this outer insulation is formed on described inner-layer combination layer;
Outer via hole, this outer via hole is formed on described inner-layer combination layer, and is formed as running through by described outer insulation; And
Outer circuit layer, this outer circuit layer is formed on described outer insulation and described outer via hole.
5. printed circuit board (PCB) according to claim 1, wherein, described outer insulation is made up of photosensitive insulating material.
6. printed circuit board (PCB) according to claim 1, wherein, two surfaces of described substrate is all formed with described inner-layer combination layer and described outer layer combination layer.
7. manufacture a method for printed circuit board (PCB), comprising:
Prepared substrate;
Form inner-layer combination layer on the substrate, this inner-layer combination layer comprises the first internal layer circuit layer, the second internal layer circuit layer, inner insulation layer and has the internal layer via hole of tapered cross-section; And
Described inner-layer combination layer forms outer layer combination layer, and this outer layer combination layer comprises outer circuit layer, outer insulation and has the outer via hole of square-section.
8. method according to claim 7, wherein, described inner-layer combination layer comprises at least one in described first internal layer circuit layer, the second internal layer circuit layer, inner insulation layer and internal layer via hole.
9. method according to claim 7, wherein, the step forming described inner-layer combination layer comprises:
Form described first internal layer circuit layer on the substrate;
Described first internal layer circuit layer forms described inner insulation layer; And
Described inner insulation layer is formed described internal layer via hole and described second internal layer circuit layer.
10. method according to claim 9, wherein, the step forming described internal layer via hole and described second internal layer circuit layer comprises:
In described inner insulation layer, the internal layer via hole with tapered cross-section is formed by using laser drilling machine;
Inner-layer conducting layer and described internal layer via hole is formed by forming electric conducting material in described inner insulation layer and described internal layer via hole;
Described inner-layer conducting layer forms the first body against corrosion, and this first body passivation against corrosion is wherein formed with the region of described second internal layer circuit layer;
Described second internal layer circuit layer is formed by the described inner-layer conducting layer of described first body exposure against corrosion by etching; And
Remove described first body against corrosion.
11. methods according to claim 9, wherein, the step forming described internal layer via hole and described second internal layer circuit layer comprises:
In described inner insulation layer, the internal layer via hole with tapered cross-section is formed by using laser drilling machine;
Described inner insulation layer is formed the first anti-plate body, and this first anti-plate body makes the region being wherein formed with described internal layer via hole and described second internal layer circuit layer expose;
Described internal layer via hole and described second internal layer circuit layer is formed by being formed by the described internal layer via hole of described first anti-plate body exposure and described inner insulation layer; And
Remove described first anti-plate body.
12. methods according to claim 7, wherein, the step forming described outer layer combination layer comprises:
Described inner-layer combination layer forms described outer via hole;
Form outer insulation, this outer insulation is formed on described inner-layer combination layer, and described outer via hole embeds in described outer insulation; And
Described outer insulation and described outer via hole form described outer circuit layer.
13. methods according to claim 12, wherein, the step forming described outer via hole comprises:
Described inner-layer combination layer forms photosensitive body against corrosion;
By exposing and the described photosensitive body against corrosion that develops, forming the opening with square-section and also exposing the region being wherein formed with described outer via hole;
Described outer via hole is formed by forming insulating material in described opening;
The top of polishing and smooth described outer via hole; And
Remove described photosensitive body against corrosion.
14. methods according to claim 12, the method also comprises: after the described outer insulation of formation, polishing smooth described outer insulation and described outer via hole.
15. methods according to claim 12, wherein, the step forming described outer circuit layer comprises:
Outer layer conductive layer is formed by forming insulating material in described outer insulation and described outer via hole;
Described outer layer conductive layer is formed the second body against corrosion is wherein formed with described outer circuit layer region with passivation;
Described outer circuit layer is formed by the described outer layer conductive layer of described second body exposure against corrosion by etching; And
Remove described second body against corrosion.
16. methods according to claim 12, wherein, the step forming described outer circuit layer comprises:
In described outer via hole, form the second anti-plate body, this second anti-plate body makes described outer insulation and is wherein formed with the region exposure of described outer circuit layer;
Described outer circuit layer is formed by forming electric conducting material in the described outer insulation exposed by described second anti-plate body and described outer via hole; And
Remove described second anti-plate body.
17. methods according to claim 7, wherein, the step forming described outer layer combination layer comprises:
Described inner-layer combination layer is formed the described outer insulation be made up of photosensitive insulating material;
Form described outer via hole, this outer via hole is formed as running through by described outer insulation; And
Described outer insulation and described outer via hole form described outer circuit layer.
18. methods according to claim 17, wherein, the step forming described outer via hole comprises:
By exposing and the described outer insulation and form skin-pass hole of developing, this skin-pass hole has square-section and the region making wherein to be formed with described outer via hole exposes;
Described outer via hole is formed by forming electric conducting material in described skin-pass hole; And
Polishing the top of smooth described outer insulation and described outer via hole.
19. methods according to claim 17, wherein, the step forming described outer circuit layer comprises:
Outer layer conductive layer is formed by forming insulating material in described outer insulation and described outer via hole;
Described outer layer conductive layer is formed the second body against corrosion is wherein formed with described outer circuit layer region with passivation;
Described outer circuit layer is formed by the described outer layer conductive layer of described second body exposure against corrosion by etching; And
Remove described second body against corrosion.
20. methods according to claim 17, wherein, the step forming described outer circuit layer comprises:
Described outer via hole is formed the second anti-plate body, and this second anti-plate body makes described outer insulation and is wherein formed with the region exposure of described outer circuit layer;
Outer circuit layer is formed by forming electric conducting material in the described outer insulation exposed by described second anti-plate body and described outer via hole; And
Remove described second anti-plate body.
21. methods according to claim 7, wherein, two surfaces of described substrate are all formed with described inner-layer combination layer and described outer layer combination layer.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR10-2013-0111110 | 2013-09-16 | ||
| KR1020130111110A KR101516078B1 (en) | 2013-09-16 | 2013-09-16 | Printed circuit board and method of mamufacturing the same |
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| Publication Number | Publication Date |
|---|---|
| CN104470195A true CN104470195A (en) | 2015-03-25 |
| CN104470195B CN104470195B (en) | 2017-09-01 |
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| CN201410471805.4A Active CN104470195B (en) | 2013-09-16 | 2014-09-16 | Printed circuit board and manufacturing methods |
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| Country | Link |
|---|---|
| US (1) | US20150075845A1 (en) |
| KR (1) | KR101516078B1 (en) |
| CN (1) | CN104470195B (en) |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110633021A (en) * | 2019-08-13 | 2019-12-31 | 武汉华星光电半导体显示技术有限公司 | Touch screen and manufacturing method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| JP6652190B2 (en) * | 2016-03-28 | 2020-02-19 | アイシン・エィ・ダブリュ株式会社 | Method of manufacturing rotor |
| CN108738379B (en) * | 2017-02-22 | 2020-02-21 | 华为技术有限公司 | Metallized hole forming method, circuit board manufacturing method and circuit board |
| KR102599592B1 (en) | 2018-08-30 | 2023-11-07 | 솔루스첨단소재 주식회사 | Organic compound and organic electroluminescent device using the same |
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|---|---|---|---|---|
| US20090229868A1 (en) * | 2008-03-12 | 2009-09-17 | Ibiden Co., Ltd. | Printed wiring board with reinforced insulation layer and manufacturing method thereof |
| CN102111968A (en) * | 2009-12-28 | 2011-06-29 | 日本特殊陶业株式会社 | Method of manufacturing multilayer wiring substrate, and multilayer wiring substrate |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5807787A (en) * | 1996-12-02 | 1998-09-15 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method for reducing surface leakage current on semiconductor intergrated circuits during polyimide passivation |
| US5723385A (en) * | 1996-12-16 | 1998-03-03 | Taiwan Semiconductor Manufacturing Company, Ltd | Wafer edge seal ring structure |
| US6127721A (en) * | 1997-09-30 | 2000-10-03 | Siemens Aktiengesellschaft | Soft passivation layer in semiconductor fabrication |
| WO2008053833A1 (en) * | 2006-11-03 | 2008-05-08 | Ibiden Co., Ltd. | Multilayer printed wiring board |
| JP2012054295A (en) * | 2010-08-31 | 2012-03-15 | Kyocer Slc Technologies Corp | Wiring board and method of manufacturing the same |
| TWI495051B (en) * | 2011-07-08 | 2015-08-01 | Unimicron Technology Corp | Coreless package substrate and fabrication method thereof |
| JP5877673B2 (en) * | 2011-09-07 | 2016-03-08 | 新光電気工業株式会社 | Wiring substrate, manufacturing method thereof, and semiconductor package |
-
2013
- 2013-09-16 KR KR1020130111110A patent/KR101516078B1/en active IP Right Grant
-
2014
- 2014-09-12 US US14/485,534 patent/US20150075845A1/en not_active Abandoned
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090229868A1 (en) * | 2008-03-12 | 2009-09-17 | Ibiden Co., Ltd. | Printed wiring board with reinforced insulation layer and manufacturing method thereof |
| CN102111968A (en) * | 2009-12-28 | 2011-06-29 | 日本特殊陶业株式会社 | Method of manufacturing multilayer wiring substrate, and multilayer wiring substrate |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110633021A (en) * | 2019-08-13 | 2019-12-31 | 武汉华星光电半导体显示技术有限公司 | Touch screen and manufacturing method thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| CN104470195B (en) | 2017-09-01 |
| US20150075845A1 (en) | 2015-03-19 |
| KR101516078B1 (en) | 2015-04-29 |
| KR20150031649A (en) | 2015-03-25 |
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