KR20160138753A - Printed circuit board and method of manufacturing the same - Google Patents

Abstract

A printed circuit board according to the present invention includes: a core layer; an upper insulating layer formed between a circuit layer above the core layer and another circuit layer; and a lower insulating layer formed between a circuit layer below the core layer and another circuit layer, wherein a curing start temperature is different depending on an insulating material of the upper insulating layer and the lower insulating layer.

Description

Technical Field [0001] The present invention relates to a printed circuit board and a method of manufacturing the same,

The present invention relates to a printed circuit board and a manufacturing method thereof.

There is a demand for a technology in which electronic components such as an IC, a semiconductor chip, an active device and a passive device are inserted into a substrate in response to a technical requirement of the electronic devices in the IT field including a mobile phone, In recent years, a technique has been developed in which components are embedded in a substrate in various ways.

A general printed circuit board (PCB) is formed by printing a circuit line pattern on a electrically insulating substrate with a conductive material such as copper, and refers to a substrate immediately before mounting electronic components. In other words, a circuit board on which a mounting position of each component is determined and a circuit pattern connecting the components is printed on the surface of the flat plate and fixed is fixed in order to densely mount many kinds of electronic devices on a flat plate.

Although the PCB substrate is thin, co-planarity of a certain level of the substrate must be ensured in order to perform the post-process of mounting the FCBGA and BGA substrates on the HDI substrate.

US Patent Publication No. US 2008-0099230

One aspect (or perspective) is to provide a printed circuit board that minimizes the warp page by forming the curing start temperature of the build-up insulating layer formed on the substrate to be different.

Another aspect of the present invention is to provide a method of manufacturing a printed circuit board in which the curing start temperature of the build-up insulating layer formed on the substrate is made different so as to minimize warpage.

A printed circuit board according to one embodiment includes a core layer; An upper insulating layer formed between the circuit layer and the circuit layer above the core layer; And a lower insulating layer formed between the circuit layer and the circuit layer under the core layer. The hardening starting temperature is different according to the insulating material between the upper insulating layer and the lower insulating layer.

According to another aspect of the present invention, there is provided a method of manufacturing a printed circuit board, comprising: forming a circuit layer on a top surface and a bottom surface of a core layer; Forming an upper insulating layer and a lower insulating layer having different hardening start temperatures at upper and lower portions of the core layer on which the circuit layer is formed; And a step of curing the upper insulating layer and the lower insulating layer.

The features and advantages of the present invention will become more apparent from the following detailed description based on the accompanying drawings.

Prior to that, terms and words used in the present specification and claims should not be construed in a conventional and dictionary sense, and the inventor may properly define the concept of the term in order to best explain its invention It should be construed as meaning and concept consistent with the technical idea of the present invention.

1 is a cross-sectional view of a printed circuit board according to a first embodiment of the present invention.
2 is a cross-sectional view of a printed circuit board according to a second embodiment of the present invention.
3A to 3B are process sectional views of a method of manufacturing a printed circuit board according to a first embodiment of the present invention.

BRIEF DESCRIPTION OF THE DRAWINGS The objectives, particular advantages and novel features of the invention will become more apparent from the following detailed description and examples taken in conjunction with the accompanying drawings. It should be noted that, in the present specification, the reference numerals are added to the constituent elements of the drawings, and the same constituent elements have the same numerical numbers as much as possible even if they are displayed on different drawings. In the following description, well-known functions or constructions are not described in detail since they would obscure the invention in unnecessary detail. In this specification, the terms first, second, etc. are used to distinguish one element from another, and the element is not limited by the terms. In the accompanying drawings, some of the elements are exaggerated, omitted or schematically shown, and the size of each element does not entirely reflect the actual size.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

Printed circuit board

First, a printed circuit board according to a first embodiment of the present invention will be specifically described with reference to the drawings. Here, reference numerals not shown in the drawings to be referred to may be reference numerals in other drawings showing the same configuration.

1 is a cross-sectional view of a printed circuit board according to a first embodiment of the present invention. An upper insulating layer 130 and 150 formed between the circuit layer 120 and the circuit layer 160 on the core layer 110 and the circuit layer 160, A lower insulating layer 135 and 155 formed between the circuit layers 120 and 145 and the circuit layer 165 under the lower layer 110 and a solder resist layer 170 formed on the upper and lower outermost circuit layers 160 and 165 .

The core layer 110 may be formed of an insulating layer having rigidity or a copper clad laminate (CCL) having copper foil laminated on both sides of an insulating layer.

Particularly, the copper-clad laminate is a laminated board in which a copper foil is laminated on an insulating layer with an original plate on which a printed circuit board is to be manufactured, and a glass / epoxy copper laminate, a heat resistant resin copper clad laminate, a paper / phenol copper clad laminate, a high frequency copper clad laminate, Copper clad laminate (polyimide film) and composite copper clad laminate. However, glass / epoxy copper clad laminate is mainly used for manufacturing double-sided printed circuit boards and multilayer printed circuit boards.

The glass / epoxy copper clad laminate is made of reinforcing base material and copper foil in which epoxy resin (epoxy resin) is infiltrated into glass fiber or organic fiber. The glass / epoxy copper clad laminate is classified according to the reinforcing base material. Generally, the FR-1 to FR-5 are graded according to the reinforcing base material and the heat resistance according to the standards established by NEMA (National Electrical Manufacturers Association) have. Of these grades, FR-4 is the most commonly used, but in recent years, the demand for FR-5, which has improved the glass transition temperature (Tg) characteristics of the resin, is also increasing.

The core layer 110 has a hole penetrating therethrough in the thickness direction, and the circuit layer 120 is formed on the outer wall layer in the hole. Then, the inside of the hole is filled with the insulating material 125.

A plurality of circuit layers 120, 40, 145, 160, and 165 formed on upper and lower portions of the core layer 110 are formed by stacking a metal material layer and then selectively removing a metal material layer using an etching resist, An additive method using copper plating and electrolytic copper plating, a Semi-Additive Process (SAP), a Modified Semi Additive Process (MSAP), and a Semi Additive Process (SAP), and the detailed description thereof will be omitted here.

The upper insulating layers 130 and 150 are formed of a material having a lower curing start temperature than the lower insulating layers 135 and 155. The upper insulating layers 130 and 150 and the lower insulating layers 135 and 155 may be formed of the same material, , And the curing agent or the curing initiator is formed in a different manner. The upper insulating layers 130 and 150 and the lower insulating layers 135 and 155 are formed as buildup layers in which at least two insulating layers and circuit layers are repeatedly formed. That is, a build-up insulating layer and a build-up circuit layer may be further formed in the basic structure of 2L to constitute a buildup layer from 2L? 4L? 6L? 8L? 10L. Here, the build-up layer is not limited to the embodiment but may be additionally formed as necessary.

More specifically, the upper insulating layers 130 and 150 and the lower insulating layers 135 and 155 may be thermosetting insulating materials, ceramics, organic-inorganic composite materials, or glass fiber impregnation. In the case of including a polymer resin, FR- (Bismaleimide Triazine), and ABF (Ajinomoto Build up Film). Alternatively, the resin may include a polyimide resin, but is not limited thereto.

Then, a curing agent or a curing initiator having a different composition is added to the above-mentioned insulating material so that the curing starting temperature is made different. At this time, a curing accelerator or a curing initiator is formed in the upper insulating layers 130 and 150 so that the curing start temperature is lower than that of the lower insulating layers 135 and 155.

Examples of the curing accelerator or curing initiator include active ester curing accelerators, cyanate ester curing accelerators, phenol-based curing accelerators, naphthol-based curing accelerators, and benzoxazine-based curing accelerators. Among them, at least one selected from active ester-based curing accelerators, cyanate ester-based curing accelerators, phenol-based curing accelerators and naphthol-based curing accelerators may be used alone or in combination of two or more.

By setting the curing start temperature of the upper insulating layers 130 and 150 of the build-up insulating layer to be lower than the curing start temperature of the lower insulating layer about the core layer 110, the curing is first started so that the upper and lower The warpage in which the hardening shrinkage of the steel sheet is different is reduced. That is, contraction during the curing process of the lower insulating layer starts later at a high temperature, so that shrinkage of the insulating material due to the curing process of the upper insulating layers 130 and 150 and the lower insulating layers 135 and 155 of the core layer 110 is balanced It is possible to reduce the page size.

A solder resist layer 170 having an opening for exposing the outermost circuit layer is further formed on the outermost layer of the buildup layer.

2 is a sectional view of a printed circuit board according to a second embodiment of the present invention. An upper insulating layer 230 and 250 formed between the circuit layer 220 and the circuit layer 260 on the core layer 210 and the circuit layer 260, A lower insulating layer 235 and 255 formed between the circuit layers 220 and 245 and the circuit layer 265 under the lower insulating layer 210 and formed to be thicker than the upper insulating layer and the upper and lower outermost circuit layers 260 and 265, And a solder resist layer 270 formed on the substrate.

At this time, a curing accelerator or a curing initiator is added and added to the same insulating material of the upper insulating layers 230 and 250 and the lower insulating layers 235 and 255 to form a lower insulating layer It is possible to reduce the warpage of the substrate due to the shrinkage of the insulating material than that of the insulating layer of the same thickness. Here, the description overlapping with the embodiment of FIG. 1 will be omitted with reference to FIG.

Manufacturing method of printed circuit board

3A to 3D are process cross-sectional views illustrating a method of manufacturing a printed circuit board according to a first embodiment of the present invention.

  Hereinafter, the manufacturing method will be described in detail in order. At this time, the above-mentioned printed circuit board and Fig. 1 will be referred to, and thus redundant explanations can be omitted.

First, as shown in FIG. 3A, a circuit pattern is formed on the core layer 110 on which the copper clad laminate (CCL) is formed on both sides. Here, the core layer 110 is drilled to form through holes, and the copper clad laminate is selectively removed to form a circuit pattern. At this time, it is preferable that the core layer 110 is formed with a through hole using a YAG laser or a CO 2 laser.

After the circuit pattern is formed on the inner wall of the through hole of the core layer, the through hole is filled with an insulating material and cured. At this time, it is preferable that the circuit layer on the inner wall of the through hole is formed by an additive method or an SAP (Semi-Additive Process) method using a subtractive method, electroless copper plating, and electrolytic copper plating.

3B, an upper insulating layer 130 and a lower insulating layer 135 having different curing start temperatures are formed on the upper and lower portions of the core layer 110 on which the circuit layer 120 is formed do.

The upper insulating layer 130 is formed of a material having a curing start temperature lower than that of the lower insulating layer 135. At this time, the insulating materials of the upper insulating layers 130 and 150 and the lower insulating layers 135 and 155 are formed of the same material , A curing agent or a curing initiator.

More specifically, the upper insulating layers 130 and 150 and the lower insulating layers 135 and 155 may be thermosetting insulating materials, ceramics, organic-inorganic composite materials, or glass fiber impregnation. In the case of including a polymer resin, FR- (Bismaleimide Triazine), and ABF (Ajinomoto Build up Film). Alternatively, the resin may include a polyimide resin, but is not limited thereto.

Then, a curing agent or a curing initiator having a different composition is added to the above-mentioned insulating material so that the curing starting temperature is made different. At this time, a curing accelerator or a curing initiator is formed in the upper insulating layers 130 and 150 so that the curing start temperature is lower than that of the lower insulating layers 135 and 155.

Examples of the curing accelerator or curing initiator include active ester curing accelerators, cyanate ester curing accelerators, phenol-based curing accelerators, naphthol-based curing accelerators, and benzoxazine-based curing accelerators. Among them, at least one selected from active ester-based curing accelerators, cyanate ester-based curing accelerators, phenol-based curing accelerators and naphthol-based curing accelerators may be used alone or in combination of two or more.

Then, as shown in FIG. 3C, the upper insulating layer and the lower insulating layer are cured.

More specifically, when the curing start temperature of the upper insulating layer 130 is lowered below the curing start temperature of the lower insulating layer 135 about the core layer 110, the curing starts first, The shrinkage during the curing process of the lower insulating layer starts later at a high temperature so that the upper insulating layer 130 and the lower insulating layer 135 of the core layer 110 ) Can be balanced against the shrinkage of the insulating material by the curing process of the insulating layer.

Next, as shown in FIG. 3D, the upper insulating layer and the lower insulating layer are formed as buildup layers in which at least two or more insulating layers and circuit layers are repeatedly formed, and then the upper insulating layer and the lower insulating layer A solder resist layer is formed on the circuit layer formed at the outermost portion of the solder resist layer.

More specifically, a plurality of circuit layers 120, 40, 145, 160, and 165 formed on the upper and lower portions of the core layer 110 are formed by stacking a metal material layer and then removing the metal material layer selectively using an etching resist. Additive process using an electroless copper plating and electrolytic copper plating, a semi-additive process (SAP), a modified semi- additive process (MSAP), and a semi- additive process (SAP) Is omitted.

The upper insulating layers 130 and 150 and the lower insulating layers 135 and 155 are formed as buildup layers in which at least two insulating layers and circuit layers are repeatedly formed. That is, a build-up insulating layer and a build-up circuit layer may be further formed in the basic structure of 2L to constitute a buildup layer from 2L? 4L? 6L? 8L? 10L. Here, the build-up layer is not limited to the embodiment but may be additionally formed as necessary.

The curing start temperature of the upper insulating layers 130 and 150 is made lower than the curing start temperature of the lower insulating layer as a build-up insulating layer around the core layer 110, The warpage in which the hardening shrinkage of the steel sheet is different is reduced. That is, contraction during the curing process of the lower insulating layer starts later at a high temperature, so that shrinkage of the insulating material due to the curing process of the upper insulating layers 130 and 150 and the lower insulating layers 135 and 155 of the core layer 110 is balanced It is possible to reduce the page size.

A solder resist layer 170 having openings is formed on the exposed surfaces of the outermost upper insulating layer and the lower insulating layers 150 and 155. More preferably, it includes a step of forming a dry film (not shown) as an etching resist on the solder resist layer 170 for forming an opening, and then patterning the dry film to perform exposure and development. Specifically, it is as follows. That is, the dry film is formed through a laminator after the adhesion of the dry film is enhanced, and then the dry film is selectively cured by exposure to light, and the openings are patterned by dissolving only the portions not cured by the developer.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the same is by way of illustration and example only and is not to be construed as limiting the present invention. It is obvious that the modification or improvement is possible.

It will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.

110, 210 --- core layer
120, 220 --- circuit layer
130, 230 --- upper insulating layer
140, 240 --- Lower insulating layer
140, 160, 240, 260 --- Buildup upper circuit layer
145, 165, 245, 265 --- Build-up sub circuit layer
170, 270 --- solder resist layer

Claims (14)

A core layer;
An upper insulating layer formed between the circuit layer and the circuit layer above the core layer; And
And a lower insulating layer formed between the circuit layer and the circuit layer under the core layer,
Wherein a curing start temperature is different according to an insulating material between the upper insulating layer and the lower insulating layer.
The method according to claim 1,
Wherein the upper insulating layer is formed to be lower than a curing start temperature of the lower insulating layer.
The method of claim 2,
Wherein the composition ratio of the curing initiator or the curing accelerator in the upper insulating layer and the lower insulating layer is varied to adjust the curing start temperature.
The method according to claim 1,
Wherein a thickness of the lower insulating layer is larger than a thickness of the upper insulating layer.
The method according to claim 1,
Wherein the upper insulating layer and the lower insulating layer are formed of a build-up layer in which at least two insulating layers and circuit layers are repeatedly formed.
The method according to claim 1,
And a solder resist layer formed on the uppermost and lower outermost circuit layers of the core layer.
The method according to claim 1,
A hole penetrating the core layer is formed in the core layer, and a via hole penetrating the upper insulating layer and the lower insulating layer is formed.
Forming a circuit layer on the top and bottom surfaces of the core layer;
Forming an upper insulating layer and a lower insulating layer having different hardening start temperatures at upper and lower portions of the core layer on which the circuit layer is formed; And
And curing the upper insulating layer and the lower insulating layer.
The method of claim 8,
Wherein the upper insulating layer is formed to be lower than a curing start temperature of the lower insulating layer.
The method of claim 9,
Wherein the composition ratio of the curing initiator or the curing accelerator in the upper insulating layer and the lower insulating layer is varied to adjust the curing start temperature.
The method of claim 8,
Wherein a thickness of the lower insulating layer is greater than a thickness of the upper insulating layer.
The method of claim 8,
Wherein the upper insulating layer and the lower insulating layer are formed of a build-up layer in which at least two insulating layers and circuit layers are repeatedly formed.
The method of claim 8,
And forming a solder resist layer on the upper and lower outermost circuit layers.
The method of claim 8,
Wherein a hole is formed in the core layer to penetrate the core layer, and vias are formed through the upper insulating layer and the lower insulating layer.

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