CN104409494B - Complex field plate power device based on right-angled source field plate and right-angled drain field plate - Google Patents
Complex field plate power device based on right-angled source field plate and right-angled drain field plate Download PDFInfo
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/402—Field plates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41725—Source or drain electrodes for field effect devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66431—Unipolar field-effect transistors with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
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- Microelectronics & Electronic Packaging (AREA)
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- Manufacturing & Machinery (AREA)
- Junction Field-Effect Transistors (AREA)
Abstract
The invention discloses a complex field plate power device based on a right-angled source field plate and a right-angled drain field plate. The complex field plate power device comprises a substrate (1), a transition layer (2), a barrier layer (3), a source electrode (4), a Walter Schottky drain electrode (5), a table top (6), a gate electrode (7), a passivation layer (8) and a protective layer (13). A gate groove (9) and a drain groove (10) are etched in the passivation layer; the right-angled source field plate (11) and the right-angled drain field plate (12) are deposited between the passivation layer (8) and the protective layer (13); the right-angled source field plate is electrically connected with the source electrode and the lower end is completely filled in a source groove; the right-angled drain field plate is electrically connected with the Walter Schottky drain electrode and the lower end is completely filled in a drain groove; the edge of the right-angled source field plate close to one side of the gate electrode aligns with that of the source groove close to one side of the gate electrode; and the edge of the right-angled drain field plate close to one side of the Walter Schottky drain electrode aligns with that of the drain groove close to one side of the Walter Schottky drain electrode. The complex field plate power device has the advantages of simple manufacturing process, good forward characteristics and reverse characteristics and high rate of finished products and can be used as a switch device.
Description
Technical field
The invention belongs to microelectronics technology, is related to semiconductor device, right angle source field plate and right angle leakage are based particularly on
The composite field plate power device of field plate, can be used as the basic device of power electronic system.
Technical background
Power semiconductor is the critical elements of power electronic system, is to carry out electric treatable effective tool.In recent years
Come, with becoming increasingly conspicuous for the energy and environmental problem, research and development novel high-performance, low-loss power device become raising electric energy profit
With one of rate, energy saving, the effective way of alleviating energy crisis.However, in power device research, at a high speed, high pressure with it is low
Serious restricting relation is there is between conducting resistance, rationally, to effectively improve this restricting relation be to improve device globality
The key of energy.As market constantly proposes the requirement of higher efficiency, smaller volume, higher frequency, traditional Si base to power system
Semiconductor power device performance has approached its theoretical limit.In order to be able to further reducing chip area, improving operating frequency, improve
Operating temperature, reduction conducting resistance, raising breakdown voltage, reduction machine volume, raising overall efficiency, with gallium nitride as representative
Semiconductor material with wide forbidden band, drifts about by the electronics saturation of its bigger energy gap, higher critical breakdown electric field and Geng Gao
Speed, and the outstanding advantages such as stable chemical performance, high temperature resistant, radioprotective, show one's talent in terms of high performance power device is prepared,
Application potential is huge.Especially with the HEMT of GaN base heterojunction structure, i.e. GaN base HEMT device, more
It is, because of characteristics such as its low on-resistance, senior engineer's working frequencies, electronics of future generation to be met more high-power to power device, higher
The requirement of frequency, smaller volume and more severe hot operation, has wide and special application prospect in economy and military field.
However, there is inherent shortcoming in conventional GaN base HEMT device structure, device channel electric field intensity can be caused in deformity
, especially there is high peak electric field near vicinity in device grids in distribution.This causes actual GaN base HEMT device to exist
In the case of applying positive drain voltage, i.e., positive OFF state, forward break down voltage be often far below theoretical eapectation, and there is electric current
The integrity problems such as avalanche, inverse piezoelectric effect, seriously constrain application and development in field of power electronics.In order to solve with
Upper problem, domestic and international researchers propose numerous methods, and field plate structure is that wherein effect is the most notable, is most widely used
One kind.Field plate structure is successfully applied to GaN base HEMT power device by N.Q.Zhang of U.S. UCSB in 2000 et al. first
In, overlapping gate power device is developed, saturation output current is 500mA/mm, and up to 570V, this is at that time to breakdown voltage
Reported breakdown voltage highest GaN device, referring to High breakdown GaN HEMT with overlapping gate
structure,IEEE Electron Device Letters,Vol.21,No.9,pp.421-423,2000.Subsequently, various countries
Research institution expands one after another the research work of correlation, and the U.S. and Japan are the main leaders in the field.It is main in the U.S.
If UCSB, Nan Ka university, Cornell University and famous IR companies of power electronic devices manufacturer etc. are engaged in the research.
Japan is relative to start late, but their work to this respect are paid much attention to, fund input great efforts, and it is numerous to be engaged in mechanism, bag
Include:The major companies such as Toshiba, Furukawa, Panasonic, Toyota and Fuji.With going deep into for research, researchers have found correspondingly to increase field
Plate length, can improve device electric breakdown strength.But the increase of field plate length can make field plate efficiency, i.e. breakdown voltage longer than field plate
Degree, constantly reduces, that is, field plate improves the ability of device electric breakdown strength as the increase of field plate length gradually tends to saturation, joins
See Enhancement of breakdown voltage in AlGaN/GaN high electron mobility
transistors using a field plate,IEEE Transactions on Electron Devices,Vol.48,
No.8, pp.1515-1521,2001, and Development and characteristic analysis of a
field-plated Al2O3/AlInN/GaN MOS HEMT,Chinese Physics B,Vol.20,No.1,
pp.0172031-0172035,2011.Therefore, in order to further improve device electric breakdown strength, while field plate efficiency is taken into account, 2008
Wataru Saito of year Toshiba Corp et al. have developed bilayer using the double-deck field plate structure of grid field plate and source field plate
Field plate insulated-gate type GaN base HEMT device, the device electric breakdown strength is up to 940V, and maximum output current is up to 4.4A, referring to A
130-W Boost Converter Operation Using a High-Voltage GaN-HEMT,IEEE Electron
Device Letters,Vol.29,No.1,pp.8-10,2008.And this double-deck field plate structure has become currently in the world
For improving GaN base power device breakdown characteristics, the main flow field plate techniques of device overall performance are improved.
In actual applications, researchers also have found to be permitted in electric automobile, power management system, S power-like amplifiers etc.
In many technical fields, power device is generally required with very strong reverse blocking, i.e., reverse OFF state, ability, that is, wish device
Part has very high negative drain breakdown voltage, i.e. breakdown reverse voltage under OFF state.And common monolayer or double-deck field plate are all
It is to be connected with grid or source electrode, therefore when device drain applies low-down backward voltage, device grids positive will be opened,
And by very big gate current, so as to cause component failure.Therefore, in order to improve the reverse blocking capability of power device, 2009
Eldad Bahat-Treidel et al. propose a kind of power device of employing Schottky drain, referring to AlGaN/GaN HEMT
With Integrated Recessed Schottky-Drain Protection Diode,IEEE Electron Device
Letters,Vol.30,No.9,pp.901-903,2009.However, Schottky drain is in terms of device reverse blocking voltage is improved
Ability it is extremely limited, therefore in order to more effectively improve the reverse blocking capability of power device, researchers are by field plate techniques
Device drain has been incorporated into, leakage field plate structure has been defined.Therefore, in order to take into account the forward and reverse blocking ability of power device,
Wataru Saito in 2005 et al. propose the composite field plate power device of a kind of employing source field plate and leakage field plate, that is,
Source-leakage composite field plate power device, referring to Design optimization of high breakdown voltage
AlGaN-GaN power HEMT on an insulating substrate for RONA-VB tradeoff
characteristics,IEEE Transactions on Electron Devices,Vol.52,No.1,pp.106-111,
2005.However, due to monolayer source field plate and leakage field plate improve device electric breakdown strength in terms of ability it is still limited, therefore will
Double-deck field plate structure is in combination with source-leakage composite field plate power device, that is, the source field plate using double-deck field plate structure and double
Layer field plate structure leakage field plate and constitute source-leakage composite double layer field plate power device, it is possible to achieve device forward and reverse punctures
The further lifting of voltage, this has larger application potential.However, the complex process of double-deck field plate HEMT power devices, system
The making for causing Ben Genggao, each layer of field plate is required for the processing steps such as photoetching, deposit metal, deposit dielectric passivation.And will
Optimize under each layer field plate dielectric material thickness to realize that breakdown voltage is maximized, it is necessary to carry out loaded down with trivial details process debugging and optimization,
Therefore the difficulty of device manufacture is considerably increased, the yield rate of device is reduced.
The content of the invention
It is an object of the invention to overcome the shortcomings of above-mentioned prior art, there is provided a kind of simple structure, forward and reverse hit
The high composite field plate power device that field plate is leaked based on right angle source field plate and right angle of high voltage, field plate efficiency high and reliability is worn,
To reduce element manufacturing difficulty, improve the forward breakdown characteristic and reverse breakdown characteristics of device, improve device yield.
For achieving the above object, the device architecture that the present invention is provided is different using GaN base semiconductor material with wide forbidden band composition
Matter junction structure, includes from bottom to top:Substrate, transition zone, barrier layer, passivation layer and protective layer, deposit active above barrier layer
Table top is carved with pole, Schottky drain and grid, the side of barrier layer, and land depth is more than barrier layer thickness, it is characterised in that:
Source slot and bakie, and source slot are carved with passivation layer near grid, bakie is near Schottky drain;
Right angle source field plate and right angle leakage field plate are deposited between passivation layer and protective layer;
Right angle source field plate is electrically connected with source electrode, and lower end is completely filled in source slot, and right angle source field plate is close
The lateral edges of grid one are with source slot near the side edge-justified calibrations of grid one;
The right angle leakage field plate is electrically connected with Schottky drain, and lower end is completely filled in bakie, and right angle leakage field
Plate is near the lateral edges of Schottky drain one and bakie near the side edge-justified calibrations of Schottky drain one.
Preferably, depth s of described source slot1With depth s of bakie2It is equal, and 0.59~13.1 μm is, source slot
Width b1With the width b of bakie2It is equal, and it is 1.01~11.8 μm.
Preferably, the distance between the bottom of described source slot and barrier layer d1And bakie bottom and barrier layer between
Apart from d2It is equal, and it is 0.112~2.52 μm.
Preferably, described right angle source field plate near the lateral edges of Schottky drain one and source slot near Schottky drain one
The distance between lateral edges c1For 1.13~13.6 μm.
Preferably, described right angle leaks field plate near the lateral edges of grid one and bakie between the lateral edges of grid one
Apart from c2For 1.13~13.6 μm.
Preferably, described right angle source field plate leaks field plate near grid one near the lateral edges of Schottky drain one and right angle
The distance between lateral edges L is 3.7~11.2 μm.
Preferably, described source slot near the lateral edges of grid one and grid between the lateral edges of Schottky drain one
Distance and bakie are near the lateral edges of Schottky drain one with Schottky drain near the distance between the lateral edges of grid one equal, source
Groove is near the lateral edges of grid one and grid near the distance between the lateral edges of Schottky drain one a1For s1×(d1)0.5, wherein s1
For the depth of source slot, d1For the distance between source slot bottom and barrier layer;Bakie is near the lateral edges of Schottky drain one and Xiao Te
Base drain electrode is near the distance between the lateral edges of grid one a2For s2×(d2)0.5, wherein s2For the depth of bakie, d2For bakie bottom
The distance between with barrier layer.
For achieving the above object, the present invention makes the composite field plate power device that field plate is leaked based on right angle source field plate and right angle
Method, including following process:
The first step, the extension GaN base semiconductor material with wide forbidden band on substrate forms transition zone;
Second step, the extension GaN base semiconductor material with wide forbidden band on transition zone forms barrier layer;
3rd step, makes for the first time mask on barrier layer, using the mask barrier layer left end deposit metal, then
N2Rapid thermal annealing is carried out in atmosphere, source electrode is made;
4th step, second making mask on barrier layer deposits metal using right-hand member of the mask in barrier layer, makes
Schottky drain;
5th step, makes for the third time mask on barrier layer, using the mask on the left of source electrode with Schottky drain on the right side of
Barrier layer on perform etching, and etched area depth be more than barrier layer thickness, formed table top;
6th step, the 4th making mask, the gesture using the mask between source electrode and Schottky drain on barrier layer
Metal is deposited in barrier layer, grid is made;
7th step, respectively in other area tops shallow lakes of source electrode top, Schottky drain top, grid top and barrier layer
Product passivation layer;
8th step, over the passivation layer the 5th making mask, blunt between grid and Schottky drain using the mask
Change and performed etching in layer, to make the source slot and bakie of same depth and same widths, and source slot, near grid, bakie is near Xiao
Te Ji drains, and source slot is near the lateral edges of grid one and grid near the distance between the lateral edges of Schottky drain one a1For s1×
(d1)0.5, wherein s1For the depth of source slot, d1For the distance between source slot bottom and barrier layer, bakie is near Schottky drain one
Lateral edges are with Schottky drain near the distance between the lateral edges of grid one a2For s2×(d2)0.5, wherein s2For the depth of bakie,
d2For the distance between bakie bottom and barrier layer;
9th step, the 6th making mask over the passivation layer, using the mask in source slot and grid and Schottky drain
Between passivation layer on deposit metal, deposit metal and be filled up completely with source slot, and metal near the edge and source slot of grid side
Near the justified margin of grid side, right angle source field plate is formed, and the right angle source field plate and source electrode are electrically connected;In bakie
Metal is deposited on passivation layer and grid and Schottky drain between, metal is deposited and is filled up completely with bakie, and metal near Xiao
Te Ji one lateral edges of drain electrode, near the side edge-justified calibrations of Schottky drain one, form right angle leakage field plate with bakie, and the right angle is leaked
Field plate is electrically connected with Schottky drain;
Tenth step, in other area top deposit insulation on right angle source field plate top, right angle leakage field plate top and passivation layer
Dielectric material, forms protective layer, completes the making of whole device.
Device of the present invention with using conventional source field plate and leakage field plate power device compare with advantages below:
1. the forward and reverse breakdown voltage of device is further increased.
The present invention due to using right angle source field plate structure, making device in the working condition in positive OFF state, barrier layer
Surface potential gradually rises from grid to Schottky drain, so as to increased barrier layer in depletion region, i.e. high resistance area, area,
The distribution of depletion region is improved, promotes the depletion region between grid and Schottky drain in barrier layer to undertake bigger positive drain-source electricity
Pressure, so as to substantially increase the forward break down voltage of device;And the present invention makes device exist due to leaking field plate structure using right angle
During working condition in reverse OFF state, barrier layer surface potential gradually rises from Schottky drain to grid, so as to increased
Depletion region in barrier layer, i.e. high resistance area, area, improve the distribution of depletion region, promote gesture between grid and Schottky drain
Depletion region in barrier layer undertakes bigger negative drain-source voltage, so as to substantially increase the breakdown reverse voltage of device.
2. gate leakage current is further reduced, reliability of the device in positive OFF state is improve.
The present invention due to using right angle source field plate structure, making device in the working condition in positive OFF state, device gesture
The distribution of electric field line in barrier layer depletion region has obtained more effective modulation, in device grid near the lateral edges of Schottky drain one,
Right angle source field plate can all produce an electricity near the lateral edges of Schottky drain one and source slot near the lateral edges of Schottky drain one
Field peak value, and by adjusting thickness, source slot depth and width, the source slot of the passivation layer below the field plate of right angle source near grid one
Lateral edges are with grid near the distance between lateral edges of Schottky drain one and right angle source field plate near Schottky drain side
Edge, near the distance between lateral edges of Schottky drain one, can cause above-mentioned each peak electric field equal and be less than with source slot
The breakdown electric field of GaN base semiconductor material with wide forbidden band, so as to reduce grid to greatest extent near Schottky drain side
Electric field line collected by edge, significantly reduces the electric field at this, substantially reduces gate leakage current so that device is just
Significantly increased to the reliability and breakdown characteristics during OFF state.
3. gate leakage current is further reduced, device reliability in reverse OFF state is improve.
The present invention due to using right angle leak field plate structure, make device in reverse OFF state working condition when, device gesture
The distribution of electric field line in barrier layer depletion region has also obtained more effective modulation, and Schottky drain is near the side of grid one in device
Edge, right angle leakage field plate can all produce a peak electric field near the lateral edges of grid one and bakie near the lateral edges of grid one, and
And by adjusting thickness, bakie depth and width, the bakie of the passivation layer below right angle leakage field plate near Schottky drain side
Edge is with Schottky drain near the distance between lateral edges of grid one and right angle leakage field plate near the lateral edges of grid one and leakage
Groove can cause above-mentioned each peak electric field equal and less than GaN base broad stopband half near the distance between lateral edges of grid one
The breakdown electric field of conductor material, so as to reduce to greatest extent grid near Schottky drain side edge collected by electricity
Field wire, significantly reduces the electric field at this, substantially reduces gate leakage current so that reliability of the device in reverse OFF state
Property and breakdown characteristics are significantly increased.
4. process is simple, it is easy to accomplish, improve yield rate.
The making of right angle source field plate and right angle leakage field plate in device architecture of the present invention only needs a step process just can complete, it is to avoid
The process complications problem that traditional stack layers field plate structure is brought, substantially increases the yield rate of device.
Simulation result shows that the forward break down voltage and breakdown reverse voltage of device of the present invention are far longer than respectively using biography
The forward break down voltage and breakdown reverse voltage of the power device of system source field plate and leakage field plate.
The technology contents and effect of the present invention are further illustrated below in conjunction with drawings and Examples.
Description of the drawings
Fig. 1 is the structure chart of the power device using conventional source field plate and leakage field plate;
Fig. 2 is the present invention based on right angle source field plate and the structure chart of the composite field plate power device of right angle leakage field plate;
Fig. 3 is the present invention based on right angle source field plate and the Making programme figure of the composite field plate power device of right angle leakage field plate;
Fig. 4 is to electric field curve diagram in barrier layer during positive OFF state obtained by traditional devices and device simulation of the present invention;
Fig. 5 is to electric field curve diagram in barrier layer during reverse OFF state obtained by traditional devices and device simulation of the present invention.
Specific embodiment
With reference to Fig. 2, the present invention is that it includes based on GaN base wide bandgap semiconductor heterojunction structure:Substrate 1, transition zone 2,
Barrier layer 3, source electrode 4, Schottky drain 5, table top 6, grid 7, passivation layer 8, source slot 9, bakie 10, right angle source field plate 11, right angle
Leakage field plate 12 and protective layer 13.Substrate 1, transition zone 2 are to be distributed from bottom to top with barrier layer 3;Source electrode 4 and Schottky drain 5 form sediment
On barrier layer 3, grid 7 is deposited on the barrier layer 3 between source electrode 4 and Schottky drain 5 product;It is left that table top 6 is produced on source electrode
Side and Schottky drain right side, the land depth is more than barrier layer thickness;Passivation layer 8 is respectively overlay in source electrode top, Schottky
Other area tops of drain electrode top, grid top and barrier layer;Source slot 9 and bakie 10 are located between grid and Schottky drain
Passivation layer 8 in, and source slot, near grid, bakie is near Schottky drain;Depth s of source slot1With depth s of bakie2It is equal,
And 0.59~13.1 μm is, the width b of source slot1With the width b of bakie2It is equal, and it is 1.01~11.8 μm;The bottom of source slot
The d in the distance between portion and barrier layer1With the distance between the bottom of bakie and barrier layer d2It is equal, and it is 0.112~2.52
μm;Source slot is near the lateral edges of grid one and grid near the distance between lateral edges of Schottky drain one and bakie near Schottky
The lateral edges that drain are equal near the distance between the lateral edges of grid one with Schottky drain, source slot near the lateral edges of grid one with
Grid is near the distance between the lateral edges of Schottky drain one a1For s1×(d1)0.5, wherein s1For the depth of source slot, d1For source slot
The distance between bottom and barrier layer;Bakie is near the lateral edges of Schottky drain one and Schottky drain near the lateral edges of grid one
The distance between a2For s2×(d2)0.5, wherein s2For the depth of bakie, d2For the distance between bakie bottom and barrier layer;Right angle
Source field plate 11 and right angle leakage field plate 12 are deposited between passivation layer 8 and protective layer 13, and right angle source field plate is near the side of grid one
With source slot near the side edge-justified calibrations of grid one, right angle leaks field plate near the lateral edges of Schottky drain one and bakie near Schottky to edge
Drain a side edge-justified calibrations, and the right angle source field plate 11 is electrically connected with source electrode 4, and lower end is completely filled in source slot 9, the right angle
Leakage field plate 12 is electrically connected with Schottky drain 5, and lower end is completely filled in bakie 10;Right angle source field plate leaks near Schottky
The lateral edges of pole one are with source slot near the distance between the lateral edges of Schottky drain one c1For 1.13~13.6 μm, right angle leakage field plate is leaned on
The nearly lateral edges of grid one are with bakie near the distance between the lateral edges of grid one c2For 1.13~13.6 μm, right angle source field plate is close
The lateral edges of Schottky drain one are 3.7~11.2 μm near the distance between the lateral edges of grid one L with right angle leakage field plate;Protective layer
13 tops for being covered each by the top of right angle source field plate 11, the right angle leakage top of field plate 12 and other regions of passivation layer.
The substrate 1 of above-mentioned device is using sapphire or carborundum or silicon materials;If transition zone 2 is identical or different by dried layer
GaN base semiconductor material with wide forbidden band is constituted, and its thickness is 1~5 μm;If barrier layer 3 is prohibited by the identical or different GaN base width of dried layer
Carrying semiconductor material is constituted, and its thickness is 5~50nm;Passivation layer 8 and protective layer 13 adopt SiO2、SiN、Al2O3、Sc2O3、
HfO2、TiO2In any one or other insulating dielectric materials, the thickness of passivation layer is source slot depth and source slot bottom and potential barrier
The distance between layer sum s1+d1Or the distance between the depth and bakie bottom and barrier layer of bakie sum s2+d2, wherein s1+
d1With s2+d2It is equal, i.e., 0.702~15.62 μm;The thickness of protective layer is 0.64~8.7 μm.Right angle source field plate 11 and right angle leak
Field plate 12 is constituted using the combination of three layers of different metal, and its thickness is identical and equal 0.59~13.1 μm.
With reference to Fig. 3, the present invention makes the process of the composite field plate power device based on right angle source field plate and right angle leakage field plate,
Provide following three kinds of embodiments:
Embodiment one:Making substrate is sapphire, and passivation layer is Al2O3, protective layer is SiO2, right angle source field plate and right angle
Leakage field plate is Ti/Mo/Au metallic combinations based on right angle source field plate and the composite field plate power device of right angle leakage field plate.
From bottom to top extension GaN material makes transition zone 2, such as Fig. 3 a to step 1. in Sapphire Substrate 1.
Using metal organic chemical vapor deposition technology, epitaxial thickness is 1 μm of undoped p mistake in Sapphire Substrate 1
Layer 2 is crossed, the transition zone is respectively from bottom to top 30nm and 0.97 μm of GaN material by thickness and is constituted.Extension lower floor GaN material is adopted
Process conditions are:Temperature is 530 DEG C, and pressure is 45Torr, and hydrogen flowing quantity is 4400sccm, and ammonia flow is
4400sccm, gallium source flux is 22 μm of ol/min;The process conditions that extension upper strata GaN material is adopted for:Temperature is 960 DEG C, pressure
It is by force 45Torr, hydrogen flowing quantity is 4400sccm, and ammonia flow is 4400sccm, and gallium source flux is 120 μm of ol/min.
Step 2. deposits unadulterated Al in GaN transition layer 20.5Ga0.5N makes barrier layer 3, such as Fig. 3 b.
Using metal organic chemical vapor deposition technology, deposition thickness is 5nm in GaN transition layer 2, and al composition is
0.5 undoped p Al0.5Ga0.5N barrier layers 3, the process conditions that it is adopted for:Temperature is 980 DEG C, and pressure is 45Torr, hydrogen
Flow is 4400sccm, and ammonia flow is 4400sccm, and gallium source flux is 35 μm of ol/min, and silicon source flow is 7 μm of ol/min.
Step 3. makes source electrode 4, such as Fig. 3 c in the left end deposit metal Ti/Al/Ni/Au of barrier layer 3.
In Al0.5Ga0.5Mask is made on N barrier layers 3 for the first time, using electron beam evaporation technique in its left end deposit gold
Category, then in N2Rapid thermal annealing is carried out in atmosphere, source electrode 4 is made, wherein the metal for being deposited is Ti/Al/Ni/Au metal groups
Close, i.e., be respectively Ti, Al, Ni and Au from bottom to top, its thickness is 0.018 μm/0.135 μm/0.046 μm/0.052 μm.Deposit
The process conditions that metal is adopted for:Vacuum is less than 1.8 × 10-3Pa, power bracket is 200~1000W, and evaporation rate is less than;The process conditions that rapid thermal annealing is adopted for:Temperature is 850 DEG C, and the time is 35s.
Step 4. makes Schottky drain 5, such as Fig. 3 d in the right-hand member deposit W metal/Au of barrier layer 3.
In Al0.5Ga0.5Second making mask on N barrier layers 3, using electron beam evaporation technique in its right-hand member deposit gold
Category, make Schottky drain 5, wherein the metal for being deposited be Ni/Au metallic combinations, i.e. lower floor be Ni, upper strata be Au, its thickness
For 0.054 μm/0.24 μm.The process conditions that adopt of deposit metal for:Vacuum is less than 1.8 × 10-3Pa, power bracket is 200
~1000W, evaporation rate is less than。
Step 5. performs etching making table top 6, such as Fig. 3 e on the barrier layer on the right of the source electrode left side and Schottky drain.
In Al0.5Ga0.5Mask is made on N barrier layers 3 for the third time, using reactive ion etching technology in the source electrode left side and Xiao
Perform etching on barrier layer on the right of Te Ji drain electrodes, form table top 6, etching depth is 10nm.The process conditions that adopt of etching for:
Cl2Flow is 15sccm, and pressure is 10mTorr, and power is 100W.
W metal/Au is deposited on barrier layer of the step 6. between source electrode and Schottky drain and makes grid 7, such as Fig. 3 f.
In Al0.5Ga0.54th making mask on N barrier layers, is leaked using electron beam evaporation technique in source electrode and Schottky
Metal is deposited on barrier layer between pole, grid 7 is made, wherein the metal for being deposited is for Ni/Au metallic combinations, i.e. lower floor
Ni, upper strata are Au, and its thickness is 0.054 μm/0.24 μm.The process conditions that adopt of deposit metal for:Vacuum less than 1.8 ×
10-3Pa, power bracket is 200~1000W, and evaporation rate is less than。
Other area top deposits of step 7. in source electrode top, Schottky drain top, grid top and barrier layer
Passivation layer 8, such as Fig. 3 g.
Source electrode top, Schottky drain top, grid top and barrier layer are covered each by using atomic layer deposition technology
Other area tops, complete the Al that deposition thickness is 0.702 μm2O3Passivation layer 8.The process conditions that adopt of deposit passivation layer for:
With TMA and H2O is reaction source, and carrier gas is N2, carrier gas flux is 200sccm, and underlayer temperature is 300 DEG C, and air pressure is 700Pa.
Step 8. performs etching making source slot 9 and bakie 10 in the passivation layer between grid 7 and Schottky drain 5, such as
Fig. 3 h.
The 5th making mask on passivation layer 8, using reactive ion etching technology grid 7 and Schottky drain 5 it
Between passivation layer in perform etching, to make same depth, the source slot of same widths 9 and bakie 10, and source slot is near grid, leakage
Near Schottky drain, source slot and the depth of bakie are 0.59 μm to groove, and width is 1.01 μm, the bottom of source slot and bakie
The distance between bottom and barrier layer are 0.112 μm, and source slot is near the lateral edges of grid one and grid near Schottky drain one
The distance between lateral edges and bakie are near the lateral edges of Schottky drain one and Schottky drain between the lateral edges of grid one
Distance be 0.197 μm.The process conditions that adopt of etching for:CF4Flow is 45sccm, O2Flow is 5sccm, and pressure is
15mTorr, power is 250W.
Step 9. is in the source slot 9, deposit metal on the passivation layer in bakie 10 and between grid 7 and Schottky drain 5
Ti/Mo/Au makes right angle source field plate 11 and right angle leakage field plate 12, such as Fig. 3 i.
The 6th making mask on passivation layer 8, is leaked with grid in source slot 9 using electron beam evaporation technique with Schottky
Deposit metal on passivation layer 8 between pole, the metal for being deposited is filled up completely with source slot 9, and metal near the lateral edges of grid one with
Source slot forms right angle source field plate 11 near the side edge-justified calibrations of grid one, and right angle source field plate and source electrode are electrically connected;In bakie
Metal is deposited on passivation layer 8 in 10 and grid and Schottky drain between, the metal for being deposited is filled up completely with bakie 10, and gold
Category, near the side edge-justified calibrations of Schottky drain one, forms right angle leakage field plate 12 near the lateral edges of Schottky drain one and bakie, and
Right angle leakage field plate and Schottky drain are electrically connected, the metal of deposit is that Ti/Mo/Au metallic combinations, i.e. lower floor are Ti, middle level
It is Au for Mo, upper strata, its thickness is 0.25 μm/0.21 μm/0.13 μm.Right angle source field plate near the lateral edges of Schottky drain one with
Source slot is 1.13 μm near the distance between lateral edges of Schottky drain one, and right angle leaks field plate near the lateral edges of grid one and bakie
It it is 1.13 μm near the distance between lateral edges of grid one, right angle source field plate leaks field near the lateral edges of Schottky drain one and right angle
Plate is 3.7 μm near the distance between lateral edges of grid one.The process conditions that adopt of deposit metal for:Vacuum less than 1.8 ×
10-3Pa, power bracket is 200~1000W, and evaporation rate is less than。
Step 10. is deposited on other regions on the top of right angle source field plate 11, the right angle leakage top of field plate 12 and passivation layer 8
SiO2Make protective layer 13, such as Fig. 3 j.
Using plasma enhanced CVD technology the top of right angle source field plate 11, right angle leakage the top of field plate 12 and
SiO is deposited on other regions of passivation layer 82Protective layer 13 is formed, its thickness is 0.64 μm, so as to complete the system of whole device
Make, deposit the process conditions that adopt of protective layer for:N2O flows are 850sccm, SiH4Flow is 200sccm, and temperature is 250 DEG C,
RF power is 25W, and pressure is 1100mTorr.
Embodiment two:Making substrate is carborundum, and passivation layer is SiO2, protective layer is SiN, and right angle source field plate and right angle leak
Field plate is Ti/Ni/Au metallic combinations based on right angle source field plate and the composite field plate power device of right angle leakage field plate.
Step one. from bottom to top extension AlN makes transition zone 2, such as Fig. 3 a with GaN material in silicon carbide substrates 1.
1.1) using metal organic chemical vapor deposition technology, epitaxial thickness is not mixing for 50nm in silicon carbide substrates 1
Miscellaneous AlN materials;The process conditions of its extension are:Temperature is 1000 DEG C, and pressure is 45Torr, and hydrogen flowing quantity is 4600sccm, ammonia
Throughput is 4600sccm, and silicon source flow is 5 μm of ol/min;
1.2) using metal organic chemical vapor deposition technology, epitaxial thickness is 2.45 μm of GaN materials on AlN materials
Material, completes the making of transition zone 2;The process conditions of its extension are:Temperature is 1000 DEG C, and pressure is 45Torr, and hydrogen flowing quantity is
4600sccm, ammonia flow is 4600sccm, and gallium source flux is 120 μm of ol/min.
The extension of this step is not limited to metal organic chemical vapor deposition technology, it would however also be possible to employ molecular beam epitaxy skill
Art or hydride gas-phase epitaxy technology.
Step 2. extension Al from bottom to top on transition zone 20.3Ga0.7N and GaN material make barrier layer 3, such as Fig. 3 b.
2.1) using metal organic chemical vapor deposition technology, deposition thickness is that 27nm, al composition are on transition zone 2
0.3 Al0.3Ga0.7N materials;The process conditions of its extension are:Temperature is 1100 DEG C, and pressure is 45Torr, and hydrogen flowing quantity is
4600sccm, ammonia flow is 4600sccm, and gallium source flux is 16 μm of ol/min, and silicon source flow is 8 μm of ol/min;
2.2) using metal organic chemical vapor deposition technology in Al0.3Ga0.7Epitaxial thickness is the GaN of 3nm on N materials
Material, completes the making of barrier layer 3;The process conditions of its extension are:Temperature is 1000 DEG C, and pressure is 41Torr, hydrogen flowing quantity
For 4200sccm, ammonia flow is 4200sccm, and gallium source flux is 15 μm of ol/min.
The extension of this step is not limited to metal organic chemical vapor deposition technology, it would however also be possible to employ molecular beam epitaxy skill
Art or hydride gas-phase epitaxy technology.
Step 3. make source electrode 4, such as Fig. 3 c in the left end deposit metal Ti/Al/Ni/Au of barrier layer 3.
3.1) mask is made for the first time on barrier layer 3, using electron beam evaporation technique in its left end deposit metal, wherein
The metal for being deposited is Ti/Al/Ni/Au metallic combinations, i.e., be respectively Ti, Al, Ni and Au from bottom to top, and its thickness is 0.018 μ
m/0.135μm/0.046μm/0.052μm.The process conditions that adopt of deposit metal for:Vacuum is less than 1.8 × 10-3Pa, power
Scope is 200~1000W, and evaporation rate is less than;
3.2) in N2Rapid thermal annealing is carried out in atmosphere, the making of source electrode 4, the process conditions that rapid thermal annealing is adopted are completed
For:Temperature is 850 DEG C, and the time is 35s.
The Metal deposition of this step is not limited to electron beam evaporation technique, it would however also be possible to employ sputtering technology.
Step 4. make Schottky drain 5, such as Fig. 3 d in the right-hand member deposit W metal/Au of barrier layer 3.
Second making mask on barrier layer 3, using electron beam evaporation technique in its right-hand member deposit metal, makes Xiao Te
Base drain electrode 5, wherein the metal for being deposited be Ni/Au metallic combinations, i.e. lower floor be Ni, upper strata be Au, its thickness be 0.054 μm/
0.24μm.The process conditions that adopt of deposit metal for:Vacuum is less than 1.8 × 10-3Pa, power bracket is 200~1000W, is steamed
Send out speed to be less than。
The Metal deposition of this step is not limited to electron beam evaporation technique, it would however also be possible to employ sputtering technology.
Step 5. making table top 6, such as Fig. 3 e are performed etching on the barrier layer on the right of the source electrode left side and Schottky drain.
Mask is made for the third time on barrier layer 3, using reactive ion etching technology in the source electrode left side and Schottky drain
Perform etching on the barrier layer on the right, form table top 6, etching depth is 100nm.The process conditions that adopt of etching for:Cl2Flow
For 15sccm, pressure is 10mTorr, and power is 100W.
The etching of this step is not limited to reactive ion etching technology, it would however also be possible to employ sputtering technology or plasma etching
Technology.
Step 6. W metal/Au is deposited on the barrier layer between source electrode and Schottky drain and makes grid 7, such as Fig. 3 f.
The 4th making mask, the gesture using electron beam evaporation technique between source electrode and Schottky drain on barrier layer
Metal is deposited in barrier layer, grid 7 is made, wherein it is Au for Ni, upper strata that the metal for being deposited is Ni/Au metallic combinations, i.e. lower floor,
Its thickness is 0.054 μm/0.24 μm, deposit the process conditions that adopt of metal for:Vacuum is less than 1.8 × 10-3Pa, power bracket
For 200~1000W, evaporation rate is less than。
The Metal deposition of this step is not limited to electron beam evaporation technique, it would however also be possible to employ sputtering technology.
Step 7. in other area top deposits of source electrode top, Schottky drain top, grid top and barrier layer
Passivation layer 8, such as Fig. 3 g.
Source electrode top, Schottky drain top, grid are covered each by using plasma enhanced CVD technology
Other area tops of top and barrier layer, complete the SiO that deposition thickness is 7.6 μm2Passivation layer 8;The technique bar that it is adopted
Part is:N2O flows are 850sccm, SiH4Flow is 200sccm, and temperature is 250 DEG C, and RF power is 25W, and pressure is
1100mTorr。
The deposit of the passivation layer of this step is not limited to plasma enhanced CVD technology, it would however also be possible to employ steam
Send out technology or atomic layer deposition technology or sputtering technology or molecular beam epitaxy technique.
Step 8. making source slot 9 and bakie 10 are performed etching in the passivation layer between grid 7 and Schottky drain 5, such as
Fig. 3 h.
The 5th making mask on passivation layer 8, using reactive ion etching technology grid 7 and Schottky drain 5 it
Between passivation layer in perform etching, to make same depth, the source slot of same widths 9 and bakie 10, and source slot is near grid, leakage
Near Schottky drain, source slot and the depth of bakie are 6.3 μm to groove, and width is 6.7 μm, the bottom of source slot and the bottom of bakie
The distance between portion and barrier layer are 1.3 μm, and source slot is near the lateral edges of grid one and grid near the side of Schottky drain one
The distance between edge and bakie near the lateral edges of Schottky drain one and Schottky drain between the lateral edges of grid one away from
From being 7.183 μm.The process conditions that adopt of etching for:CF4Flow is 45sccm, O2Flow is 5sccm, and pressure is
15mTorr, power is 250W.
The etching of this step is not limited to reactive ion etching technology, it would however also be possible to employ sputtering technology or plasma etching
Technology.
Step 9. deposit metal on the passivation layer in source slot 9, in bakie 10 and between grid 7 and Schottky drain 5
Ti/Ni/Au makes right angle source field plate 11 and right angle leakage field plate 12, such as Fig. 3 i.
The 6th making mask on passivation layer 8, is leaked with grid in source slot 9 using electron beam evaporation technique with Schottky
Deposit metal on passivation layer 8 between pole, the metal for being deposited is filled up completely with source slot 9, and metal near the lateral edges of grid one with
Source slot forms right angle source field plate 11 near the side edge-justified calibrations of grid one, and right angle source field plate and source electrode are electrically connected;In bakie
Metal is deposited on passivation layer 8 in 10 and grid and Schottky drain between, the metal for being deposited is filled up completely with bakie 10, and gold
Category, near the side edge-justified calibrations of Schottky drain one, forms right angle leakage field plate 12 near the lateral edges of Schottky drain one and bakie, and
Right angle leakage field plate and Schottky drain are electrically connected, the metal of deposit is that Ti/Ni/Au metallic combinations, i.e. lower floor are Ti, middle level
It is Au for Ni, upper strata, its thickness is 3.3 μm/1.8 μm/1.2 μm.Right angle source field plate is near the lateral edges of Schottky drain one and source
Groove is 7.9 μm near the distance between lateral edges of Schottky drain one, and right angle leakage field plate is leaned near the lateral edges of grid one and bakie
The distance between nearly lateral edges of grid one are 7.9 μm, and right angle source field plate leaks field plate near the lateral edges of Schottky drain one and right angle
It it is 6 μm near the distance between lateral edges of grid one.The process conditions that adopt of deposit metal for:Vacuum is less than 1.8 × 10- 3Pa, power bracket is 200~1000W, and evaporation rate is less than。
The Metal deposition of this step is not limited to electron beam evaporation technique, it would however also be possible to employ sputtering technology.
Step 10. other area top deposits on the top of field plate 11, the right angle leakage top of field plate 12 and passivation layer 8 in right angle source
SiN makes protective layer 13, such as Fig. 3 j.
Using plasma enhanced CVD technology the top of right angle source field plate 11, right angle leakage the top of field plate 12 and
Other area tops deposit SiN of passivation layer 8 forms protective layer 13, and its thickness is 3.4 μm, so as to complete the system of whole device
Make, the process conditions that it is adopted for:Gas is NH3、N2And SiH4, gas flow be respectively 2.5sccm, 950sccm and
250sccm, temperature, RF power and pressure are respectively 300 DEG C, 25W and 950mTorr.
The deposit of the protective layer of this step is not limited to plasma enhanced CVD technology, it would however also be possible to employ steam
Send out technology or atomic layer deposition technology or sputtering technology or molecular beam epitaxy technique.
Embodiment three:Making substrate is silicon, and passivation layer is SiN, and protective layer is SiO2, right angle source field plate and right angle leakage field plate
For the composite field plate power device that field plate is leaked based on right angle source field plate and right angle of Ti/Pt/Au metallic combinations.
From bottom to top extension AlN makes transition zone 2, such as Fig. 3 a to step A. with GaN material on silicon substrate 1.
A1 the use of metal organic chemical vapor deposition technology in temperature it is) 800 DEG C, pressure is 40Torr, hydrogen flowing quantity
For 4000sccm, ammonia flow is 4000sccm, and silicon source flow is under the process conditions of 25 μm of ol/min, on silicon substrate 1 outward
Prolong the AlN materials that thickness is 200nm;
A2 the use of metal organic chemical vapor deposition technology in temperature it is) 980 DEG C, pressure is 45Torr, hydrogen flowing quantity
For 4000sccm, ammonia flow is 4000sccm, and gallium source flux is under the process conditions of 120 μm of ol/min, on AlN materials outward
Prolong the GaN material that thickness is 4.8 μm, complete the making of transition zone 2.
Step B. deposits from bottom to top Al on transition zone0.1Ga0.9N makes barrier layer 3, such as Fig. 3 b with GaN material.
B1 the use of metal organic chemical vapor deposition technology in temperature it is) 1000 DEG C, pressure is 40Torr, hydrogen flowing quantity
For 4000sccm, ammonia flow is 4000sccm, and gallium source flux is 12 μm of ol/min, and silicon source flow is the technique of 12 μm of ol/min
Under the conditions of, epitaxial thickness is 46nm on transition zone 2, and al composition is 0.1 Al0.1Ga0.9N materials;
B2 the use of metal organic chemical vapor deposition technology in temperature it is) 1000 DEG C, pressure is 40Torr, hydrogen flowing quantity
For 4000sccm, ammonia flow is 4000sccm, and gallium source flux is under the process conditions of 3 μm of ol/min, in Al0.1Ga0.9N materials
Upper epitaxial thickness is the GaN material of 4nm, completes the making of barrier layer 3.
Step C. makes source electrode 4, such as Fig. 3 c in the left end deposit metal Ti/Al/Ni/Au of barrier layer 3.
C1) make mask for the first time on barrier layer 3,1.8 × 10 are less than in vacuum using electron beam evaporation technique- 3Pa, power bracket is 200~1000W, and evaporation rate is less thanProcess conditions under, in its left end deposit metal, wherein institute
The metal of deposit be Ti/Al/Ni/Au metallic combinations, i.e., from bottom to top be respectively Ti, Al, Ni and Au, its thickness be 0.018 μm/
0.135μm/0.046μm/0.052μm;
C2) in N2Atmosphere, temperature is 850 DEG C, and the time, to carry out rapid thermal annealing under the process conditions of 35s, completes source electrode 4
Making.
Step D. makes Schottky drain 5, such as Fig. 3 d in the right-hand member deposit W metal/Au of barrier layer 3.
Second making mask, 1.8 × 10 are less than using electron beam evaporation technique in vacuum on barrier layer 3-3Pa, work(
Rate scope is 200~1000W, and evaporation rate is less thanProcess conditions under, barrier layer 3 right-hand member deposit metal, make
Schottky drain 5, wherein it is Au for Ni, upper strata that the metal for being deposited is Ni/Au metallic combinations, i.e. lower floor, its thickness is 0.054
μm/0.24μm。
Step E. performs etching making table top 6, such as Fig. 3 e on the barrier layer on the right of the source electrode left side and Schottky drain.
Mask is made for the third time on barrier layer 3, using reactive ion etching technology in Cl2Flow is 15sccm, pressure
For 10mTorr, under power is for the process conditions of 100W, carved on the barrier layer on the right of the source electrode left side with Schottky drain
Erosion, forms table top 6, and etching depth is 200nm.
W metal/Au is deposited on barrier layer of step F. between source electrode and Schottky drain and makes grid 7, such as Fig. 3 f.
The 4th making mask, 1.8 × 10 are less than using electron beam evaporation technique in vacuum on barrier layer-3Pa, work(
Rate scope is 200~1000W, and evaporation rate is less thanProcess conditions under, the potential barrier between source electrode and Schottky drain
Metal is deposited on layer, grid 7 is made, wherein it is Au for Ni, upper strata that the metal for being deposited is Ni/Au metallic combinations, i.e. lower floor, its
Thickness is 0.054 μm/0.24 μm.
Other area top deposits of step G. in source electrode top, Schottky drain top, grid top and barrier layer
Passivation layer 8, such as Fig. 3 g.
Using plasma enhanced CVD technology gas be NH3、N2And SiH4, gas flow is respectively
2.5sccm, 950sccm and 250sccm, temperature, RF power and pressure are respectively 300 DEG C, the process conditions of 25W and 950mTorr
Under, it is 15.62 μ in other area top deposition thicknesses of source electrode top, Schottky drain top, grid top and barrier layer
The SiN of m, makes passivation layer 8.
Step H. performs etching making source slot 9 and bakie 10 in the passivation layer between grid 7 and Schottky drain 5, such as
Fig. 3 h.
The 5th making mask on passivation layer 8, using reactive ion etching technology in CF4Flow is 45sccm, O2Flow
For 5sccm, pressure is 15mTorr, and power is the passivation layer between grid 7 and Schottky drain 5 under the process conditions of 250W
Inside perform etching, to make same depth, the source slot of same widths 9 and bakie 10, and source slot near grid, bakie is near Xiao Te
Base drains, and the depth of source slot and bakie is 13.1 μm, and width is 11.8 μm, the bottom of source slot and the bottom of bakie and potential barrier
The distance between layer is 2.52 μm, and source slot is near the lateral edges of grid one and grid between the lateral edges of Schottky drain one
Distance and bakie are with Schottky drain near the lateral edges of Schottky drain one near the distance between lateral edges of grid one
20.796μm。
Step I. is in the source slot 9, deposit metal on the passivation layer in bakie 10 and between grid 7 and Schottky drain 5
Ti/Pt/Au makes right angle source field plate 11 and right angle leakage field plate 12, such as Fig. 3 i.
The 6th making mask, 1.8 × 10 are less than using electron beam evaporation technique in vacuum on passivation layer 8-3Pa, work(
Rate scope is 200~1000W, and evaporation rate is less thanProcess conditions under, in the source slot 9 and grid and Schottky drain it
Between passivation layer 8 on deposit metal, the metal for being deposited is filled up completely with source slot 9, and metal near the lateral edges of grid one and source slot
Near the side edge-justified calibrations of grid one, right angle source field plate 11 is formed, and right angle source field plate and source electrode are electrically connected;In bakie 10
Metal is deposited on passivation layer 8 and grid and Schottky drain between, the metal for being deposited is filled up completely with bakie 10, and metal is leaned on
The nearly lateral edges of Schottky drain one, near the side edge-justified calibrations of Schottky drain one, form right angle leakage field plate 12 with bakie, and will be straight
Angle is leaked field plate and is electrically connected with Schottky drain, and the metal of deposit is that Ti/Pt/Au metallic combinations, i.e. lower floor are for Ti, middle level
Pt, upper strata are Au, and its thickness is 6 μm/5.9 μm/1.2 μm.Right angle source field plate is leaned near the lateral edges of Schottky drain one and source slot
The distance between nearly lateral edges of Schottky drain one are 13.6 μm, and right angle leaks field plate near the lateral edges of grid one and bakie near grid
The distance between lateral edges of pole one are 13.6 μm, and right angle source field plate is close with right angle leakage field plate near the lateral edges of Schottky drain one
The distance between lateral edges of grid one are 11.2 μm.
Other the area top deposits of step J. on the top of right angle source field plate 11, the right angle leakage top of field plate 12 and passivation layer 8
SiO2Make protective layer 13, such as Fig. 3 j.
Using plasma enhanced CVD technology in N2O and SiH4, gas flow be respectively 850sccm and
200sccm, temperature is 250 DEG C, RF power is 25W, under pressure is for the process conditions of 1100mTorr, on right angle source field plate 11
SiO is deposited on other regions in portion, the right angle leakage top of field plate 12 and passivation layer 82Protective layer 13 is made, its thickness is 8.7 μm, from
And complete the making of whole device.
The effect of the present invention can be further illustrated by following emulation.
Emulation 1:In the case of Schottky drain plus malleation, to using conventional source field plate and leakage field plate power device with
Electric field is emulated in the barrier layer of device of the present invention, as a result such as Fig. 4, wherein conventional source field plate effective length L1It is straight with the present invention
Field plate effective total length in angle source is equal.
As seen from Figure 4:In the case of Schottky drain plus malleation, using conventional source field plate and the power of leakage field plate
Electric field curve of the device in barrier layer has only formed 2 approximately equalised peak electric fields, its electric field curve in barrier layer
The area very little for being covered, and electric field curve of the device of the present invention in barrier layer defines 3 approximately equalised peak electric fields,
So that the area that electric field curve of the device of the present invention in barrier layer is covered is greatly increased, due to the electric field song in barrier layer
The area approximation that line is covered is equal to the forward break down voltage of device, and the forward break down voltage for illustrating device of the present invention is far longer than
Using conventional source field plate and the forward break down voltage of the power device of leakage field plate.
Emulation 2:In the case of Schottky drain plus negative pressure, to using conventional source field plate and leakage field plate power device with
Electric field is emulated in the barrier layer of device of the present invention, as a result such as Fig. 5, wherein tradition leakage field plate effective length L2It is straight with the present invention
Leakage field plate effective total length in angle is equal.
As seen from Figure 5:In the case of Schottky drain plus negative pressure, using conventional source field plate and the power of leakage field plate
Electric field curve of the device in barrier layer has only formed 2 approximately equalised peak electric fields, its electric field curve in barrier layer
The area very little for being covered, and electric field curve of the device of the present invention in barrier layer defines 3 approximately equalised peak electric fields,
So that the area that electric field curve of the device of the present invention in barrier layer is covered is greatly increased, due to the electric field song in barrier layer
The area approximation that line is covered is equal to the breakdown reverse voltage of device, and the breakdown reverse voltage for illustrating device of the present invention is far longer than
Using conventional source field plate and the breakdown reverse voltage of the power device of leakage field plate.
For those skilled in the art, after present invention and principle has been understood, can be without departing substantially from this
In the case of bright principle and scope, the method according to the invention carries out various amendments and change in form and details, but
These amendments and change based on the present invention are still within the claims of the present invention.
Claims (8)
1. a kind of composite field plate power device that field plate is leaked based on right angle source field plate and right angle, is included from bottom to top:Substrate (1),
Transition zone (2), barrier layer (3), passivation layer (8) and protective layer (13), are deposited with source electrode (4), Schottky leakage above barrier layer
Table top (6) is carved with pole (5) and grid (7), the side of barrier layer, and land depth is more than barrier layer thickness, it is characterised in that:
Source slot (9) and bakie (10) are carved with passivation layer (8);
Right angle source field plate (11) and right angle leakage field plate (12) are deposited between passivation layer (8) and protective layer (13);
Right angle source field plate (11) is electrically connected with source electrode (4), and lower end is completely filled in source slot (9), and right angle Yuan Chang
Plate (11) is near the lateral edges of grid one with source slot near the side edge-justified calibrations of grid one;Source slot is leaned near the lateral edges of grid one and grid
The distance between the nearly lateral edges of Schottky drain one a1It is close near the lateral edges of Schottky drain one and Schottky drain with bakie
The distance between the lateral edges of grid one a2Equal, source slot is near the lateral edges of grid one and grid near the lateral edges of Schottky drain one
The distance between a1For s1×(d1)0.5, wherein s1For the depth of source slot, d1For the distance between source slot bottom and barrier layer;Bakie
Near the lateral edges of Schottky drain one with Schottky drain near the distance between the lateral edges of grid one a2For s2×(d2)0.5, its
Middle s2For the depth of bakie, d2For the distance between bakie bottom and barrier layer;
Right angle leakage field plate (12) is electrically connected with Schottky drain (5), and lower end is completely filled in bakie (10), and directly
Angle leakage field plate (12) is near the lateral edges of Schottky drain one with bakie near the side edge-justified calibrations of Schottky drain one.
2. the composite field plate power device that field plate is leaked based on right angle source field plate and right angle according to claim 1, its feature
Be source slot near grid, bakie is near Schottky drain, depth s of source slot1With depth s of bakie2It is equal, and it is 0.59
~13.1 μm, the width b of source slot1With the width b of bakie2It is equal, and it is 1.01~11.8 μm;The bottom of source slot and barrier layer
The distance between d1With the distance between the bottom of bakie and barrier layer d2It is equal, and it is 0.112~2.52 μm.
3. the composite field plate power device that field plate is leaked based on right angle source field plate and right angle according to claim 1, its feature
It is right angle source field plate near the lateral edges of Schottky drain one and source slot near the distance between the lateral edges of Schottky drain one c1
For 1.13~13.6 μm;Field plate is leaked near the lateral edges of grid one and bakie near the distance between the lateral edges of grid one c in right angle2For
1.13~13.6 μm;Described right angle source field plate leaks field plate near the side of grid one near the lateral edges of Schottky drain one and right angle
The distance between edge L is 3.7~11.2 μm.
4. the composite field plate power device that field plate is leaked based on right angle source field plate and right angle according to claim 1, its feature
It is substrate (1) using sapphire or carborundum or silicon materials.
5. a kind of method for making the composite field plate power device based on right angle source field plate and right angle leakage field plate, walks including following
Suddenly:
The first step, the extension GaN base semiconductor material with wide forbidden band on substrate (1) forms transition zone (2);
Second step, the extension GaN base semiconductor material with wide forbidden band on transition zone forms barrier layer (3);
3rd step, makes for the first time mask on barrier layer, and using left end of the mask in barrier layer metal is deposited, then in N2Gas
Rapid thermal annealing is carried out in atmosphere, source electrode (4) is made;
4th step, second making mask on barrier layer deposits metal using right-hand member of the mask in barrier layer, makes Xiao Te
Base drains (5);
5th step, makes for the third time mask on barrier layer, using the mask on the left of source electrode with Schottky drain on the right side of gesture
Barrier layer is performed etching on (3), and etched area depth is more than barrier layer thickness, forms table top (6);
6th step, the 4th making mask, the barrier layer using the mask between source electrode and Schottky drain on barrier layer
Upper deposit metal, makes grid (7);
7th step, respectively in other regions of source electrode (4) top, Schottky drain (5) top, grid (7) top and barrier layer
Top deposit passivation layer (8);
8th step, makes mask the 5th time, using the mask between grid (7) and Schottky drain (5) over the passivation layer
Perform etching in passivation layer, to make the source slot (9) and bakie (10) of same depth and same widths, and source slot is near grid,
, near Schottky drain, source slot is near the lateral edges of grid one and grid near the distance between lateral edges of Schottky drain one for bakie
a1For s1×(d1)0.5, wherein s1For the depth of source slot, d1For the distance between source slot bottom and barrier layer, bakie is near Schottky
A lateral edges and Schottky drain drain near the distance between the lateral edges of grid one a2For s2×(d2)0.5, wherein s2For bakie
Depth, d2For the distance between bakie bottom and barrier layer;
9th step, the 6th making mask over the passivation layer, using the mask in the source slot (9) and grid and Schottky drain it
Between passivation layer (8) on deposit metal, deposit metal and be filled up completely with source slot (9), and metal near grid side edge with
Source slot (9) is formed right angle source field plate (11) near the justified margin of grid side, and the right angle source field plate is electrically connected with source electrode
Connect;Metal is deposited on passivation layer (8) in bakie (10) and grid and Schottky drain between, metal is deposited and is filled up completely with
Bakie (10), and metal is near the lateral edges of Schottky drain one and the close side edge-justified calibrations of Schottky drain one of bakie (10), shape
Field plate (12) is leaked at a right angle, and the right angle leakage field plate is electrically connected with Schottky drain;
Tenth step, in other area top deposit dielectrics on right angle source field plate top, right angle leakage field plate top and passivation layer
Material, forms protective layer (13), completes the making of whole device.
6. method according to claim 5, it is characterised in that in the 9th step in source slot (9), in bakie (10) and grid
The metal deposited on passivation layer (8) between pole and Schottky drain, using three-layer metal combination, Ti/Mo/Au, i.e. lower floor are
Ti, middle level are Mo, upper strata is Au, and its thickness is 0.25~6 μm/0.21~5.9 μm/0.13~1.2 μm.
7. method according to claim 5, it is characterised in that in the 9th step in source slot (9), in bakie (10) and grid
The metal deposited on passivation layer (8) between pole and Schottky drain, using three-layer metal combination, Ti/Ni/Au, i.e. lower floor are
Ti, middle level are Ni, upper strata is Au, and its thickness is 0.25~6 μm/0.21~5.9 μm/0.13~1.2 μm.
8. method according to claim 5, it is characterised in that in the 9th step in source slot (9), in bakie (10) and grid
On passivation layer (8) between pole and Schottky drain deposit metal, further using three-layer metal combine Ti/Pt/Au, i.e., under
Layer is Ti, middle level is Pt, upper strata is Au, and its thickness is 0.25~6 μm/0.21~5.9 μm/0.13~1.2 μm.
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CN103137476A (en) * | 2011-12-01 | 2013-06-05 | 电力集成公司 | GaN high voltage HFET with passivation plus gate dielectric multilayer structure |
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