CN104409494A - Complex field plate power device based on right-angled source field plate and right-angled drain field plate - Google Patents

Complex field plate power device based on right-angled source field plate and right-angled drain field plate Download PDF

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CN104409494A
CN104409494A CN201410660221.1A CN201410660221A CN104409494A CN 104409494 A CN104409494 A CN 104409494A CN 201410660221 A CN201410660221 A CN 201410660221A CN 104409494 A CN104409494 A CN 104409494A
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field plate
source
right angle
grid
schottky drain
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CN201410660221.1A
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Chinese (zh)
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CN104409494B (en
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毛维
佘伟波
赵雁鹏
李洋洋
杨翠
张金风
郝跃
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西安电子科技大学
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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/778Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/402Field plates
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/417Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
    • H01L29/41725Source or drain electrodes for field effect devices
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66431Unipolar field-effect transistors with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT

Abstract

The invention discloses a complex field plate power device based on a right-angled source field plate and a right-angled drain field plate. The complex field plate power device comprises a substrate (1), a transition layer (2), a barrier layer (3), a source electrode (4), a Walter Schottky drain electrode (5), a table top (6), a gate electrode (7), a passivation layer (8) and a protective layer (13). A gate groove (9) and a drain groove (10) are etched in the passivation layer; the right-angled source field plate (11) and the right-angled drain field plate (12) are deposited between the passivation layer (8) and the protective layer (13); the right-angled source field plate is electrically connected with the source electrode and the lower end is completely filled in a source groove; the right-angled drain field plate is electrically connected with the Walter Schottky drain electrode and the lower end is completely filled in a drain groove; the edge of the right-angled source field plate close to one side of the gate electrode aligns with that of the source groove close to one side of the gate electrode; and the edge of the right-angled drain field plate close to one side of the Walter Schottky drain electrode aligns with that of the drain groove close to one side of the Walter Schottky drain electrode. The complex field plate power device has the advantages of simple manufacturing process, good forward characteristics and reverse characteristics and high rate of finished products and can be used as a switch device.

Description

The composite field plate power device of field plate is leaked based on source, right angle field plate and right angle

Technical field

The invention belongs to microelectronics technology, relate to semiconductor device, particularly leak the composite field plate power device of field plate based on source, right angle field plate and right angle, can be used as the basic device of power electronic system.

Technical background

Power semiconductor is the critical elements of power electronic system, is to carry out electric treatable effective tool.In recent years, along with becoming increasingly conspicuous of the energy and environmental problem, research and development novel high-performance, low-loss power device have become one of the effective way improving utilization rate of electrical, energy savings, alleviating energy crisis.But in power device research, at a high speed, there is serious restricting relation between high pressure and low on-resistance, rationally, effectively improving this restricting relation is the key improving overall device performance.Along with market constantly proposes the requirement of more high efficiency, more small size, higher frequency to power system, traditional Si base semiconductor power device performance has approached its theoretical limit.In order to chip area can be reduced further, improves operating frequency, improve working temperature, reduce conducting resistance, improve puncture voltage, reduce machine volume, improve overall efficiency, take gallium nitride as the semiconductor material with wide forbidden band of representative, by means of the electronics saturation drift velocity of its larger energy gap, higher critical breakdown electric field and Geng Gao, and the outstanding advantages such as stable chemical performance, high temperature resistant, radioresistance, show one's talent preparing in high performance power device, application potential is huge.Particularly adopt the High Electron Mobility Transistor of GaN base heterojunction structure, i.e. GaN base HEMT device, especially because of its characteristic such as low on-resistance, high operate frequency, can meet that electronics of future generation are more high-power to power device, the requirement of higher frequency, more small size and more severe hot operation, in economy and military field, there is wide and special application prospect.

But, there is inherent shortcoming in conventional GaN base HEMT device structure, device channel electric field strength can be caused in deformity distribution, especially near drain electrode, there is high peak electric field at device grids.This causes actual GaN base HEMT device in applying positive drain voltage situation, i.e. forward OFF state, forward break down voltage often far below theoretical eapectation, and there is the integrity problem such as current collapse, inverse piezoelectric effect, seriously constrain the application and development in field of power electronics.In order to overcome the above problems, domestic and international researchers propose numerous method, and field plate structure be wherein effect significantly, the one that is most widely used.Field plate structure is successfully applied in GaN base HEMT power device by the people such as the N.Q.Zhang of U.S. UCSB in 2000 first, develop overlapping gate power device, Saturated output electric current is 500mA/mm, and breakdown voltage can reach 570V, and this is the GaN device that reported puncture voltage is the highest at that time, see High breakdown GaN HEMT with overlapping gatestructure, IEEE Electron Device Letters, Vol.21, No.9, pp.421-423,2000.Subsequently, research institution of various countries expands relevant research work one after another, and the U.S. and Japan are the main leaders in this field.In the U.S., mainly UCSB, Nan Ka university, Cornell University and famous IR company of power electronic device manufacturer etc. are engaged in the research.Japan starts late relatively, but they pay much attention to the work of this respect, fund input great efforts, and it is numerous to be engaged in mechanism, comprising: the major companies such as Toshiba, Furukawa, Panasonic, Toyota and Fuji.Along with going deep into of research, researchers find correspondingly to increase field plate length, can improve device electric breakdown strength.But the increase of field plate length can make field plate efficiency, namely puncture voltage compares field plate length, continuous reduction, the ability that namely field plate improves device electric breakdown strength is tending towards saturated gradually along with the increase of field plate length, see Enhancement of breakdown voltage in AlGaN/GaN high electron mobility transistors using a fieldplate, IEEE Transactions on Electron Devices, Vol.48, No.8, pp.1515-1521, 2001, and Development and characteristic analysis of a field-plated Al 2o 3/ AlInN/GaN MOS HEMT, ChinesePhysics B, Vol.20, No.1, pp.0172031-0172035,2011.Therefore, in order to improve device electric breakdown strength further, take into account field plate efficiency simultaneously, the people such as the Wataru Saito of Toshiba Corp in 2008 adopt the double-deck field plate structure of grid field plate and source field plate to have developed double-deck field plate insulated-gate type GaN base HEMT device, this device electric breakdown strength is up to 940V, maximum output current is up to 4.4A, see A 130-W Boost Converter Operation Using a High-Voltage GaN-HEMT, IEEEElectron Device Letters, Vol.29, No.1, pp.8-10,2008.And this double-deck field plate structure has become current being used in the world and improves GaN base power device breakdown characteristics, improve the main flow field plate techniques of overall device performance.

In actual applications, researchers also find in many technical fields such as electric automobile, power management system, S power-like amplifier, often required power device has very strong reverse blocking, i.e. reverse OFF state, ability, namely wish that device has very high negative drain breakdown voltage under OFF state, i.e. reverse breakdown voltage.And common individual layer or double-deck field plate are all be connected with grid or source electrode, therefore when device drain applies low-down reverse voltage, device grids just can be opened by forward, and by very large gate current, thus cause component failure.Therefore, in order to improve the reverse blocking capability of power device, the people such as EldadBahat-Treidel in 2009 propose a kind of power device adopting Schottky drain, see AlGaN/GaN HEMT WithIntegrated Recessed Schottky-Drain Protection Diode, IEEE Electron Device Letters, Vol.30, No.9, pp.901-903,2009.But the ability of Schottky drain in raising device reverse blocking voltage is very limited, and therefore in order to more effectively improve the reverse blocking capability of power device, field plate techniques has been incorporated into device drain by researchers, defines leakage field plate structure.Therefore, in order to take into account forward and the reverse blocking capability of power device, the people such as Wataru Saito in 2005 propose a kind of composite field plate power device adopting source field plate and leak field plate, namely source-leakage composite field plate power device, see Design optimization of high breakdown voltage AlGaN-GaN power HEMT on an insulatingsubstrate for R oNa-V btradeoff characteristics, IEEE Transactions on Electron Devices, Vol.52, No.1, pp.106-111,2005.But, because the source field plate of individual layer is still limited with the ability of leakage field plate in raising device electric breakdown strength, therefore double-deck field plate structure is combined with source-leakage composite field plate power device, namely adopt the source field plate of double-deck field plate structure and the leakage field plate of double-deck field plate structure and form source-leakage composite double layer field plate power device, can realize the further lifting of device forward and reverse breakdown voltage, this has larger application potential.But the complex process of double-deck field plate HEMT power device, manufacturing cost is higher, and the making of every one deck field plate all needs the processing steps such as photoetching, depositing metal, deposit dielectric passivation.And under will optimizing each layer field plate, dielectric material thickness maximizes to realize puncture voltage, must carry out loaded down with trivial details process debugging and optimization, therefore considerably increase the difficulty that device manufactures, reduce the rate of finished products of device.

Summary of the invention

The object of the invention is to the deficiency overcoming above-mentioned prior art, there is provided that a kind of structure is simple, forward and reverse breakdown voltage is high, field plate efficiency is high and reliability the is high composite field plate power device leaking field plate based on source, right angle field plate and right angle, to reduce element manufacturing difficulty, improve forward breakdown characteristic and the reverse breakdown characteristics of device, improve device yield.

For achieving the above object; the heterojunction structure that device architecture provided by the invention adopts GaN base semiconductor material with wide forbidden band to form; comprise from bottom to top: substrate, transition zone, barrier layer, passivation layer and protective layer; source electrode, Schottky drain and grid is deposited with above barrier layer; table top is carved with in the side of barrier layer; and land depth is greater than barrier layer thickness, it is characterized in that:

Be carved with source groove and bakie in passivation layer, and source groove is near grid, bakie is near Schottky drain;

Source, right angle field plate and right angle leakage field plate is deposited with between passivation layer and protective layer;

Described right angle source field plate and source electrode are electrically connected, and lower end is filled in the groove of source completely, and source, right angle field plate near grid one lateral edges and source groove near grid one side edge-justified calibrations;

Described right angle leaks field plate and is electrically connected with Schottky drain, and lower end is filled in bakie completely, and right angle leakage field plate near Schottky drain one lateral edges and bakie near Schottky drain one side edge-justified calibrations.

As preferably, the degree of depth s of described source groove 1with the degree of depth s of bakie 2equal, and be 0.59 ~ 13.1 μm, the width b of source groove 1with the width b of bakie 2equal, and be 1.01 ~ 11.8 μm.

As preferably, the distance d between the bottom of described source groove and barrier layer 1and the distance d between the bottom of bakie and barrier layer 2equal, and be 0.112 ~ 2.52 μm.

As preferably, described source, right angle field plate is the distance c between Schottky drain one lateral edges near Schottky drain one lateral edges and source groove 1it is 1.13 ~ 13.6 μm.

As preferably, described right angle leak field plate near grid one lateral edges and bakie the distance c between grid one lateral edges 2it is 1.13 ~ 13.6 μm.

As preferably, it is 3.7 ~ 11.2 μm that described source, right angle field plate leaks the distance L of field plate between grid one lateral edges near Schottky drain one lateral edges and right angle.

As preferably, described source groove is equal with the distance of Schottky drain between grid one lateral edges near Schottky drain one lateral edges with the Distance geometry bakie of grid between Schottky drain one lateral edges near grid one lateral edges, and source groove is the distance a between Schottky drain one lateral edges near grid one lateral edges and grid 1for s 1× (d 1) 0.5, wherein s 1for the degree of depth of source groove, d 1for the distance between source trench bottom and barrier layer; Bakie is the distance a between grid one lateral edges near Schottky drain one lateral edges and Schottky drain 2for s 2× (d 2) 0.5, wherein s 2for the degree of depth of bakie, d 2for the distance bottom bakie and between barrier layer.

For achieving the above object, the present invention makes the method for leaking the composite field plate power device of field plate based on source, right angle field plate and right angle, comprises following process:

The first step, extension GaN base semiconductor material with wide forbidden band on substrate, forms transition zone;

Second step, extension GaN base semiconductor material with wide forbidden band on transition zone, forms barrier layer;

3rd step, on barrier layer, first time makes mask, utilizes this mask at the left end depositing metal of barrier layer, then at N 2carry out rapid thermal annealing in atmosphere, make source electrode;

4th step, on barrier layer, second time makes mask, utilizes this mask at the right-hand member depositing metal of barrier layer, makes Schottky drain;

5th step, on barrier layer, third time makes mask, utilize this mask on the left of source electrode with Schottky drain on the right side of barrier layer on etch, and the etched area degree of depth is greater than barrier layer thickness, forms table top;

6th step, barrier layer makes mask the 4th time, utilizes depositing metal on the barrier layer of this mask between source electrode and Schottky drain, make grid;

7th step, respectively on source electrode top, Schottky drain top, grid top and barrier layer other area top deposit passivation layers;

8th step, make mask 5th time over the passivation layer, utilize in the passivation layer of this mask between grid and Schottky drain and etch, to make source groove and the bakie of same depth and same widths, and source groove is near grid, bakie is near Schottky drain, and source groove is the distance a between Schottky drain one lateral edges near grid one lateral edges and grid 1for s 1× (d 1) 0.5, wherein s 1for the degree of depth of source groove, d 1for the distance between source trench bottom and barrier layer, bakie is the distance a between grid one lateral edges near Schottky drain one lateral edges and Schottky drain 2for s 2× (d 2) 0.5, wherein s 2for the degree of depth of bakie, d 2for the distance bottom bakie and between barrier layer;

9th step, make mask 6th time over the passivation layer, utilize depositing metal on the passivation layer of this mask in the groove of source and between grid and Schottky drain, institute's depositing metal fills source groove completely, and metal is near the edge of grid side and the justified margin of source groove near grid side, form source, right angle field plate, and this source, right angle field plate and source electrode are electrically connected; Depositing metal on passivation layer in bakie and between grid and Schottky drain, institute's depositing metal fills bakie completely, and metal near Schottky drain one lateral edges and bakie near Schottky drain one side edge-justified calibrations, form right angle and leak field plate, and this right angle leakage field plate and Schottky drain are electrically connected;

Tenth step, on field plate top, source, right angle, right angle leaks other area top deposit insulating dielectric materials of field plate top and passivation layer, forms protective layer, completes the making of whole device.

The power device that device of the present invention and adopt conventional source field plate and leaks field plate compares and has the following advantages:

1. further increase forward and the reverse breakdown voltage of device.

The present invention is owing to adopting source, right angle field plate structure, make device when being in the operating state of forward OFF state, barrier layer surface potential raises gradually from grid to Schottky drain, thus add depletion region in barrier layer, i.e. high resistance area, area, improve the distribution of depletion region, impel the depletion region between grid and Schottky drain in barrier layer to bear larger positive drain-source voltage, thus substantially increase the forward break down voltage of device; And the present invention leaks field plate structure owing to adopting right angle, make device when being in the operating state of reverse OFF state, barrier layer surface potential raises gradually from Schottky drain to grid, thus add depletion region in barrier layer, i.e. high resistance area, area, improve the distribution of depletion region, impel the depletion region between grid and Schottky drain in barrier layer to bear larger negative drain-source voltage, thus substantially increase the reverse breakdown voltage of device.

2. further reduce gate leakage current, improve the reliability of device when forward OFF state.

The present invention is owing to adopting source, right angle field plate structure, make device when being in the operating state of forward OFF state, in device barrier layer depletion region, the distribution of electric field line obtains more effective modulation, in device, grid is near Schottky drain one lateral edges, source, right angle field plate all can produce a peak electric field near Schottky drain one lateral edges and source groove near Schottky drain one lateral edges, and by adjusting the thickness of the passivation layer below the field plate of source, right angle, source groove depth and width, source groove near distance between Schottky drain one lateral edges of grid one lateral edges and grid and source, right angle field plate near Schottky drain one lateral edges and source groove the distance between Schottky drain one lateral edges, each peak electric field above-mentioned can be made equal and be less than the breakdown electric field of GaN base semiconductor material with wide forbidden band, thus decrease to greatest extent grid near Schottky drain side edge collected by electric field line, significantly reduce the electric field at this place, substantially reduce gate leakage current, the reliability of device when forward OFF state and breakdown characteristics is made all to obtain remarkable enhancing.

3. further reduce gate leakage current, improve device reliability when reverse OFF state.

The present invention leaks field plate structure owing to adopting right angle, make device when being in the operating state of reverse OFF state, in device barrier layer depletion region, the distribution of electric field line have also been obtained more effective modulation, in device, Schottky drain is near grid one lateral edges, right angle leaks field plate all can produce a peak electric field near grid one lateral edges and bakie near grid one lateral edges, and the thickness of the passivation layer below field plate is leaked by adjustment right angle, the bakie degree of depth and width, bakie near distance between grid one lateral edges of Schottky drain one lateral edges and Schottky drain and right angle leak field plate near grid one lateral edges and bakie the distance between grid one lateral edges, each peak electric field above-mentioned can be made equal and be less than the breakdown electric field of GaN base semiconductor material with wide forbidden band, thus decrease to greatest extent grid near Schottky drain side edge collected by electric field line, significantly reduce the electric field at this place, substantially reduce gate leakage current, the reliability of device when reverse OFF state and breakdown characteristics is made all to obtain remarkable enhancing.

4. technique is simple, is easy to realize, and improves rate of finished products.

In device architecture of the present invention, the making of source, right angle field plate and right angle leakage field plate only needs a step process just can complete, and avoids the process complications problem that traditional stack layers field plate structure brings, substantially increases the rate of finished products of device.

Simulation result shows, the forward break down voltage of device of the present invention and reverse breakdown voltage are far longer than forward break down voltage and the reverse breakdown voltage of the power device adopting conventional source field plate and leak field plate respectively.

Technology contents of the present invention and effect is further illustrated below in conjunction with drawings and Examples.

Accompanying drawing explanation

Fig. 1 is the structure chart of the power device adopting conventional source field plate and leak field plate;

Fig. 2 is the structure chart of the composite field plate power device that the present invention is based on source, right angle field plate and right angle leakage field plate;

Fig. 3 is the Making programme figure of the composite field plate power device that the present invention is based on source, right angle field plate and right angle leakage field plate;

Electric field curve diagram in barrier layer when Fig. 4 is the forward OFF state to traditional devices and device simulation gained of the present invention;

Electric field curve diagram in barrier layer when Fig. 5 is the reverse OFF state to traditional devices and device simulation gained of the present invention.

Embodiment

With reference to Fig. 2; the present invention is that it comprises based on GaN base wide bandgap semiconductor heterojunction structure: substrate 1, transition zone 2, barrier layer 3, source electrode 4, Schottky drain 5, table top 6, grid 7, passivation layer 8, source groove 9, bakie 10, source, right angle field plate 11, right angle leak field plate 12 and protective layer 13.Substrate 1, transition zone 2 and barrier layer 3 are for distribute from bottom to top; Source electrode 4 and Schottky drain 5 are deposited on barrier layer 3, and grid 7 is deposited on the barrier layer 3 between source electrode 4 and Schottky drain 5; Table top 6 is produced on the left of source electrode and on the right side of Schottky drain, and this land depth is greater than barrier layer thickness; Passivation layer 8 covers other area top of source electrode top, Schottky drain top, grid top and barrier layer respectively; In source groove 9 and bakie 10 passivation layer 8 between grid and Schottky drain, and source groove is near grid, and bakie is near Schottky drain; The degree of depth s of source groove 1with the degree of depth s of bakie 2equal, and be 0.59 ~ 13.1 μm, the width b of source groove 1with the width b of bakie 2equal, and be 1.01 ~ 11.8 μm; The d of the distance between the bottom of source groove and barrier layer 1and the distance d between the bottom of bakie and barrier layer 2equal, and be 0.112 ~ 2.52 μm; Source groove is equal with the distance of Schottky drain between grid one lateral edges near Schottky drain one lateral edges with the Distance geometry bakie of grid between Schottky drain one lateral edges near grid one lateral edges, and source groove is the distance a between Schottky drain one lateral edges near grid one lateral edges and grid 1for s 1× (d 1) 0.5, wherein s 1for the degree of depth of source groove, d 1for the distance between source trench bottom and barrier layer; Bakie is the distance a between grid one lateral edges near Schottky drain one lateral edges and Schottky drain 2for s 2× (d 2) 0.5, wherein s 2for the degree of depth of bakie, d 2for the distance bottom bakie and between barrier layer; Source, right angle field plate 11 and right angle leak field plate 12 and are deposited between passivation layer 8 and protective layer 13, and source, right angle field plate near grid one lateral edges and source groove near grid one side edge-justified calibrations, right angle leaks field plate near Schottky drain one lateral edges and bakie near Schottky drain one side edge-justified calibrations, this source, right angle field plate 11 is electrically connected with source electrode 4, and lower end is filled in source groove 9 completely, this right angle leaks field plate 12 and is electrically connected with Schottky drain 5, and lower end is filled in bakie 10 completely; Source, right angle field plate is the distance c between Schottky drain one lateral edges near Schottky drain one lateral edges and source groove 1be 1.13 ~ 13.6 μm, right angle leakage field plate is the distance c between grid one lateral edges near grid one lateral edges and bakie 2be 1.13 ~ 13.6 μm, it is 3.7 ~ 11.2 μm that source, right angle field plate leaks the distance L of field plate between grid one lateral edges near Schottky drain one lateral edges and right angle; The top that protective layer 13 covers field plate 11 top, source, right angle respectively, right angle leaks field plate 12 top and other region of passivation layer.

The substrate 1 of above-mentioned device adopts sapphire or carborundum or silicon materials; Transition zone 2 is made up of the GaN base semiconductor material with wide forbidden band that some layers are identical or different, and its thickness is 1 ~ 5 μm; Barrier layer 3 is made up of the GaN base semiconductor material with wide forbidden band that some layers are identical or different, and its thickness is 5 ~ 50nm; Passivation layer 8 and protective layer 13 all adopt SiO 2, SiN, Al 2o 3, Sc 2o 3, HfO 2, TiO 2in any one or other insulating dielectric materials, the thickness of passivation layer is source groove depth and the distance sum s between source trench bottom and barrier layer 1+ d 1or the distance sum s bottom the degree of depth of bakie and bakie and between barrier layer 2+ d 2, wherein s 1+ d 1with s 2+ d 2equal, namely 0.702 ~ 15.62 μm; The thickness of protective layer is 0.64 ~ 8.7 μm.Source, right angle field plate 11 and right angle leak field plate 12 and all adopt the combination of three layers of different metal to form, and its thickness is identical and equal 0.59 ~ 13.1 μm.

With reference to Fig. 3, the present invention makes the process of leaking the composite field plate power device of field plate based on source, right angle field plate and right angle, provides following three kinds of embodiments:

Embodiment one: making substrate is sapphire, passivation layer is Al 2o 3, protective layer is SiO 2, source, right angle field plate and right angle leak the composite field plate power device leaking field plate based on source, right angle field plate and right angle that field plate is Ti/Mo/Au metallic combination.

Step 1. is the transition zone 2 of extension GaN material making from bottom to top in Sapphire Substrate 1, as Fig. 3 a.

Use metal organic chemical vapor deposition technology epitaxial thickness in Sapphire Substrate 1 is the transition zone 2 that do not adulterate of 1 μm, and the GaN material that this transition zone is respectively 30nm and 0.97 μm by thickness is from bottom to top formed.The process conditions that extension lower floor GaN material adopts are: temperature is 530 DEG C, and pressure is 45Torr, and hydrogen flowing quantity is 4400sccm, and ammonia flow is 4400sccm, and gallium source flux is 22 μm of ol/min; The process conditions that extension upper strata GaN material adopts are: temperature is 960 DEG C, and pressure is 45Torr, and hydrogen flowing quantity is 4400sccm, and ammonia flow is 4400sccm, and gallium source flux is 120 μm of ol/min.

Step 2. is the unadulterated Al of deposit in GaN transition layer 2 0.5ga 0.5n makes barrier layer 3, as Fig. 3 b.

Use metal organic chemical vapor deposition technology deposition thickness in GaN transition layer 2 to be 5nm, and al composition is the non-doped with Al of 0.5 0.5ga 0.5n barrier layer 3, its process conditions adopted are: temperature is 980 DEG C, and pressure is 45Torr, and hydrogen flowing quantity is 4400sccm, and ammonia flow is 4400sccm, and gallium source flux is 35 μm of ol/min, and aluminium source flux is 7 μm of ol/min.

Step 3. makes source electrode 4, as Fig. 3 c at the left end depositing metal Ti/Al/Ni/Au of barrier layer 3.

At Al 0.5ga 0.5on N barrier layer 3, first time makes mask, uses electron beam evaporation technique at its left end depositing metal, then at N 2carry out rapid thermal annealing in atmosphere, make source electrode 4, the metal of wherein institute's deposit is Ti/Al/Ni/Au metallic combination, is namely respectively Ti, Al, Ni and Au from bottom to top, and its thickness is 0.018 μm/0.135 μm/0.046 μm/0.052 μm.The process conditions that depositing metal adopts are: vacuum degree is less than 1.8 × 10 -3pa, power bracket is 200 ~ 1000W, and evaporation rate is less than ; The process conditions that rapid thermal annealing adopts are: temperature is 850 DEG C, and the time is 35s.

Step 4. makes Schottky drain 5, as Fig. 3 d at the right-hand member depositing metal Ni/Au of barrier layer 3.

At Al 0.5ga 0.5on N barrier layer 3, second time makes mask, and use electron beam evaporation technique at its right-hand member depositing metal, make Schottky drain 5, the metal of wherein institute's deposit is Ni/Au metallic combination, and namely lower floor is Ni, upper strata is Au, and its thickness is 0.054 μm/0.24 μm.The process conditions that depositing metal adopts are: vacuum degree is less than 1.8 × 10 -3pa, power bracket is 200 ~ 1000W, and evaporation rate is less than .

The barrier layer of step 5. on the right of the source electrode left side and Schottky drain carries out etching and makes table top 6, as Fig. 3 e.

At Al 0.5ga 0.5on N barrier layer 3, third time makes mask, and use on the barrier layer of reactive ion etching technology on the right of the source electrode left side and Schottky drain and etch, form table top 6, etching depth is 10nm.The process conditions that etching adopts are: Cl 2flow is 15sccm, and pressure is 10mTorr, and power is 100W.

On the barrier layer of step 6. between source electrode and Schottky drain, depositing metal Ni/Au makes grid 7, as Fig. 3 f.

At Al 0.5ga 0.5n barrier layer makes mask the 4th time, use depositing metal on the barrier layer of electron beam evaporation technique between source electrode and Schottky drain, make grid 7, the metal of wherein institute's deposit is Ni/Au metallic combination, namely lower floor is Ni, upper strata is Au, and its thickness is 0.054 μm/0.24 μm.The process conditions that depositing metal adopts are: vacuum degree is less than 1.8 × 10 -3pa, power bracket is 200 ~ 1000W, and evaporation rate is less than .

Step 7. on source electrode top, Schottky drain top, grid top and barrier layer other area top deposit passivation layers 8, as Fig. 3 g.

Use atomic layer deposition technology to cover other area top of source electrode top, Schottky drain top, grid top and barrier layer respectively, complete the Al that deposition thickness is 0.702 μm 2o 3passivation layer 8.The process conditions that deposit passivation layer adopts are: with TMA and H 2o is reaction source, and carrier gas is N 2, carrier gas flux is 200sccm, and underlayer temperature is 300 DEG C, and air pressure is 700Pa.

Etching making source groove 9 and bakie 10 is carried out, as Fig. 3 h in the passivation layer of step 8. between grid 7 and Schottky drain 5.

Passivation layer 8 makes mask the 5th time, use in the passivation layer of reactive ion etching technology between grid 7 and Schottky drain 5 and etch, to make same depth, the source groove 9 of same widths and bakie 10, and source groove is near grid, bakie is near Schottky drain, the degree of depth of source groove and bakie is 0.59 μm, width is 1.01 μm, the bottom of source groove and the distance between the bottom of bakie and barrier layer are 0.112 μm, source groove near grid one lateral edges and grid the Distance geometry bakie between Schottky drain one lateral edges near Schottky drain one lateral edges and Schottky drain, the distance between grid one lateral edges is 0.197 μm.The process conditions that etching adopts are: CF 4flow is 45sccm, O 2flow is 5sccm, and pressure is 15mTorr, and power is 250W.

On the passivation layer of step 9. in source groove 9, in bakie 10 and between grid 7 and Schottky drain 5, depositing metal Ti/Mo/Au makes source, right angle field plate 11 and right angle leakage field plate 12, as Fig. 3 i.

Passivation layer 8 makes mask the 6th time, use depositing metal on the passivation layer 8 of electron beam evaporation technique in source groove 9 and between grid and Schottky drain, the metal of institute's deposit fills source groove 9 completely, and metal near grid one lateral edges and source groove near grid one side edge-justified calibrations, form source, right angle field plate 11, and source, right angle field plate and source electrode are electrically connected; Depositing metal on passivation layer 8 in bakie 10 and between grid and Schottky drain, the metal of institute's deposit fills bakie 10 completely, and metal near Schottky drain one lateral edges and bakie near Schottky drain one side edge-justified calibrations, form right angle and leak field plate 12, and right angle is leaked field plate and Schottky drain is electrically connected, the metal of deposit is Ti/Mo/Au metallic combination, and namely lower floor is Ti, middle level is Mo, upper strata is Au, and its thickness is 0.25 μm/0.21 μm/0.13 μm.Near Schottky drain one lateral edges and source groove, the distance between Schottky drain one lateral edges is 1.13 μm to source, right angle field plate, right angle leaks field plate, and near grid one lateral edges and bakie, the distance between grid one lateral edges is 1.13 μm, and it is 3.7 μm that source, right angle field plate leaks the distance of field plate between grid one lateral edges near Schottky drain one lateral edges and right angle.The process conditions that depositing metal adopts are: vacuum degree is less than 1.8 × 10 -3pa, power bracket is 200 ~ 1000W, and evaporation rate is less than .

Step 10. leaks deposit SiO on other region of field plate 12 top and passivation layer 8 at field plate 11 top, source, right angle, right angle 2make protective layer 13, as Fig. 3 j.

Plasma enhanced CVD technology is used to leak deposit SiO on other region of field plate 12 top and passivation layer 8 at field plate 11 top, source, right angle, right angle 2form protective layer 13, its thickness is 0.64 μm, thus completes the making of whole device, and the process conditions that deposit protective layer adopts are: N 2o flow is 850sccm, SiH 4flow is 200sccm, and temperature is 250 DEG C, and RF power is 25W, and pressure is 1100mTorr.

Embodiment two: making substrate is carborundum, passivation layer is SiO 2, protective layer is SiN, and source, right angle field plate and right angle leak the composite field plate power device leaking field plate based on source, right angle field plate and right angle that field plate is Ti/Ni/Au metallic combination.

Step one. in silicon carbide substrates 1, extension AlN and GaN material make transition zone 2 from bottom to top, as Fig. 3 a.

1.1) the non-doped with Al N material that metal organic chemical vapor deposition technology epitaxial thickness in silicon carbide substrates 1 is 50nm is used; The process conditions of its extension are: temperature is 1000 DEG C, and pressure is 45Torr, and hydrogen flowing quantity is 4600sccm, and ammonia flow is 4600sccm, and aluminium source flux is 5 μm of ol/min;

1.2) use metal organic chemical vapor deposition technology epitaxial thickness on AlN material to be the GaN material of 2.45 μm, complete the making of transition zone 2; The process conditions of its extension are: temperature is 1000 DEG C, and pressure is 45Torr, and hydrogen flowing quantity is 4600sccm, and ammonia flow is 4600sccm, and gallium source flux is 120 μm of ol/min.

The extension of this step is not limited to metal organic chemical vapor deposition technology, also can adopt molecular beam epitaxy technique or hydride gas-phase epitaxy technology.

Step 2. extension Al from bottom to top on transition zone 2 0.3ga 0.7n and GaN material make barrier layer 3, as Fig. 3 b.

2.1) use that metal organic chemical vapor deposition technology deposition thickness on transition zone 2 is 27nm, al composition is the Al of 0.3 0.3ga 0.7n material; The process conditions of its extension are: temperature is 1100 DEG C, and pressure is 45Torr, and hydrogen flowing quantity is 4600sccm, and ammonia flow is 4600sccm, and gallium source flux is 16 μm of ol/min, and aluminium source flux is 8 μm of ol/min;

2.2) use metal organic chemical vapor deposition technology at Al 0.3ga 0.7on N material, epitaxial thickness is the GaN material of 3nm, completes the making of barrier layer 3; The process conditions of its extension are: temperature is 1000 DEG C, and pressure is 41Torr, and hydrogen flowing quantity is 4200sccm, and ammonia flow is 4200sccm, and gallium source flux is 15 μm of ol/min.

The extension of this step is not limited to metal organic chemical vapor deposition technology, also can adopt molecular beam epitaxy technique or hydride gas-phase epitaxy technology.

Step 3. make source electrode 4, as Fig. 3 c at the left end depositing metal Ti/Al/Ni/Au of barrier layer 3.

3.1) on barrier layer 3, first time makes mask, use electron beam evaporation technique at its left end depositing metal, wherein the metal of institute's deposit is Ti/Al/Ni/Au metallic combination, namely be respectively Ti, Al, Ni and Au from bottom to top, its thickness is 0.018 μm/0.135 μm/0.046 μm/0.052 μm.The process conditions that depositing metal adopts are: vacuum degree is less than 1.8 × 10 -3pa, power bracket is 200 ~ 1000W, and evaporation rate is less than ;

3.2) at N 2carry out rapid thermal annealing in atmosphere, complete the making of source electrode 4, the process conditions that rapid thermal annealing adopts are: temperature is 850 DEG C, and the time is 35s.

The Metal deposition of this step is not limited to electron beam evaporation technique, also can adopt sputtering technology.

Step 4. make Schottky drain 5, as Fig. 3 d at the right-hand member depositing metal Ni/Au of barrier layer 3.

On barrier layer 3, second time makes mask, and use electron beam evaporation technique at its right-hand member depositing metal, make Schottky drain 5, the metal of wherein institute's deposit is Ni/Au metallic combination, and namely lower floor is Ni, upper strata is Au, and its thickness is 0.054 μm/0.24 μm.The process conditions that depositing metal adopts are: vacuum degree is less than 1.8 × 10 -3pa, power bracket is 200 ~ 1000W, and evaporation rate is less than .

The Metal deposition of this step is not limited to electron beam evaporation technique, also can adopt sputtering technology.

Step 5. the barrier layer on the right of the source electrode left side and Schottky drain carries out etching and make table top 6, as Fig. 3 e.

On barrier layer 3, third time makes mask, and use on the barrier layer of reactive ion etching technology on the right of the source electrode left side and Schottky drain and etch, form table top 6, etching depth is 100nm.The process conditions that etching adopts are: Cl 2flow is 15sccm, and pressure is 10mTorr, and power is 100W.

The etching of this step is not limited to reactive ion etching technology, also can adopt sputtering technology or plasma etching technology.

Step 6. on the barrier layer between source electrode and Schottky drain, depositing metal Ni/Au makes grid 7, as Fig. 3 f.

Barrier layer makes mask the 4th time, use depositing metal on the barrier layer of electron beam evaporation technique between source electrode and Schottky drain, make grid 7, wherein the metal of institute's deposit is Ni/Au metallic combination, namely lower floor is Ni, upper strata is Au, its thickness is 0.054 μm/0.24 μm, and the process conditions that depositing metal adopts are: vacuum degree is less than 1.8 × 10 -3pa, power bracket is 200 ~ 1000W, and evaporation rate is less than .

The Metal deposition of this step is not limited to electron beam evaporation technique, also can adopt sputtering technology.

Step 7. on source electrode top, Schottky drain top, grid top and barrier layer other area top deposit passivation layers 8, as Fig. 3 g.

Use plasma enhanced CVD technology to cover other area top of source electrode top, Schottky drain top, grid top and barrier layer respectively, complete the SiO that deposition thickness is 7.6 μm 2passivation layer 8; Its process conditions adopted are: N 2o flow is 850sccm, SiH 4flow is 200sccm, and temperature is 250 DEG C, and RF power is 25W, and pressure is 1100mTorr.

The deposit of the passivation layer of this step is not limited to plasma enhanced CVD technology, also can adopt evaporation technique or atomic layer deposition technology or sputtering technology or molecular beam epitaxy technique.

Step 8. carry out etching making source groove 9 and bakie 10 in the passivation layer between grid 7 and Schottky drain 5, as Fig. 3 h.

Passivation layer 8 makes mask the 5th time, use in the passivation layer of reactive ion etching technology between grid 7 and Schottky drain 5 and etch, to make same depth, the source groove 9 of same widths and bakie 10, and source groove is near grid, bakie is near Schottky drain, the degree of depth of source groove and bakie is 6.3 μm, width is 6.7 μm, the bottom of source groove and the distance between the bottom of bakie and barrier layer are 1.3 μm, source groove near grid one lateral edges and grid the Distance geometry bakie between Schottky drain one lateral edges near Schottky drain one lateral edges and Schottky drain, the distance between grid one lateral edges is 7.183 μm.The process conditions that etching adopts are: CF 4flow is 45sccm, O 2flow is 5sccm, and pressure is 15mTorr, and power is 250W.

The etching of this step is not limited to reactive ion etching technology, also can adopt sputtering technology or plasma etching technology.

Step 9. on the passivation layer in source groove 9, in bakie 10 and between grid 7 and Schottky drain 5, depositing metal Ti/Ni/Au makes source, right angle field plate 11 and right angle leakage field plate 12, as Fig. 3 i.

Passivation layer 8 makes mask the 6th time, use depositing metal on the passivation layer 8 of electron beam evaporation technique in source groove 9 and between grid and Schottky drain, the metal of institute's deposit fills source groove 9 completely, and metal near grid one lateral edges and source groove near grid one side edge-justified calibrations, form source, right angle field plate 11, and source, right angle field plate and source electrode are electrically connected; Depositing metal on passivation layer 8 in bakie 10 and between grid and Schottky drain, the metal of institute's deposit fills bakie 10 completely, and metal near Schottky drain one lateral edges and bakie near Schottky drain one side edge-justified calibrations, form right angle and leak field plate 12, and right angle is leaked field plate and Schottky drain is electrically connected, the metal of deposit is Ti/Ni/Au metallic combination, and namely lower floor is Ti, middle level is Ni, upper strata is Au, and its thickness is 3.3 μm/1.8 μm/1.2 μm.Near Schottky drain one lateral edges and source groove, the distance between Schottky drain one lateral edges is 7.9 μm to source, right angle field plate, right angle leaks field plate, and near grid one lateral edges and bakie, the distance between grid one lateral edges is 7.9 μm, and it is 6 μm that source, right angle field plate leaks the distance of field plate between grid one lateral edges near Schottky drain one lateral edges and right angle.The process conditions that depositing metal adopts are: vacuum degree is less than 1.8 × 10 -3pa, power bracket is 200 ~ 1000W, and evaporation rate is less than .

The Metal deposition of this step is not limited to electron beam evaporation technique, also can adopt sputtering technology.

Step 10. on field plate 11 top, source, right angle, right angle other area top deposit SiN of leaking field plate 12 top and passivation layer 8 makes protective layer 13, as Fig. 3 j.

Use plasma enhanced CVD technology on field plate 11 top, source, right angle, other area top deposit SiN that right angle leaks field plate 12 top and passivation layer 8 forms protective layer 13; its thickness is 3.4 μm; thus completing the making of whole device, its process conditions adopted are: gas is NH 3, N 2and SiH 4, gas flow is respectively 2.5sccm, 950sccm and 250sccm, and temperature, RF power and pressure are respectively 300 DEG C, 25W and 950mTorr.

The deposit of the protective layer of this step is not limited to plasma enhanced CVD technology, also can adopt evaporation technique or atomic layer deposition technology or sputtering technology or molecular beam epitaxy technique.

Embodiment three: making substrate is silicon, passivation layer is SiN, and protective layer is SiO 2, source, right angle field plate and right angle leak the composite field plate power device leaking field plate based on source, right angle field plate and right angle that field plate is Ti/Pt/Au metallic combination.

Steps A. on silicon substrate 1, extension AlN and GaN material make transition zone 2 from bottom to top, as Fig. 3 a.

A1) metal organic chemical vapor deposition technology is used to be 800 DEG C in temperature, pressure is 40Torr, and hydrogen flowing quantity is 4000sccm, and ammonia flow is 4000sccm, aluminium source flux is under the process conditions of 25 μm of ol/min, and on silicon substrate 1, epitaxial thickness is the AlN material of 200nm;

A2) metal organic chemical vapor deposition technology is used to be 980 DEG C in temperature, pressure is 45Torr, hydrogen flowing quantity is 4000sccm, ammonia flow is 4000sccm, gallium source flux is under the process conditions of 120 μm of ol/min, on AlN material, epitaxial thickness is the GaN material of 4.8 μm, completes the making of transition zone 2.

Step B. deposit Al from bottom to top on transition zone 0.1ga 0.9n and GaN material make barrier layer 3, as Fig. 3 b.

B1) metal organic chemical vapor deposition technology is used to be 1000 DEG C in temperature, pressure is 40Torr, hydrogen flowing quantity is 4000sccm, ammonia flow is 4000sccm, gallium source flux is 12 μm of ol/min, aluminium source flux is under the process conditions of 12 μm of ol/min, and on transition zone 2, epitaxial thickness is 46nm, and al composition is the Al of 0.1 0.1ga 0.9n material;

B2) use metal organic chemical vapor deposition technology to be 1000 DEG C in temperature, pressure is 40Torr, and hydrogen flowing quantity is 4000sccm, and ammonia flow is 4000sccm, and gallium source flux is under the process conditions of 3 μm of ol/min, at Al 0.1ga 0.9on N material, epitaxial thickness is the GaN material of 4nm, completes the making of barrier layer 3.

Step C. makes source electrode 4, as Fig. 3 c at the left end depositing metal Ti/Al/Ni/Au of barrier layer 3.

C1) on barrier layer 3, first time makes mask, uses electron beam evaporation technique to be less than 1.8 × 10 in vacuum degree -3pa, power bracket is 200 ~ 1000W, and evaporation rate is less than process conditions under, at its left end depositing metal, the metal of wherein institute's deposit is Ti/Al/Ni/Au metallic combination, is namely respectively Ti, Al, Ni and Au from bottom to top, and its thickness is 0.018 μm/0.135 μm/0.046 μm/0.052 μm;

C2) at N 2atmosphere, temperature is 850 DEG C, and the time is carry out rapid thermal annealing under the process conditions of 35s, completes the making of source electrode 4.

Step D. makes Schottky drain 5, as Fig. 3 d at the right-hand member depositing metal Ni/Au of barrier layer 3.

On barrier layer 3, second time makes mask, uses electron beam evaporation technique to be less than 1.8 × 10 in vacuum degree -3pa, power bracket is 200 ~ 1000W, and evaporation rate is less than process conditions under, at the right-hand member depositing metal of barrier layer 3, make Schottky drain 5, the metal of wherein institute's deposit is Ni/Au metallic combination, and namely lower floor is Ni, upper strata is Au, and its thickness is 0.054 μm/0.24 μm.

Step e. the barrier layer on the right of the source electrode left side and Schottky drain carries out etching and make table top 6, as Fig. 3 e.

On barrier layer 3, third time makes mask, uses reactive ion etching technology at Cl 2flow is 15sccm, and pressure is 10mTorr, and power is under the process conditions of 100W, and the barrier layer on the right of the source electrode left side and Schottky drain etches, and form table top 6, etching depth is 200nm.

Step F. on the barrier layer between source electrode and Schottky drain, depositing metal Ni/Au makes grid 7, as Fig. 3 f.

Barrier layer makes mask the 4th time, uses electron beam evaporation technique to be less than 1.8 × 10 in vacuum degree -3pa, power bracket is 200 ~ 1000W, and evaporation rate is less than process conditions under, depositing metal on the barrier layer between source electrode and Schottky drain, make grid 7, the metal of wherein institute's deposit is Ni/Au metallic combination, and namely lower floor is Ni, upper strata is Au, and its thickness is 0.054 μm/0.24 μm.

Step G. on source electrode top, Schottky drain top, grid top and barrier layer other area top deposit passivation layers 8, as Fig. 3 g.

Plasma enhanced CVD technology is used to be NH at gas 3, N 2and SiH 4gas flow is respectively 2.5sccm, 950sccm and 250sccm, temperature, RF power and pressure are respectively 300 DEG C, under the process conditions of 25W and 950mTorr, on source electrode top, Schottky drain top, grid top and barrier layer other area top deposition thicknesses be the SiN of 15.62 μm, make passivation layer 8.

Etching making source groove 9 and bakie 10 is carried out, as Fig. 3 h in the passivation layer of step H. between grid 7 and Schottky drain 5.

Passivation layer 8 makes mask the 5th time, uses reactive ion etching technology at CF 4flow is 45sccm, O 2flow is 5sccm, pressure is 15mTorr, power is under the process conditions of 250W, etch in passivation layer between grid 7 and Schottky drain 5, to make same depth, the source groove 9 of same widths and bakie 10, and source groove is near grid, bakie is near Schottky drain, the degree of depth of source groove and bakie is 13.1 μm, width is 11.8 μm, the bottom of source groove and the distance between the bottom of bakie and barrier layer are 2.52 μm, source groove near grid one lateral edges and grid the Distance geometry bakie between Schottky drain one lateral edges near Schottky drain one lateral edges and Schottky drain, the distance between grid one lateral edges is 20.796 μm.

On the passivation layer of step I. in source groove 9, in bakie 10 and between grid 7 and Schottky drain 5, depositing metal Ti/Pt/Au makes source, right angle field plate 11 and right angle leakage field plate 12, as Fig. 3 i.

Passivation layer 8 makes mask the 6th time, uses electron beam evaporation technique to be less than 1.8 × 10 in vacuum degree -3pa, power bracket is 200 ~ 1000W, and evaporation rate is less than process conditions under, depositing metal on passivation layer 8 in source groove 9 and between grid and Schottky drain, the metal of institute's deposit fills source groove 9 completely, and metal near grid one lateral edges and source groove near grid one side edge-justified calibrations, form source, right angle field plate 11, and source, right angle field plate and source electrode are electrically connected; Depositing metal on passivation layer 8 in bakie 10 and between grid and Schottky drain, the metal of institute's deposit fills bakie 10 completely, and metal near Schottky drain one lateral edges and bakie near Schottky drain one side edge-justified calibrations, form right angle and leak field plate 12, and right angle is leaked field plate and Schottky drain is electrically connected, the metal of deposit is Ti/Pt/Au metallic combination, and namely lower floor is Ti, middle level is Pt, upper strata is Au, and its thickness is 6 μm/5.9 μm/1.2 μm.Near Schottky drain one lateral edges and source groove, the distance between Schottky drain one lateral edges is 13.6 μm to source, right angle field plate, right angle leaks field plate, and near grid one lateral edges and bakie, the distance between grid one lateral edges is 13.6 μm, and it is 11.2 μm that source, right angle field plate leaks the distance of field plate between grid one lateral edges near Schottky drain one lateral edges and right angle.

Step J. on field plate 11 top, source, right angle, right angle leaks other area top deposit SiO of field plate 12 top and passivation layer 8 2make protective layer 13, as Fig. 3 j.

Use plasma enhanced CVD technology at N 2o and SiH 4, gas flow is respectively 850sccm and 200sccm, and temperature is 250 DEG C, RF power is 25W, and pressure is under the process conditions of 1100mTorr, deposit SiO on other region of leaking field plate 12 top and passivation layer 8 at field plate 11 top, source, right angle, right angle 2make protective layer 13, its thickness is 8.7 μm, thus completes the making of whole device.

Effect of the present invention further illustrates by following emulation.

Emulation 1: when Schottky drain adds malleation, to employing conventional source field plate with leak electric field in the power device of field plate and the barrier layer of device of the present invention and emulate, result as Fig. 4, wherein conventional source field plate effective length L 1equal with the effective total length of source, right angle of the present invention field plate.

As seen from Figure 4: when Schottky drain adds malleation, the electric field curve of power device in barrier layer of conventional source field plate and leakage field plate is adopted only to define 2 approximately equalised peak electric field, the area that its electric field curve in barrier layer covers is very little, and the electric field curve of device of the present invention in barrier layer defines 3 approximately equalised peak electric field, the area that the electric field curve of device of the present invention in barrier layer is covered increases greatly, the area approximation covered due to the electric field curve in barrier layer equals the forward break down voltage of device, illustrate that the forward break down voltage of device of the present invention is far longer than the forward break down voltage of the power device adopting conventional source field plate and leak field plate.

Emulation 2: when Schottky drain adds negative pressure, emulate electric field in employing conventional source field plate and the leakage power device of field plate and the barrier layer of device of the present invention, result is as Fig. 5, and wherein tradition leaks field plate effective length L 2to leak the effective total length of field plate equal with right angle of the present invention.

As seen from Figure 5: when Schottky drain adds negative pressure, the electric field curve of power device in barrier layer of conventional source field plate and leakage field plate is adopted only to define 2 approximately equalised peak electric field, the area that its electric field curve in barrier layer covers is very little, and the electric field curve of device of the present invention in barrier layer defines 3 approximately equalised peak electric field, the area that the electric field curve of device of the present invention in barrier layer is covered increases greatly, the area approximation covered due to the electric field curve in barrier layer equals the reverse breakdown voltage of device, illustrate that the reverse breakdown voltage of device of the present invention is far longer than the reverse breakdown voltage of the power device adopting conventional source field plate and leak field plate.

For those skilled in the art; after having understood content of the present invention and principle; can when not deviating from the principle and scope of the present invention; carry out various correction in form and details and change according to method of the present invention, but these are based on correction of the present invention with change still within claims of the present invention.

Claims (9)

1. one kind leaks the composite field plate power device of field plate based on source, right angle field plate and right angle; comprise from bottom to top: substrate (1), transition zone (2), barrier layer (3), passivation layer (8) and protective layer (13); source electrode (4), Schottky drain (5) and grid (7) is deposited with above barrier layer; table top (6) is carved with in the side of barrier layer; and land depth is greater than barrier layer thickness, it is characterized in that:
Source groove (9) and bakie (10) is carved with in passivation layer (8);
Be deposited with source, right angle field plate (11) and right angle between passivation layer (8) and protective layer (13) and leak field plate (12);
Source, described right angle field plate (11) and source electrode (4) are electrically connected, and lower end is filled in source groove (9) completely, and close grid one lateral edges in source, right angle field plate (11) and source groove are near grid one side edge-justified calibrations;
Described right angle leaks field plate (12) and is electrically connected with Schottky drain (5), and lower end is filled in bakie (10) completely, and close Schottky drain one lateral edges in right angle leakage field plate (12) and bakie are near Schottky drain one side edge-justified calibrations.
2. the composite field plate power device leaking field plate based on source, right angle field plate and right angle according to claim 1, is characterized in that source groove is near grid, bakie near Schottky drain, the degree of depth s of source groove 1with the degree of depth s of bakie 2equal, and be 0.59 ~ 13.1 μm, the width b of source groove 1with the width b of bakie 2equal, and be 1.01 ~ 11.8 μm; Distance d between the bottom of source groove and barrier layer 1and the distance d between the bottom of bakie and barrier layer 2equal, and be 0.112 ~ 2.52 μm.
3. the composite field plate power device leaking field plate based on source, right angle field plate and right angle according to claim 1, it is characterized in that source, right angle field plate near Schottky drain one lateral edges and source groove the distance c between Schottky drain one lateral edges 1it is 1.13 ~ 13.6 μm; Right angle leakage field plate is the distance c between grid one lateral edges near grid one lateral edges and bakie 2it is 1.13 ~ 13.6 μm; It is 3.7 ~ 11.2 μm that described source, right angle field plate leaks the distance L of field plate between grid one lateral edges near Schottky drain one lateral edges and right angle.
4. the composite field plate power device leaking field plate based on source, right angle field plate and right angle according to claim 1, it is characterized in that source groove near grid one lateral edges and grid the distance a between Schottky drain one lateral edges 1and bakie near Schottky drain one lateral edges and Schottky drain the distance a between grid one lateral edges 2equal, source groove is the distance a between Schottky drain one lateral edges near grid one lateral edges and grid 1for s 1× (d 1) 0.5, wherein s 1for the degree of depth of source groove, d 1for the distance between source trench bottom and barrier layer; Bakie is the distance a between grid one lateral edges near Schottky drain one lateral edges and Schottky drain 2for s 2× (d 2) 0.5, wherein s 2for the degree of depth of bakie, d 2for the distance bottom bakie and between barrier layer.
5. the composite field plate power device leaking field plate based on source, right angle field plate and right angle according to claim 1, is characterized in that substrate (1) adopts sapphire or carborundum or silicon materials.
6. make a method of leaking the composite field plate power device of field plate based on source, right angle field plate and right angle, comprise the steps:
The first step, at the upper extension GaN base semiconductor material with wide forbidden band of substrate (1), forms transition zone (2);
Second step, extension GaN base semiconductor material with wide forbidden band on transition zone, forms barrier layer (3);
3rd step, on barrier layer, first time makes mask, utilizes this mask at the left end depositing metal of barrier layer, then at N 2carry out rapid thermal annealing in atmosphere, make source electrode (4);
4th step, on barrier layer, second time makes mask, utilizes this mask at the right-hand member depositing metal of barrier layer, makes Schottky drain (5);
5th step, on barrier layer, third time makes mask, utilize this mask on the left of source electrode with Schottky drain on the right side of barrier layer (3) on etch, and the etched area degree of depth is greater than barrier layer thickness, forms table top (6);
6th step, barrier layer makes mask the 4th time, utilizes depositing metal on the barrier layer of this mask between source electrode and Schottky drain, make grid (7);
7th step, respectively on source electrode (4) top, Schottky drain (5) top, grid (7) top and barrier layer other area top deposit passivation layers (8);
8th step, make mask 5th time over the passivation layer, utilize in the passivation layer of this mask between grid (7) and Schottky drain (5) and etch, to make source groove (9) and the bakie (10) of same depth and same widths, and source groove is near grid, bakie is near Schottky drain, and source groove is the distance a between Schottky drain one lateral edges near grid one lateral edges and grid 1for s 1× (d 1) 0.5, wherein s 1for the degree of depth of source groove, d 1for the distance between source trench bottom and barrier layer, bakie is the distance a between grid one lateral edges near Schottky drain one lateral edges and Schottky drain 2for s 2× (d 2) 0.5, wherein s 2for the degree of depth of bakie, d 2for the distance bottom bakie and between barrier layer;
9th step, make mask 6th time over the passivation layer, utilize the upper depositing metal of the passivation layer (8) of this mask in source groove (9) and between grid and Schottky drain, institute's depositing metal fills source groove (9) completely, and the edge of metal near grid side and the justified margin of the close grid side of source groove (9), form source, right angle field plate (11), and this source, right angle field plate and source electrode are electrically connected; The upper depositing metal of passivation layer (8) in bakie (10) and between grid and Schottky drain, institute's depositing metal fills bakie (10) completely, and metal is near Schottky drain one lateral edges and close Schottky drain one side edge-justified calibrations of bakie (10), form right angle and leak field plate (12), and this right angle leakage field plate and Schottky drain are electrically connected;
Tenth step, on field plate top, source, right angle, right angle leaks other area top deposit insulating dielectric materials of field plate top and passivation layer, forms protective layer (13), completes the making of whole device.
7. method according to claim 6, it is characterized in that the metal of the upper deposit of passivation layer (8) in the 9th step in source groove (9), in bakie (10) and between grid and Schottky drain, adopt three-layer metal combination Ti/Mo/Au, namely lower floor is Ti, middle level is Mo, upper strata is Au, and its thickness is 0.25 ~ 6 μm/0.21 ~ 5.9 μm/0.13 ~ 1.2 μm.
8. method according to claim 6, it is characterized in that the metal of the upper deposit of passivation layer (8) in the 9th step in source groove (9), in bakie (10) and between grid and Schottky drain, adopt three-layer metal combination Ti/Ni/Au, namely lower floor is Ti, middle level is Ni, upper strata is Au, and its thickness is 0.25 ~ 6 μm/0.21 ~ 5.9 μm/0.13 ~ 1.2 μm.
9. method according to claim 6, it is characterized in that the metal of the upper deposit of passivation layer (8) in the 9th step in source groove (9), in bakie (10) and between grid and Schottky drain, further employing three-layer metal combination Ti/Pt/Au, namely lower floor is Ti, middle level is Pt, upper strata is Au, and its thickness is 0.25 ~ 6 μm/0.21 ~ 5.9 μm/0.13 ~ 1.2 μm.
CN201410660221.1A 2014-11-18 2014-11-18 Complex field plate power device based on right-angled source field plate and right-angled drain field plate CN104409494B (en)

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