CN111952355B - GaN HEMT device based on multi-leakage-finger structure and preparation method thereof - Google Patents

GaN HEMT device based on multi-leakage-finger structure and preparation method thereof Download PDF

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CN111952355B
CN111952355B CN202010850469.XA CN202010850469A CN111952355B CN 111952355 B CN111952355 B CN 111952355B CN 202010850469 A CN202010850469 A CN 202010850469A CN 111952355 B CN111952355 B CN 111952355B
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finger
drain
gate
leakage
gan hemt
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CN111952355A (en
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莫炯炯
郁发新
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Zhejiang University ZJU
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/402—Field plates
    • H01L29/404—Multiple field plate structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/2003—Nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
    • H01L29/66462—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface

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Abstract

The invention provides a GaN HEMT device based on a multi-leakage-finger structure and a preparation method thereof, wherein the device comprises: a source electrode, a drain electrode and an MIS gate electrode formed on the GaN HEMT thin film structure; the drain finger metal field plate is formed between the MIS gate electrode and the drain electrode, the drain finger metal field plate comprises a plurality of horizontal field plates and a plurality of vertical field plates, the horizontal field plates comprise conductive materials formed on the drain fingers, and the vertical field plates comprise conductive materials formed on the side walls of the drain finger grooves. By forming the drain finger metal field plate in contact connection with the drain electrode between the gate electrode and the drain electrode, the trend of an electric field at the drain electrode end can be effectively changed, the voltage resistance of the GaN HEMT device is improved, and the miniaturization of the device is facilitated; in addition, the vertical field plate can effectively reduce the resistance of the whole drain electrode terminal, so that low on-resistance can be obtained; furthermore, the drain finger metal field plate reduces a leakage path of a drain electrode terminal of the ohmic contact with a poor form, thereby suppressing a leakage current.

Description

GaN HEMT device based on multi-leakage-finger structure and preparation method thereof
Technical Field
The invention belongs to the field of semiconductor power electronic devices, and particularly relates to a GaN HEMT device based on a multi-leakage-finger structure and a preparation method thereof.
Background
The third generation Semiconductor material, i.e. the Wide Band Gap Semiconductor (WBGS) Semiconductor material, is developed following the first generation silicon, germanium, the second generation gallium arsenide, indium phosphide, etc. Among the third generation semiconductor materials, gallium nitride (GaN) has superior properties such as wide band gap, direct band gap, high breakdown electric field, lower dielectric constant, high electron saturation drift velocity, strong radiation resistance, and good chemical stability, and becomes a key semiconductor material for manufacturing a new generation of microelectronic devices and circuits following germanium, silicon, and gallium arsenide. Especially, the material has the advantages of unique thickness in the aspects of high-temperature, high-power, high-frequency and anti-radiation electronic devices and full-wavelength and short-wavelength photoelectric devices, and is an ideal material for realizing the high-temperature, high-power, high-frequency, anti-radiation and full-wavelength photoelectric devices.
The High Electron Mobility Transistor (HEMT) based on the AlGaN/GaN heterojunction has the advantages of low on-resistance, High breakdown voltage, High switching frequency and the like, so that the HEMT can be used as a core device in various power conversion systems, and has an important application prospect in the aspects of energy conservation and consumption reduction. However, GaN-on-Si devices have an important problem, namely the relatively high buffer leakage current, which can seriously affect the breakdown voltage (V) of the deviceBD) The drain metal ohmic contact is crucial to the leakage current of the device, and the metal alloy below the drain metal ohmic contact can generate metal burr spikes to cause local peak values of an electric field, so that the leakage current is enhanced, the breakdown voltage of the device is reduced, and the device is subjected to early breakdown.
Disclosure of Invention
In view of the above-mentioned drawbacks of the prior art, an object of the present invention is to provide a GaN HEMT device based on a multi-finger-drain structure and a method for manufacturing the same, which are used to solve the problems of the GaN HEMT device in the prior art that a metal burr peak generated by a drain ohmic contact causes a local peak of an electric field, thereby enhancing a leakage current, and reducing a breakdown voltage of the device.
In order to achieve the above and other related objects, the present invention provides a method for manufacturing a GaN HEMT device based on a multi-drain finger structure, the method comprising:
providing a GaN HEMT semiconductor device thin film structure, wherein the GaN HEMT semiconductor device thin film structure sequentially comprises a semiconductor substrate layer, an AlGaN buffer layer, a GaN channel layer and an AlGaN barrier layer along the growth direction of the GaN HEMT semiconductor device thin film structure;
defining a grid region and a finger leakage region on the GaN HEMT semiconductor device thin film structure by using a photoetching mask, and forming a plurality of finger leakage grooves in the finger leakage region along the width direction, wherein the depth of each finger leakage groove is between 2DEG and the upper surface of the semiconductor substrate layer, and a finger leakage is formed between every two adjacent finger leakage grooves;
defining a source electrode area and a drain electrode area on the GaN HEMT semiconductor device thin film structure by using a photoetching mask, and forming a source electrode and a drain electrode in ohmic contact with the source electrode area and the drain electrode area, wherein the drain finger area is formed between the grid area and the drain electrode area;
forming a gate dielectric layer in the gate region;
respectively defining a grid metal region and a leakage finger metal region based on the grid region and the leakage finger region by utilizing a photoetching mask, depositing conductive materials on the grid metal region and the leakage finger metal region to respectively form a grid metal electrode and a leakage finger metal field plate, wherein the leakage finger metal field plate extends to be in contact connection with the drain electrode, the conductive materials on the leakage finger form a plurality of horizontal field plates, and the conductive materials on the side wall of the leakage finger groove form a plurality of vertical field plates.
Optionally, the length of the gate region is the same as the length of the gate metal region, or the length of the gate region is greater than the length of the gate metal region, and a distance between two sides of the gate metal region and two corresponding sides of the gate region is less than 50 nm.
Optionally, the drain finger region is connected to the drain electrode region, and the length of the drain finger region is the same as the length of the drain finger metal region.
Optionally, the length of the drain finger metal region is greater than that of the drain finger region, a distance between two sides of the drain finger metal region and two sides corresponding to the drain finger region is less than 50nm, and the horizontal field plate further includes a conductive material deposited on the GaN HEMT semiconductor device thin film structure outside the drain finger.
Optionally, during the step of forming a plurality of finger grooves, a plurality of finger grooves are formed in the gate region along the width direction at the same time, a finger is formed between two adjacent finger grooves, and the depth of the finger groove is below 2DEG and is used for isolating the 2DEG between two adjacent fingers; the gate dielectric layer is formed on the gate finger and the surface of the gate finger groove at the same time; and the grid metal electrode is simultaneously formed on the grid dielectric layer on the surface of the grid finger and the surface of the grid finger groove.
Optionally, the number of the gate fingers is the same as that of the drain fingers, the width of the gate fingers is the same as that of the drain fingers and ranges from 100nm to 300nm, and the width of the gate finger grooves is the same as that of the drain finger grooves and ranges from 200nm to 500 nm.
Optionally, the width of two adjacent gate fingers distributed along the width direction and the width of two adjacent drain fingers are linearly widened, and the depth of two adjacent drain finger grooves distributed along the width direction is gradually reduced.
Optionally, the length of the leakage finger groove distributed along the width direction is linearly shortened, and the leakage finger metal field plate is linearly narrowed along the width direction.
Optionally, at least two rows of the finger leaking grooves distributed along the width direction are formed along the length direction, the depth of the finger leaking grooves distributed along the width direction in each row is the same, and the depth of the finger leaking grooves distributed along the width direction in each row along the length direction is linearly deepened.
Optionally, the finger leaking groove is a U-shaped finger leaking groove.
Furthermore, the finger leaking groove is a groove with an inclined bottom, and the inclined groove is deepened in sequence along the length direction.
Optionally, the gate dielectric layer is made of at least one of aluminum oxide and hafnium oxide, the thickness of the gate dielectric layer is between 10nm and 30nm, and the thickness of the drain finger metal field plate is between 100nm and 200 nm.
The invention also provides a GaN HEMT device based on the multi-finger-leakage structure, which comprises:
the GaN HEMT semiconductor device thin film structure comprises a semiconductor substrate layer, an AlGaN buffer layer, a GaN channel layer and an AlGaN barrier layer which are sequentially stacked;
the source electrode, the drain electrode and the MIS gate electrode are formed on the GaN HEMT semiconductor device thin film structure in ohmic contact, the source electrode and the drain electrode are respectively arranged at two ends of the MIS gate electrode, and the MIS gate electrode comprises a gate dielectric layer and a gate metal electrode thereon;
the drain finger metal field plate is formed between the MIS gate electrode and the drain electrode, the drain finger metal field plate extends to be in contact connection with the drain electrode, a plurality of drain finger grooves are formed in the drain finger metal region in the width direction, a drain finger is formed between every two adjacent drain finger grooves, the depth of each drain finger groove is between the lower portion of 2DEG and the upper surface of the semiconductor substrate layer, the drain finger metal field plate comprises a plurality of horizontal field plates and a plurality of vertical field plates, each horizontal field plate comprises a conductive material formed on each drain finger, and each vertical field plate comprises a conductive material formed on the side wall of each drain finger groove.
Optionally, the finger leaking groove is connected to the drain electrode, and the length of the finger leaking groove is the same as that of the finger leaking metal region.
Optionally, the length of the drain finger metal region is greater than the length of the drain finger groove, a distance between two sides of the drain finger metal region and two corresponding sides of the drain finger groove is less than 50nm, and the horizontal field plate further includes a conductive material deposited on the GaN HEMT semiconductor device thin film structure outside the drain finger.
Optionally, the MIS gate electrode is formed in a gate region, a plurality of gate finger grooves are formed in the gate region along a width direction, a gate finger is formed between every two adjacent gate finger grooves, the depth of each gate finger groove is below 2DEG and used for isolating the 2DEG between every two adjacent gate fingers, gate dielectric layers are simultaneously formed on the gate fingers and on the surfaces of the gate finger grooves, and gate metal electrodes are simultaneously formed on the surfaces of the gate fingers and on the gate dielectric layers on the surfaces of the gate finger grooves.
Optionally, the number of the gate fingers is the same as that of the drain fingers, the width of the gate fingers is the same as that of the drain fingers and ranges from 100nm to 300nm, and the width of the gate finger grooves is the same as that of the drain finger grooves and ranges from 200nm to 500 nm.
Optionally, the width of two adjacent gate fingers distributed along the width direction and the width of two adjacent drain fingers are linearly widened, and the depth of two adjacent drain finger grooves distributed along the width direction is gradually reduced.
Optionally, the length of the leakage finger groove distributed along the width direction is linearly shortened, and the leakage finger metal field plate is linearly narrowed along the width direction.
Optionally, at least two rows of the finger leaking grooves distributed along the width direction are formed along the length direction, the depth of the finger leaking grooves distributed along the width direction in each row is the same, and the depth of the finger leaking grooves distributed along the width direction in each row along the length direction is linearly deepened.
Optionally, the finger leaking groove is a U-shaped finger leaking groove.
Furthermore, the finger leaking groove is a groove with an inclined bottom, and the inclined groove is deepened in sequence along the length direction.
Optionally, the gate dielectric layer is made of at least one of aluminum oxide and hafnium oxide, the thickness of the gate dielectric layer is between 10nm and 30nm, and the thickness of the drain finger metal field plate is between 100nm and 200 nm.
As described above, the GaN HEMT device based on the multi-drain-finger structure and the preparation method thereof, by forming a drain finger metal field plate in contact with the drain electrode between the gate electrode and the drain electrode, the drain finger metal field plate comprises a plurality of horizontal field plates and vertical field plates which are distributed at intervals along the width direction of the device, the horizontal field plates extend along the length direction of the device, the vertical field plates extend along the thickness direction of the device, the metal field plate can effectively change the trend of the electric field of the drain electrode end, reduce the influence of the peak electric field and the peak of the ohmic alloy at the edge of the drain electrode of the ohmic contact, make the electric field distribution around the contact edge of the drain electrode end smooth, prevent the premature breakdown of the device, therefore, the voltage resistance of the GaN HEMT device is improved, and the vertical field plate extends along the thickness direction of the device, so that the area of the field plate is effectively reduced, and the miniaturization of the device is facilitated; in addition, the vertical field plate is directly connected with the 2DEG (two-dimensional electron gas) of the GaN HEMT device, so that the resistance of the whole drain electrode end is effectively reduced, and low on-resistance (Ron) can be obtained; moreover, the leakage finger metal field plate reduces the leakage path of the drain electrode end of the ohmic contact with poor form, thereby inhibiting the leakage current; finally, the preparation of the formed leakage finger metal field plate does not need to add extra process steps, the etching of the leakage finger groove and the etching of the grid finger groove are synchronously finished, the conducting layer of the leakage finger metal field plate and the conducting layer of the grid metal electrode are synchronously finished, and the preparation process is simple.
Drawings
Fig. 1 is a process flow diagram of a method for manufacturing a GaN HEMT device based on a multi-drain-finger structure according to a first embodiment of the present invention.
Fig. 2 is a schematic cross-sectional structure diagram of a GaN HEMT device based on the multi-finger-drain structure in the first embodiment of the present invention in step S1.
Fig. 3 is a top view of the multi-drain-finger-structure-based GaN HEMT device of the first embodiment of the present invention with the gate region and the drain finger region defined in step S2.
Fig. 4 is a schematic cross-sectional view along AA in fig. 3.
Fig. 5a is a top view of the first plurality of drain finger grooves formed in step S2 of the method for manufacturing a multi-drain-finger-structure-based GaN HEMT device according to the first embodiment of the present invention.
Fig. 5b is a top view of the second plurality of drain finger grooves formed in step S2 of the method for manufacturing a multi-drain-finger-structure-based GaN HEMT device according to the first embodiment of the present invention.
Fig. 5c is a top view of the third plurality of drain finger grooves formed in step S2 of the method for manufacturing a GaN HEMT device based on a multi-drain-finger structure according to the first embodiment of the present invention.
Fig. 5d is a top view of the fourth plurality of drain finger grooves formed in step S2 of the method for manufacturing a GaN HEMT device based on a multi-drain-finger structure according to the first embodiment of the present invention.
FIG. 6a is a schematic cross-sectional view along AA in FIG. 5 a.
Fig. 6b is a schematic cross-sectional structure view of a first-shaped finger groove formed in step S2 of a method for manufacturing a GaN HEMT device based on a multi-finger structure according to a first embodiment of the present invention.
Fig. 6c is a schematic cross-sectional view illustrating a second-shaped finger groove formed in step S2 of a method for manufacturing a GaN HEMT device based on a multi-finger structure according to a first embodiment of the present invention.
Fig. 7 is a top view showing the definition of the source electrode region and the drain electrode region in step S3 of the method for manufacturing a GaN HEMT device based on the multi-drain finger structure according to the first embodiment of the present invention.
Fig. 8 is a schematic cross-sectional view along AA in fig. 7.
Fig. 9 is a top view showing the formation of the source and drain electrodes in step S3 of the method for manufacturing a multi-drain-finger-structure-based GaN HEMT device according to the first embodiment of the present invention.
Fig. 10 is a schematic cross-sectional view along AA in fig. 9.
Fig. 11 is a top view of a GaN HEMT device based on the multi-drain finger structure according to the first embodiment of the present invention in step S4.
Fig. 12 is a schematic cross-sectional view along AA in fig. 11.
Fig. 13 is a top view of the multi-drain-finger-structure-based GaN HEMT device of the first embodiment of the present invention when the gate metal region and the drain finger metal region are defined in step S5.
Fig. 14 is a top view of the multi-drain-finger-structure-based GaN HEMT device of the first embodiment of the present invention when the gate metal electrode and the drain finger metal field plate are formed in step S5, and fig. 14 is a top view of the multi-drain-finger-structure-based GaN HEMT device of the second embodiment of the present invention.
Fig. 15 is a schematic cross-sectional view along the AA direction in fig. 14, and fig. 15 is a schematic cross-sectional view of a multi-finger-leakage-structure-based GaN HEMT device according to a second embodiment of the present invention.
Description of the element reference numerals
100 GaN HEMT semiconductor device thin film structure
101 semiconductor substrate layer
102 AlGaN buffer layer
103 GaN channel layer
104 AlGaN barrier layer
105 gate region
106 finger leakage area
107 finger-leaking groove
108 finger with leakage
109a source electrode region
109b drain electrode region
110 source electrode
111 drain electrode
112 gate dielectric layer
113 gate metal region
114 leakage finger metal region
115 grid metal electrode
116a horizontal field plate
116b vertical field plate
117 grid finger groove
118 grid finger
119 MIS gate electrode
120 patterned photoresist layer
121 photoetching finger-missing groove
122 photoetching leakage finger
123 photoetching gate finger groove
124 photoetching gate finger
125 joining region
S1-S5
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention.
Please refer to fig. 1 to 15. It should be noted that the drawings provided in the present embodiment are only for illustrating the basic idea of the present invention, and the drawings only show the components related to the present invention rather than being drawn according to the number, shape and size of the components in actual implementation, and the type, quantity and proportion of each component in actual implementation may be changed according to specific needs, and the layout of the components may be more complicated. To facilitate understanding of the direction of the present embodiment, in the following examples, it is defined that the direction extending along the source electrode, the gate electrode, and the drain electrode of the GaN HEMT device is the length direction (x direction) of the GaN HEMT device, the direction perpendicular to the length direction is the width direction (y direction) of the GaN HEMT device, and the direction extending along the growth direction of the thin film structure of the GaN HEMT device is the thickness direction of the GaN HEMT device.
Example one
The embodiment provides a preparation method of a GaN HEMT device based on a multi-leakage-finger structure, wherein a leakage-finger metal field plate in contact connection with a drain electrode is formed between a gate electrode and the drain electrode, the leakage-finger metal field plate comprises a plurality of horizontal field plates and vertical field plates which are distributed at intervals along the width direction of the device, the horizontal field plates extend along the length direction of the device, the vertical field plates extend along the thickness direction of the device, the leakage-finger metal field plate can effectively change the trend of an electric field at the end of the drain electrode, the influence of a peak electric field and an ohmic alloy peak at the edge of the ohmic contact drain electrode is reduced, the electric field distribution around the contact edge of the drain electrode end is gentle, the premature breakdown of the device is prevented, and therefore, the voltage resistance of the GaN HEMT device is improved; in addition, the vertical field plate is directly connected with the 2DEG (two-dimensional electron gas) of the GaN HEMT device, so that the resistance of the whole drain electrode end is effectively reduced, and low on-resistance (Ron) can be obtained; moreover, the leakage finger metal field plate reduces the leakage path of the drain electrode end of the ohmic contact with poor form, thereby inhibiting the leakage current; finally, the preparation of the formed leakage finger metal field plate does not need to add extra process steps, the etching of the leakage finger groove and the etching of the grid finger groove are synchronously finished, the conducting layer of the leakage finger metal field plate and the conducting layer of the grid metal electrode are synchronously finished, and the preparation process is simple.
As shown in fig. 1 to 15, the preparation method includes the steps of:
as shown in fig. 1 and 2, step S1 is performed first to provide a GaN HEMT semiconductor device thin film structure 100, where the GaN HEMT semiconductor device thin film structure 100 includes a semiconductor substrate layer 101, an AlGaN buffer layer 102, a GaN channel layer 103, and an AlGaN barrier layer 104 in this order along its growth direction.
By way of example, the semiconductor substrate layer 101 may be any suitable semiconductor substrate, for example, the semiconductor substrate layer 101 may be a Si substrate, a SiC substrate, an aluminum nitride substrate, an aluminum oxide substrate, or a sapphire substrate, and in this embodiment, the semiconductor substrate layer 101 is preferably selected to be a SiC substrate.
The AlGaN buffer layer 102 is used to release stress generated between the epitaxially grown heterostructure and the substrate due to lattice mismatch and thermal mismatch, and may be, for example, a composite material layer in which an Al composition gradually decreases along a growth direction of the AlGaN buffer layer.
It should be noted here that the GaN HEMT semiconductor device thin film structure 100 may be grown by using an epitaxial technique, or may be obtained by outsourcing, as long as the structure can realize the subsequent GaN HEMT device of the present embodiment.
As an example, the GaN HEMT semiconductor device thin film structure 100 may further include a GaN cap layer (not shown in the figure) formed on the AlGaN barrier layer 104, and the GaN cap layer may protect the AlGaN barrier layer 104, prevent the surface thereof from generating dangling bonds, effectively increase the barrier height, and facilitate the preparation of metal ohmic contacts of the source electrode and the drain electrode.
As shown in fig. 1 and 3 to 6, step S2 is performed to define a gate region 105 and a drain finger region 106 (shown in fig. 3 and 4) on the GaN HEMT semiconductor device thin film structure 100 by using a photolithography mask, and form a plurality of drain finger grooves 107 (shown in fig. 5 and 6) in the drain finger region 106 along a width direction, wherein the depth of each drain finger groove 107 is between 2DEG (two-dimensional electron gas) and below the upper surface of the semiconductor substrate layer 101, and a drain finger 108 is formed between two adjacent drain finger grooves 107.
As shown in fig. 3 and 4, as an example, a photoresist layer is formed on the GaN HEMT semiconductor device thin film structure 100; then, photoetching and etching the photoresist layer by adopting a photoetching mask plate to form a graphical photoresist layer 120, wherein a plurality of photoetching missing finger windows distributed along the width direction, namely a plurality of photoetching missing finger grooves 121 in the figure 3, are formed on the graphical photoresist layer 120, and the areas below the photoetching missing finger grooves 121 are formed into a plurality of missing finger grooves subsequently; a plurality of lithography drain fingers 122 are formed between two adjacent lithography drain finger grooves 121, and the area under the plurality of lithography drain fingers 122 will be formed into a plurality of drain fingers subsequently. The continuous region where the plurality of lithography leak finger grooves 121 distributed in the width direction are located is defined as the leak finger region 106.
As shown in fig. 3 and 4, as an example, the gate electrode formed subsequently in this embodiment is a multi-finger MIS gate electrode structure, so that a plurality of lithographic drain finger grooves 121 may be formed in step S2, and a plurality of lithographic gate finger windows distributed in the width direction, i.e., a plurality of lithographic gate finger grooves 123 in fig. 3, may be formed on the patterned photoresist layer 120, and the region under the lithographic gate finger grooves 123 will be formed subsequently into a plurality of gate finger grooves; a plurality of lithography gate fingers 124 are formed between two adjacent lithography gate finger grooves 123, and the area under the plurality of lithography gate fingers 124 will be formed into a plurality of gate fingers subsequently. The continuous region where the plurality of lithography gate finger grooves 123 distributed in the width direction are located is defined as the gate region 105. The photoetching of the finger leakage groove 121 and the photoetching of the gate finger groove 123 are completed by adopting one photoetching process at the same time, and no additional process is needed, so that the process difficulty is not increased.
For convenience of description, the following steps are described by taking the MIS gate electrode structure with multi-finger serial connection as an example, but this does not limit that the gate electrode structure of the present invention may be other existing gate electrode structures, for example, a gate electrode structure with schottky contact, and the like, as long as the gate electrode structure does not affect the invention point of the present invention, and the gate electrode structure should fall within the protection scope of the present invention.
As shown in fig. 5a to 6c, continuously etching the GaN HEMT semiconductor device thin film structure 100 based on the above-mentioned lithography drain finger grooves 121 and lithography gate finger grooves 123 to form a plurality of drain finger grooves 107 distributed along the width direction in the drain finger region 106, a plurality of gate finger grooves 117 distributed along the width direction in the gate region 105, a drain finger 108 between two adjacent drain finger grooves 107, and a gate finger 118 between two adjacent gate finger grooves 117; the depth of the finger groove 107 is between 2DEG and the upper surface of the semiconductor substrate layer 101, the specific depth is selected according to the overall design of the device, and is not limited herein, preferably, the depth of the finger groove 107 extends into the AlGaN buffer layer 102; the depth of the gate finger groove 117 is below 2DEG for isolating the 2DEG between two adjacent gate fingers 118. From the perspective of process implementation, the depth of the drain finger groove 107 and the depth of the gate finger groove 117 may be the same, so that they are completed in the same etching process. In one example, the etching may be performed using a chlorine-based atmosphere, for example, using BCl3/Cl2And etching the GaN HEMT semiconductor device thin film structure 100 in the atmosphere to the depth of 100-200 nm in the GaN channel layer 103 to form the finger leakage groove 107 and the finger grid groove 117. Preferably, the number of the gate fingers 118 is the same as that of the drain fingers 108, the width of the gate fingers 118 is the same as that of the drain fingers 108 and ranges from 100nm to 300nm, and the width of the gate finger grooves 117 is the same as that of the drain finger grooves 107 and ranges from 200nm to 500 nm. But also does not limit the width of the gate finger 118 and the gate fingerThe width of the drain finger 108 may not be the same, and the width of the gate finger groove 117 may not be the same as the width of the drain finger groove 107, which is specifically set according to the actual requirements of the device.
As shown in fig. 5b, as a preferred example, the number of the gate fingers 118 is equal to the number of the drain fingers 108, the width of the gate fingers 118 is equal to the width of the drain fingers 108, the width of the gate finger groove 117 is equal to the width of the drain finger groove 107, the width of two adjacent gate fingers 118 along the width direction is linearly wider than the width of two adjacent drain fingers 108, and the depth of two adjacent drain finger grooves 107 along the width direction is gradually shallower. The narrow gate finger has more obvious electric field line aggregation effect under the same voltage, so that the breakdown of the device is easier to occur. As shown in fig. 5c, based on the example of fig. 5b, the lengths of two adjacent finger grooves 107 are made to be linearly shorter, and even if the lengths of the finger grooves 107 distributed along the width direction are made to be linearly shorter, the lengths of the subsequently formed finger metal field plates are also made to be linearly narrower along the width direction, that is, the lengths of the horizontal field plates distributed along the width direction are made to be linearly narrower, so that the different electric field line concentration effects under different gate finger widths can be further alleviated, and the breakdown voltage of the device can be further improved.
As shown in fig. 5d, as an example, at least two rows of the finger leaking grooves 107 distributed along the width direction may be formed along the length direction, the depth of the finger leaking grooves 107 distributed along the width direction of each row is the same, and the depth of the finger leaking grooves 107 distributed along the width direction of each row along the length direction is linearly increased. In this way, the effect of gradually evacuating the electric field line accumulation can be achieved, and the breakdown voltage of the device is improved. As shown in fig. 5d, two rows of 5 finger-missing grooves 107 are formed in the lengthwise direction and distributed in the widthwise direction. It should be noted here that the number of finger leaking grooves formed in each row may be set according to specific needs, and is not limited to 5 in fig. 5d, and two or more rows of finger leaking grooves 107 distributed in the width direction may be formed in the length direction, and is not limited to two rows of finger leaking grooves 107 distributed in the width direction in fig. 5 d.
Preferably, through BCl, as shown in FIG. 6b3/Cl2After the finger leaking groove 107 is formed through etching, wet etching is carried out for 50-70 min at 85 ℃ by using 25% of TMAH chemical reagent, and cleaning is carried out for 10-15 min by using Piranha, so that the groove is rounded at a low right angle to form a U-shaped finger leaking groove. The electric field lines are gathered and converged at the vertical sharp corner at the bottom of the groove, so that the breakdown is easy to occur at the position, and the convergence of the electric field lines (arrows in fig. 6 b) can be relieved by setting the vertical groove to be a U-shaped groove, so that the breakdown is avoided.
As a further preferred example, as shown in fig. 6c, when the finger groove 107 is etched, the whole structure may be disposed at an inclined angle, so as to form a bottom inclined groove, and the inclined groove is sequentially deepened along the length direction (i.e., sequentially deepened along the gate-drain direction), so that the bottom inclined groove is used to alleviate the electric field line concentration. On the basis, the inclined grooves can be rounded by adopting the method of fig. 6b to further relieve the convergence of electric field lines (arrows in fig. 6 c) and avoid breakdown.
It should be noted that "several" in the present embodiment means at least two, and does not include one.
As shown in fig. 1 and 7 to 10, step S3 is performed to define a source electrode region 109a and a drain electrode region 109b on the GaN HEMT semiconductor device thin film structure 100 by using a photolithography mask (as shown in fig. 7 and 8), and form a source electrode 110 and a drain electrode 111 in ohmic contact with the source electrode region 109a and the drain electrode region 109b (as shown in fig. 9 and 10), wherein the drain finger region 106 is formed between the gate region 105 and the drain electrode region 109 b.
As shown in fig. 7 and 8, as an example, a photoresist layer is formed on the thin film structure 100 of the GaN HEMT semiconductor device; and then, photoetching and etching the photoresist layer by using a photoetching mask to form a patterned photoresist layer 120, wherein the windowing regions on the patterned photoresist layer 120 are the source electrode region 109a and the drain electrode region 109 b.
As shown in fig. 9 and 10, as an example, a metal layer is deposited on the patterned photoresist layer 120 based on the above, and then the patterned photoresist layer 120 is removed to form a source electrode 110 and a drain electrode 111 in the source electrode region 109a and the drain electrode region 109 b. Preferably, the metal layer may be deposited by an electron beam evaporation process, and the metal layer is a stacked structure of Ti/Al/Ni/Au, and the thickness of each layer of metal material in the stacked structure may be set according to specific requirements, and in this embodiment, the thickness of each layer of metal material in the stacked structure is selected to be 30nm/120nm/40nm/60nm in sequence.
As a further preferred example, the source electrode 110 and the drain electrode 111 of the ohmic contact are formed by using a rapid thermal annealing process (RTA), parameters of the rapid thermal annealing process are set according to practical situations, and in this embodiment, the parameter of the rapid thermal annealing process is selected to be N at a temperature between 800 ℃ and 900 ℃2And performing rapid thermal annealing in the environment for 20-90 seconds.
As shown in fig. 1 and 11 to 12, step S4 is performed to form a gate dielectric layer 112 in the gate region 105.
By way of example, the material of the gate dielectric layer 112 may be selected from any suitable high-K dielectric material, such as aluminum oxide and/or hafnium oxide, and the thickness of the gate dielectric layer 112 may be selected to be between 10nm and 30 nm. The method for forming the gate dielectric layer 112 is preferably an ALD deposition process, so as to form a gate dielectric layer with high density and few morphological defects.
As an example, the present embodiment is described with a multi-finger MIS gate electrode in series, so the gate dielectric layer 112 covers the entire gate region 105, that is, the gate dielectric layer 112 is formed on the surface of a plurality of the gate fingers 118 and also on the surface (including the sidewall and the bottom) of a plurality of the gate finger grooves 117.
As shown in fig. 1 and 13 to 15, step S5 is finally performed, a gate metal region 113 and a drain finger metal region 114 are respectively defined on the basis of the gate region 105 and the drain finger region 106 by using a photolithography mask (as shown in fig. 13), and conductive materials are deposited on the gate metal region 113 and the drain finger metal region 114 to form a gate metal electrode 115 and a drain finger metal field plate respectively (as shown in fig. 14 and 15), the drain finger metal field plate extends to be in contact connection with the drain electrode 111, the conductive material on the drain finger 108 forms a plurality of horizontal field plates 116a, and the conductive material on the sidewall of the drain finger groove 107 forms a plurality of vertical field plates 116 b. Namely, the drain finger metal field plate includes a plurality of horizontal field plates 116a and vertical field plates 116b alternately arranged along the width direction.
As shown in fig. 13, as an example, a photoresist layer is formed on the GaN HEMT semiconductor device thin film structure 100; and then, photoetching and etching the photoresist layer by adopting a photoetching mask plate to form a patterned photoresist layer 120, wherein when the photoetching mask plate is used for photoetching the photoresist layer, the grid metal region 113 and the finger leakage region 114 are defined by taking the grid region 105 and the finger leakage region 106 as references. As a preferred example, the length of the gate region 105 is consistent with the length of the gate metal region 113, so that a subsequently formed gate metal electrode can completely control the 2DEG channel under the gate region 105, thereby improving the control capability of the gate electrode. As another example, from a process perspective, for easier process implementation and higher repeatability, the length of the gate region 105 may be greater than the length of the gate metal region 113, but the distance between two sides of the gate metal region 113 and two corresponding sides of the gate region 105 (i.e., L3 and L4 in fig. 13) needs to be less than 50 nm. As another preferred example, the drain finger region 106 is connected to the drain electrode region 109b, and the length of the drain finger region 106 is the same as the length of the drain finger metal region 114, in this case, the subsequently formed drain finger metal field plate is completely formed by the conductive material on the drain finger (horizontal field plate) and the conductive material on the sidewall of the drain finger groove (vertical field plate), and the length of the horizontal field plate is the smallest, so that the parasitic capacitance is not increased. As another example, from the process perspective, for easier process implementation and higher repeatability, the length of the drain finger metal region 114 may be greater than the length of the drain finger region 106, but the distance between two sides of the drain finger metal region 114 and two sides of the drain finger region 106 (e.g., L1 and L2 in fig. 13) needs to be less than 50nm, and then the subsequently formed horizontal field plate further includes a conductive material (e.g., 116a in fig. 15) deposited on the GaN semiconductor device thin film structure 100 outside the drain finger 108.
As shown in fig. 14 and 15, the gate metal electrode 115 and the drain finger metal field plate are formed by a thermal evaporation deposition process, for example. Preferably, the gold gate metal electrode 115 and the drain finger metal field plate can be a Ni/Au stack structure, such as 50nm/100 nm. The drain finger metal field plate is formed while the gate metal electrode 115 is deposited, so that an additional process is not required, the process is simple and convenient, and the repeatability is easy to realize. It should be noted that when the drain finger metal field plate is formed, a conductive material, i.e., the connection region 125 in fig. 15, is further deposited at the bottom of the drain finger groove 107, and the connection region 125 is used to realize electrical connection between all the horizontal field plates and the vertical field plates in the drain finger metal field plate, so as to finally realize the electrical connection relationship between the drain finger metal field plate and the drain electrode.
In this embodiment, a multi-finger MIS gate electrode is taken as an example for description, so that the gate metal electrode 115 covers the whole gate region 105, that is, the gate metal electrode 115 is formed on the gate dielectric layer on the surfaces of the plurality of gate fingers 118 and also on the gate dielectric layer on the surfaces (including the sidewalls and the bottom) of the plurality of gate finger grooves 117, thereby realizing the series connection of the plurality of MIS gate electrodes.
The leakage finger metal field plate is in contact connection with the drain electrode and is formed between the gate electrode and the drain electrode through the steps, the leakage finger metal field plate comprises a plurality of horizontal field plates and vertical field plates which are distributed at intervals along the width direction of the device, the horizontal field plates extend along the length direction of the device, the vertical field plates extend along the thickness direction of the device, the trend of an electric field at the end of the leakage electrode can be effectively changed through the leakage finger metal field plate, the influence of a peak electric field and an ohmic alloy peak at the edge of the drain electrode in ohmic contact is reduced, the electric field distribution around the contact edge of the drain electrode end is enabled to be smooth, the device is prevented from being broken down prematurely, the voltage resistance of the GaN HEMT device is improved, the area of the field plate is effectively reduced due to the; in addition, the vertical field plate is directly connected with the 2DEG (two-dimensional electron gas) of the GaN HEMT device, so that the resistance of the whole drain electrode end is effectively reduced, and low on-resistance (Ron) can be obtained; furthermore, the drain finger metal field plate reduces a leakage path of a drain electrode terminal of the ohmic contact with a poor form, thereby suppressing a leakage current.
Example two
The present embodiment provides a GaN HEMT device based on a multi-drain-finger structure, which may be fabricated by the fabrication method of the first embodiment, but is not limited to the fabrication method of the first embodiment, as long as the GaN HEMT device based on the multi-drain-finger structure can be formed. For the beneficial effects that can be achieved by the GaN HEMT device based on the multi-drain-finger structure, please refer to embodiment one, which is not described in detail below.
As shown in fig. 14 and 15, the GaN HEMT device based on the multi-drain finger structure includes:
the GaN HEMT semiconductor device thin film structure 100 comprises a semiconductor substrate layer 101, an AlGaN buffer layer 102, a GaN channel layer 103 and an AlGaN barrier layer 104 which are sequentially stacked;
a source electrode 110, a drain electrode 111 and an MIS gate electrode 119 which are formed on the GaN HEMT semiconductor device thin film structure 100 and are in ohmic contact with each other, wherein the source electrode 110 and the drain electrode 111 are respectively arranged at two ends of the MIS gate electrode 119, and the MIS gate electrode 119 comprises a gate dielectric layer 112 and a gate metal electrode 115 thereon;
a drain finger metal field plate of a drain finger metal region 114 formed between the MIS gate electrode 119 and the drain electrode 111, the drain finger metal field plate extending to be in contact connection with the drain electrode 111, the drain finger metal region being formed with a plurality of drain finger grooves 107 along a width direction, a drain finger 108 being formed between two adjacent drain finger grooves 107, a depth of the drain finger groove 107 being between 2DEG and an upper surface of the semiconductor substrate layer 101, the drain finger metal field plate including a plurality of horizontal field plates 116a and a plurality of vertical field plates 116b, wherein the horizontal field plates 116a include a conductive material formed on the drain finger 108, and the vertical field plates 116b include a conductive material formed on sidewalls of the drain finger grooves 107.
Illustratively, the finger groove 107 is connected to the drain electrode 111, and the length of the finger groove 107 is identical to the length of the finger metal region 113.
As an example, the length of the drain finger metal region 114 is greater than the length of the drain finger groove 107, and the distance between two sides of the drain finger metal region 114 and two corresponding sides of the drain finger groove 107 is less than 50nm, the horizontal field plate 116a further includes a conductive material deposited on the GaN HEMT semiconductor device thin film structure 100 outside the drain finger 108.
As an example, the MIS gate electrode 119 is formed in the gate region 105, a plurality of gate finger grooves 117 are formed in the gate region 105 along the width direction, a gate finger 118 is formed between two adjacent gate finger grooves 117, the depth of the gate finger groove 117 is below 2DEG for isolating the 2DEG between two adjacent gate fingers 118, the gate dielectric layer 112 is simultaneously formed on the gate finger 118 and the surface of the gate finger groove 118, and the gate metal electrode 115 is simultaneously formed on the surface of the gate finger 118 and the gate dielectric layer 112 on the surface of the gate finger groove 117.
As an example, the number of the gate fingers 118 is the same as the number of the drain fingers 108, the width of the gate fingers 118 is the same as the width of the drain fingers 108 and ranges from 100nm to 300nm, and the width of the gate finger grooves 117 is the same as the width of the drain finger grooves 107 and ranges from 200nm to 500 nm. Preferably, the width of two adjacent gate fingers 118 and the width of two adjacent drain fingers 108 along the width direction are linearly wider, and the depth of two adjacent drain finger grooves 107 along the width direction is gradually shallower (as shown in fig. 5 b). Optimally, the length of the drain finger trench 107 distributed along the width direction becomes linearly shorter, and the drain finger metal field plate becomes linearly narrower along the width direction (as shown in fig. 5 c).
As shown in fig. 5d, as another example, the number of the gate fingers 118 is the same as the number of the drain fingers 108, the width of the gate fingers 118 is the same as the width of the drain fingers 108 and the width range is between 100nm and 300nm, the width of the gate finger grooves 117 is the same as the width of the drain finger grooves 107 and the width range is between 200nm and 500nm, at least two rows of a plurality of drain finger grooves 107 distributed along the width direction are formed along the length direction, the depth of each row of the plurality of drain finger grooves 107 distributed along the width direction is the same, and the depth of each row of the plurality of drain finger grooves 107 distributed along the width direction along the length direction is linearly increased.
As shown in fig. 6b, the finger groove 107 is a U-shaped finger groove, for example. Preferably, the finger leaking groove 107 is a groove with an inclined bottom, and the inclined groove is sequentially deepened along the length direction.
Illustratively, the material of the gate dielectric layer 112 includes at least one of aluminum oxide and hafnium oxide, the thickness of the gate dielectric layer 112 is between 10nm and 30nm, and the thickness of the drain finger metal field plate is between 100nm and 200 nm.
In summary, the present invention provides a GaN HEMT device based on a multi-finger-leakage structure and a method for fabricating the same, by forming a drain finger metal field plate in contact with the drain electrode between the gate electrode and the drain electrode, the drain finger metal field plate comprises a plurality of horizontal field plates and vertical field plates which are distributed at intervals along the width direction of the device, the horizontal field plates extend along the length direction of the device, the vertical field plates extend along the thickness direction of the device, the metal field plate can effectively change the trend of the electric field of the drain electrode end, reduce the influence of the peak electric field and the peak of the ohmic alloy at the edge of the drain electrode of the ohmic contact, make the electric field distribution around the contact edge of the drain electrode end smooth, prevent the premature breakdown of the device, therefore, the voltage resistance of the GaN HEMT device is improved, and the vertical field plate extends along the thickness direction of the device, so that the area of the field plate is effectively reduced, and the miniaturization of the device is facilitated; in addition, the vertical field plate is directly connected with the 2DEG (two-dimensional electron gas) of the GaN HEMT device, so that the resistance of the whole drain electrode end is effectively reduced, and low on-resistance (Ron) can be obtained; moreover, the leakage finger metal field plate reduces the leakage path of the drain electrode end of the ohmic contact with poor form, thereby inhibiting the leakage current; finally, the preparation of the formed leakage finger metal field plate does not need to add extra process steps, the etching of the leakage finger groove and the etching of the grid finger groove are synchronously finished, the conducting layer of the leakage finger metal field plate and the conducting layer of the grid metal electrode are synchronously finished, and the preparation process is simple. Therefore, the invention effectively overcomes various defects in the prior art and has high industrial utilization value.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.

Claims (23)

1. A preparation method of a GaN HEMT device based on a multi-drain-finger structure is characterized by comprising the following steps:
providing a GaN HEMT semiconductor device thin film structure, wherein the GaN HEMT semiconductor device thin film structure sequentially comprises a semiconductor substrate layer, an AlGaN buffer layer, a GaN channel layer and an AlGaN barrier layer along the growth direction of the GaN HEMT semiconductor device thin film structure;
defining a grid region and a finger leakage region on the GaN HEMT semiconductor device thin film structure by using a photoetching mask, and forming a plurality of finger leakage grooves in the finger leakage region along the width direction, wherein the depth of each finger leakage groove is between 2DEG and the upper surface of the semiconductor substrate layer, and a finger leakage is formed between every two adjacent finger leakage grooves;
defining a source electrode area and a drain electrode area on the GaN HEMT semiconductor device thin film structure by using a photoetching mask, and forming a source electrode and a drain electrode in ohmic contact with the source electrode area and the drain electrode area, wherein the drain finger area is formed between the grid area and the drain electrode area;
forming a gate dielectric layer in the gate region;
respectively defining a grid metal region and a leakage finger metal region based on the grid region and the leakage finger region by utilizing a photoetching mask, depositing conductive materials on the grid metal region and the leakage finger metal region to respectively form a grid metal electrode and a leakage finger metal field plate, wherein the leakage finger metal field plate extends to be in contact connection with the drain electrode, the conductive materials on the leakage finger form a plurality of horizontal field plates, and the conductive materials on the side wall of the leakage finger groove form a plurality of vertical field plates.
2. The method for manufacturing a GaN HEMT device based on a multi-finger-leakage structure according to claim 1, wherein: the length of the gate region is consistent with that of the gate metal region, or the length of the gate region is greater than that of the gate metal region, and the distance between two sides of the gate metal region and two corresponding sides of the gate region is less than 50 nm.
3. The method for manufacturing a GaN HEMT device based on a multi-finger-leakage structure according to claim 1, wherein: the drain finger area is connected with the drain electrode area, and the length of the drain finger area is consistent with that of the drain finger metal area.
4. The method for manufacturing a GaN HEMT device based on a multi-finger-leakage structure according to claim 1, wherein: the length of the drain finger metal region is larger than that of the drain finger region, the distance between two sides of the drain finger metal region and two sides corresponding to the drain finger region is smaller than 50nm, and the horizontal field plate further comprises a conductive material deposited on the GaN HEMT semiconductor device thin film structure outside the drain finger.
5. The method for manufacturing a GaN HEMT device based on a multi-finger-leakage structure according to claim 1, wherein: when a plurality of leakage finger grooves are formed, a plurality of grid finger grooves are formed in the grid electrode region along the width direction at the same time, grid fingers are formed between every two adjacent grid finger grooves, and the depth of each grid finger groove is below 2DEG and is used for isolating the 2DEG between every two adjacent grid fingers; the gate dielectric layer is formed on the gate finger and the surface of the gate finger groove at the same time; and the grid metal electrode is simultaneously formed on the grid dielectric layer on the surface of the grid finger and the grid dielectric layer on the surface of the grid finger groove.
6. The method for manufacturing a GaN HEMT device based on a multi-finger-leakage structure according to claim 5, wherein: the number of the grid fingers is consistent with that of the drain fingers, the width of the grid fingers is consistent with that of the drain fingers and ranges from 100nm to 300nm, and the width of the grid finger grooves is consistent with that of the drain finger grooves and ranges from 200nm to 500 nm.
7. The method for manufacturing a GaN HEMT device based on a multi-finger-leakage structure according to claim 6, wherein: the width of two adjacent grid fingers distributed along the width direction and the width of two adjacent leakage fingers are linearly widened, and the depth of two adjacent leakage finger grooves distributed along the width direction is gradually reduced.
8. The method for manufacturing a GaN HEMT device based on a multi-finger-drain structure according to claim 7, wherein: the length of the leakage finger groove distributed along the width direction is linearly shortened, and the leakage finger metal field plate is linearly narrowed along the width direction.
9. The method for manufacturing a GaN HEMT device based on a multi-finger-leakage structure according to claim 6, wherein: at least two rows of a plurality of finger leaking grooves distributed along the width direction are formed along the length direction, the depth of the finger leaking grooves distributed along the width direction in each row is the same, and the depth of the finger leaking grooves distributed along the width direction in each row along the length direction is linearly deepened.
10. The method for manufacturing a GaN HEMT device based on a multi-finger-leakage structure according to claim 1, wherein: the finger leaking groove is a U-shaped finger leaking groove.
11. The method for manufacturing a GaN HEMT device based on the multi-drain-finger structure according to claim 10, wherein: the finger leaking groove is a groove with an inclined bottom, and the inclined groove is deepened in sequence along the length direction.
12. The method for manufacturing a GaN HEMT device based on a multi-finger-leakage structure according to claim 1, wherein: the gate dielectric layer is made of at least one of aluminum oxide and hafnium oxide, the thickness of the gate dielectric layer is between 10nm and 30nm, and the thickness of the drain finger metal field plate is between 100nm and 200 nm.
13. A GaN HEMT device based on a multi-drain finger structure, the device comprising:
the GaN HEMT semiconductor device thin film structure comprises a semiconductor substrate layer, an AlGaN buffer layer, a GaN channel layer and an AlGaN barrier layer which are sequentially stacked;
the source electrode, the drain electrode and the MIS gate electrode are formed on the GaN HEMT semiconductor device thin film structure in ohmic contact, the source electrode and the drain electrode are respectively arranged at two ends of the MIS gate electrode, and the MIS gate electrode comprises a gate dielectric layer and a gate metal electrode thereon;
the drain finger metal field plate is formed between the MIS gate electrode and the drain electrode, the drain finger metal field plate extends to be in contact connection with the drain electrode, a plurality of drain finger grooves are formed in the drain finger metal region in the width direction, a drain finger is formed between every two adjacent drain finger grooves, the depth of each drain finger groove is between the lower portion of 2DEG and the upper surface of the semiconductor substrate layer, the drain finger metal field plate comprises a plurality of horizontal field plates and a plurality of vertical field plates, each horizontal field plate comprises a conductive material formed on each drain finger, and each vertical field plate comprises a conductive material formed on the side wall of each drain finger groove.
14. The multi-drain finger structure-based GaN HEMT device of claim 13, wherein: the finger leaking groove is connected with the drain electrode, and the length of the finger leaking groove is consistent with that of the finger leaking metal area.
15. The multi-drain finger structure-based GaN HEMT device of claim 13, wherein: the length of the leakage finger metal region is larger than that of the leakage finger groove, the distance between two sides of the leakage finger metal region and two corresponding sides of the leakage finger groove is smaller than 50nm, and the horizontal field plate further comprises a conductive material deposited on the GaN HEMT semiconductor device thin film structure outside the leakage finger.
16. The multi-drain finger structure-based GaN HEMT device of claim 13, wherein: the MIS gate electrode is formed in a gate region, a plurality of gate finger grooves are formed in the gate region in the width direction, gate fingers are formed between every two adjacent gate finger grooves, the depth of each gate finger groove is below 2DEG and used for isolating the 2DEG between every two adjacent gate fingers, gate dielectric layers are formed on the gate fingers and on the surfaces of the gate finger grooves at the same time, and gate metal electrodes are formed on the gate dielectric layers on the surfaces of the gate fingers and on the gate dielectric layers on the surfaces of the gate finger grooves at the same time.
17. The multi-drain finger structure-based GaN HEMT device of claim 16, wherein: the number of the grid fingers is consistent with that of the drain fingers, the width of the grid fingers is consistent with that of the drain fingers and ranges from 100nm to 300nm, and the width of the grid finger grooves is consistent with that of the drain finger grooves and ranges from 200nm to 500 nm.
18. The multi-drain finger structure-based GaN HEMT device of claim 17, wherein: the width of two adjacent grid fingers distributed along the width direction and the width of two adjacent leakage fingers are linearly widened, and the depth of two adjacent leakage finger grooves distributed along the width direction is gradually reduced.
19. The multi-drain finger structure-based GaN HEMT device of claim 18, wherein: the length of the leakage finger groove distributed along the width direction is linearly shortened, and the leakage finger metal field plate is linearly narrowed along the width direction.
20. The multi-drain finger structure-based GaN HEMT device of claim 17, wherein: at least two rows of a plurality of finger leaking grooves distributed along the width direction are formed along the length direction, the depth of the finger leaking grooves distributed along the width direction in each row is the same, and the depth of the finger leaking grooves distributed along the width direction in each row along the length direction is linearly deepened.
21. The multi-drain finger structure-based GaN HEMT device of claim 13, wherein: the finger leaking groove is a U-shaped finger leaking groove.
22. The multi-drain finger structure-based GaN HEMT device of claim 21, wherein: the finger leaking groove is a groove with an inclined bottom, and the inclined groove is deepened in sequence along the length direction.
23. The multi-drain finger structure-based GaN HEMT device of claim 13, wherein: the gate dielectric layer is made of at least one of aluminum oxide and hafnium oxide, the thickness of the gate dielectric layer is between 10nm and 30nm, and the thickness of the drain finger metal field plate is between 100nm and 200 nm.
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CN112885896B (en) * 2021-01-29 2022-07-01 电子科技大学 HEMT device
CN113224156B (en) * 2021-04-22 2023-02-10 华为技术有限公司 Gallium nitride device, switching power tube, driving circuit and manufacturing method thereof
CN113889412B (en) * 2021-12-07 2022-02-22 浙江集迈科微电子有限公司 Ohmic contact GaN device and preparation method thereof

Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102598275A (en) * 2009-08-28 2012-07-18 特兰斯夫公司 Semiconductor devices with field plates
WO2014050054A1 (en) * 2012-09-28 2014-04-03 パナソニック株式会社 Semiconductor device
CN104409494A (en) * 2014-11-18 2015-03-11 西安电子科技大学 Complex field plate power device based on right-angled source field plate and right-angled drain field plate
CN105226354A (en) * 2015-09-21 2016-01-06 浙江大学 The strong high frequency side stopband of three mode couplings suppresses microstrip bandpass filter and coupling process
CN107424962A (en) * 2016-04-11 2017-12-01 电力集成公司 Protection insulator for HFET devices
CN107681986A (en) * 2017-10-09 2018-02-09 东南大学 Suitable for the neutralization bootstrapping common source and common grid amplifier of millimeter wave power amplification application
CN108305834A (en) * 2018-01-11 2018-07-20 北京华碳科技有限责任公司 A kind of preparation method of enhancement type gallium nitride fieldtron
CN108321198A (en) * 2017-01-17 2018-07-24 株式会社东芝 The manufacturing method of semiconductor device, power circuit, computer and semiconductor device
CN109004017A (en) * 2018-07-18 2018-12-14 大连理工大学 HEMT device and preparation method thereof with polarization knot Longitudinal Leakage current barrier layer structure
US10263103B2 (en) * 2015-10-30 2019-04-16 Fujitsu Limited Semiconductor apparatus
CN110581170A (en) * 2019-08-13 2019-12-17 中山市华南理工大学现代产业技术研究院 GaN-based MIS-HEMT device with Г type gate and preparation method thereof
CN110600415A (en) * 2019-09-27 2019-12-20 浙江大学 Three-dimensional stacking alignment method

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN206947355U (en) * 2017-05-08 2018-01-30 工业和信息化部电子第五研究所华东分所 A kind of electronic device
US10804384B2 (en) * 2017-12-27 2020-10-13 Rohm Co., Ltd. Semiconductor device and manufacturing method thereof
CN111370483B (en) * 2020-02-27 2023-05-26 常熟理工学院 Gallium nitride power device with multi-field plate structure and preparation method thereof

Patent Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102598275A (en) * 2009-08-28 2012-07-18 特兰斯夫公司 Semiconductor devices with field plates
WO2014050054A1 (en) * 2012-09-28 2014-04-03 パナソニック株式会社 Semiconductor device
CN104409494A (en) * 2014-11-18 2015-03-11 西安电子科技大学 Complex field plate power device based on right-angled source field plate and right-angled drain field plate
CN105226354A (en) * 2015-09-21 2016-01-06 浙江大学 The strong high frequency side stopband of three mode couplings suppresses microstrip bandpass filter and coupling process
US10263103B2 (en) * 2015-10-30 2019-04-16 Fujitsu Limited Semiconductor apparatus
CN107424962A (en) * 2016-04-11 2017-12-01 电力集成公司 Protection insulator for HFET devices
CN108321198A (en) * 2017-01-17 2018-07-24 株式会社东芝 The manufacturing method of semiconductor device, power circuit, computer and semiconductor device
CN107681986A (en) * 2017-10-09 2018-02-09 东南大学 Suitable for the neutralization bootstrapping common source and common grid amplifier of millimeter wave power amplification application
CN108305834A (en) * 2018-01-11 2018-07-20 北京华碳科技有限责任公司 A kind of preparation method of enhancement type gallium nitride fieldtron
CN109004017A (en) * 2018-07-18 2018-12-14 大连理工大学 HEMT device and preparation method thereof with polarization knot Longitudinal Leakage current barrier layer structure
CN110581170A (en) * 2019-08-13 2019-12-17 中山市华南理工大学现代产业技术研究院 GaN-based MIS-HEMT device with Г type gate and preparation method thereof
CN110600415A (en) * 2019-09-27 2019-12-20 浙江大学 Three-dimensional stacking alignment method

Non-Patent Citations (4)

* Cited by examiner, † Cited by third party
Title
Asymmetric InGaAs MOSFETs with InGaAs source and InP drain;Jiongjiong Mo;Erik Lind;Lars-Erik Wernersson;《26th International Conference on Indium Phosphide and Related Materials (IPRM)》;20141231;正文第1-2页 *
Study of Field Plate Effects onAlGaN/GaN HEMTs;M.Kaddeche, A.Telia ,et al;《2009 International Conference on Microelectronics》;20091231;第362-364页 *
具有垂直漏极场板的ＧａＮ ＨＥＭＴ器件结构设计;唐健翔，等;《杭州电子科技大学（自然科学版）》;20190731;第39卷(第4期);第1-5页 *
基于负反馈和有源偏置的宽带低噪放设计;许石义，等;《浙江大学学报（工学版）》;20180630(第6期);第1081-1085页 *

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