CN104409493B - Heterojunction device based on T-shaped grid leak composite field plate and preparation method thereof - Google Patents
Heterojunction device based on T-shaped grid leak composite field plate and preparation method thereof Download PDFInfo
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/401—Multistep manufacturing processes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/402—Field plates
- H01L29/404—Multiple field plate structures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
- H01L29/66462—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
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- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
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- Ceramic Engineering (AREA)
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- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Junction Field-Effect Transistors (AREA)
Abstract
The invention discloses a kind of heterojunction device based on T-shaped grid leak composite field plate and preparation method thereof, mainly solves the problems, such as existing field plate techniques complex process when high-breakdown-voltage is realized.Which includes：Substrate (1), transition zone (2), barrier layer (3), source electrode (4), Schottky drain (5), table top (6), grid (7), passivation layer (8) and protective layer (13).Grid groove (9) and bakie (10) are carved with passivation layer (8), T-shaped grid field plate (11) and T-shaped leakage field plate (12) between passivation layer (8) and protective layer (13), is deposited with；T-shaped grid field plate (11) is electrically connected with grid (7), and lower end is completely filled in grid groove (9)；T-shaped leakage field plate (12) is electrically connected with Schottky drain (5), and lower end is completely filled in bakie (10).The present invention have the advantages that manufacture craft simply, forward characteristic and reverse characteristic is good and high yield rate, can be used as switching device.
Description
Technical field
The invention belongs to microelectronics technology, is related to semiconductor devices, T-shaped gate-leakage composite field plate is based particularly on
Heterojunction device, can be used as the basic device of power electronic system.
Technical background
Power semiconductor is the critical elements of power electronic system, is to carry out electric treatable effective tool.In recent years
Come, with becoming increasingly conspicuous for the energy and environmental problem, research and development novel high-performance, low-loss power device become raising electric energy profit
With one of rate, energy saving, the effective way of alleviating energy crisis.However, in power device research, at a high speed, high pressure with it is low
Serious restricting relation is there is between conducting resistance, rationally, to effectively improve this restricting relation be to improve device globality
The key of energy.As market constantly proposes the requirement of higher efficiency, smaller volume, higher frequency, traditional Si base to power system
Semiconductor power device performance has approached its theoretical limit.In order to be able to further reducing chip area, improving operating frequency, improve
Operating temperature, reduction conducting resistance, raising breakdown voltage, reduction machine volume, raising overall efficiency, with gallium nitride as representative
Semiconductor material with wide forbidden band, drifts about by the electronics saturation of its bigger energy gap, higher critical breakdown electric field and Geng Gao
Speed, and the outstanding advantages such as stable chemical performance, high temperature resistant, radioresistance, show one's talent in terms of high performance power device is prepared,
Application potential is huge.Especially with the HEMT of GaN base heterojunction structure, i.e. GaN base HEMT device, more
It is, because of characteristics such as its low on-resistance, senior engineer's working frequencies, electronics of future generation to be met more high-power to power device, higher
The requirement of frequency, smaller volume and more severe hot operation, has wide and special application prospect in economy and military field.
However, there is inherent shortcoming in conventional GaN base HEMT device structure, device channel electric-field intensity can be caused in deformity
, especially there is high peak electric field near vicinity in device grids in distribution.This causes actual GaN base HEMT device to exist
In the case of applying positive drain voltage, i.e., positive OFF state, forward break down voltage be often far below theoretical eapectation, and there is electric current
The integrity problems such as avalanche, inverse piezoelectric effect, seriously constrain application and development in field of power electronics.In order to solve with
Upper problem, domestic and international researchers propose numerous methods, and field plate structure is that wherein effect is the most notable, is most widely used
One kind.Field plate structure is successfully applied to GaN base HEMT power device by N.Q.Zhang of U.S. UCSB in 2000 et al. first
In, overlapping gate power device is developed, saturation output current is 500mA/mm, and up to 570V, this is at that time to breakdown voltage
Reported breakdown voltage highest GaN device, referring to High breakdown GaN HEMT with overlapping gate
structure,IEEE Electron Device Letters,Vol.21,No.9,pp.421-423,2000.Subsequently, various countries
Research institution expands the research work of correlation one after another, and the U.S. and Japan are the main leaders in the field.It is in the U.S., main
If UCSB, Nan Ka university, Cornell University and famous IR companies of power electronic devices manufacturer etc. are engaged in the research.
Japan is relative to start late, but their work to this respect are paid much attention to, fund input great efforts, and it is numerous to be engaged in mechanism, bag
Include：The major companies such as Toshiba, Furukawa, Panasonic, Toyota and Fuji.With going deep into for research, researchers have found correspondingly to increase field
Plate length, can improve device electric breakdown strength.But the increase of field plate length can make field plate efficiency, i.e. breakdown voltage longer than field plate
Degree, constantly reduces, that is, field plate improves the ability of device electric breakdown strength as the increase of field plate length gradually tends to saturation, joins
See Enhancement of breakdown voltage in AlGaN/GaN high electron mobility
transistors using a field plate,IEEE Transactions on Electron Devices,Vol.48,
No.8, pp.1515-1521,2001, and Development and characteristic analysis of a
field-plated Al2O3/AlInN/GaN MOS HEMT,Chinese Physics B,Vol.20,No.1,
pp.0172031-0172035,2011.Therefore, in order to further improve device electric breakdown strength, while field plate efficiency is taken into account, 2004
The H.L.Xing in year UCSB et al. proposes a kind of double-deck field plate structure, the double-layer grid field plate GaN base HEMT device that they develop
The up to breakdown voltage of 900V, maximum output current 700mA/mm, referring to High breakdown voltage can be obtained
AlGaN-GaN HEMTs achieved by multiple field plates,IEEE Electron Device
Letters,Vol.25,No.4,pp.161-163,2004.And this double-deck field plate structure become it is current in the world for
Improve GaN base power device breakdown characteristics, improve the main flow field plate techniques of device overall performance.
In actual applications, researchers also have found to be permitted in electric automobile, power management system, S power-like amplifiers etc.
In many technical fields, power device is generally required with very strong reverse blocking, i.e., reverse OFF state, ability, that is, wish device
Part has very high negative drain breakdown voltage, i.e. breakdown reverse voltage under OFF state.And common individual layer or double-deck field plate are all
It is to be connected with grid or source electrode, therefore when device drain applies low-down backward voltage, device grids positive will be opened,
And by very big gate current, so as to cause component failure.Therefore, in order to improve the reverse blocking capability of power device, 2009
Eldad Bahat-Treidel et al. propose a kind of power device of employing Schottky drain, referring to AlGaN/GaN HEMT
With Integrated Recessed Schottky-Drain Protection Diode,IEEE Electron Device
Letters,Vol.30,No.9,pp.901-903,2009.However, Schottky drain is in terms of device reverse blocking voltage is improved
Ability it is extremely limited, therefore in order to more effectively improve the reverse blocking capability of power device, researchers are by field plate techniques
Device drain has been incorporated into, leakage field plate structure has been defined.Therefore, in order to take into account the forward and reverse blocking ability of power device,
Wataru Saito in 2005 et al. propose the composite field plate power device of a kind of employing source field plate and leakage field plate, that is,
Source-leakage composite field plate power device, referring to Design optimization of high breakdown voltage
AlGaN-GaN power HEMT on an insulating substrate for RONA-VB tradeoff
characteristics,IEEE Transactions on Electron Devices,Vol.52,No.1,pp.106-111,
2005.However, due to individual layer source field plate and leakage field plate improve device electric breakdown strength in terms of ability it is still limited, therefore will
Double-deck field plate structure is combined with source-leakage composite field plate power device, that is, the source field plate using double-deck field plate structure and double
Layer field plate structure leakage field plate and constitute source-leakage composite double layer field plate power device, it is possible to achieve device forward and reverse punctures
The further lifting of voltage, this has larger application potential.However, the complex process of double-deck field plate HEMT power devices, system
The making of Ben Genggao, each layer of field plate is caused to be required for the processing steps such as photoetching, deposit metal, deposit dielectric passivation.And will
Optimize dielectric material thickness under each layer field plate to maximize to realize breakdown voltage, it is necessary to carry out loaded down with trivial details process debugging and optimization,
Therefore the difficulty of device manufacture is considerably increased, the yield rate of device is reduced.
The content of the invention
It is an object of the invention to overcome the shortcomings of above-mentioned prior art, there is provided a kind of simple structure, forward and reverse hit
Wear that voltage is high, the heterojunction device based on T-shaped gate-leakage composite field plate that field plate efficiency high and reliability are high and preparation method thereof,
To reduce element manufacturing difficulty, improve the forward breakdown characteristic and reverse breakdown characteristics of device, improve device yield.
For achieving the above object, the device architecture that the present invention is provided is different using GaN base semiconductor material with wide forbidden band composition
Matter junction structure, includes from bottom to top：Substrate, transition zone, barrier layer, passivation layer and protective layer, deposit above barrier layer active
Pole, Schottky drain and grid, the side of barrier layer are carved with table top, and land depth is more than barrier layer thickness, it is characterised in that：
Grid groove and bakie are carved with passivation layer, near grid, bakie is near Schottky drain for grid groove；
T-shaped grid field plate and T-shaped leakage field plate are deposited between passivation layer and protective layer；
The T-shaped grid field plate is electrically connected with grid, and lower end is completely filled in grid groove；
The T-shaped leakage field plate is electrically connected with Schottky drain, and lower end is completely filled in bakie.
Preferably, depth s of described grid groove1With depth s of bakie2It is equal, and 0.43～11.4 μm is, grid groove
Width b1With the width b of bakie2It is equal, and it is 0.81～10.2 μm.
Preferably, the distance between the bottom of described grid groove and barrier layer d1And bakie bottom and barrier layer between
Apart from d2It is equal, and it is 0.098～1.74 μm.
Preferably, described T-shaped grid field plate near one lateral edges of Schottky drain and grid groove near Schottky drain one
The distance between lateral edges c1For 0.98～12.2 μm.
Preferably, described T-shaped leaks field plate near one lateral edges of grid and bakie between one lateral edges of grid
Apart from c2For 0.98～12.2 μm.
Preferably, described T-shaped grid field plate leaks field plate near grid side near one lateral edges of Schottky drain and T-shaped
The distance between edge L is 1～9 μm.
Preferably, described grid groove near one lateral edges of grid and grid between one lateral edges of Schottky drain
Apart from a1With bakie near one lateral edges of Schottky drain and Schottky drain near the distance between one lateral edges of grid a2Phase
Deng, grid groove near one lateral edges of grid with grid near the distance between one lateral edges of Schottky drain a1For s1×(d1)0.5, its
Middle s1For the depth of grid groove, d1For the distance between grid trench bottom and barrier layer；Bakie is near one lateral edges of Schottky drain and Xiao
Te Ji drain electrodes are near the distance between one lateral edges of grid a2For s2×(d2)0.5, wherein s2For the depth of bakie, d2For bakie bottom
The distance between portion and barrier layer.
For achieving the above object, the method that the present invention makes the heterojunction device based on T-shaped gate-leakage composite field plate, including
Following process：
The first step, the extension GaN base semiconductor material with wide forbidden band on substrate form transition zone；
Second step, the extension GaN base semiconductor material with wide forbidden band on transition zone form barrier layer；
3rd step, makes mask on barrier layer for the first time, using the mask barrier layer left end deposit metal, then
N2Rapid thermal annealing is carried out in atmosphere, source electrode is made；
4th step, second making mask on barrier layer, using the mask in the right-hand member deposit metal of barrier layer, make
Schottky drain；
5th step, makes mask on barrier layer for the third time, using the mask on the left of the source electrode with Schottky drain on the right side of
Barrier layer on perform etching, and etched area depth be more than barrier layer thickness, formed table top；
6th step, the 4th making mask, the gesture using the mask between source electrode and Schottky drain on barrier layer
Metal is deposited in barrier layer, grid is made；
7th step, respectively in other area tops shallow lakes of source electrode top, Schottky drain top, grid top and barrier layer
Product passivation layer；
8th step, the 5th making mask, blunt between grid and Schottky drain using the mask over the passivation layer
Change and perform etching in layer, to make the grid groove and bakie of same depth and same widths, and grid groove, near grid, bakie is near Xiao
Te Ji drains, and grid groove is near one lateral edges of grid with grid near the distance between one lateral edges of Schottky drain a1For s1×
(d1)0.5, wherein s1For the depth of grid groove, d1For the distance between grid trench bottom and barrier layer, bakie is near Schottky drain one
Lateral edges are with Schottky drain near the distance between one lateral edges of grid a2For s2×(d2)0.5, wherein s2For the depth of bakie,
d2For the distance between bakie bottom and barrier layer；
9th step, the 6th making mask over the passivation layer, using the mask in grid groove, in bakie and grid and Xiao
Metal is deposited on passivation layer between Te Ji drain electrodes, deposited metal is filled up completely with grid groove and bakie, to make thickness identical T
Shape grid field plate and T-shaped leakage field plate, and T-shaped grid field plate is electrically connected with grid, T-shaped leakage field plate is electrically connected with Schottky drain
Connect；
Tenth step, other the area top deposit insulation on T-shaped grid field plate top, T-shaped leakage field plate top and passivation layer are situated between
Material, forms protective layer, completes the making of whole device.
Device of the present invention compares with advantages below with traditional grid field plate and the heterojunction device of leakage field plate is adopted：
1. the forward and reverse breakdown voltage of device is further increased.
The present invention due to using T-shaped grid field plate structure, making device in the working condition in positive OFF state, barrier layer table
Face potential is gradually risen from grid to Schottky drain, so as to increased depletion region in barrier layer, i.e. high resistance area, area, change
It has been apt to the distribution of depletion region, has promoted the depletion region between grid and Schottky drain in barrier layer to undertake bigger positive drain-source electricity
Pressure, so as to substantially increase the forward break down voltage of device；And the present invention makes device exist due to leaking field plate structure using T-shaped
During working condition in reverse OFF state, barrier layer surface potential is gradually risen from Schottky drain to grid, so as to increased
Depletion region in barrier layer, i.e. high resistance area, area, improve the distribution of depletion region, promote gesture between grid and Schottky drain
Depletion region in barrier layer undertakes bigger negative drain-source voltage, so as to substantially increase the breakdown reverse voltage of device.
2. gate leakage current is further reduced, device reliability in positive OFF state is improve.
The present invention due to using T-shaped grid field plate structure, making device in the working condition in positive OFF state, device barrier
The distribution of electric field line in layer depletion region has obtained more effective modulation, and in device, grid is near one lateral edges of Schottky drain, T-shaped
Grid field plate all can produce an electric field peak near one lateral edges of Schottky drain near one lateral edges of Schottky drain and grid groove
Value, and by adjusting thickness, grid groove depth and width, the grid groove of the passivation layer below T-shaped grid field plate near one side of grid
Edge is with grid near the distance between one lateral edges of Schottky drain and grid groove near one lateral edges of Schottky drain and T-shaped grid
Field plate can cause above-mentioned each peak electric field equal and less than GaN base near the distance between one lateral edges of Schottky drain
The breakdown electric field of semiconductor material with wide forbidden band, so as to reduce edge institute of the grid near Schottky drain side to greatest extent
The electric field line of collection, significantly reduces the electric field at this, substantially reduces gate leakage current so that device is in positive OFF state
When reliability and breakdown characteristics significantly increased.
3. gate leakage current is further reduced, device reliability in reverse OFF state is improve.
The present invention due to using T-shaped leak field plate structure, make device in reverse OFF state working condition when, device barrier
The distribution of electric field line in layer depletion region has also obtained more effective modulation, and in device, Schottky drain is near one lateral edges of grid, T
Shape leakage field plate all can produce a peak electric field near one lateral edges of grid near one lateral edges of grid and bakie, and pass through
The thickness of passivation layer, bakie depth and width, bakie below adjustment T-shaped leakage field plate is near one lateral edges of Schottky drain and Xiao
Te Ji drain electrodes leak field plate near grid near one lateral edges of grid and T-shaped near the distance between one lateral edges of grid and bakie
The distance between one lateral edges, can cause above-mentioned each peak electric field equal and less than GaN base semiconductor material with wide forbidden band
Breakdown electric field, so as to reduce the electric field line collected by edge of the grid near Schottky drain side to greatest extent, effectively
Reduce electric field at this, substantially reduce gate leakage current so that reliability of the device in reverse OFF state and puncture
Characteristic is significantly increased.
4. process is simple, it is easy to accomplish, improve yield rate.
The making of T-shaped grid field plate and T-shaped leakage field plate in device architecture of the present invention only needs a step process just can complete, it is to avoid
The process complications problem brought by traditional stack layers field plate structure, substantially increases the yield rate of device.
Simulation result shows that the forward break down voltage and breakdown reverse voltage of device of the present invention are far longer than respectively using biography
The forward break down voltage and breakdown reverse voltage of the heterojunction device of system grid field plate and leakage field plate.
The technology contents and effect of the present invention are further illustrated below in conjunction with drawings and Examples.
Description of the drawings
Fig. 1 is the structure chart of the heterojunction device using traditional grid field plate and leakage field plate；
Fig. 2 is structure chart of the present invention based on the heterojunction device of T-shaped gate-leakage composite field plate；
Fig. 3 is Making programme figure of the present invention based on the heterojunction device of T-shaped gate-leakage composite field plate；
Fig. 4 is to electric field curve diagram in barrier layer during positive OFF state obtained by traditional devices and device simulation of the present invention；
Fig. 5 is to electric field curve diagram in barrier layer during reverse OFF state obtained by traditional devices and device simulation of the present invention.
Specific embodiment
With reference to Fig. 2, the present invention is which includes based on GaN base wide bandgap semiconductor heterojunction structure：Substrate 1, transition zone 2,
Barrier layer 3, source electrode 4, Schottky drain 5, table top 6, grid 7, passivation layer 8, grid groove 9, bakie 10, the leakage of T-shaped grid field plate 11, T-shaped
Field plate 12 and protective layer 13.Substrate 1, transition zone 2 are to be distributed from bottom to top with barrier layer 3；Source electrode 4 and Schottky drain 5 are deposited
On barrier layer 3, grid 7 is deposited on the barrier layer 3 between source electrode 4 and Schottky drain 5；Table top 6 is produced on the left of source electrode
On the right side of Schottky drain, the land depth is more than barrier layer thickness；Passivation layer 8 is respectively overlay in source electrode top, Schottky leakage
Other area tops on pole top, grid top and barrier layer；Grid groove 9 and bakie 10 are located between grid and Schottky drain
In passivation layer 8, near grid, bakie is near Schottky drain for grid groove；Grid groove has same depth and same widths, grid with bakie
Depth s of groove1With depth s of bakie20.43～11.4 μm is, the width b of grid groove1With the width b of bakie2It is 0.81～
10.2 μm, the distance between grid trench bottom and barrier layer d1With the distance between bakie bottom and barrier layer d2It is equal, and be
0.098～1.74 μm；Grid groove is near one lateral edges of grid with grid near the distance between one lateral edges of Schottky drain a1With
Bakie is near one lateral edges of Schottky drain with Schottky drain near the distance between one lateral edges of grid a2Equal, grid groove is leaned on
Nearly one lateral edges of grid are with grid near the distance between one lateral edges of Schottky drain a1For s1×(d1)0.5, wherein s1For grid
The depth of groove, d1For the distance between grid trench bottom and barrier layer；Bakie is leaked with Schottky near one lateral edges of Schottky drain
Extremely near the distance between one lateral edges of grid a2For s2×(d2)0.5, wherein s2For the depth of bakie, d2For bakie bottom and gesture
The distance between barrier layer；T-shaped grid field plate 11 and T-shaped leakage field plate 12 are deposited between passivation layer 8 and protective layer 13, the T-shaped grid field
Plate is electrically connected with grid 7, and lower end is completely filled in grid groove 9, and the T-shaped leakage field plate is electrically connected with Schottky drain 5, and
Lower end is completely filled in bakie 10；T-shaped grid field plate is near one lateral edges of Schottky drain with grid groove near Schottky drain one
The distance between lateral edges c1For 0.98～12.2 μm, T-shaped leaks field plate near one lateral edges of grid and bakie near grid side
The distance between edge c2For 0.98～12.2 μm, T-shaped grid field plate is close with T-shaped leakage field plate near one lateral edges of Schottky drain
The distance between one lateral edges of grid L is 1～9 μm；Protective layer 13 is covered each by 11 top of T-shaped grid field plate, T-shaped and leaks on field plate 12
Other area tops of portion and passivation layer.
The substrate 1 of above-mentioned device adopts sapphire or carborundum or silicon materials；If transition zone 2 is identical or different by dried layer
GaN base semiconductor material with wide forbidden band is constituted, and its thickness is 1～5 μm；If barrier layer 3 is prohibited by the identical or different GaN base width of dried layer
Carrying semiconductor material is constituted, and its thickness is 5～50nm；Passivation layer 8 and protective layer 13 adopt SiO2、SiN、Al2O3、Sc2O3、
HfO2、TiO2In any one or other insulating dielectric materials, the thickness of passivation layer is grid groove depth and grid trench bottom and potential barrier
The distance between layer sum s1+d1Or the distance between the depth and bakie bottom and barrier layer of bakie sum s2+d2, wherein s1+
d1With s2+d2It is equal, i.e., 0.528～13.14 μm；The thickness of protective layer is 0.51～7.6 μm；T-shaped grid field plate 11 and T-shaped leakage field
Plate 12 is constituted using the combination of three layers of different metal, and its thickness is identical and is 0.43～11.4 μm.
With reference to Fig. 3, the present invention makes the process of the heterojunction device based on T-shaped gate-leakage composite field plate, provides following three kinds
Embodiment：
Embodiment one：Making substrate is sapphire, and passivation layer is Al2O3, protective layer is SiN, T-shaped grid field plate and T-shaped leakage field
Heterojunction device based on T-shaped gate-leakage composite field plate of the plate for Ti/Mo/Au metallic combinations.
In Sapphire Substrate 1, extension GaN material makes transition zone 2, such as Fig. 3 a to step 1. from bottom to top.
Using metal organic chemical vapor deposition technology, in Sapphire Substrate 1, epitaxial thickness is 1 μm of undoped p mistake
Layer 2 is crossed, the GaN material that the transition zone is respectively 30nm and 0.97 μm by thickness from bottom to top is constituted.Extension lower floor GaN material is adopted
Process conditions are：Temperature is 530 DEG C, and pressure is 45Torr, and hydrogen flowing quantity is 4400sccm, and ammonia flow is
4400sccm, gallium source flux are 22 μm of ol/min；The process conditions that extension upper strata GaN material is adopted for：Temperature is 960 DEG C, pressure
It is by force 45Torr, hydrogen flowing quantity is 4400sccm, and ammonia flow is 4400sccm, and gallium source flux is 120 μm of ol/min.
Step 2. deposits unadulterated Al in GaN transition layer 20.5Ga0.5N makes barrier layer 3, such as Fig. 3 b.
Using metal organic chemical vapor deposition technology, in GaN transition layer 2, deposition thickness is 5nm, and al composition is
0.5 undoped p Al0.5Ga0.5N barrier layers 3, the process conditions which adopts for：Temperature is 980 DEG C, and pressure is 45Torr, hydrogen
Flow is 4400sccm, and ammonia flow is 4400sccm, and gallium source flux is 35 μm of ol/min, and silicon source flow is 7 μm of ol/min.
Step 3. makes source electrode 4, such as Fig. 3 c in the left end deposit metal Ti/Al/Ni/Au of barrier layer 3.
In Al0.5Ga0.5Make mask on N barrier layers 3 for the first time, using electron beam evaporation technique in its left end deposit gold
Category, then in N2Rapid thermal annealing is carried out in atmosphere, source electrode 4 is made, wherein the metal for being deposited is Ti/Al/Ni/Au metal groups
Close, i.e., be respectively Ti, Al, Ni and Au from bottom to top, its thickness is 0.018 μm/0.135 μm/0.046 μm/0.052 μm.Deposit
The process conditions that metal is adopted for：Vacuum is less than 1.8 × 10-3Pa, power bracket are 200～1000W, and evaporation rate is less thanThe process conditions that rapid thermal annealing is adopted for：Temperature is 850 DEG C, and the time is 35s.
Step 4. makes Schottky drain 5, such as Fig. 3 d in the right-hand member deposit W metal/Au of barrier layer 3.
In Al0.5Ga0.5Second making mask on N barrier layers 3, using electron beam evaporation technique in its right-hand member deposit gold
Category, make Schottky drain 5, wherein the metal for being deposited be Ni/Au metallic combinations, i.e. lower floor be Ni, upper strata be Au, its thickness
For 0.044 μm/0.27 μm.The process conditions that adopt of deposit metal for：Vacuum is less than 1.8 × 10-3Pa, power bracket are 200
～1000W, evaporation rate are less than
Step 5. performs etching making table top 6, such as Fig. 3 e on the barrier layer on the right of the source electrode left side with Schottky drain.
In Al0.5Ga0.5Make mask on N barrier layers 3 for the third time, using reactive ion etching technology in the source electrode left side and Xiao
Perform etching on the barrier layer on Te Ji drain electrodes the right, form table top 6, etching depth is 10nm.The process conditions that adopt of etching for：
Cl2Flow is 15sccm, and pressure is 10mTorr, and power is 100W.
W metal/Au is deposited on barrier layer of the step 6. between source electrode and Schottky drain and makes grid 7, such as Fig. 3 f.
In Al0.5Ga0.5On N barrier layers, the 4th making mask, is leaked with Schottky in source electrode using electron beam evaporation technique
Metal is deposited on barrier layer between pole, grid 7 is made, wherein the metal for being deposited for Ni/Au metallic combinations, i.e. lower floor is
Ni, upper strata are Au, and its thickness is 0.044 μm/0.27 μm.The process conditions that adopt of deposit metal for：Vacuum less than 1.8 ×
10-3Pa, power bracket are 200～1000W, and evaporation rate is less than
Step 7. is deposited in other area tops of source electrode top, Schottky drain top, grid top and barrier layer
Passivation layer 8, such as Fig. 3 g.
Source electrode top, Schottky drain top, grid top and barrier layer are covered each by using atomic layer deposition technology
Other area tops, complete the Al that deposition thickness is 0.528 μm2O3Passivation layer 8.The process conditions that adopt of deposit passivation layer for：
With TMA and H2O is reaction source, and carrier gas is N2, carrier gas flux is 200sccm, and underlayer temperature is 300 DEG C, and air pressure is 700Pa.
Step 8. performs etching making grid groove 9 and bakie 10 in the passivation layer between grid 7 and Schottky drain 5, such as
Fig. 3 h.
The 5th making mask on passivation layer 8, using reactive ion etching technology grid 7 and Schottky drain 5 it
Between passivation layer in perform etching, to make same depth, the grid groove 9 of same widths and bakie 10, grid groove is near grid, bakie
Near Schottky drain, grid groove is 0.43 μm with the depth of bakie, and width is 0.81 μm, the bottom of grid groove and the bottom of bakie
The distance between portion and barrier layer are 0.098 μm, and grid groove is near one lateral edges of grid with grid near Schottky drain side
The distance between edge and bakie are near one lateral edges of Schottky drain and Schottky drain between one lateral edges of grid
Distance is 0.135 μm.The process conditions that adopt of etching for：CF4Flow is 45sccm, O2Flow is 5sccm, and pressure is
15mTorr, power are 250W.
Step 9. is in grid groove 9, deposit metal on the passivation layer in bakie 10 and between grid 7 and Schottky drain 5
Ti/Mo/Au makes T-shaped grid field plate 11 and T-shaped leakage field plate 12, such as Fig. 3 i.
The 6th making mask on passivation layer 8, using electron beam evaporation technique in grid groove 9, in bakie 10 and grid
Metal is deposited on passivation layer between pole 7 and Schottky drain 5 and forms T-shaped grid field plate 11 and T-shaped leakage field plate 12, and by T-shaped grid
Field plate is electrically connected with grid, and T-shaped leakage field plate and Schottky drain are electrically connected.The metal for being deposited is Ti/Mo/Au metals
Combination, i.e. lower floor are Ti, middle level is Mo, upper strata is Au, and its thickness is 0.18 μm/0.16 μm/0.09 μm.Wherein deposited metal
Grid groove 9 and bakie 10 are filled up completely with, T-shaped grid field plate is near one lateral edges of Schottky drain with grid groove near Schottky drain one
The distance between lateral edges are 0.98 μm, and T-shaped leakage field plate is near one lateral edges of grid and bakie between one lateral edges of grid
Distance be 0.98 μm, T-shaped grid field plate leaks field plate between one lateral edges of grid near one lateral edges of Schottky drain and T-shaped
Distance be 1 μm.The process conditions that adopt of deposit metal for：Vacuum is less than 1.8 × 10-3Pa, power bracket be 200～
1000W, evaporation rate are less than
Other area tops of step 10. on 11 top of T-shaped grid field plate, T-shaped leakage 12 top of field plate and passivation layer 8 are deposited
SiN makes protective layer 13, such as Fig. 3 j.
Using plasma enhanced CVD technology on 11 top of T-shaped grid field plate, T-shaped leakage 12 top of field plate and blunt
Other area tops deposit SiN for changing layer 8 forms protective layer 13, and its thickness is 0.51 μm, so as to complete the making of whole device,
The process conditions that adopt of deposit protective layer for：Gas is NH3、N2And SiH4, gas flow be respectively 2.5sccm, 950sccm and
250sccm, temperature, RF power and pressure are respectively 300 DEG C, 25W and 950mTorr.
Embodiment two：Making substrate is carborundum, and passivation layer is SiN, and protective layer is SiO2, T-shaped grid field plate and T-shaped leakage field
Heterojunction device based on T-shaped gate-leakage composite field plate of the plate for Ti/Ni/Au metallic combinations.
Step one. in silicon carbide substrates 1, extension AlN makes transition zone 2, such as Fig. 3 a with GaN material from bottom to top.
1.1) using metal organic chemical vapor deposition technology, in silicon carbide substrates 1, epitaxial thickness is not mixing for 50nm
Miscellaneous AlN materials；The process conditions of its extension are：Temperature is 1000 DEG C, and pressure is 45Torr, and hydrogen flowing quantity is 4600sccm, ammonia
Throughput is 4600sccm, and silicon source flow is 5 μm of ol/min；
1.2) using metal organic chemical vapor deposition technology, on AlN materials, epitaxial thickness is 2.45 μm of GaN materials
Material, completes the making of transition zone 2；The process conditions of its extension are：Temperature is 1000 DEG C, and pressure is 45Torr, and hydrogen flowing quantity is
4600sccm, ammonia flow are 4600sccm, and gallium source flux is 120 μm of ol/min.
The extension of this step is not limited to metal organic chemical vapor deposition technology, it would however also be possible to employ molecular beam epitaxy skill
Art or hydride gas-phase epitaxy technology.
Step 2. extension Al from bottom to top on transition zone 20.3Ga0.7N and GaN material make barrier layer 3, such as Fig. 3 b.
2.1) using metal organic chemical vapor deposition technology, on transition zone 2, deposition thickness is that 27nm, al composition are
0.3 Al0.3Ga0.7N materials；The process conditions of its extension are：Temperature is 1100 DEG C, and pressure is 45Torr, and hydrogen flowing quantity is
4600sccm, ammonia flow are 4600sccm, and gallium source flux is 16 μm of ol/min, and silicon source flow is 8 μm of ol/min；
2.2) using metal organic chemical vapor deposition technology in Al0.3Ga0.7GaN of the epitaxial thickness for 3nm on N materials
Material, completes the making of barrier layer 3；The process conditions of its extension are：Temperature is 1200 DEG C, and pressure is 40Torr, hydrogen flowing quantity
For 4100sccm, ammonia flow is 4100sccm, and gallium source flux is 11 μm of ol/min.
The extension of this step is not limited to metal organic chemical vapor deposition technology, it would however also be possible to employ molecular beam epitaxy skill
Art or hydride gas-phase epitaxy technology.
Step 3. source electrode 4, such as Fig. 3 c are made in the left end deposit metal Ti/Al/Ni/Au of barrier layer 3.
3.1) mask is made for the first time on barrier layer 3, deposit metal in its left end using electron beam evaporation technique, wherein
The metal for being deposited is Ti/Al/Ni/Au metallic combinations, i.e., be respectively Ti, Al, Ni and Au from bottom to top, and its thickness is 0.018 μ
m/0.135μm/0.046μm/0.052μm.The process conditions that adopt of deposit metal for：Vacuum is less than 1.8 × 10-3Pa, power
Scope is 200～1000W, and evaporation rate is less than
3.2) in N2Rapid thermal annealing is carried out in atmosphere, the making of source electrode 4, the process conditions that rapid thermal annealing is adopted are completed
For：Temperature is 850 DEG C, and the time is 35s.
The Metal deposition of this step is not limited to electron beam evaporation technique, it would however also be possible to employ sputtering technology.
Step 4. Schottky drain 5, such as Fig. 3 d are made in the right-hand member deposit W metal/Au of barrier layer 3.
On barrier layer 3, second making mask, deposits metal in its right-hand member using electron beam evaporation technique, makes Xiao Te
Base drain electrode 5, wherein the metal for being deposited be Ni/Au metallic combinations, i.e. lower floor be Ni, upper strata be Au, its thickness be 0.044 μm/
0.27μm.The process conditions that adopt of deposit metal for：Vacuum is less than 1.8 × 10-3Pa, power bracket are 200～1000W, are steamed
Send out speed to be less than
The Metal deposition of this step is not limited to electron beam evaporation technique, it would however also be possible to employ sputtering technology.
Step 5. making table top 6, such as Fig. 3 e are performed etching on the barrier layer on the right of the source electrode left side with Schottky drain.
Make mask on barrier layer 3 for the third time, using reactive ion etching technology in the source electrode left side and Schottky drain
Perform etching on the barrier layer on the right, form table top 6, etching depth is 100nm.The process conditions that adopt of etching for：Cl2Flow
For 15sccm, pressure is 10mTorr, and power is 100W.
The etching of this step is not limited to reactive ion etching technology, it would however also be possible to employ sputtering technology or plasma etching
Technology.
Step 6. W metal/Au is deposited on the barrier layer between source electrode and Schottky drain and makes grid 7, such as Fig. 3 f.
The 4th making mask, the gesture using electron beam evaporation technique between source electrode and Schottky drain on barrier layer
Metal is deposited in barrier layer, grid 7 is made, wherein it is Au for Ni, upper strata that the metal for being deposited is Ni/Au metallic combinations, i.e. lower floor,
Its thickness is 0.044 μm/0.27 μm, deposit the process conditions that adopt of metal for：Vacuum is less than 1.8 × 10-3Pa, power bracket
For 200～1000W, evaporation rate is less than
The Metal deposition of this step is not limited to electron beam evaporation technique, it would however also be possible to employ sputtering technology.
Step 7. deposit in other area tops of source electrode top, Schottky drain top, grid top and barrier layer
Passivation layer 8, such as Fig. 3 g.
Source electrode top, Schottky drain top, grid are covered each by using plasma enhanced CVD technology
Other area tops of top and barrier layer, complete the SiN passivation layers 8 that deposition thickness is 6.3 μm；Its process conditions for adopting
For：Gas is NH3、N2And SiH4, gas flow respectively 2.5sccm, 950sccm and 250sccm, temperature, RF power and pressure
Respectively 300 DEG C, 25W and 950mTorr.
The deposit of the passivation layer of this step is not limited to plasma enhanced CVD technology, it would however also be possible to employ steam
Send out technology or atomic layer deposition technology or sputtering technology or molecular beam epitaxy technique.
Step 8. making grid groove 9 and bakie 10 are performed etching in the passivation layer between grid 7 and Schottky drain 5, such as
Fig. 3 h.
The 5th making mask on passivation layer 8, using reactive ion etching technology grid 7 and Schottky drain 5 it
Between passivation layer in perform etching, to make same depth, the grid groove 9 of same widths and bakie 10, grid groove is near grid, bakie
Near Schottky drain, grid groove is 5.8 μm with the depth of bakie, and width is 5.4 μm, the bottom of grid groove and the bottom of bakie
0.5 μm is with the distance between barrier layer, grid groove is near one lateral edges of grid with grid near one lateral edges of Schottky drain
The distance between and bakie near one lateral edges of Schottky drain and Schottky drain near the distance between one lateral edges of grid
It is 4.101 μm.The process conditions that adopt of etching for：CF4Flow is 45sccm, O2Flow is 5sccm, and pressure is 15mTorr,
Power is 250W.
The etching of this step is not limited to reactive ion etching technology, it would however also be possible to employ sputtering technology or plasma etching
Technology.
Step 9. metal is deposited on the passivation layer in grid groove 9, in bakie 10 and between grid 7 and Schottky drain 5
Ti/Ni/Au makes T-shaped grid field plate 11 and T-shaped leakage field plate 12, such as Fig. 3 i.
The 6th making mask on passivation layer 8, using electron beam evaporation technique in grid groove 9, in bakie 10 and grid
Metal is deposited on passivation layer between pole 7 and Schottky drain 5 and forms T-shaped grid field plate 11 and T-shaped leakage field plate 12, and by T-shaped grid
Field plate is electrically connected with grid, and T-shaped leakage field plate and Schottky drain are electrically connected.The metal for being deposited is Ti/Ni/Au metals
Combination, i.e. lower floor are Ti, middle level is Ni, upper strata is Au, and its thickness is 2.9 μm/2.4 μm/0.5 μm.Wherein deposited metal will
Grid groove 9 and bakie 10 are filled up completely with, T-shaped grid field plate is near one lateral edges of Schottky drain with grid groove near Schottky drain side
The distance between edge is 7.9 μm, T-shaped leak field plate near one lateral edges of grid and bakie between one lateral edges of grid away from
From for 7.9 μm, T-shaped grid field plate near one lateral edges of Schottky drain and T-shaped leak field plate between one lateral edges of grid away from
From for 6.8 μm.The process conditions that adopt of deposit metal for：Vacuum is less than 1.8 × 10-3Pa, power bracket are 200～1000W,
Evaporation rate is less than
The Metal deposition of this step is not limited to electron beam evaporation technique, it would however also be possible to employ sputtering technology.
Step 10. other area tops on 11 top of T-shaped grid field plate, T-shaped leakage 12 top of field plate and passivation layer 8 are deposited
SiO2Make protective layer 13, such as Fig. 3 j.
Using plasma enhanced CVD technology on 11 top of T-shaped grid field plate, T-shaped leakage 12 top of field plate and blunt
Other area tops for changing layer 8 deposit SiO2Protective layer 13 is formed, its thickness is 4.3 μm, so as to complete the making of whole device,
The process conditions which adopts for：N2O flows are 850sccm, SiH4Flow is 200sccm, and temperature is 250 DEG C, and RF power is 25W,
Pressure is 1100mTorr.
The deposit of the protective layer of this step is not limited to plasma enhanced CVD technology, it would however also be possible to employ steam
Send out technology or atomic layer deposition technology or sputtering technology or molecular beam epitaxy technique.
Embodiment three：Making substrate is silicon, and passivation layer is SiO2, protective layer is SiN, and T-shaped grid field plate and T-shaped leakage field plate are
The heterojunction device based on T-shaped gate-leakage composite field plate of Ti/Pt/Au metallic combinations.
On silicon substrate 1, extension AlN makes transition zone 2, such as Fig. 3 a with GaN material to step A. from bottom to top.
A1 the use of metal organic chemical vapor deposition technology it is) 800 DEG C in temperature, pressure is 40Torr, hydrogen flowing quantity
For 4000sccm, ammonia flow is 4000sccm, and silicon source flow is under the process conditions of 25 μm of ol/min, on silicon substrate 1 outward
Prolong the AlN materials that thickness is 200nm；
A2 the use of metal organic chemical vapor deposition technology it is) 980 DEG C in temperature, pressure is 45Torr, hydrogen flowing quantity
For 4000sccm, ammonia flow is 4000sccm, and gallium source flux is under the process conditions of 120 μm of ol/min, on AlN materials outward
Prolong the GaN material that thickness is 4.8 μm, complete the making of transition zone 2.
Step B. deposits Al on transition zone from bottom to top0.1Ga0.9N makes barrier layer 3, such as Fig. 3 b with GaN material.
B1 the use of metal organic chemical vapor deposition technology it is) 1000 DEG C in temperature, pressure is 40Torr, hydrogen flowing quantity
For 4000sccm, ammonia flow is 4000sccm, and gallium source flux is 12 μm of ol/min, and silicon source flow is the technique of 12 μm of ol/min
Under the conditions of, on transition zone 2, epitaxial thickness is 46nm, the Al that al composition is 0.10.1Ga0.9N materials；
B2 the use of metal organic chemical vapor deposition technology it is) 1000 DEG C in temperature, pressure is 40Torr, hydrogen flowing quantity
For 4000sccm, ammonia flow is 4000sccm, and gallium source flux is under the process conditions of 3 μm of ol/min, in Al0.1Ga0.9N materials
Upper epitaxial thickness is the GaN material of 4nm, completes the making of barrier layer 3.
Step C. makes source electrode 4, such as Fig. 3 c in the left end deposit metal Ti/Al/Ni/Au of barrier layer 3.
C1 mask is made for the first time on barrier layer 3), is less than 1.8 × 10 in vacuum using electron beam evaporation technique- 3Pa, power bracket are 200～1000W, and evaporation rate is less thanProcess conditions under, deposit metal, wherein institute in its left end
The metal of deposit be Ti/Al/Ni/Au metallic combinations, i.e., from bottom to top be respectively Ti, Al, Ni and Au, its thickness be 0.018 μm/
0.135μm/0.046μm/0.052μm；
C2) in N2Atmosphere, temperature are 850 DEG C, and the time, to carry out rapid thermal annealing under the process conditions of 35s, completes source electrode 4
Making.
Step D. makes Schottky drain 5, such as Fig. 3 d in the right-hand member deposit W metal/Au of barrier layer 3.
On barrier layer 3, second making mask, is less than 1.8 × 10 in vacuum using electron beam evaporation technique-3Pa, work(
Rate scope is 200～1000W, and evaporation rate is less thanProcess conditions under, barrier layer 3 right-hand member deposit metal, make
Schottky drain 5, wherein it is Au for Ni, upper strata that the metal for being deposited is Ni/Au metallic combinations, i.e. lower floor, its thickness is 0.044
μm/0.27μm。
Step E. performs etching making table top 6, such as Fig. 3 e on the barrier layer on the right of the source electrode left side with Schottky drain.
Make mask on barrier layer 3 for the third time, using reactive ion etching technology in Cl2Flow is 15sccm, pressure
For 10mTorr, power is performed etching on the barrier layer on the right of the source electrode left side and Schottky drain under the process conditions of 100W,
Table top 6 is formed, etching depth is 200nm.
W metal/Au is deposited on barrier layer of step F. between source electrode and Schottky drain and makes grid 7, such as Fig. 3 f.
On barrier layer, the 4th making mask, is less than 1.8 × 10 in vacuum using electron beam evaporation technique-3Pa, work(
Rate scope is 200～1000W, and evaporation rate is less thanProcess conditions under, the potential barrier between source electrode and Schottky drain
Metal is deposited on layer, grid 7 is made, wherein it is Au for Ni, upper strata that the metal for being deposited is Ni/Au metallic combinations, i.e. lower floor, its
Thickness is 0.044 μm/0.27 μm.
Step G. is deposited in other area tops of source electrode top, Schottky drain top, grid top and barrier layer
Passivation layer 8, such as Fig. 3 g.
Using plasma enhanced CVD technology gas be N2O and SiH4, gas flow is respectively
850sccm and 200sccm, temperature are 250 DEG C, RF power 25W, under pressure is for the process conditions of 1100mTorr, on source electrode
Other area top deposition thicknesses of portion, Schottky drain top, grid top and barrier layer are 13.14 μm of SiO2Passivation
Layer 8.
Step H. performs etching making grid groove 9 and bakie 10 in the passivation layer between grid 7 and Schottky drain 5, such as
Fig. 3 h.
The 5th making mask on passivation layer 8, using reactive ion etching technology in CF4Flow is 45sccm, O2Flow
For 5sccm, pressure is 15mTorr, and power is the passivation layer between grid 7 and Schottky drain 5 under the process conditions of 250W
Inside perform etching, to make same depth, the grid groove 9 of same widths and bakie 10, near grid, bakie is near Schottky for grid groove
Drain electrode, the depth of grid groove and bakie are 11.4 μm, and width is 10.2 μm, the bottom of grid groove and the bottom of bakie and barrier layer
The distance between be 1.74 μm, grid groove near one lateral edges of grid and grid between one lateral edges of Schottky drain away from
From being near the distance between one lateral edges of grid with Schottky drain near one lateral edges of Schottky drain with bakie
15.038μm。
Step I. is in grid groove 9, deposit metal on the passivation layer in bakie 10 and between grid 7 and Schottky drain 5
Ti/Pt/Au makes T-shaped grid field plate 11 and T-shaped leakage field plate 12, such as Fig. 3 i.
On passivation layer 8, the 6th making mask, is less than 1.8 × 10 in vacuum using electron beam evaporation technique-3Pa, work(
Rate scope is 200～1000W, and evaporation rate is less thanProcess conditions under, in grid groove 9, in bakie 10 and grid 7 with
Metal is deposited on passivation layer between Schottky drain 5 and forms T-shaped grid field plate 11 and T-shaped leakage field plate 12, and by T-shaped grid field plate with
Grid is electrically connected, and T-shaped leakage field plate and Schottky drain are electrically connected.The metal for being deposited is Ti/Pt/Au metallic combinations,
I.e. lower floor be Ti, middle level be Pt, upper strata be Au, its thickness be 5.8 μm/4.7 μm/0.9 μm.Wherein deposited metal will be filled out completely
Fill grid groove 9 and bakie 10, T-shaped grid field plate near one lateral edges of Schottky drain and grid groove near one lateral edges of Schottky drain it
Between distance be 12.2 μm, T-shaped leakage field plate near one lateral edges of grid with bakie near the distance between one lateral edges of grid be
12.2 μm, T-shaped grid field plate leaks field plate near one lateral edges of Schottky drain and T-shaped and near the distance between one lateral edges of grid is
9μm。
Other area tops of step J. on 11 top of T-shaped grid field plate, T-shaped leakage 12 top of field plate and passivation layer 8 deposit SiN
Make protective layer 13, such as Fig. 3 j.
Using plasma enhanced CVD technology gas be NH3、N2And SiH4, gas flow is respectively
2.5sccm, 950sccm and 250sccm, temperature, RF power and pressure are respectively 300 DEG C, the process conditions of 25W and 950mTorr
Under, other area tops deposit SiN on 11 top of T-shaped grid field plate, T-shaped leakage 12 top of field plate and passivation layer 8 makes protective layer
13, its thickness is 7.6 μm, so as to complete the making of whole device.
The effect of the present invention can be further illustrated by following emulation.
Emulation 1：Heterojunction device in the case of Schottky drain plus malleation, to adopting traditional grid field plate and leakage field plate
Emulated with electric field in the barrier layer of device of the present invention, as a result such as Fig. 4, wherein traditional grid field plate effective length L1With the present invention
The effective total length of T-shaped grid field plate is equal.
As seen from Figure 4：It is in the case of Schottky drain plus malleation, heterogeneous with leakage field plate using traditional grid field plate
Electric field curve of the junction device in barrier layer has only formed 2 approximately equalised peak electric fields, and its electric field in barrier layer is bent
The area very little covered by line, and electric field curve of the device of the present invention in barrier layer defines 3 approximately equalised electric field peaks
Value so that the area covered by electric field curve of the device of the present invention in barrier layer is greatly increased, due to the electricity in barrier layer
The area approximation covered by curvature of field line is equal to the forward break down voltage of device, illustrates the forward break down voltage of device of the present invention much
More than the forward break down voltage of the heterojunction device for adopting traditional grid field plate and leakage field plate.
Emulation 2：Heterojunction device in the case of Schottky drain plus negative pressure, to adopting traditional grid field plate and leakage field plate
Emulated with electric field in the barrier layer of device of the present invention, as a result such as Fig. 5, wherein tradition leakage field plate effective length L2With the present invention
The effective total length of T-shaped leakage field plate is equal.
As seen from Figure 5：It is in the case of Schottky drain plus negative pressure, heterogeneous with leakage field plate using traditional grid field plate
Electric field curve of the junction device in barrier layer has only formed 2 approximately equalised peak electric fields, and its electric field in barrier layer is bent
The area very little covered by line, and electric field curve of the device of the present invention in barrier layer defines 3 approximately equalised electric field peaks
Value so that the area covered by electric field curve of the device of the present invention in barrier layer is greatly increased, due to the electricity in barrier layer
The area approximation covered by curvature of field line is equal to the breakdown reverse voltage of device, illustrates the breakdown reverse voltage of device of the present invention much
More than the breakdown reverse voltage of the heterojunction device for adopting traditional grid field plate and leakage field plate.
For those skilled in the art, after present invention and principle has been understood, can be without departing substantially from this
In the case of bright principle and scope, the method according to the invention carries out various amendments and change in form and details, but
These amendments and change based on the present invention are still within the claims of the present invention.
Claims (8)
1. a kind of heterojunction device based on T-shaped gate-leakage composite field plate, includes from bottom to top：Substrate (1), transition zone (2), gesture
Barrier layer (3), passivation layer (8) and protective layer (13), are deposited with source electrode (4), Schottky drain (5) and grid above barrier layer
(7), table top (6) is carved with the side of barrier layer, and land depth is more than barrier layer thickness, it is characterised in that：
Grid groove (9) and bakie (10) are carved with passivation layer (8)；
T-shaped grid field plate (11) and T-shaped leakage field plate (12) are deposited between passivation layer (8) and protective layer (13)；
The T-shaped grid field plate (11) is electrically connected with grid (7), and lower end is completely filled in grid groove (9)；
T-shaped leakage field plate (12) is electrically connected with Schottky drain (5), and lower end is completely filled in bakie (10)；
, near grid, bakie is near Schottky drain, depth s of grid groove for the grid groove1With depth s of bakie2It is equal, and be
0.43～11.4 μm, the width b of grid groove1With the width b of bakie2It is equal, and it is 0.81～10.2 μm；The bottom of grid groove and gesture
The distance between barrier layer d1With the distance between the bottom of bakie and barrier layer d2It is equal, and it is 0.098～1.74 μm.
2. the heterojunction device based on T-shaped gate-leakage composite field plate according to claim 1, it is characterised in that T-shaped grid field plate
Near one lateral edges of Schottky drain with grid groove near the distance between one lateral edges of Schottky drain c1For 0.98～12.2 μm；
T-shaped leaks field plate near one lateral edges of grid and bakie near the distance between one lateral edges of grid c2For 0.98～12.2 μm；Institute
It is 1 that the T-shaped grid field plate stated leaks field plate near the distance between one lateral edges of grid L near one lateral edges of Schottky drain and T-shaped
～9 μm.
3. the heterojunction device based on T-shaped gate-leakage composite field plate according to claim 1, it is characterised in that grid groove is close
One lateral edges of grid are with grid near the distance between one lateral edges of Schottky drain a1With bakie near Schottky drain side
Edge is with Schottky drain near the distance between one lateral edges of grid a2Equal, grid groove is leaned on grid near one lateral edges of grid
The distance between one lateral edges of nearly Schottky drain a1For s1×(d1)0.5, wherein s1For the depth of grid groove, d1For grid trench bottom with
The distance between barrier layer；Bakie is near one lateral edges of Schottky drain and Schottky drain between one lateral edges of grid
Apart from a2For s2×(d2)0.5, wherein s2For the depth of bakie, d2For the distance between bakie bottom and barrier layer.
4. the heterojunction device based on T-shaped gate-leakage composite field plate according to claim 1, it is characterised in that substrate (1) is adopted
With sapphire or carborundum or silicon materials.
5. a kind of method for making the heterojunction device based on T-shaped gate-leakage composite field plate, comprises the steps：
The first step, the extension GaN base semiconductor material with wide forbidden band on substrate (1) form transition zone (2)；
Second step, the extension GaN base semiconductor material with wide forbidden band on transition zone form barrier layer (3)；
3rd step, makes mask on barrier layer for the first time, deposits metal using left end of the mask in barrier layer, then in N2Gas
Rapid thermal annealing is carried out in atmosphere, source electrode (4) is made；
4th step, second making mask on barrier layer, using the mask in the right-hand member deposit metal of barrier layer, make Xiao Te
Base drains (5)；
5th step, makes mask on barrier layer for the third time, using the mask on the left of the source electrode with Schottky drain on the right side of gesture
Barrier layer is performed etching on (3), and etched area depth is more than barrier layer thickness, forms table top (6)；
6th step, the 4th making mask, the barrier layer using the mask between source electrode and Schottky drain on barrier layer
Upper deposit metal, makes grid (7)；
7th step, respectively in other regions of source electrode (4) top, Schottky drain (5) top, grid (7) top and barrier layer
Top deposit passivation layer (8)；
8th step, makes mask the 5th time, using the mask between grid (7) and Schottky drain (5) over the passivation layer
Perform etching in passivation layer, to make the grid groove (9) and bakie (10) of same depth and same widths, and grid groove is near grid,
, near Schottky drain, grid groove is near one lateral edges of grid with grid near the distance between one lateral edges of Schottky drain for bakie
a1For s1×(d1)0.5, wherein s1For the depth of grid groove, d1For the distance between grid trench bottom and barrier layer, bakie is near Schottky
A lateral edges and Schottky drain drain near the distance between one lateral edges of grid a2For s2×(d2)0.5, wherein s2For bakie
Depth, d2For the distance between bakie bottom and barrier layer；
9th step, the 6th making mask over the passivation layer, using the mask in the grid groove (9), in bakie (10) and grid
Metal is deposited on passivation layer (8) between Schottky drain, deposited metal is filled up completely with grid groove (9) and bakie (10), with
Thickness identical T-shaped grid field plate (11) and T-shaped leakage field plate (12) are made, and T-shaped grid field plate is electrically connected with grid, by T-shaped
Leakage field plate is electrically connected with Schottky drain；
Tenth step, other area tops on T-shaped grid field plate top, T-shaped leakage field plate top and passivation layer deposit dielectric material
Material, forms protective layer (13), completes the making of whole device.
6. method according to claim 5, it is characterised in that in the 9th step in grid groove (9), in bakie (10) and grid
The metal deposited on passivation layer (8) between pole and Schottky drain, using three-layer metal combination, Ti/Mo/Au, i.e. lower floor are
Ti, middle level are Mo, upper strata is Au, and its thickness is 0.18～5.8 μm/0.16～4.7 μm/0.09～0.9 μm.
7. method according to claim 5, it is characterised in that in the 9th step in grid groove (9), in bakie (10) and grid
The metal deposited on passivation layer (8) between pole and Schottky drain, using three-layer metal combination, Ti/Ni/Au, i.e. lower floor are
Ti, middle level are Ni, upper strata is Au, and its thickness is 0.18～5.8 μm/0.16～4.7 μm/0.09～0.9 μm.
8. method according to claim 5, it is characterised in that in the 9th step in grid groove (9), in bakie (10) and grid
The metal deposited on passivation layer (8) between pole and Schottky drain, further using three-layer metal combine Ti/Pt/Au, i.e., under
Layer is Ti, middle level is Pt, upper strata is Au, and its thickness is 0.18～5.8 μm/0.16～4.7 μm/0.09～0.9 μm.
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| CN107170798B (en) * | 2017-03-29 | 2020-04-14 | 西安电子科技大学 | Vertical power device based on gate field plate and drain field plate and manufacturing method thereof |
| CN107170795B (en) * | 2017-03-29 | 2020-04-14 | 西安电子科技大学 | Vertical power electronic device of source-drain composite field plate |
| CN107170797B (en) * | 2017-03-29 | 2020-04-14 | 西安电子科技大学 | Current aperture heterojunction transistor based on leakage field plate and manufacturing method thereof |
| CN107170820B (en) * | 2017-03-29 | 2020-04-14 | 西安电子科技大学 | Current aperture heterojunction device of arc-shaped gate-drain composite field plate |
| CN107134490B (en) * | 2017-03-29 | 2020-04-14 | 西安电子科技大学 | Vertical power device based on arc-shaped source field plate and arc-shaped drain field plate and manufacturing method thereof |
| RU204372U1 (en) * | 2020-12-03 | 2021-05-21 | Акционерное общество "Научно-производственная фирма "Микран" | Heterostructure field-effect transistor based on semiconductor gallium nitride compound |
| CN114883407B (en) * | 2022-07-11 | 2022-11-01 | 成都功成半导体有限公司 | HEMT based on Fin-FET gate structure and manufacturing method thereof |
| CN118020159A (en) * | 2022-07-20 | 2024-05-10 | 英诺赛科(苏州)半导体有限公司 | Nitride-based semiconductor device and method of manufacturing the same |
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| US7692263B2 (en) * | 2006-11-21 | 2010-04-06 | Cree, Inc. | High voltage GaN transistors |
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