CN104303050A - 用于控制、检测和测量分子复合物的传感器电 路 - Google Patents

用于控制、检测和测量分子复合物的传感器电 路 Download PDF

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CN104303050A
CN104303050A CN201380009186.0A CN201380009186A CN104303050A CN 104303050 A CN104303050 A CN 104303050A CN 201380009186 A CN201380009186 A CN 201380009186A CN 104303050 A CN104303050 A CN 104303050A
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K.戴尔林
R.J.A.陈
D.J.富拉加
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Roche Sequencing Solutions Co
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Abstract

公开了一种用于控制、检测和测量分子复合物的设备。该设备包括共用电极。该设备还包括多个测量单元。每个测量单元包括单元电极和电子耦合到该单元电极的积分器。该积分器测量在共用电极和单元电极之间流动的电流。该设备还包括多个模拟到数字转换器，其中来自多个测量单元的积分器电气耦合到多个模拟到数字转换器的中的一个模拟到数字转换器。

Description

用于控制、检测和测量分子复合物的传感器电 路
对其它申请的交叉引用
本申请要求2012年2月27日提交的题为“SENSOR CIRCUIT FOR CONTROLLING, DETECTING, AND MEASURING A MOLECULAR COMPLEX”的美国临时专利申请No.61/603,782的优先权，为了所有目的而通过参考将其并入本文。
背景技术
近些年半导体工业内微小型化的发展已经使得生物技术专家能够开始将传统庞大的感测工具包装成所谓生物芯片上的越来越小的形状因子（form factor）。将期望为生物芯片开发使得其更稳健、高效和节约成本的技术。
附图说明
在下面的详细描述和附图中公开本发明的各种实施例。
图1图示出限制在单元100中的纳米孔中的单链DNA（ssDNA）分子。
图2图示出通过合成（纳米SBS）技术以基于纳米孔的排序来执行核苷酸排序的单元200的实施例。
图3图示出传感器单元的四个物理状态。
图4图示出单元的库（bank）（M×N）的实施例。
图5图示出被实施为十六个库8k元素的128k阵列。
图6图示出被实施为库8k元素的8×8阵列的512k阵列。
图7图示出库8k块的实施例。
图8图示出扫描序列的实施例。
图9图示出扫描序列的实施例。
图10图示出可以一次扫描阵列的一部分。
图11图示出用于测量单元中的电流的电路的实施例。
图12图示出用于测量单元中的电流的电路的实施例。
图13图示出用于测量单元中的电流的电路的实施例。
具体实施方式
可以以许多方式来实施本发明，包括作为过程、装置、系统、物质组成、包含在计算机可读存储介质上的计算机程序产品、和/或处理器（诸如被配置成执行存储在耦合到处理器的存储器上的和/或由该存储器提供的指令的处理器）。在本说明书中，这些实施方式或本发明可以采用的任何其它形式可以被称为技术。通常，可以在本发明的范围内更改所公开的过程的步骤顺序。除非另外地声明，诸如描述成被配置成执行任务的处理器或存储器之类的部件可以被实施为临时被配置成在给定时间执行该任务的通用部件或被制造为执行该任务的特定部件。如本文所使用的，术语“处理器”指代被配置成处理数据（诸如计算机程序指令）的一个或多个设备、电路和/或处理核。
下面连同说明本发明原理的附图一起来提供本发明的一个或多个实施例的详细描述。结合此类实施例来描述本发明，但是不发明不限于任何实施例。本发明的范围仅由权利要求来限制，并且本发明包括许多替换物、修改和等同物。在下面的描述中阐述许多具体细节以便提供对本发明的彻底理解。为了示例的目的提供这些细节并且可以在没有这些具体细节中的一些或全部的情况下根据权利要求来实施本发明。为了清楚的目的，不会详细地描述在与本发明相关的技术领域中已知的技术材料以使得不会没必要地使本发明模糊。
在内直径中具有大约1纳米孔大小的纳米孔膜设备已经在迅速核苷酸排序中示出前景。当在浸入于导电流体中的纳米孔两端施加电压电势时，可以观察到归因于离子在纳米孔两端的传导的小离子电流。电流的大小对孔大小敏感。当分子（诸如DNA或RNA分子）通过纳米孔时，其能够部分或完全地堵塞纳米孔，引起通过纳米孔的电流的量值的变化。已经示出离子电流阻塞可能与DNA或RNA分子的碱基对序列相关。
图1图示出限制在单元100中的纳米孔中的单链DNA（ssDNA）分子。如图1中所示，锚定的ssDNA分子102被限制在通过形成于传感器电极之上的绝缘膜106（诸如脂双层）的生物纳米孔104开口内。
基于纳米孔的排序芯片并入被配置为阵列的大量自主操作的传感器单元。例如，一百万个单元的阵列可以包括1000行*100列的单元。此阵列通过测量在纳米孔缠住（entangle）的分子的收缩区域处各个基（base）之间的导电差能够实现单链DNA（ssDNA）分子的并行排序。在一些实施例中，可以确定孔-分子复合物的非线性（与电压有关的）导电特性以便区别在给定位置处的特定核苷酸碱基。
纳米孔阵列还使用通过合成的基于单分子纳米孔排序（Nano-SBS）技术来能够实现并行排序。图2图示出利用Nano-SBS技术来执行核苷酸排序的单元200的实施例。在Nano-SBS技术中，将要被排序的模板202和引物（primer）引入到单元200中。对于此模板-引物复合物，将四个不同标记的核苷酸208被添加到散装（bulk）水相。当正确标记的核苷酸与聚合酶204复合时，该标记的尾部被定位在纳米孔206的外室（vestibule）中。该标记的尾部可以被修改成在纳米孔206的外室中对氨基酸残基具有强亲和力。在正确核苷酸的聚合酶催化结合之后，标记附着的多磷酸盐被释放并且将通过纳米孔206来生成独特的离子电流阻塞信号210，由此识别由于标记的不同化学结构而电子地添加的基。
图3图示出传感器单元的四个物理状态。该四个物理状态在下文中被称为PS1-PS4。在PS1状态中，单元还没有形成脂双层。在PS2状态中，已经形成脂双层但是该脂双层上还没有形成纳米孔。在PS3状态中，脂双层和纳米孔两者都已形成。在PS4状态中，分子或分子复合物（例如ssDNA分子或标记的核苷酸）与纳米孔互相作用。在传感器单元过渡到PS4状态之后，可以获得排序测量结果。
向阵列中的每个单元施加电极电势以便使物理状态从PS1按顺序移动到PS4。在一些实施例中，可以向单元中的每一个施加四个可能的电压以便支持下面的过渡：
PS1—>PS2
PS2—>PS3
PS3—>PS4
PSx—>PSx（没有过渡），
在一些实施例中，施加给电极的分段线性电压波形刺激的精确控制被用于单元通过不同物理状态的过渡。
可以通过测量电容来确定每个单元的物理状态。此外，可以通过测量施加偏压（例如~50-150mV）时的电流流动来确定物理状态。
在一些实施例中，电极电压电势被控制并且同时地监测电极电流。在一些实施例中，根据单元的物理状态来彼此独立地控制阵列的每个单元。单元的独立控制便于可能处于不同物理状态中的大量单元的管理。
在一些实施例中，通过将在任何给定时间可允许施加的电压限定为2并且使阵列的单元成批地在物理状态之间反复地过渡来实现电路简化和电路尺寸减小。例如，阵列的单元最初可能被分成具有处于PS1状态中的单元的第一组和具有处于PS2状态中的单元的第二组。第一组包括还没有形成双分子层的单元。第二组包括已经形成双分子层的单元。最初，第一组包括阵列中的所有单元并且第二组不包括单元。为了使单元从PS1状态过渡到PS2状态，将脂双层形成电压施加给单元。然后执行测量（例如电流或电容测量）以便确定单元中是否已经形成脂双层。如果与单元相对应的测量结果指示已经形成脂双层，则将该单元确定为已从PS1状态过渡到PS2状态，并且该单元从第一组移动到第二组。因为第二组中的单元的每个已经形成脂双层，所以第二组中的单元不再需要进一步施加脂双层形成电压。因此，可以向第二组中的单元施加零伏特偏置以便实现空操作（NOP），以使得单元保持在同一状态中。第一组中的单元还没有形成脂双层。因此，向第一组中的单元进一步施加脂双层形成电压。随着时间的逝去，单元从初始PS1状态移动到PS2脂双层状态，并且一旦足够百分比的单元处于PS2状态中上述步骤就停止。
类似地，单元可以被反复地电穿孔（electro-porate）直到足够的百分比已经从PS2状态过渡到PS3状态或者从PS3状态过渡到PS4状态。
在一些实施例中，纳米孔阵列可以被分成单元库。图4图示出M×N单元库的实施例。行和列选择线被用来控制各个单元的状态。M和N可以是任何整数。例如，大小为8k的库（被称为库8k）可以包括64×128个单元。
因为每个库是自主的，所以可以通过添加附加的库来使纳米孔阵列缩放。例如，128k阵列可以被实施为如图5中示出的十六个库8k。512k阵列可以被实施为如图6中示出的库8k元素的8×8阵列。在一些实施例中，纳米孔阵列可以被缩放成包括数百万个单元。小的全局控制块可以被用来生成选择库并且设置单元施加的电压的控制信号。
图7图示出库8k块的实施例。库8k构建块可以被配置为如图7中所示的64行乘128列。每个库8k块可以是具有用于读取/扫描的行和列寻址逻辑的完整子系统、写入地址解码器、模拟到数字转换器（ADC）和双缓冲输出。
在一些实施例中，库8k块的读取路径和写入路径是分开的并且以时分复用的方式操作。例如，读取之后是写入。通过对行中的所有单元执行模拟到数字转换来扫描每个行。随后，软件可以可选地将值写入到同一行中的任何单元以便更新状态，由此在两个不同的施加电压之间进行选择。
每个库8k块合并八个ADC 702，其中每个ADC 702被连接到16列。列计数器（colcnt）704生成16比特列选择总线（csel）706。csel总线706控制八个分开的16:1模拟多路复用器708并且选择将16列中哪一列电气连接到ADC 702。ADC 702输出被锁存到驱动低压差分信号（LVDS）输出的寄存器（未示出）中。要注意，从给定行读取的连续单元被物理定位为col0，col16，…col112，col1，col17，…，等等。以16比特跨越阵列来使该数据分带（stripe）。类似地，16比特数据被如下写入到单元：
，
在扫描模式中，并行地读出启用的所有库。
在一些实施例中，行的扫描需要读取16列，其中每个列需要16个时钟周期。因此，以128MHz时钟速率在256个时钟或2μs中读取行中的所有单元。在行已经被扫描并且持续2μs之后立即发生预充电时段。
库8k与在时钟的上升沿捕获的所有信号（包括ast710、wr712和多路复用地址数据总线714（ad[15:0]）完全同步。在第一时钟周期期间，利用当地址选通脉冲710（ast）信号为高时时钟的上升沿上的地址锁存716（alat）所捕获的写入地址来驱动ad[15:0]。对七个锁存地址（la）718比特解码以确定将数据写入到哪个库和字。在第二时钟周期期间，应该用数据来驱动ad[15:0]并且wr712信号应该被断言为高以便指示这是数据写入周期。因此，正常的写入需要两个周期：地址周期（由ast710信号指示），之后是数据周期（由wr712信号指示）。
存在三种类型的写入：
·库启用寄存器写入
·控制寄存器写入
·库单元A/B选择写入。
锁存地址718的比特中的一些，la[8:7]，被用来确定写入的类型，如下面的表1中所示的那样：
表1。
行选择（rs）移位寄存器720逻辑和列计数器704（colcnt）一起操作来执行对库8k块中的所有单元的光栅扫描。在完全一体化时段之后，通过断言行选择722（rs）信号为高来读出行。行选择722和列选择704一起使得单个单元能够驱动给定列。并行地读出行内的八个列，每个连接到不同ADC。被选单元使用单元内源极跟随器放大器将积分电容器上的电压驱动到列线之上。
行选择逻辑是在每个库8k块内复制的64比特移位寄存器（sr64寄存器720）。在已经读取行中的所有列之后，外部FPGA（现场可编程门阵列）可以断言nxtrow信号724，其致使sr64寄存器720移位。一旦已经扫描了整个子窗口字段，外部FPGA就断言nxtscan 726，其通过将1比特移位到第一触发器（filip flop）中来将sr64寄存器720重置回到行零。通过改变nxtrow 724和nxtscan 726信号的持续时间和时段，可以使被扫描的阵列窗口化，如将在下面更详细描述的那样。
预充电以逐行为基础发生。在行已经被ADC采样之后，行立即进入预充电模式。每个行具有当nxtrow724信号被断言时对row_enable信号进行采样的触发器。
此外，行选择移位寄存器720还被用来通过将第n个预充电信号连接到第（n+1）个行选择信号来生成行预充电信号：
在行已被读取之后紧接的行扫描时段期间对它预充电。此比特移位的预充电连接被实施为模数64操作，并且因此预充电[63]逻辑连接到rs[0]。
图8图示出扫描序列的实施例。在已经读取了所有64行（连同任何中间的写入）之后，断言nxtscan信号以在行0处重新启动扫描过程。
图9图示出扫描序列的实施例。通过断言CDS引脚来启用相关双采样（CDS）。在不具有CDS的普通测量模式中，测量电容器上的电压，并且随后断言nxtrow引脚以使得可以读取下一行。行N被预充电而行N+1被读取。因此，在行已经被读取之后其立即被重置。断言CDS引脚允许读取刚刚已经被预充电的行。因此，可以在预充电完成之后立即读取重置电压的值并且随后在后来的时间再次读取。通过减去两次测量，降低了预充电晶体管1114的kT/C热噪声。此外，还降低了单元中的有源跟随器和积分器电容之间的电荷共享分压效果。要注意，当执行相关双采样时，有效测量速率降低一半，因为每个积分电流测量需要两次ADC转换。
通过nxtrow 724和nxtscan 726信号来控制行和列地址。断言nxtrow 724输入为高致使列地址和移位寄存器被重置成0并且行地址被移位为1。断言nxtscan 726输入为高致使行和列地址被重置成0。
在正常操作中，扫描每个库内的整个8K单元阵列。ADC需要16时钟周期执行转换并且执行16个这样的转换以便转换整个行。因此，每一行需要256个时钟周期（2.0μs128MHz）。
因此，为了扫描整个8K单元阵列，每256个周期来断言nxtrow 724信号并且针对每16,384周期中的每个周期来断言nxtscan 726信号。使用以128MHz运行的典型时钟产生7.8kH的采样速率（128μs时段）。然而，有可能通过扫描阵列的子集来针对较高扫描速率权衡被扫描单元的数目。例如，可以通过在2048时钟之后断言nxtscan 726信号来扫描阵列的顶部四分之一行，如图10中所示。采样速率增加至四倍，从~8kHz到~32kHz。然而，积分时间和电压信号也减小至四分之一，致使信噪比（SNR）的降级。
在上面的示例中，扫描阵列的四分之一。然而，可以一次扫描阵列的较大或较小部分。例如，可以一次扫描全阵列的行的1/2或1/3。
在上面的示例中，阵列的四分之三剩下未扫描。在一些实施例中，扫描整个阵列多遍。第一遍是如上所述。第二遍留下针对16个连续的时钟周期而断言的nxtrow 724信号以便绕开首先的16行并且在第17行开始新的扫描。然后在断言nxtscan 726以重置扫描移位寄存器之前正常地执行阵列的下一个四分之一的扫描。第三个四分之一跳过32行并且在第33个上开始扫描以扫描最后的16行。
因此，通过时间交错，以比正常更高得多的速率来扫描整个阵列。实际的采样速率没有被改进，因为扫描阵列的所有四个四分之一所需的时间没有改变。存在在四分点扫描中的每一个之间插入的有效“死区时间”。在一些情况下，电流使得电压测量以正常8kHz扫描速率饱和。因此，通过时间交错的较快速扫描，在不饱和的情况下获得阵列中这些高电流单元的读取。软件需要对预充电信号的认知并且执行期望区域的双扫描。
在每个单元中，在不同施加电压下测量电流。单元包括用于将恒定电压（DC电压）或交变电压波形（AC电压）施加给电极并且同时测量低电平电流的电路。
在一些实施例中，电压电势被施加给在安装于管芯表面的导电圆柱内包含的液体。此“液体”电势被施加给孔的顶侧并且对阵列中的所有单元而言是共用的。孔的底侧具有暴露电极，并且每个传感器单元可以将不同的底侧电势施加给其电极。测量顶部液体连接和孔的底侧上的每个单元的电极连接之间的电流。传感器单元测量如通过限制在孔内的分子复合物调制的行进通过该孔的电流。
图11图示出用于测量单元中的电流的电路的实施例。该电路通过电极-感测（ELSNS）节点1102电气连接到电化学活性电极（例如AgCl）。该电路包括晶体管1104。晶体管1104可以是执行两个功能的NMOS或n沟道MOSFET（金属氧化物半导体场效应晶体管）。可以将受控的电压电势施加给ELSNS节点1102，并且可通过改变充当源极跟随器的运算放大器1108控制晶体管1104的输入上的电压来更改该受控电压电势。晶体管1104还操作为电流传送器以便将电子从电容器1106移动到ELSNS节点1102（并且反之亦然）。来自晶体管1104的源极引脚的电流被直接且准确地传播到其漏极引脚，从而将电荷累积在电容器1106上。因此，晶体管1104和电容器1106一起充当超紧凑积分器（UCI）。
UCI被用来根据下式通过测量到电容器1106上积分的电压的变化来确定源自或下沉到电极的电流：
，
其中，I：电流，t：积分时间，C：电容，ΔV：电压变化。
典型的操作包括将电容器106预充电到已知且固定的值（例如VDD=1.8V），并且然后以固定间隔t测量电压变化。对于以128MHz操作的8K库，每个单元积分达~128μs。在一个示例中：
，
在此示例中，电压摆动相对是小的，并且ADC的分辨率大约是毫伏特。可以通过将时钟速率减小到小于128MHz来增加积分电压，由此增加积分时段。
在上面的电路中，最大电压摆动是~1V，并且因此电路以高于~32pA的电流饱和。可以通过减小扫描窗口来增加饱和限制以便有效地增加单元扫描速率。通过交错的快速和缓慢扫描，可以增加可被测量的电流的动态范围。
晶体管1104通过将电荷从积分电容器1106移动到电极来充当电流传送器。晶体管1104还充当电压源，从而通过运算放大器反馈回路将恒定电压强加于电极上。列驱动晶体管1110被配置为源极跟随器以便使电容器电压缓冲并且提供集成电压的低阻抗表示。这防止电荷共享改变电容器上的电压。
晶体管1112是连接到行选择（rs）信号的晶体管。它被用作在其源极处连接为与许多其它单元共享的列的具有模拟电压输出的行访问设备。仅启用列连接的AOUT信号的单个行以使得单个单元电压被测量。
在替换实施例中，可以通过将列驱动晶体管1110的漏极连接到行可选的“切换轨”来省略行选择晶体管（晶体管1112）。
预充电晶体管1114被用来将单元重置成预定启动电压，电压从该预定启动电压积分。例如，将高电压（例如VDD=1.8V）施加给vpre和pre两者将把电容器1106一直拉到预充电值（VDD-Vt）。确切的启动值可以逐个单元（归因于预充电晶体管1114的Vt变化）以及逐个测量（归因于重置切换热噪声（sqrt（kTC）噪声））两者来变化。可能通过将预充电电压限制为小于VDD-Vt来消除该Vt变化。在这种情况下，预充电晶体管1114将一直拉到vpre电压。然而，即使在这种情况下，kT/C噪声仍存在。因此，相关双采样（CDS）技术被用来测量积分器启动电压和结束电压以便确定在积分时段期间的实际电压变化。通过两次测量积分电容器1106上的电压（一次在测量周期开始时并且一次在测量周期结束时）来完成CDS。
还要注意，预充电晶体管1114的漏极被连接到受控电压vpre（重置电压）。在正常操作中，将vpre驱动到电极电压之上的固定电压。然而，还可以将它驱动到低电压。如果实际上将预充电晶体管1114的vpre节点驱动到地，则电流流动被反向（即电流从电极通过晶体管1104和预充电晶体管1114流到电路中），并且源极和漏极的概念被交换。通过vpre电压来控制施加给电极的负电压（相对于液体参考），假设晶体管1114和1104的栅极电压至少比vpre更大某阈值。因此，vpre上的接地电压可以被用来将负电压施加给电极，例如以便完成电穿孔或双分子层形成。
ADC在重置之后并且再次地在积分时段之后立即测量AOUT电压（即执行CDS测量）以便确定在固定时间段期间积分的电流。可以每列地实施ADC。单独的晶体管可以作为模拟多路复用器用于每个列以便在多个列之间共享单个ADC。可以根据对噪声、精度和吞吐量的要求来改变列多路复用器因子。
在一些替换的实施例中，可以用如图12中示出的单个晶体管来替代如图11中示出的运算放大器/晶体管组合。
图13图示出用于测量单元中的电流的电路的替换实施例。该电路包括积分器、比较器和数字逻辑以便移入控制比特并且同时移出比较器输出的状态。B0到B1线由移位寄存器产生。模拟信号由库中的所有单元共享，并且数字线是逐个单元的菊花链（daisy-chained）。
单元数字逻辑包括5比特数据移位寄存器（DSR）、5比特并行加载寄存器（PLR）、控制逻辑和模拟积分器电路。使用LIN信号，移位到DSR中的控制数据被并行加载到PLR中。5比特控制数字“先断后合”计时逻辑控制单元中的开关。数字逻辑具有记录比较器输出的切换的设置-重置（SR）锁存器。
图13中的架构递送与个体单元电流成比例的可变采样速率。较高电流比较低电流产生每秒更多的样本。电流测量结果的分辨率与被测量的电流有关。用比大电流更精细的分辨率来测量小电流，其是相比于固定分辨率测量系统的明显益处。模拟输入可以被用于通过改变积分器的电压摆动来调整采样速率。因此，为了分析生物学上的快过程而增加采样速率或者为了分析生物学上的慢过程而减慢采样速率（由此获得精度）是可能的。
积分器的输出被初始化成低电压偏置（LVB）并且一直积分到电压CMP。每次生成样本，积分器输出就在这两个电平之间摆动。因此，电流越大，积分器输出就摆动得越快，并且因此采样速率就越快。类似地，如果CMP电压被减小，则生成新样本所需的积分器的输出摆动就降低并且因此采样速率增加。由此，简单地减小LVB和CMP之间的电压差提供了增加采样速率的机制。
使用如图13中示出的架构，在每个单元地点（site）处使用积分器和比较器。对被测量的电流进行积分，从而在积分器的输出处创建电压斜升。当该电压达到预定值（比较器阈值）时，将标志发送给阵列外围上的电路。在积分器斜升的开始和比较器的脱扣（trip）之间计数的时钟脉冲的数目是电流值的度量。因此转换时间是变量。
使用如图11中示出的架构，积分器斜升达可配置的固定时间段。在该时间的开始时和结束时，阵列外围上的ADC测量电压。图11中的架构的优点包括：1）在每个地点处电路的数量因为不存在比较器而较少；以及2）当处理由较密集阵列（例如100,000到1,000,000个地点或更多）生成的大量数据时期望具有可配置的固定转换时间。
尽管为了清楚理解的目的已经详细地描述了前述实施例，但是本发明不限于所提供的细节。存在实施本发明的许多替换的方式。所公开的实施例是说明性的并且非限制性的。

Claims (26)

1.一种设备，包括：
共用电极；
多个测量单元，每个测量单元包括单元电极和电子耦合到所述单元电极的积分器，其中所述积分器测量在所述共用电极和单元电极之间流动的电流；以及
多个模拟到数字转换器，其中来自所述多个测量单元的积分器电气耦合到所述多个模拟到数字转换器中的一个模拟到数字转换器。
2.根据权利要求1所述的设备，其中每个测量单元还包括液体室。
3.根据权利要求1所述的设备，其中，
当液体室包含电解液时所述共用电极供应共用电势，
当液体室包含电解液时所述单元电极供应可变电势，其中所述共用电极和单元电极之间的电压等于可变电势减去共用电势，
所述积分器包括积分电容器，该积分电容器两端的电压是在测量时段期间在所述共用电极和单元电极之间流动的电流的度量，以及
所述单元电极的可变电势由所施加的电压来控制。
4.根据权利要求3所述的设备，其中所述单元电极的可变电势经由缓冲装置由所施加的电压来控制。
5.根据权利要求1所述的设备，其中所述积分器还包括：
缓冲部件，其中所述缓冲部件电气耦合到所述模拟到数字转换器以便在被连接到所述模拟到数字转换器之前缓冲所述积分器的输出。
6.根据权利要求1所述的设备，其中耦合到所述积分器的模拟到数字转换器测量在测量时段的开始时所述积分器的输出处的第一电压和在测量时段结束时所述积分器的输出处的第二电压，并且其中第一电压和第二电压的差与电流的测量结果相对应。
7.根据权利要求6所述的设备，其中至少部分基于电流以及电流引起饱和将耗费多少时间来调整测量时段。
8.根据权利要求1所述的设备，其中，
多于一个积分器经由时分多路复用通道将它们的输出发送给与该多于一个积分器相对应的所耦合的模拟到数字转换器。
9.根据权利要求1所述的设备，其中所述模拟到数字转换器中的至少一个包括比较器。
10.根据权利要求9所述的设备，其中所述模拟到数字转换器包括控制模拟输入，并且该控制模拟输入通过改变该控制模拟输入处的电压来控制电流测量的可变采样速率。
11.根据权利要求10所述的设备，其中当电流增加时所述可变采样速率增加。
12.根据权利要求10所述的设备，其中改变的电压包括比较器阈值。
13.根据权利要求10所述的设备，其中改变的电压包括所述积分器中的一个的输出处的初始电压。
14.根据权利要求13所述的设备，其中从所述初始电压到达比较器阈值的所述积分器中的一个的输出的时间测量与电流的测量相对应。
15.根据权利要求1所述的设备，其中，
来自所述多个测量单元的积分器列电气耦合到所述多个模拟到数字转换器中的一个模拟到数字转换器，以及
该列积分器经由时分多路复用通道共享所耦合的模拟到数字转换器。
16.根据权利要求2所述的设备，其中所述设备被配置成将至少一种油脂、一种纳米孔蛋白质和一种分子复合物保留在所述多个测量单元的至少一个测量单元的液体室中。
17.根据权利要求16所述的设备，其中所述分子复合物包括以下各项中的一个：单链DNA、单链RNA、和标记的核苷酸。
18.根据权利要求16所述的设备，其中所述设备被配置成向所述多个测量单元的至少一个测量单元的液体室中的油脂、纳米孔蛋白质、和分子复合物供应电刺激。
19.根据权利要求16所述的设备，其中，
所述设备被配置成单个地检测物理状态并且通过调制电压以及测量共用电极和单元电极之间的电流来单个地从所述多个测量单元中的每个测量单元的液体室中的材料的多个可能物理状态变换该物理状态，以及
所述多个可能物理状态包括：
没有形成脂双层，
形成脂双层，
纳米孔蛋白质插入在脂双层中，从而形成纳米孔，以及
分子复合物和纳米孔的相互作用。
20.根据权利要求19所述的设备，其中每个测量单元以所述测量单元自己的步调通过多个可能物理状态来进展，而与所述多个测量单元中的其它测量单元的物理状态无关。
21.根据权利要求16所述的设备，其中所述设备被配置成通过测量在所述共用电极和单元电极之间流动的电流来识别与所述多个测量单元中的一个测量单元的液体室中的分子复合物相对应的特定的基类型。
22.根据权利要求2所述的设备，其中所述共用电极和单元电极之间的电流根据施加给所述积分器端子的控制电势而在任一方向上流动。
23.一种用于施加电压而同时测量在共用电极和单元电极之间流动的电流的电路，该电路包括：
共用电极，当液体室包含电解液时电气地供应共用电势；
单元电极，当液体室包含电解液时电气地供应可变电势，其中所述共用电极和单元电极之间的电压等于可变电势减去恒定液体电势，以及
电子耦合到所述单元电极的积分器，该积分器包括积分电容器，其中该积分电容器两端的电压包括在测量时段期间在所述共用电极和单元电极之间流动的电流的度量，并且所述单元电极的可变电势由所施加的电压来控制。
24.根据权利要求23所述的电路，其中所述积分器还包括运算放大器，
所述运算放大器的第一输入电气耦合到所述积分电容器和单元电极的第一端子，所述第一输入控制所述单元电极的可变电势，以及
所述运算放大器的输出电气耦合到所述积分电容器的第二端子和比较器的输入。
25.根据权利要求23所述的电路，还包括：
电气耦合到所述积分器的模拟到数字转换器。
26.根据权利要求23所述的电路，其中所述共用电极和单元电极之间流动的电流根据施加给所述积分器端子的控制电势而在任一方向上流动。
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