CN104241274B - A kind of bidirectional ESD protective device based on lateral PNP structure - Google Patents
A kind of bidirectional ESD protective device based on lateral PNP structure Download PDFInfo
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- CN104241274B CN104241274B CN201410439235.0A CN201410439235A CN104241274B CN 104241274 B CN104241274 B CN 104241274B CN 201410439235 A CN201410439235 A CN 201410439235A CN 104241274 B CN104241274 B CN 104241274B
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Abstract
The invention discloses a kind of bidirectional ESD protective device based on lateral PNP structure, available for ICESD protection circuits on piece.Protection device is main to be made up of P type substrate, the first N-type trap, the second N-type trap, the first P+ injection regions, the 2nd P+ injection regions, the first N+ injection regions, the 2nd N+ injection regions, the 3rd P+ injection regions, the 4th P+ injection regions and some oxygen isolation areas；The type protection device is under the effect of positively or negatively esd pulse; the reverse PN junction of inner transverse positive-negative-positive structure is triggered conducting; the positive PN junction conducting in another N trap, can be produced by a lateral PNP transistor and a forward diode ESD current drains path in series simultaneously.It by stretching two PNP base width respectively, can individually change the maintenance voltage that positively or negatively esd pulse carrys out temporary device, improve the flexibility of device work.
Description
Technical field
The invention belongs to integrated circuit electrostatic discharge (ESD-Electrostatic Discharge) protection technique field,
It is related to a kind of bidirectional ESD protective device based on lateral PNP structure.
Background technology
Static discharge (ESD) phenomenon is widely present in nature, it be also cause IC products fail it is important
One of reason.IC products are highly susceptible to the influence of static discharge in its manufacturing and assembling process, cause
The reliability reduction of product, or even damage.Therefore, research reliability height and the strong electrostatic discharge protection component of electrostatic protection performance
There is considerable effect to the yield rate and reliability that improve integrated circuit with protection circuit.
According to static discharge Producing reason and its difference to integrated circuit discharge mode, static discharge be generally divided into
Lower four kinds of patterns：HBM (human-body model), MM (machine discharge mode), CDM (component charging and discharging pattern), FIM (electric fields
Inductive mode).Wherein, HBM and MM patterns be it is most common be also two kinds of static discharge patterns that industrial quarters is concerned about the most.Work as collection
When occurring static discharge phenomenon into circuit, a large amount of electric charge moments flow into the pin of chip, and the electric current that these circuits are produced generally may be used
Big several amperes of sizes, the voltage produced at the pin is up to several even tens volts of volts.Larger electric current and higher voltage
The infringement of chip internal circuits and puncturing for device can be caused, so as to cause the failure of circuit function.Therefore, in order to prevent chip
By ESD damage, it is necessary to will carry out effective ESD protection to each pin of chip.Generally, ESD protective device
Design need consider two aspect the problem of：One is that ESD protective device wants the high current that can release；Two be ESD protective device
Will can when chip is by ESD impact by chip pin terminal voltage clamper safety low voltage level.
Being typically used as the device of ESD protections has diode, GGNMOS (NMOS of grid ground connection), SCR (controllable silicon) etc..But
It is that, it is necessary to which the breakdown voltage of ESD protective device is higher in some special circuits and special applications, current drain ability is stronger,
Also need to bring up to the bi-directional ESD protective capability of ground terminal simultaneously.
The content of the invention
It is an object of the invention to overcome the defect that above-mentioned technology is present there is provided a kind of based on the two-way of lateral PNP structure
ESD protective device, can provide bi-directional ESD protective capability, while improving secondary breakdown current, strengthen its robustness.Both it is abundant
The characteristics of make use of positive-negative-positive structure high maintenance voltage, make use of the characteristics of positive-negative-positive structure is reversed forward diode, passes through mirror image again
Symmetrical positive-negative-positive structure connected mode, it is to avoid the limitation of the low protective capability of backward diode, is realized to the double of esd event
To protection, the flexibility of device application is favorably improved.High pressure resistant, high maintenance voltage can be realized, the ESD protections such as strong robustness
Performance.
Its concrete technical scheme is：
A kind of bidirectional ESD protective device based on lateral PNP structure, it includes forward and reverse ESD current drains path, with
Improve the flexibility of application.It is characterized in that：Mainly by P type substrate, the first N-type trap, the second N-type trap, the first P+ injection regions, the
Two P+ injection regions, the first N+ injection regions, the 2nd N+ injection regions, the 3rd P+ injection regions, the 4th P+ injection regions, the first oxidation isolation
Area, the second oxide isolation regions, the 3rd oxide isolation regions, the 4th oxide isolation regions and the 5th oxide isolation regions are constituted；
First N-type trap and the second N-type trap are from left to right sequentially provided with the P type substrate；
The first P+ injection regions, the second oxide isolation regions, the 2nd P+ are from left to right sequentially provided with first N-type trap
Injection region and the first N+ injection regions；
First oxide isolation regions are provided between the P type substrate left margin and the first P+ injection regions；
The 2nd N+ injection regions, the 3rd P+ injection regions, the 4th oxidation are from left to right sequentially provided with second N-type trap
Isolated area and the 4th P+ injection regions；
The 5th oxide isolation regions are provided between the 4th P+ injection regions and P type substrate right margin；
The 3rd oxide isolation regions are provided between the first N+ injection regions and the 2nd N+ injection regions；
A device interface Terminal1 is drawn in the first P+ injection regions, the 2nd P+ injection regions, the first N+ injection regions,
2nd N+ injection regions and the 3rd P+ injection regions are interconnected, and a device interface Terminal2 is drawn in the 4th P+ injection regions.
Compared with prior art, beneficial effects of the present invention are：
(1) CMOS technology that lateral PNP structure of the invention is commonly used with industry realizes process compatible, with symmetrical forward direction
Breakdown voltage and breakdown reverse voltage, therefore be applicable in the circuit of progress bi-directional ESD protection；
(2) present invention need not additionally increase mask plate, therefore need not increase technique cost of manufacture；
(3) present invention can change forward and reverse respectively by adjusting the base width of single PNP transistor respectively
The maintenance voltage of mode of operation, improves the flexibility of device application.
Brief description of the drawings
Fig. 1 is the internal structure diagrammatic cross-section of present example；
Fig. 2 is the circuit connection diagram of present example；
Fig. 3 is the equivalent circuit under positive esd pulse effect in present example；
Fig. 4 is the equivalent circuit in present example reversely under esd pulse effect.
Embodiment
Technical scheme is described in more detail with specific embodiment below in conjunction with the accompanying drawings.
It is provided with a kind of bidirectional ESD protective device based on lateral PNP structure, including P type substrate 101, the P type substrate
It is marked with the first P+ injection regions 104 in first N-type trap 102, the second N-type trap 103, the first N-type trap 101, the 2nd P+ injection regions 105,
The 2nd N+ injection regions 107, the 3rd P+ injection regions 108, the 4th P+ injections are marked with first N+ injection regions 106, the second N-type trap 103
Area 109, wherein：Oxidization isolation layer is all covered with the P type substrate 101, the first N-type trap 102 and the second N-type trap 103, from a left side
It is the first oxidization isolation layer 110, the second oxidization isolation layer 111, the oxidation isolation of the 3rd oxidization isolation layer the 112, the 4th successively to the right side
The oxidization isolation layer 114 of layer 113 and the 5th.A port Terminal1 is drawn in first P+ injection regions, and the 4th P+ injection regions draw one
Individual port Terminal2, the 2nd P+ injection regions and the first N+ injection regions utilize gold with the 2nd N+ injection regions and the 3rd P+ injection regions
Belong to line to be connected.Using the lateral PNP structure of specular, pass through above-mentioned connected mode, it is possible to achieve symmetrical ESD protections energy
Power.It is interim when there is positive esd event on Terminal1, it is made up of the first P+ injection regions 104 and the first N+ injection regions 106
Forward diode and the positive-negative-positive that is made up of the 3rd P+ injection regions 108, the 2nd N+ injection regions 107 and the 4th P+ injection regions 109
Structure is connected；It is interim when there is positive esd event on Termial2, it is made up of the 4th P+ injection regions 109 and the 2nd N+ injection regions 107
Forward diode structure and the PNP that is made up of the 2nd P+ injection regions 105, the first N+ injection regions 106 and the first P+ injection regions 104
Structures in series.By stretching the distance between the first P+ injection regions 104 and the 2nd P+ injection regions 105 and the 3rd P+ injection regions
108 and the 4th the distance between P+ injection regions 109 adjust the maintenance voltage that positive negative direction esd event carrys out temporary device, improve
The flexibility of application.
Present example devises a kind of bidirectional ESD protective device based on positive-negative-positive structure, passes through the positive-negative-positive of specular
Structure, in the case where not increasing extra mask version, not only realizes the bidirectional protective for esd pulse, and can be by respectively
The base width of single positive-negative-positive structure is adjusted, changes the maintenance voltage under forward and reverse mode of operation respectively, improves device application
Flexibility.
A kind of internal structure diagrammatic cross-section of present example as shown in Figure 1, bi-directional ESD based on positive-negative-positive structure is protected
Device is protected, its feature includes：Mainly by P type substrate, the first N-type trap, the second N-type trap, the first P+ injection regions, the 2nd P+ injections
Area, the first N+ injection regions, the 2nd N+ injection regions, the 3rd P+ injection regions, the 4th P+ injection regions, the first oxide isolation regions, the second oxygen
Change isolated area, the 3rd oxide isolation regions, the 4th oxide isolation regions and the 5th oxide isolation regions are constituted.
The first P+ injection regions, the 2nd P+ injection regions and the first N+ injections are from left to right sequentially provided with first N-type trap
Area, forms first PNP transistor structure.
The 2nd N+ is from left to right sequentially provided with second N-type trap to go, the 3rd P+ injection regions and the 4th P+ injection regions, shape
Into second PNP transistor structure, with first PNP transistor structure formation specular.
Draw a device interface in the circuit connection diagram of present example as shown in Figure 2, the first P+ injection regions
Terminal1, the 2nd P+ injection regions, the first N+ injection regions, the 2nd N+ injection regions and the 3rd P+ injection regions are interconnected, institute
The 4th P+ is stated to go to draw a device interface Terminal2.
As shown in figure 3, when Terminal1 described in device terminates the high potential of esd pulse, the Terminal2 ends ground connection
When, the 3rd P+ injection regions, the second N-type trap and the 4th P+ injection regions may make up a lateral PNP structure, when esd pulse is super
Cross breakdown reverse voltage and the first P+ injection regions and the first N-type that second N-type trap forms PN junction with the 4th P+ injection regions
When trap forms PN junction forward conduction voltage sum, diode T1 and PNP transistor T2 is opened, so as to form one by T1 and T2
The ESD of formation releases path.It can elongate or reduce by adjusting the distance between the 3rd P+ injection regions and the 4th P+ injection regions
The base width of PNP transistor, so as to reach the purpose of adjusting means maintenance voltage.
As shown in figure 4, when Terminal2 described in device terminates the high potential of esd pulse, the Terminal1 ends ground connection
When, the first P+ injection regions, the first N-type trap and the 2nd P+ injection regions class constitute a lateral PNP structure, when esd pulse is super
Cross breakdown reverse voltage and the 4th P+ injection regions and the second N-type that the first P+ injection regions form PN junction with the first N-type trap
When trap forms PN junction forward conduction voltage sum, PNP transistor T3 and diode T1 is opened, so as to form one by T3 and T4
The ESD of formation releases path.It can elongate or contract by adjusting the distance between the first P+ injection regions and the 2nd P+ injection regions
The base width of small PNP crystal, so as to reach the purpose of adjusting means maintenance voltage.
In present example device, the distance between the first N-type trap and second N-type trap need sufficiently large, it is ensured that the first N-type
Parasitic transistor is not formed between trap and the second N-type trap, it is ensured that both do not influence each other.
Finally illustrate, above example is merely illustrative of the technical solution of the present invention and unrestricted, although with reference to preferable
The present invention is described in detail example, it will be understood by those within the art that, can be to technical side of the invention
Case is modified or equivalent substitution, and without departing from the objective and scope of technical solution of the present invention, it all should cover in the present invention
Right among.
Claims (3)
1. one kind is based on horizontal PNP type bidirectional ESD protective device, it is characterised in that including P type substrate (101), the p-type lining
It is provided with bottom in the first N-type trap (102), the second N-type trap (103), the first N-type trap (101) and is marked with the first P+ injection regions (104),
The 2nd N+ injection regions (107) are marked with 2nd P+ injection regions (105), the first N+ injection regions (106), the second N-type trap (103), the
Three P+ injection regions (108), the 4th P+ injection regions (109), wherein：
Oxidization isolation layer is all covered with the P type substrate (101), the first N-type trap (102) and the second N-type trap (103), from a left side
It is the first oxidization isolation layer (110), the second oxidization isolation layer (111), the 3rd oxidization isolation layer (112), the 4th oxygen successively to the right side
Change separation layer (113) and the 5th oxidization isolation layer (114)；
A port Terminal1 is drawn in first P+ injection regions, and a port Terminal2, the 2nd P are drawn in the 4th P+ injection regions
+ injection region and the first N+ injection regions are connected with the 2nd N+ injection regions and the 3rd P+ injection regions using metal wire.
2. horizontal PNP type bidirectional ESD protective device as claimed in claim 1, it is characterised in that when having just on Terminal1
Come interim to esd event, the forward diode that is made up of the first P+ injection regions (104) and the first N+ injection regions (106) and by
The positive-negative-positive structure series connection of 3rd P+ injection regions (108), the 2nd N+ injection regions (107) and the 4th P+ injection regions (109) composition；When
There is positive esd event on Terminal2 interim, be made up of just the 4th P+ injection regions (109) and the 2nd N+ injection regions (107)
Constituted to diode structure and by the 2nd P+ injection regions (105), the first N+ injection regions (106) and the first P+ injection regions (104)
Positive-negative-positive structure is connected.
3. horizontal PNP type bidirectional ESD protective device as claimed in claim 1, it is characterised in that：Can be by stretching the first P+ notes
Enter the distance between area (104) and the 2nd P+ injection regions (105) and the 3rd P+ injection regions (108) and the 4th P+ injection regions
The distance between (109) maintenance voltage that positive negative direction esd event carrys out temporary device is adjusted, improves the flexibility of application.
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Families Citing this family (6)
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| CN104600068B (en) * | 2015-01-20 | 2018-06-26 | 湖州迈康电子科技有限公司 | A kind of high-voltage bidirectional ESD protective device based on longitudinal NPN structures |
| CN106024762B (en) * | 2016-07-18 | 2019-06-04 | 中国科学院微电子研究所 | A kind of electrostatic preventing structure |
| CN107342283B (en) * | 2017-07-12 | 2019-08-06 | 墙煌新材料股份有限公司 | Transient Voltage Suppressor and preparation method thereof |
| TWI646653B (en) * | 2017-12-28 | 2019-01-01 | 新唐科技股份有限公司 | Laterally diffused metal oxide semiconductor field effect transistor |
| CN109103182B (en) * | 2018-08-24 | 2022-03-29 | 电子科技大学 | Bidirectional ESD protection device |
| CN110010602B (en) * | 2019-04-09 | 2023-11-28 | 捷捷半导体有限公司 | Low-breakdown-voltage discharge tube and manufacturing method thereof |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101807598A (en) * | 2010-03-17 | 2010-08-18 | 浙江大学 | PNPNP type triac |
| CN102544066A (en) * | 2012-03-09 | 2012-07-04 | 浙江大学 | Bidirectional controllable silicon device based on assistant triggering of NPN-type triodes |
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| CN102456685B (en) * | 2010-10-19 | 2013-09-11 | 上海华虹Nec电子有限公司 | High-voltage static protective devices |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101807598A (en) * | 2010-03-17 | 2010-08-18 | 浙江大学 | PNPNP type triac |
| CN102544066A (en) * | 2012-03-09 | 2012-07-04 | 浙江大学 | Bidirectional controllable silicon device based on assistant triggering of NPN-type triodes |
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