CN104241273A - 具有裸片上去耦合电容器的集成电路 - Google Patents

具有裸片上去耦合电容器的集成电路 Download PDF

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Publication number
CN104241273A
CN104241273A CN201410276686.7A CN201410276686A CN104241273A CN 104241273 A CN104241273 A CN 104241273A CN 201410276686 A CN201410276686 A CN 201410276686A CN 104241273 A CN104241273 A CN 104241273A
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China
Prior art keywords
integrated circuit
circuit
decoupling capacitor
coupled
supply voltage
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Granted
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CN201410276686.7A
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CN104241273B (zh
Inventor
K·S·吴
B·王
施红
刘辉
S·舒马拉耶夫
S·钱德拉
丁玮琦
K·钱德
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Altera Corp
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Altera Corp
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Abstract

本发明的各实施例涉及具有裸片上去耦合电容器的集成电路。一种集成电路，包括去耦合电容器和内部电路。去耦合电容器耦合到集成电路的第一外部端子。集成电路中的内部电路耦合到集成电路的第二外部端子。去耦合电容器被耦合以通过第一外部端子和第二外部端子并且通过外部导体向内部电路提供供应电压电流。外部导体在集成电路外。

Description

具有裸片上去耦合电容器的集成电路
技术领域
本公开内容涉及电子电路，并且更特别地，涉及具有裸片上去耦合电容器的集成电路。
背景技术
许多集成电路设计需要电力供应线供应稳定的供应电压以用于使集成电路以高数据速率和高时钟信号频率操作。去耦合电容器通常用于帮助向集成电路中的电路提供更稳定的电力供应电压。去耦合电容器将直流(DC)供应电压线上的高频噪声旁路到接地供应线，由此防止噪声到达集成电路上的接收供应电压的电路。去耦合电容充当在电路操作期间提供用于维持稳定供应电压的电流的电荷存储件。
发明内容
根据一些实施例，一种集成电路包括去耦合电容器和内部电路。去耦合电容器耦合到集成电路的第一外部端子。集成电路中的内部电路耦合到集成电路的第二外部端子。去耦合电容器被耦合以通过第一外部端子和第二外部端子并且通过外部导体向内部电路提供供应电压电流。外部导体在集成电路外。
根据其他实施例，一种系统包括第一集成电路和第二集成电路。第一集成电路具有去耦合电容器。第二集成电路具有内部电路。在一个实施例中，第一集成电路和第二集成电路在相同的封装外壳(诸如有机封装衬底、硅中介体衬底、或者多芯片模块(MCM))中。在另一实施例中，第一集成电路和第二集成电路是耦合到一起的竖直堆叠的裸片。去耦合电容器通过第二集成电路中的穿透硅过孔中的导电材料耦合到内部电路。
在考虑以下详细描述和附图之后，本发明的各种方面、特征和优点将变得明显。
附图说明
图1图示了根据本发明的实施例的包括裸片上去耦合电容器的集成电路的示例的自上而下布局视图。
图2图示了根据本发明的实施例的在图1中所示的集成电路的一部分以及具有多个层的介质的横截面侧视图。
图3图示了根据本发明的实施例的在图1中所示的集成电路的一部分的自下而上布局视图。
图4图示了根据本发明的实施例的裸片上去耦合电容器的示例的自下而上布局视图。
图5图示了根据本发明的备选实施例的裸片上去耦合电容器的另一示例的自下而上布局视图。
图6图示了根据本发明的实施例的通过具有多个层的介质耦合在一起的两个集成电路的横截面侧视图。
图7图示了根据本发明的实施例的通过焊料突起耦合在一起的两个堆叠的集成电路的横截面侧视图。
图8是可以包括根据本发明的实施例的现场可编程门阵列(FPGA)的简化部分框图。
图9示出了可以体现本发明的技术的示例性数字系统的框图。
具体实施方式
集成电路通常从供应电压接收电力。供应电压可以由电压调节器模块(VRM)生成并且被提供给集成电路。集成电路和VRM可以耦合到相同的电路板。供应电压通过电路板从VRM被提供给集成电路。集成电路可以被容纳在封装中。
对于集成电路的最优性能来说，处于恒定或者接近恒定电压的供应电压是所期望的。在集成电路的操作期间，从供应电压汲取的电流的量可能变化。电容器通常被连接到电路板以降低通过电路板从VRM提供给集成电路的供应电压中的波动。耦合到电路板的电容器可以包括块体电容器和表面安装电容器。然而，集成电路与耦合到电路板的电容器之间的电感通常大到足以响应于在操作期间从集成电路汲取的电流中的变化而生成供应电压中的显著波动。
在集成电路的操作期间，集成电路的电力使用可能变化。例如，当内部电路的状态改变时，集成电路可能汲取附加的供应电压电流。集成电路的供应电压电流消耗的改变引起电流波动并且产生不期望的供应电压噪声。去耦合电容器可以用于维持由集成电路接收的更恒定的供应电压。去耦合电容器用作为集成电路中的电路提供供应电压电流的本地能量存储储存区(reserve)。去耦合电容能够适应在电路操作期间的改变的电力需求。去耦合电容器降低供应电压中的噪声。
封装上去耦合(OPD)电容器能够提供向与OPD电容器容纳在相同的封装中的集成电路中的电路提供去耦合电容。OPD电容器通过封装中的导体耦合到集成电路。然而，如果封装中的导体具有显著量的电感，则OPD电容器可能不能够向集成电路提供足够稳定从而满足集成电路中的电路的操作规范的供应电压。
集成电路可以具有用于降低供应电压中的噪声引起的变化的裸片上去耦合电容器(ODC)。裸片上去耦合电容器和从供应电压汲取电流的电路处于相同的集成电路裸片中。通过完全位于集成电路内的导体从裸片上去耦合电容器向电路提供供应电压电流。
然而，一些集成电路设计可能不具有足够的裸片面积来在接收供应电压的电路附近定位裸片上去耦合电容器。如果裸片上去耦合电容器离接收供应电压的电路距离相当远，则集成电路上的在裸片上去耦合电容器与电路之间的低电阻连接可能使用显著量的裸片面积，这不是所期望的。在一些集成电路中，对于裸片上去耦合电容器与接收供应电压的电路之间的低电阻连接，额外的金属层可能不可用。
根据一些实施例，集成电路中的裸片上去耦合电容器向集成电路中的一个或者多个电路提供供应电压电流。裸片上去耦合电容器和从裸片上去耦合电容器接收供应电压电流的电路处于相同的集成电路中。裸片上去耦合电容器通过集成电路外的外部导体耦合到电路。供应电压电流通过外部导体从裸片上去耦合电容器被提供给电路。外部导体例如可以是封装中的导体、中介体中的导体，重分布层中的导体或者在另一集成电路中的穿透硅过孔(TSV)中的导体。供应电压例如可以从集成电路外的电压调节器模块(VRM)被提供给裸片上去耦合电容器。外部导体可以被重新配置为将裸片上去耦合电容器与集成电路中的不同的电路耦合，而不需要重新设计集成电路。
图1图示了根据本发明实施例的包括裸片上去耦合电容器的集成电路100的示例的自上而下布局视图。集成电路100包括四个接口电路区101-104和三个核心电路区106-108。接口电路区101-104中的每个接口电路区包括在集成电路100外的一个或者多个器件之间传输和接收信号的一个或者多个接口电路。
核心电路区106-108中的每个核心电路区包括执行集成电路100的预期功能的电路。核心电路区106-108通常不包括直接与集成电路100外的器件通信的接口电路。如果核心电路区106-108不包括接口电路，则核心电路区106-108可以被称为非接口电路区。
集成电路100可以包括数字电路、模拟电路或者数字电路和模拟电路二者。集成电路100可以是专用集成电路(ASIC)或者可编程集成电路。如果集成电路100是可编程逻辑集成电路，则核心电路区106-108中的每个核心电路区可以包括可编程逻辑电路阵列。
集成电路100还包括裸片上去耦合电容器111-115。裸片上去耦合电容器111处于接口电路区101中。裸片上去耦合电容器112-113处于核心电路区106中。裸片上去耦合电容器114处于核心区107中。裸片上去耦合电容器115处于核心电路区108中。根据各种实施例，集成电路100中的裸片上去耦合电容器可以是任何适当类型的电容器或者不同类型的电容器的组合。例如，裸片上去耦合电容器111-115可以是金属绝缘体金属(MIM)电容器、金属氧化物金属(MOM)电容器、栅极电容器或者这些或其他类型的电容器的组合。根据各种实施例，集成电路100中的裸片上去耦合电容器可以为多种不同的形状，诸如正方形、矩形、圆形、椭圆形、L形或者不规则形状。
裸片上去耦合电容器111-115中的每个裸片上去耦合电容器从集成电路100外的源接收直流(DC)电压。裸片上去耦合电容器111-115中的两个或者更多个裸片上去耦合电容器可以接收相同的DC电压。裸片上去耦合电容器111-115中的两个或者更多个裸片上去耦合电容器可以接收不同的DC电压。每个DC电压通过集成电路100外的外部导体从裸片上去耦合电容器被提供给集成电路100上的相应的电路。外部导体例如可以在封装中、在中介体中、在重分布层中或者在另一集成电路中。
被提供给电容器111-115的电压可以是任何类型的DC电压，诸如供应电压。作为示例，裸片上去耦合电容器112-113这二者可以接收第一供应电压VCCIO1。供应电压VCCIO1被提供给接口电路区101-104中的一个或者多个接口电路区中的电路。作为另一示例，裸片上去耦合电容器111可以接收第二供应电压VCCIO2。供应电压VCCIO2被提供给接口电路区101-104中的一个或者多个接口电路区中的电路。作为又一示例，裸片上去耦合电容器114-115可以接收第三供应电压VCCCORE。供应电压VCCCORE被提供给核心电路区106-108中的电路。
图2图示了根据本发明实施例的在图1中示出的集成电路100的一部分以及具有多个层的介质201的横截面侧视图。在图2的实施例中，集成电路100具有多个层，包括图案化层231-233。除了层231-233之外，集成电路100还具有其他层。集成电路100的层例如可以包括导电层、半导体层和绝缘层。集成电路100的层可以在制造期间被图案化。集成电路100还具有过孔，包括过孔241-245。过孔241-245用导电材料被填充。作为示例，这里描述的导体和导电材料可以包括金属。集成电路100还具有外部端子(即，焊盘)281-283。外部端子281-283是在集成电路100的底(或者顶)表面上的导电区域。
介质201具有多个层，包括层211-216。介质201具有一个或者多个导电层和一个或者多个绝缘层。在图2的示例中，层211是导电层，而层212是绝缘层。介质201通过包括焊料突起251-253的焊料突起耦合到集成电路100。介质201例如可以是用于容纳集成电路100的封装、耦合到集成电路100的中介体、耦合到集成电路100的重分布层或者耦合到集成电路100的另一集成电路。
集成电路100中的在图1中示出的裸片上去耦合电容器112-113中的两个或者更多个裸片上去耦合电容器也被示出在图2中的横截面侧视图中。电容器112-113例如可以是MIM电容器。根据其他实施例，电容器112-113可以是其他类型的电容器，诸如栅极电容器或者MOM电容器。
电容器112包括导电区域221-222和电介质区域223。电介质区域223在导电区域221和222之间。导电区域222通过过孔241中的导电材料并且通过外部端子281耦合到焊料突起251。过孔241中的导电材料耦合到层233中的导电区域233A。电容器112的导电区域222可以通过导电区域233A耦合到集成电路100中的一个或者多个其他去耦合电容器或者其他电路。导电区域221通过过孔242中的导电材料耦合到层233中的导电区域233B。电容器112的导电区域221通过导电区域233B耦合到接地。
电容器113包括导电区域224-225和电介质区域226。电介质区域226在导电区域224与225之间。导电区域225通过过孔243中的导电材料并且通过外部端子282耦合到焊料突起252。过孔243中的导电材料耦合到层233中的导电区域233C。电容器113的导电区域225可以通过导电区域233C耦合到集成电路100中的一个或者多个其他去耦合电容器或者其他电路。导电区域224通过过孔244中的导电材料耦合到层233中的导电区域233D。电容器113的导电区域224通过导电区域233D耦合到接地。
介质201的导电层211包括导体260和过孔261-263。介质201还包括过孔264。过孔261-264用导电材料填充。导体260和过孔261-264中的导电材料是集成电路100外的外部导体。导体260分别通过过孔261-263中的导电材料耦合到焊料突起251-253。导体260和过孔261-264中的导电材料在图2中由斜线指示。
电容器112通过焊料突起251、过孔241和261中的导电材料以及集成电路100的外部端子281耦合到导体260。电容器113通过焊料突起252、过孔243和262中的导电材料以及集成电路100的外部端子282耦合到导体260。导体260还通过过孔263中的导电材料耦合到焊料突起253。焊料突起253通过外部端子283耦合到过孔245中的导电材料。层232的区域232A耦合到过孔245中的导电材料。电容器112-113通过过孔241、243以及245中的导电材料、焊料突起251-253、外部端子281-283以及介质201中的外部导体耦合到区域232A，介质201中的外部导体包括导体260和过孔261-263中的导电材料。
区域232A例如可以是集成电路100内的电路的一部分的导电区域或者半导体区域。区域232A是位于接口电路区102中或者位于接口电路区103中的电路的一部分。区域232A例如可以是晶体管或者诸如电阻器或者电容器的无源电路的一部分。过孔245中的导电材料还耦合到层233中的导电区域233E。导体260可以通过导电区域233E耦合到接口电路区102-103中或者集成电路100的其他部分中的其他电路。
介质201连接到导电球271-275。导电球271-275可以连接到电路板(未示出)。导体260耦合到过孔264中的导电材料。导体260通过过孔264中的导电材料耦合到导电球273。
供应电压VCCIO1通过电路板、导电球273以及过孔264中的导电材料从VRM或者其他源被提供给导体260。供应电压VCCIO1分别通过导体260、过孔261-262中的导电材料、焊料突起251-252、外部端子281-282以及过孔241和243中的导电材料被提供给电容器112和113中的导电区域222和225。去耦合电容器112-113降低在供应电压VCCIO1中的噪声引起的波动。供应电压VCCIO1还可以被提供给集成电路100中的其他去耦合电容器。供应电压VCCIO1还通过导体260、过孔263中的导电材料、焊料突起253、外部端子283以及过孔245中的导电材料被提供给区域232A，并且通过区域233E或者通过其他焊料突起被提供给集成电路100中的其他电路。
电容器112中的导电区域221被耦合以通过过孔242中的导电材料和导电区域233B接收接地电压。电容器113中的导电区域224被耦合到以通过过孔244中的导电材料和导电区域233D接收接地电压。导电区域233B和233D通过在图2中未示出的导电区域耦合到一起。接地电压还可以被提供给集成电路100中的其他去耦合电容器。
电路板上的将VRM耦合到介质201的导体通常具有显著的电感。将电容器112-113耦合到集成电路100中的接收供应电压VCCIO1的导体包括导体260、焊料突起251-253、外部端子281-283以及过孔241、243、245和261-263中的导电材料。与将供应电压VCCIO1从VRM提供给导体260的导电路径相比，从电容器112-113通过导体260到集成电路100中的接收供应电压VCCIO1的电路的导电路径通常具有低得多的电感。
去耦合电容器112-113向集成电路100中的接收供应电压VCCIO1的电路提供用于供应电压VCCIO1的供应电压电流。由于导体260、焊料突起251-253、外部端子281-283以及过孔241、243、245和261-263中的导电材料具有低电感，所述去耦合电容器112-113向集成电路100中的电路提供快速改变的电流。这一来自电容器112-113的供应电压电流降低由集成电路100中的电路接收的供应电压VCCIO1中的变化。
在一些实施例中，去耦合电容器111和114-115通过介质201中的外部导体耦合到集成电路100的相应区中的电路。集成电路100中去耦合电容器111-115耦合到的电路可以通过改变外部导体而被改变，而未改变或者重新设计集成电路100。例如，集成电路100可以从介质201断开连接，并且然后被连接到不同的封装或者中介体，该不同的封装或者中介体具有将去耦合电容器112-113耦合到核心区106中的电路或者耦合到接口电路区101中的电路的外部导体。
图3图示了根据本发明实施例的在图1中所示的集成电路的100的一部分的自下而上布局视图。图3图示了集成电路100的核心电路区106的一部分和接口电路区102的一部分。图3还图示了19个焊料突起，包括焊料突起251-254。在图3中，焊料突起被示为19个圆。集成电路100通过在图3中所示的焊料突起并且通过在图3中未示出的其他焊料突起耦合到介质201。
图3还图示了导体260和电容器112-113。电容器112-113处于核心区106中。在图3的实施例中，电容器112和113是矩形的。电容器112和113由图3中的虚线矩形指示。图3还图示了集成电路100的外部端子281-284。外部端子284是集成电路100的底表面上的导电区域。外部端子281-284由图3中的虚线正方形指示。焊料突起251-254分别耦合到外部端子281-284。
导体260和焊料突起253和254由图3中的斜线指示。在图3的实施例中，导体260包括区域260A-260H。在图3中所示的焊料突起被布置成3行。区域260A是在第一行焊料突起和第二行焊料突起之间的线状条带。区域260B是在第二行焊料突起和第三行焊料突起之间的线状条带。导体260的连接区域260A和260B的一个区域在焊料突起251下面并且连接到焊料突起251。导体260的连接区域260A和260B的另一区域在焊料突起252下面并且连接到焊料突起252。焊料突起251-252分别通过外部端子281-282耦合到电容器112-113。
供应电压VCCIO1分别通过导体260和焊料突起251-252被提供给电容器112-113。导体260还包括矩形区域260C。导体260仅位于导体260耦合到的焊料突起的下面。导体260并不位于在图3中所示的其他焊料突起的下面，这降低了寄生电容耦合。
在图3的实施例中，焊料突起253和254在接口电路区102下面。区域260D-260E将区域260C连接到焊料突起253。区域260E-260H将区域260C连接到焊料突起254。如以上关于图2描述的，焊料突起253通过外部端子283耦合到过孔245中的导电材料。供应电压VCCIO1通过焊料突起253-254和外部端子283-284通过导体260被提供给接口电路区102中的电路。焊料突起254耦合到集成电路100中的通过外部端子284接收供应电压VCCIO1的电路。供应电压VCCIO1还可以通过附加的焊料突起(未示出)通过导体260被提供给接口电路区103中的电路。
图4图示了根据本发明的实施例的去耦合电容器400的示例的自下而上布局视图。去耦合电容器400是在图1-图3中示出的去耦合电容器112和113中的每个去耦合电容器的示例。在一个实施例中，电容器112和113中的每个电容器具有在图4中所示的电容器400的结构。去耦合电容器400可以是集成电路100中的其他去耦合电容器的示例。
电容器400包括导电区域401-402和在导电区域401-402之间的电介质层(未示出)。导电区域401-402形成电容器400的导电板。图4还图示了焊料突起403、填充有导电材料的过孔404-405以及导电区域406-407。
导电区域402通过过孔404中的导电材料耦合到导电区域406。导电区域402通过过孔404中的导电材料耦合到焊料突起403。导电区域402通过焊料突起403和过孔404接收供应电压。导电区域401通过过孔405中的导电材料耦合到导电区域407。导电区域401通过导电区域407和过孔405接收接地电压。在图4中仅示出了导电区域406-407的部分。导电区域406-407通常耦合到相同集成电路上的其他电路。
在一个实施例中，电容器400是在图1-图3中所示的电容器112。在这一实施例中，导电区域401-402分别是在图2中所示的导电区域221-222，而导电区域406-407分别是在图2中所示的导电区域233A-233B。而且，过孔404是图2中的过孔241，过孔405是图2中的过孔242，而焊料突起403是图2中的焊料突起251。
在另一实施例中，电容器400是在图1-图3中所示的电容器113。在这一实施例中，导电区域401-402分别是在图2中所示的导电区域224-225，而导电区域406-407分别是在图2中所示的导电区域233C-233D。而且，过孔404是图2中的过孔243，过孔405是图2中的过孔244，而焊料突起403是图2中的焊料突起252。
图5图示了根据本发明实施例的去耦合电容器500的示例的自下而上布局视图。去耦合电容器500是如在图1-图3中所示的去耦合电容器112和113中的每个去耦合电容器的示例。在一个实施例中，电容器112和113中的每个电容器具有在图5中所示的电容器500的结构。去耦合电容器500可以是集成电路100中的其他去耦合电容器的示例。作为示例，去电容器500是MIM电容器。
去耦合电容器500包括8个导电岛体501-508，其可以是MIM岛体。岛体501-508是由导电材料层形成的图案化区域。去耦合电容器500还包括导电区域511-512。在示例性实施例中，导电岛体501-508由集成电路100中的第一图案化导电层(例如，第一金属层)形成，而区域511-512由集成电路100中第二图案化导电层(例如，第二金属层)形成。
去耦合电容器500还包括8个过孔521-528。过孔521-528中的每个过孔用导电材料填充。导电区域511分别通过过孔521-524中的导电材料耦合到导电岛体501-504中的每个导电岛体。导电区域512分别通过过孔525-528中的导电材料耦合到导电岛体505-508中的每个导电岛体。
导电区域511-512例如可以通过附加的过孔(未示出)耦合到焊料突起510。备选地，导电区域511-512可以是集成电路的表面上的外部端子被并且直接耦合到焊料突起510。焊料突起510例如可以是相应的去耦合电容器112或113中的焊料突起251或252。
导电岛体501-508形成去耦合电容器500的通过突起510、导电区域511-512以及过孔521-528接收供应电压的一个导电板。电容器500还包括接收接地电压的第二导电板(未示出)以及在两个导电板之间的电介质区域。
根据另一实施例，第一集成电路中的裸片上去耦合电容器为提供给第二集成电路的电压提供去耦合电容。除了裸片上去耦合电容器之外，第一集成电路还具有其他电路。集成电路100是第一集成电路的示例，其包括去耦合电容器111-115和区101-104以及106-108中的其他电路。第一集成电路中的裸片上去耦合电容器通过介质中的外部导体耦合到第二集成电路。介质例如可以是封装、中介体或者重分布层。图6图示了这一实施例的示例。
图6图示了根据本发明的实施例的通过具有多个层的介质耦合在一起的两个集成电路的横截面侧视图。图6图示了两个单独的集成电路(即，IC裸片)100和602以及介质630。集成电路100也在图1-图3中示出。
集成电路602可以是任何类型的集成电路。集成电路602可以是专用集成电路、可编程集成电路或者这些的组合。集成电路602可以包括数字电路、模拟电路或者数字电路和模拟电路的组合。集成电路602包括电路(CKT)615和在图6中未示出的其他电路。电路615通过过孔681-682中的导电材料和焊料突起622中的两个焊料突起耦合到介质630。
介质630具有多个层，包括层631-636。介质630例如可以是封装、中介体、重分布层或者第三集成电路。介质630具有一个或者多个导电层和一个或者多个绝缘层。在图6的示例中，层631和633是导电层，而层632是绝缘层。介质630通过焊料突起621耦合到集成电路100并且通过焊料突起622耦合到集成电路602。
介质630包括过孔641-646和导体661-663。过孔641-646用导电材料填充。导体661和663处于导电层631中。导体662处于导电层633中。导体661-663和过孔641-646中的导电材料由图6中的斜线指示。介质630通过导电球651-655耦合到电路板(未示出)。
电容器112和113通过焊料突起621中的两个焊料突起和介质630的层631中的外部导体耦合在一起，外部导体包括导体661和过孔641-642中的导电材料。电容器112-113通过焊料突起621中的三个焊料突起、过孔641-643中的导电材料以及导体661耦合到集成电路100中的电路625。
供应电压VCC通过导电球652、过孔646中的导电材料、导体661、过孔641-642中的导电材料以及焊料突起621中的两个焊料突起从外部VRM被提供给电容器112-113。供应电压VCC还通过导电球652、过孔646中的导电材料、导体661、过孔中643的导电材料、焊料突起621中的一个焊料突起以及集成电路100中的过孔被提供给电路625。用于供应电压VCC的电流通过介质630中的外部导体从电容器112-113被提供给电路615和625。用于供应电压VCC的电流通过过孔641中的导电材料、导体661、过孔642中的导电材料，导体662、过孔644中的导电材料，导体663、过孔645中的导电材料、焊料突起622中的两个焊料突起以及过孔681-682中的导电材料从电容器112-113被提供给集成电路602中的电路615。
因此，电容器112-113通过介质630中的这些外部导体耦合到电路615。在图6的实施例中，第一集成电路100中的电容器112-113通过介质630中的外部导体向第二集成电路602中的电路615提供去耦合电容。去耦合电容器112-113提供供应电压电流给电路615以降低由电路615接收的供应电压VCC中的变化。与从VRM到电容器112-113的导电路径相比，在电容器112-113和电路615之间的通过介质630的导电路径具有低电感和低电阻。电容器112-113和电路615之间的通过介质630的低阻抗导电路径向电路615提供更恒定的供应电压VCC。
根据其他实施例，第一集成电路中的裸片上去耦合电容器通过穿透硅过孔(TSV)耦合到第二集成电路中的电路。穿透硅过孔处于第二集成电路中。穿透硅过孔完全穿过第二集成电路的裸片。供应电压通过穿透硅过孔被提供给第一集成电路中的去耦合电容器并且被提供给第二集成电路中的电路。在一个实施例中，第一集成电路和第二集成电路处于相同的封装外壳(诸如有机封装衬底，硅中介体衬底或者多芯片模块(MCM))中。在一个实施例中，第一集成电路和第二集成电路被竖直堆叠并且通过焊料突起耦合在一起。图7图示了这一实施例的示例。
图7图示了根据本发明的实施例的通过焊料突起耦合在一起的两个堆叠的集成电路的横截面侧视图。图7图示了两个单独的集成电路(即，IC裸片)700和710。集成电路700和710可以是任何类型的集成电路。例如，集成电路700和710可以是可编程集成电路、专用集成电路或者它们的组合。集成电路700和710可以包括数字电路、模拟电路或者这二者。集成电路700和710可以是相同类型的集成电路或者不同类型的集成电路。
集成电路700和710是竖直堆叠的裸片。集成电路700和710通过焊料突起721耦合在一起。集成电路710通过焊料突起722耦合到封装或者中介体。集成电路710包括电路711和穿透硅过孔(TSV)712。TSV712用导电材料填充。TSV712完全穿过集成电路710的裸片。电路711例如可以是数字电路、模拟电路或者无源电路。
集成电路700包括过孔705和去耦合电容器701。去耦合电容器701包括导电区域702-703和电介质区域704。导电区域702-703形成去耦合电容器701的两个导电板。电介质区域704处于导电区域702-703之间。过孔705用导电材料填充。
供应电压VCC通过焊料突起722A从外部VRM被提供给集成电路710。供应电压VCC通过焊料突起722A并且通过TSV712中的导电材料被提供给电路711。供应电压VCC还通过焊料突起722A、TSV712中的导电材料，焊料突起721A以及过孔705中的导电材料被提供给去耦合电容器701的导电区域703。通过过孔705和712以及突起721A的导电路径是低阻抗路径。在电路711的操作期间，去耦合电容器701通过这一低阻抗路径提供供应电压电流给电路711以降低由电路711接收的供应电压VCC中的变化。
图8是可以包括本发明的实施例的现场可编程门阵列(FPGA)800的简化部分框图。FPGA800仅是可以包括本发明的特征的集成电路的一个示例。应当理解，本发明的实施例可以在多种类型的集成电路(诸如现场可编程门阵列(FPGA)、可编程逻辑器件(PLD)、复杂可编程逻辑器件(CPLD)、可编程逻辑阵列(PLA)，专用集成电路(ASIC)、存储器集成电路、中央处理单元、微处理器、模拟集成电路等)中使用。
FPGA800包括通过具有变化的长度和速度的行列互连导体网络被互连的可编程逻辑阵列块(LAB)的二维阵列802。LAB802包括多个(例如，10个)逻辑元件(或者LE)。
逻辑元件(LE)是为用户限定的逻辑功能提供高效实现方式的可编程逻辑电路块。FPGA具有可以被配置以实现各种组合功能和时序功能的大量逻辑元件。逻辑元件能够访问可编程互连结构。可编程互连结构可以被编程为以基本上任何期望的配置互连逻辑器件。
FPGA800还包括分布式存储器结构，包括跨阵列提供的具有变化的尺寸的随机访问存储器(RAM)块。RAM块例如包括块804、块806、以及块808。这些存储器块还可以包括移位寄存器和先进先出(FIFO)缓冲器。
FPGA800还包括数字信号处理(DSP)块810，其可以实现例如具有加法或者减法特征的乘法器。输入/输出元件(IOE)812支持多种单端和差分输入/输出标准。IOE812包括输入和输出缓冲器，其耦合到所述集成电路的800的焊盘。这些焊盘是FPGA裸片的外部端子。这些焊盘用于在FPGA800和一个或者多个外部器件或者FPGA800中的其他电路之间路由输入信号、输出信号和供应电压。FPGA800是在图1中示出的集成电路100的示例。根据这一实施例，LAB802处于核心区106-108，而裸片的左侧和右侧上的IOE812分别处于接口电路区101和104中。本文出于例示目的描述了FPGA800。本发明的实施例可以在许多不同类型的集成电路中实现。
本发明的实施例还可以在以FPGA作为若干部件之一的系统中实现。图9示出了可以体现本发明的技术的示例性数字系统900的框图。系统900可以是已编程的数字计算机系统、数字信号处理系统、专用数字交换网络或者其他处理系统。此外，这种系统可以被设计用于广泛的应用，诸如电信系统、汽车系统、控制系统、消费电子设备、个人计算机、互联网通信和联网等。此外，系统900可以在单个板上、多个板上或者在多个壳体内被提供。
系统900包括通过一个或者多个总线互连在一起的处理单元902、存储器单元904以及输入/输出(I/O)单元906。根据这一示例性实施例，FPGA908嵌入在处理单元902中。FPGA908可以服务于图9的系统内的许多不同目的。FPGA908例如可以是处理单元902的逻辑构建快，从而支持其内部和外部操作。FPGA908被编程为实现以下逻辑功能，这些逻辑功能是实现其在系统操作中的特定角色所必须的。FPGA908可以通过连接910被具体地耦合到存储器904并且通过连接912耦合到I/O单元906。
处理单元902可以将数据引导到适当的系统部件以用于处理或者存储、执行存储在存储器904中的程序、经由I/O单元906接收并且传输数据或者其他类似的功能。处理单元902可以是中央处理单元(CPU)、微处理器、浮点协处理器、图形协处理器、，硬件控制器、微控制器、被编程用于用作控制器的现场可编程门阵列、网络控制器或者任何类型的处理器或者控制器。此外，在许多实施例中，经常不需要CPU。
例如，代替CPU，一个或者多个FPGA908可以控制系统的逻辑操作。作为另一示例，FPGA908充当可重新配置处理器，其可以根据需要被重新编程以处理特定计算任务。备选地，FPGA908自身可以包括嵌入式微处理器。存储器单元904可以是随机访问存储器(RAM)、只读存储器(ROM)、固定或者移动盘介质、闪存、磁带或者任何其他存储装置或者这些存储装置的任何组合。
已经出于例示和描述目的给出了本发明的示例性实施例的前述描述。前述描述并非旨在是穷尽的或者将本发明限定到这里公开的示例。在一些实例中，本发明的特征可以在没有上述的其他特征的对应使用的情况下被体现。鉴于以上教导，在不背离本发明的范围的情况下，许多修改、替换和变化都是可能的。

Claims (22)

1.一种集成电路，包括：
所述集成电路中的第一去耦合电容器，其中所述第一去耦合电容器耦合到所述集成电路的第一外部端子；以及
所述集成电路中的第一电路，其中所述第一电路耦合到所述集成电路的第二外部端子，其中所述第一去耦合电容器被耦合以通过所述第一外部端子和所述第二外部端子并且通过在所述集成电路外的外部导体向所述第一电路提供供应电压电流。
2.根据权利要求1所述的集成电路，其中所述第一电路是接口电路，并且其中所述第一去耦合电容器位于所述集成电路的非接口电路区中。
3.根据权利要求1所述的集成电路，其中所述外部导体处于以下介质之一中：封装、中介体、重分布层或者另一集成电路。
4.根据权利要求3所述的集成电路，其中所述介质通过焊料突起耦合到所述集成电路，其中所述供应电压电流通过所述外部导体以及所述焊料突起中的第一焊料突起和第二焊料突起从所述第一去耦合电容器流向所述第一电路，并且其中所述外部导体耦合到所述焊料突起中的所述第一焊料突起和所述第二焊料突起。
5.根据权利要求3所述的集成电路，其中供应电压通过所述外部导体从在所述集成电路外并且在所述介质外的源被提供给所述第一去耦合电容器并且被提供给所述第一电路。
6.根据权利要求1所述的集成电路，还包括：
所述集成电路中的第二去耦合电容器，其中所述第二去耦合电容器耦合到所述集成电路的第三外部端子，并且其中所述第二去耦合电容器被耦合以通过所述第二外部端子和所述第三外部端子并且通过所述外部导体向所述第一电路提供供应电压电流。
7.根据权利要求1所述的集成电路，其中所述第一去耦合电容器包括在所述集成电路的第一导电层中的导电岛体以及在所述集成电路的第二导电层中的导电区域，所述导电岛体通过过孔中的导电材料耦合在一起。
8.根据权利要求1所述的集成电路，其中通过在所述集成电路外的导体仅在所述第一去耦合电容器和所述第一电路之间形成电连接，并且其中所述第一去耦合电容器通过所述外部导体仅向所述第一电路提供所述供应电压电流。
9.根据权利要求1所述的集成电路，其中所述第一去耦合电容器通过所述第一外部端子并且通过所述外部导体向第二电路提供供应电压电流，并且其中所述第二电路位于所述集成电路外。
10.一种系统，包括:
包括去耦合电容器的第一集成电路；以及
包括内部电路的第二集成电路，其中所述第一集成电路和所述第二集成电路耦合在一起，并且其中所述去耦合电容器通过在所述第二集成电路中的穿透硅过孔中的导电材料耦合到所述内部电路。
11.根据权利要求10所述的系统，其中所述第一集成电路和所述第二集成电路处于相同的封装外壳中。
12.根据权利要求10所述的系统，还包括：
耦合到所述第一集成电路并且耦合到所述第二集成电路的焊料突起，其中所述去耦合电容器通过所述焊料突起中的至少一个焊料突起耦合到所述内部电路，并且其中所述第一集成电路和所述第二集成电路是竖直堆叠的裸片。
13.根据权利要求10所述的系统，其中所述去耦合电容器向所述内部电路提供用于供应电压的供应电压电流。
14.一种方法，包括：
提供集成电路中的第一去耦合电容器，其中所述第一去耦合电容器耦合到所述集成电路的第一外部端子；以及
提供所述集成电路中的第一电路，其中所述第一电路耦合到所述集成电路的第二外部端子，其中所述第一去耦合电容器被耦合以通过所述第一外部端子和所述第二外部端子并且通过在所述集成电路外的外部导体向所述第一电路提供供应电压电流。
15.根据权利要求14所述的方法，其中所述第一电路是接口电路，并且其中所述第一去耦合电容器处于所述集成电路的非接口电路区中。
16.根据权利要求14所述的方法，其中所述外部导体通过焊料突起耦合到所述集成电路，其中所述供应电压电流通过所述外部导体和所述焊料突起的子集从所述第一去耦合电容器流向所述第一电路，并且其中所述外部导体耦合到所述焊料突起的所述子集。
17.根据权利要求14所述的方法，其中所述外部导体处于如下介质之一中：封装、中介体、重分布层、或者另一集成电路。
18.根据权利要求14所述的方法，其中使用在所述集成电路外的导体仅在所述第一去耦合电容器与所述第一电路之间形成电连接，并且其中所述第一去耦合电容器通过所述外部导体仅向所述第一电路提供所述供应电压电流。
19.根据权利要求14所述的方法，还包括：
提供所述集成电路中的第二去耦合电容器，其中所述第二去耦合电容器耦合到所述集成电路的第三外部端子，并且其中所述第二去耦合电容器被耦合以通过所述第二外部端子和所述第三外部端子并且通过所述外部导体向所述第一电路提供供应电压电流。
20.根据权利要求14所述的方法，其中所述第一去耦合电容器被耦合以通过所述第一外部端子并且通过所述外部导体向第二电路提供供应电压电流，并且其中所述第二电路位于所述集成电路外。
21.一种使用集成电路的方法，所述方法包括：
从所述集成电路的第一外部端子向所述集成电路中的去耦合电容器提供供应电压，其中所述去耦合电容器耦合到所述集成电路的所述第一外部端子；以及
通过所述第一外部端子、通过在所述集成电路外的外部导体、并且通过所述集成电路的第二外部端子从所述去耦合电容器向所述集成电路的内部电路提供供应电压电流，其中所述内部电路耦合到所述集成电路的所述第二外部端子。
22.根据权利要求21所述的方法，其中使用在所述集成电路外的导体仅在所述去耦合电容器和所述内部电路之间形成电连接。
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