CN104201184A - Image sensor and forming method thereof - Google Patents
Image sensor and forming method thereof Download PDFInfo
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- CN104201184A CN104201184A CN201410494216.8A CN201410494216A CN104201184A CN 104201184 A CN104201184 A CN 104201184A CN 201410494216 A CN201410494216 A CN 201410494216A CN 104201184 A CN104201184 A CN 104201184A
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Abstract
Disclosed are an image sensor and a forming method thereof. The image sensor comprises a semiconductor substrate, multiple independent photodiodes, shallow-trench isolation structures and stress layers, the independent photodiodes are located in the semiconductor substrate and are arrayed in matrix, each shallow-trench isolation structure is located between every two neighboring photodiodes, and the stress layers are located in the shallow-trench isolation layers and apply stress to the photodiodes on two sides of the stress layers. Dark current of the image sensor is decreased.
Description
Technical field
The present invention relates to technical field of semiconductors, particularly imageing sensor and forming method thereof.
Background technology
Imageing sensor is optical image signal to be converted to the semiconductor device of the signal of telecommunication.Image taking sensor becomes as the product of key components and parts the object that current and following industry is paid close attention to, and is attracting numerous manufacturers to drop into.With product category, distinguish, image sensor products is mainly divided into charge-coupled image sensor (Charge-coupled Device image sensor, abbreviation ccd image sensor), complementary metal oxide imageing sensor (Complementary Metal Oxide Semiconductor image sensor is called for short cmos sensor).Cmos image sensor is a kind of solid state image sensor of fast development, because imageing sensor part and control circuit in cmos image sensor are partly integrated in same chip, therefore the volume of cmos image sensor is little, low in energy consumption, cheap, compared to traditional CCD (electric charge coupling) imageing sensor, have more advantage, also more universal.
Please refer to Fig. 1, Fig. 1 is the electrical block diagram of the cmos image sensor of existing 4T structure, comprising: transistor M3, row gate transistor M4 are followed in transmission transistor M1, reset transistor M2, source.The operation principle of described 4T structure C mos image sensor is: transmission transistor M1 is used for the photogenerated charge of light sensitive diode PD to be transferred to floating diffusion region FD, reset transistor M2 is used for floating diffusion region FD to reset, and source is followed transistor M3 and is used for the signal of telecommunication of floating diffusion region FD to amplify output.Its course of work comprises: by reset signal R, control reset transistor M2 and open, floating diffusion region FD is set to high potential; Then turn-off reset transistor M2, and control and open transmission transistor M1 by signal transmission T, photogenerated charge in light sensitive diode PD is transferred to floating diffusion region FD, make floating diffusion region FD produce pressure drop, this pressure drop is followed the be expert at output out of gate transistor M4 of transistor M3 by source and is exported, and the pressure drop of this output is output signal.
In existing imageing sensor, have larger dark current, dark current refers to that device is under the condition of reverse biased, the anti-phase direct current producing while there is no incident light, when dark current is worked at imageing sensor, can mix in signal code, cause signal to disturb, cause image sensor performance to decline.
Summary of the invention
The problem that the present invention solves is to provide a kind of imageing sensor and forming method thereof, reduces the dark current of imageing sensor.
For addressing the above problem, the invention provides a kind of imageing sensor, comprising: Semiconductor substrate; Be positioned at the some discrete photodiode of described Semiconductor substrate, described photodiode is pressed matrix and is arranged; Fleet plough groove isolation structure between adjacent photodiode; Be positioned at the stressor layers of described fleet plough groove isolation structure, described stressor layers applies compression to the photodiode of both sides.
Optionally, comprise some pixel cells in described Semiconductor substrate, described each pixel cell includes respectively photodiode, the photodiode of described fleet plough groove isolation structure isolation different pixels unit.
Optionally, described semiconductor substrate materials is silicon, and the lattice constant of described stressor layers is greater than the lattice constant of silicon.
Optionally, the mean atomic weight of described stressor layers is greater than the atomic weight of fleet plough groove isolation structure.
Optionally, the material of described stressor layers is SiGe, Ge or SiN.
Optionally, between the sidewall of described stressor layers, bottom and Semiconductor substrate, also there is part fleet plough groove isolation structure.
Optionally, the distance between the sidewall of described stressor layers and the Semiconductor substrate of fleet plough groove isolation structure sidewall is
Optionally, in the described stressor layers fleet plough groove isolation structure between the adjacent photodiode of same a line or in the fleet plough groove isolation structure of described stressor layers between the adjacent photodiode of same row.
Optionally, in the fleet plough groove isolation structure of described stressor layers between the adjacent photodiode of same a line, and in the fleet plough groove isolation structure between the adjacent photodiode of same row.
For addressing the above problem, technical scheme of the present invention also provides a kind of formation method of above-mentioned imageing sensor, comprising: Semiconductor substrate is provided; The photodiode that forms fleet plough groove isolation structure and be positioned at fleet plough groove isolation structure both sides in described Semiconductor substrate; In fleet plough groove isolation structure between described adjacent photodiode, form groove; In described groove, form stressor layers, described stressor layers applies compression to the photodiode of both sides.
Optionally, after forming described stressor layers, then described in forming, be positioned at the photodiode of fleet plough groove isolation structure both sides.
Optionally, described semiconductor substrate materials is silicon, and the lattice constant of described stressor layers is greater than the lattice constant of silicon.
Optionally, the mean atomic weight of described stressor layers is greater than the atomic weight of fleet plough groove isolation structure.
Optionally, the material of described stressor layers is SiGe, Ge or SiN.
Optionally, adopt epitaxy technique to form described stressor layers.
Optionally, the formation method of described groove comprises: at described Semiconductor substrate, photodiode and surface of shallow trench isolation structure, form pattern mask layer, described pattern mask layer exposes the surface of the part fleet plough groove isolation structure between adjacent photodiode; The described pattern mask layer of take is mask, and groove isolation construction described in etching forms groove.
Optionally, the sidewall of described groove and bottom have part fleet plough groove isolation structure.
Optionally, the distance between the sidewall of described stressor layers and the Semiconductor substrate of fleet plough groove isolation structure sidewall is
Optionally, in the described groove fleet plough groove isolation structure between the adjacent photodiode of same row or in the fleet plough groove isolation structure of described stressor layers between the adjacent photodiode of same row.
Optionally, in the fleet plough groove isolation structure of described stressor layers between the adjacent photodiode of same a line, and in the fleet plough groove isolation structure between the adjacent photodiode of same row.
Compared with prior art, technical scheme of the present invention has the following advantages:
A kind of imageing sensor that technical scheme of the present invention proposes, described imageing sensor comprises some discrete photodiodes, has fleet plough groove isolation structure between adjacent photodiode; In described fleet plough groove isolation structure, there is stressor layers, photodiode is applied to compression, the energy gap of photodiode is increased, improved the difficulty of the electronics generation spontaneous transition in photodiode, thereby can reduce the dark current of imageing sensor, improve the performance of imageing sensor.And described stressor layers is positioned at fleet plough groove isolation structure, does not need to occupy the area of extra Semiconductor substrate, thereby can not affect the area of imageing sensor.
Further, the material lattice constant of described stressor layers is greater than the lattice constant of silicon, thereby because lattice does not mate, can apply compression to photodiode; The mean atomic weight of the material of described stressor layers is greater than the atomic weight of fleet plough groove isolation structure, thereby due to Action of Gravity Field, also can apply action of compressive stress to photodiode, further improves the performance of imageing sensor.
Technical scheme of the present invention also provides a kind of formation method of above-mentioned imageing sensor, form photodiode and the fleet plough groove isolation structure between adjacent photodiode in Semiconductor substrate after, in described fleet plough groove isolation structure, form groove, then form stressor layers in described groove.In described groove formation and fleet plough groove isolation structure, can other regions in Semiconductor substrate not impacted, and the stressor layers forming in described groove also can additionally not occupy the area of Semiconductor substrate.
Accompanying drawing explanation
Fig. 1 is the electrical block diagram of the imageing sensor of prior art of the present invention;
Fig. 2 to Fig. 7 is the imageing sensor of one embodiment of the present of invention and the structural representation of forming process thereof;
Fig. 8 to Figure 12 is the imageing sensor of an alternative embodiment of the invention and the structural representation of forming process thereof;
Figure 13 to Figure 15 is the encapsulating structure of imageing sensor and the structural representation of method for packing of an alternative embodiment of the invention.
Embodiment
As described in the background art, the dark current of the imageing sensor of prior art is larger, affects the performance of imageing sensor.
Research discovery, the dark current of imageing sensor is normally caused by a lot of different factors, mainly comprises the defect in photodiode, the energy gap of photodiode material etc.For the defect in photodiode, normally by ion implantation technology, caused, normally cannot eliminate completely.And the energy gap of photodiode material has determined the difficulty of the electronics generation spontaneous transition in photodiode, energy gap is larger, and the difficulty of electronics from valence band spontaneous transition to conduction band is larger, thereby the difficulty of generation dark current is also larger.
Further research is found, the material of photodiode is when being subject to compression, and energy gap can increase, thereby can effectively reduce dark current.
Based on above-mentioned discovery, in embodiments of the invention, by photodiode is applied to compression, improve the energy gap of described photodiode, and then improve the performance of imageing sensor.
For above-mentioned purpose of the present invention, feature and advantage can more be become apparent, below in conjunction with accompanying drawing, specific embodiments of the invention are described in detail.
Please refer to Fig. 2, is the cross-sectional view of the imageing sensor of one embodiment of the present of invention.
Described imageing sensor comprises: Semiconductor substrate 100; Be positioned at the photodiode 101 of some separation of described Semiconductor substrate, described photodiode 101 is pressed matrix and is arranged; Fleet plough groove isolation structure 110 between adjacent photodiode; Be positioned at the stressor layers of described fleet plough groove isolation structure, described stressor layers applies compression to the photodiode of both sides.
Concrete, described Semiconductor substrate 100 is used to form device architecture or chip circuit, the material of described Semiconductor substrate 100 comprises the semi-conducting materials such as silicon, germanium, SiGe, GaAs, and described Semiconductor substrate 100 can be that body material can be also that composite construction is as silicon-on-insulator.Those skilled in the art can select the type of described Semiconductor substrate 100 according to the semiconductor device forming in Semiconductor substrate 100, therefore the type of described Semiconductor substrate should not limit the scope of the invention.
Described Semiconductor substrate 100 can also be to comprise substrate and the epitaxial loayer that is formed at substrate surface by epitaxy technique, described substrate thicker, and doping content is larger, and defect is a lot; And the epitaxial loayer of substrate surface generally only has several microns, doping content is lower, and defect seldom.Described photodiode 101 is positioned at described epitaxial loayer.In addition, described Semiconductor substrate 100 is interior can also have well region.Described epitaxial loayer is the monocrystalline silicon layer of P type doping.
In the present embodiment, described Semiconductor substrate 100, for the monocrystalline silicon of P type doping, has P trap in described Semiconductor substrate 100.
Described photodiode 101 can, in the situation that being subject to extraneous light intensity and exciting, produce photo-generated carrier, i.e. electronics.Described photodiode 101 can form by ion implantation technology, and, by controlling energy and the concentration of Implantation, the degree of depth and the injection scope of Implantation be can control, thereby the degree of depth and the thickness of photodiode 101 controlled.
In the present embodiment, described photodiode 101 comprises N-type doped region, and the doping ion of described N-type doped region comprises one or more the N-type doping ions in phosphonium ion, arsenic ion or antimony ion.The light-sensitive device of the pixel cell that described photodiode 101 is imageing sensor, for generation of the surplus charge carrier of light.Described photodiode 101 is arranged according to matrix form in Semiconductor substrate 100.In the present embodiment, two adjacent pixel unit of the same a line in the pixel unit array in image taking sensor are as example, comprising two adjacent photodiodes 101.In other embodiments of the invention, described imageing sensor can also comprise the photodiode of other quantity.
Described Semiconductor substrate 100 comprises some pixel cells, described photodiode 101 is as a part for the pixel cell of imageing sensor, described pixel cell also comprise in each photodiode 101 Semiconductor substrate 100 around for obtaining the image element circuit with output electrical signals, comprise that transmission transistor, reset transistor, source follow transistor, row gate transistor etc.Other regions of not shown above-mentioned transistor and Semiconductor substrate 100 in Fig. 2.
Between adjacent photodiode 101, by fleet plough groove isolation structure, isolate 110 isolation, described shallow trench isolation is from the isolation structure as being connected between pixel cell simultaneously.In other embodiments of the invention, described fleet plough groove isolation structure 110 belows or both sides can also have well region and isolate adjacent photodiode 101.The material that the material of described fleet plough groove isolation structure 110 is is silica.
In described fleet plough groove isolation structure 110, there is stressor layers 120.In the present embodiment, described stressor layers 120 is positioned at described shallow trench isolation structure 110 inside, between described stressor layers 120 and Semiconductor substrate 100, also have part fleet plough groove isolation structure 110, described part fleet plough groove isolation structure 110 can be avoided described stressor layers 120 and stressor layers 120 conductings.If described stressor layers 120 directly contacts and may cause conducting between adjacent photodiode 101 with Semiconductor substrate 100, thereby affect the performance of imageing sensor.
In the present embodiment, the distance between the Semiconductor substrate 100 of the sidewall of described stressor layers 120, bottom and fleet plough groove isolation structure 110 sidewalls is
thereby described stressor layers 120 can be isolated with described Semiconductor substrate 100.
The lattice constant of described stressor layers 120 is greater than the lattice constant of silicon, thereby can apply compression to described Semiconductor substrate 100, described compression can pass to by the fleet plough groove isolation structure between described stressor layers 120 and Semiconductor substrate 100 photodiode 101 of both sides.Described compression can improve the energy gap of described photodiode 101, thereby makes the electronics in described photodiode 101 cannot be by spontaneous transition to conduction band, thereby can reduce the dark current of described imageing sensor, improves the performance of imageing sensor.The material of described stressor layers 110 can be SiGe, Ge or SiN.The lattice constant of above-mentioned material is all greater than the lattice constant of silicon, can apply compression to photodiode.
And, the sidewall with inclination of described stressor layers 120, the top width of described stressor layers 120 is greater than bottom width, adopt SiGe, the mean atomic weight of the stressor layers 120 that Ge forms is greater than the mean atomic weight of fleet plough groove isolation structure 110, thereby in the described stressor layers 120 of institute's fleet plough groove isolation structure 110 interior formation, due to Action of Gravity Field, described stressor layers 120 can apply action of compressive stress to the fleet plough groove isolation structure 110 of its sidewall and bottom thereof, thereby further improve the compression that 120 pairs of photodiodes 101 of described stressor layers apply, further reduce the dark current of imageing sensor.In other embodiments of the invention, the density of described stressor layers 120 is greater than the density of fleet plough groove isolation structure 110, in the situation that volume is identical, the gravity that the stressor layers that makes to form is subject to is greater than the suffered gravity of part fleet plough groove isolation structure of removal, thereby described stressor layers 120 can oppose side wall and the fleet plough groove isolation structure 110 of bottom apply action of compressive stress, the material of described stressor layers 120 can also be SiN.
In the present embodiment, the material of described stressor layers 120 is SiGe.
In other embodiments of the invention, be formed with photodiode 101 arrays in described Semiconductor substrate 100, described photodiode 101 is arranged according to matrix.With thering is fleet plough groove isolation structure 110 between the adjacent photodiode 101 in a line, between the adjacent photodiode 101 of same row, also there is fleet plough groove isolation structure 101.In one embodiment of the invention, the fleet plough groove isolation structure 110 of described stressor layers 120 between the adjacent photodiode 101 of same a line.In another embodiment of the present invention, described stressor layers 120 can be between the adjacent photodiode 101 of same row fleet plough groove isolation structure 110.In another embodiment of the present invention, in the fleet plough groove isolation structure 110 of described stressor layers 120 between the adjacent photodiode 101 of same a line, and in the fleet plough groove isolation structure 110 between the adjacent photodiode 101 of same row, can all apply compression to all directions of photodiode 101, thereby improve the energy gap of described photodiode 101, thereby reduce the dark current of imageing sensor, and then improve the performance of described imageing sensor.
Please refer to Fig. 3, is the generalized section of the imageing sensor of another embodiment of the present invention.Wherein, in fleet plough groove isolation structure between two adjacent photodiode 101, there are two stressor layers 121, and a side sidewall of described stressor layers 121 directly contacts with Semiconductor substrate 100, the fleet plough groove isolation structure 110 still between two stressor layers 121 with partial width, as the isolation structure between stressor layers 121, simultaneously as the isolation structure between adjacent photodiode 101.In this embodiment, between described stressor layers 121 and Semiconductor substrate 100, directly contact, reduced the distance between described stressor layers 121 and photodiode 101, and the stress that the lattice mismatch on described stressor layers 121 and Semiconductor substrate 100 interfaces produces can be directly passed to the photodiode 101 in Semiconductor substrate 100, thereby improve the effect of stress that described photodiode 101 is subject to, and then the minimizing better effects if to dark current.
The present embodiment also provides the formation method of above-mentioned imageing sensor, comprising: Semiconductor substrate is provided; The photodiode that forms fleet plough groove isolation structure and be positioned at fleet plough groove isolation structure both sides in described Semiconductor substrate; In fleet plough groove isolation structure between described adjacent photodiode, form groove; In described groove, form stressor layers, described stressor layers applies compression to the photodiode of both sides.
Please refer to Fig. 4, Semiconductor substrate 100 is provided, at the interior formation fleet plough groove isolation structure 110 of described Semiconductor substrate 100, and the photodiode 101 that is positioned at described fleet plough groove isolation structure both sides.
Described Semiconductor substrate 100 is used to form device architecture or chip circuit, the material of described Semiconductor substrate 100 comprises the semi-conducting materials such as silicon, germanium, SiGe, GaAs, and described Semiconductor substrate 100 can be that body material can be also that composite construction is as silicon-on-insulator.Those skilled in the art can select the type of described Semiconductor substrate 100 according to the semiconductor device forming in Semiconductor substrate 100, therefore the type of described Semiconductor substrate should not limit the scope of the invention.
In addition, described Semiconductor substrate 100 can also comprise semiconductor base and the epitaxial loayer that is formed at semiconductor-based basal surface by epitaxy technique, and that described photodiode, fleet plough groove isolation structure are formed at epitaxial loayer is inner or surperficial.In addition, in described Semiconductor substrate 100, there is well region.In the present embodiment, described Semiconductor substrate 100, for the monocrystalline silicon of P type doping, has P trap in described Semiconductor substrate 100.
The formation method of described fleet plough groove isolation structure 110 comprises: in described Semiconductor substrate 100, form pattern mask layer, described pattern mask layer is coated with source region, exposes the region that need to form fleet plough groove isolation structure; Take described pattern mask layer as Semiconductor substrate described in mask etching 100, form groove; Then remove described pattern mask layer, fill insulant in described groove, described filling insulating material expires described groove and covers the surface of Semiconductor substrate 100; Using described Semiconductor substrate 100 surfaces as stop-layer, described insulating material is carried out to planarization, or return etching, remove the insulating material that is positioned at Semiconductor substrate 100 surfaces, formation is positioned at the insulation material layer of Semiconductor substrate 100, as fleet plough groove isolation structure 110.
Can adopt chemical vapor deposition method, flowable chemical deposition process, high-aspect-ratio depositing operation etc. to form described dielectric material, described dielectric material is silica.Before filling described dielectric material, can also adopt thermal oxidation technology or atom layer deposition process to form one deck pad oxide on described trench wall surface, to repair the defect on described trench wall surface, improve deposition quality and the isolation performance of dielectric material.
The formation method of described photodiode 101 comprises: in described Semiconductor substrate 100, form mask layer, position and the size of described mask layer definition photoelectric diode 101, take described mask layer as mask, described Semiconductor substrate 100 is carried out to Implantation, form the doped layer contrary with Semiconductor substrate 100 doping types, as photodiode 101.In the present embodiment, described Semiconductor substrate 100 is P type substrate, and Semiconductor substrate 100 is carried out to N-type Implantation, forms N-type doped layer, and described N-type ion comprises phosphonium ion, arsenic ion or antimony ion.By controlling energy and the concentration of Implantation, can control the degree of depth and the injection scope of Implantation, thereby control the degree of depth and the thickness of photodiode 101.
Between the photodiode 101 of fleet plough groove isolation structure 110 both sides, by described fleet plough groove isolation structure 110, isolate, in the present embodiment, the photodiode that the photodiode 101 of described fleet plough groove isolation structure both sides is the adjacent pixel unit that is positioned at same a line in pel array.Described photodiode 101 can, in the situation that being subject to extraneous light intensity and exciting, produce photo-generated carrier, i.e. electronics.
In other embodiments of the invention, also can in the Semiconductor substrate of N-type, form P type doped layer as photodiode, now, the photo-generated carrier of described photodiode mobile phone is hole.
Because the material energy gap of Semiconductor substrate 100 is less, electrons generation spontaneous transition in described photodiode, to conduction band, when imageing sensor is worked, forms dark current, cause described imageing sensor output signal inaccurate, thereby affect the performance of imageing sensor.
Please refer to Fig. 5, the interior formation groove 111 of fleet plough groove isolation structure 110 between described adjacent photodiode 101.
The formation method of described groove 111 comprises: on described Semiconductor substrate 100, photodiode 101 and fleet plough groove isolation structure 110 surfaces, form pattern mask layer, described pattern mask layer exposes the surface of the part fleet plough groove isolation structure 110 between adjacent photodiode 101; The described pattern mask layer of take is mask, and groove isolation construction 110 described in etching forms groove 111.Described groove 111 adopts dry etch process to form, and the etching gas that described dry etch process adopts comprises CF
4, C
2f
6or C
3f
8deng fluoro-gas.Described groove 111 has sloped sidewall, makes the top width of described groove 111 be greater than bottom width.
In the present embodiment, the sidewall of described groove 111 and bottom also have part fleet plough groove isolation structure 110.Thereby can make isolation between the follow-up stressor layers in described groove 111 interior formation and photodiode 101.Distance between the sidewall of described groove 111 and bottom and Semiconductor substrate 100 is
thereby make the follow-up stressor layers in groove 111 interior formation and the fleet plough groove isolation structure 110 between Semiconductor substrate 100 there is enough thickness, play buffer action.
In other embodiments of the invention, at the array of the interior formation photodiode 101 of Semiconductor substrate 100, described photodiode 101 is arranged according to matrix form in Semiconductor substrate 100.With thering is fleet plough groove isolation structure 110 between the adjacent photodiode 101 in a line, between the adjacent photodiode 101 of same row, also there is fleet plough groove isolation structure 101.In one embodiment of the invention, the described groove 111 of the interior formation of fleet plough groove isolation structure 110 that can be between the adjacent photodiode 101 of same a line.In another embodiment of the present invention, can be between the adjacent photodiode 101 of same row the described groove 111 of the interior formation of fleet plough groove isolation structure 110.In another embodiment of the present invention, also in the fleet plough groove isolation structure 110 of while between the adjacent photodiode 101 of same a line, and the described groove 111 of the interior formation of fleet plough groove isolation structure 110 between the adjacent photodiode 101 of same row, the follow-up stressor layers in described groove 111 interior formation can all apply compression to all directions of photodiode 101, thereby improve the energy gap of described photodiode 101, thereby reduce the dark current of imageing sensor, and then improve the performance of described imageing sensor.
Please refer to Fig. 6, in described groove 111 (please refer to Fig. 5) and Semiconductor substrate 100 and fleet plough groove isolation structure 110 surfaces form the stress material layer 120a that fills full described groove 111.
Adopt epitaxy technique to form described stress material layer 120a, the lattice constant of described stress material layer 120a is greater than the lattice constant of silicon, the follow-up part stress material layer 120a that is positioned at groove 111 is as stressor layers, can apply compression to described Semiconductor substrate 100, described compression can pass to by the fleet plough groove isolation structure 110 between described stressor layers and Semiconductor substrate 100 photodiode 101 of both sides.Described compression can improve the energy gap of described photodiode 101, thereby makes the electronics in described photodiode 101 cannot be by spontaneous transition to conduction band, thereby can reduce the dark current of described imageing sensor, improves the performance of imageing sensor.The material of described stressor layers 110 can be SiGe, Ge or SiN.
The material of described stress material layer 120a is SiGe.Adopt epitaxy technique to form described stress material layer 120a.Concrete, the reacting gas that described epitaxy technique adopts comprises germanium source gas, silicon source gas and H
2, wherein, germanium source gas is GeH
4, silicon source gas comprises SiH
4or SiH
2cl
2, the gas flow of germanium source gas, silicon source gas is 1sccm～1000sccm, H
2flow be 0.1slm～50slm, the temperature of described selective epitaxial process is 500 ℃～800 ℃, pressure is 1Torr～100Torr.
Please refer to Fig. 2, described stress material layer 120a carried out to planarization, remove the stress material layer 120a that is positioned at photodiode 101, fleet plough groove isolation structure 110 surfaces, form described stressor layers 120.
Because described stressor layers 120 has the sidewall of inclination, the top width of described stressor layers 120 is greater than bottom width, adopt SiGe, the mean atomic weight of the stressor layers 120 that Ge forms is greater than the mean atomic weight of fleet plough groove isolation structure 110, thereby in the described stressor layers 120 of institute's fleet plough groove isolation structure 110 interior formation, due to Action of Gravity Field, described stressor layers 120 can apply action of compressive stress to the fleet plough groove isolation structure 110 of its sidewall and bottom thereof, thereby further improve the compression that 120 pairs of photodiodes 101 of described stressor layers apply, further reduce the dark current of imageing sensor.In other embodiments of the invention, the density of described stressor layers 120 is greater than the density of fleet plough groove isolation structure 110, in the situation that volume is identical, the gravity that the stressor layers that makes to form is subject to is greater than the suffered gravity of part fleet plough groove isolation structure of removal, thereby described stressor layers 120 can oppose side wall and the fleet plough groove isolation structure 110 of bottom apply action of compressive stress, the material of described stressor layers 120 can also be SiN.In other embodiments of the invention, also can adopt after said method forms described stressor layers 120, then described in forming, be positioned at the described photodiode 101 of fleet plough groove isolation structure both sides.
Please refer to Fig. 7, for during of the present invention another implement, in the generalized section of the groove 112 of described fleet plough groove isolation structure 110 interior formation.
In this embodiment, in fleet plough groove isolation structure between two adjacent photodiodes 101, form two grooves 112, and a side sidewall of described groove 112 exposes Semiconductor substrate 100, the fleet plough groove isolation structure 110 also between two grooves 112 with partial width, as the isolation structure between the stressor layers of follow-up formation, simultaneously as the isolation structure between adjacent photodiode 101.The follow-up stressor layers in described groove 112 interior formation can directly contact with Semiconductor substrate 100, reduce the distance between stressor layers and photodiode 101, and the stress that the lattice mismatch on described stressor layers and Semiconductor substrate 100 interfaces produces can be directly passed to the photodiode 101 in Semiconductor substrate 100, thereby improve the effect of stress that described photodiode 101 is subject to, and then the minimizing better effects if to dark current.
Please refer to Fig. 3, for form stressor layers 121 generalized section afterwards in groove 112 (please refer to Fig. 7).Described stressor layers 121 can apply larger stress to photodiode 101, thereby improves the performance of imageing sensor.
The dot structure of imageing sensor itself is all not have color sensing function, only responsive to incident intensity, insensitive to lambda1-wavelength.Therefore,, in order to obtain colored perceptional function, the most frequently used way, is on the pel array of imageing sensor, to cover colored filter (CFA, color filter film) array.In one embodiment of the present of invention, by described colored filter, the photodiode stress application effect to described imageing sensor.
Please refer to Fig. 8 and Fig. 9, described imageing sensor comprises: Semiconductor substrate 200, and described Semiconductor substrate 200 comprises pixel unit array, described pixel cell comprises photodiode 101; Be positioned at the colorized optical filtering stress film 220 in described pixel unit array, 220 pairs of photodiodes 101 of described colorized optical filtering stress film apply compression.Fig. 9 is schematic top plan view, and Fig. 8 is the generalized section along secant AA ' in Fig. 9.For the ease of expressing the queueing discipline of described photodiode 101 below colorized optical filtering stress film 220, in described Fig. 9, colorized optical filtering stress film 220 has certain transparency, so that the photodiode 101 of its below to be shown.
Therefore not to repeat here for the material of described Semiconductor substrate 200, and in the present embodiment, described Semiconductor substrate 100 is the monocrystalline substrate of P type doping.
Pixel cell in described Semiconductor substrate 200 comprises photodiode 201 and the semiconductor device that is positioned at photodiode 201 peripheries, comprising: described imageing sensor also comprises that reset transistor, reset transistor, source follow transistor, row gate transistor.Described semiconductor device can distribute according to the concrete layout designs of imageing sensor, and this is not restricted.
Between described adjacent photodiode 201, can isolate by fleet plough groove isolation structure or well region.Described photodiode 201 is meeting charge carrier when being subject to illumination, and in the present embodiment, described photodiode 201 comprises N-type doped layer, and described N-type doping ion comprises phosphonium ion, arsenic ion or antimony ion.
In described Semiconductor substrate 100, be formed with the pixel unit array of arranging by matrix, in the present embodiment in Fig. 8, Fig. 9 and subsequent drawings, with described photodiode 201 represent pixel unit.In the present embodiment, 3 * 3 the pixel unit array of take is example.In other embodiments of the invention, the interior pixel cell can with other quantity of Semiconductor substrate 100, can set according to the pixel request of imageing sensor.
Described Semiconductor substrate 200 surfaces have interlayer dielectric layer 210, the material of described interlayer dielectric layer 210 is the dielectric material that light transmittance is higher, avoid when imageing sensor is worked, incident light is caused to the photosensitivity that reduces imageing sensor compared with large absorption.For example, the material of described interlayer dielectric layer 210 can silica, mix phosphor silicon oxide, boron-doping silica etc., and described interlayer dielectric layer 210 can adopt the methods such as atom layer deposition process, high-density plasma gas-phase deposition, low pressure plasma chemical vapor deposition method to form.Described interlayer dielectric layer 210 can also be multiple-level stack structure, meanwhile, in described interlayer dielectric layer 210, also has metal interconnect structure 211, and the pixel cell forming circuit of described metal interconnect structure 211 and below, for controlling pixel cell.The concrete distribution of described metal interconnect structure 211 and connected mode can be carried out layout according to the circuit structure design of imageing sensor, and this is not restricted.In Fig. 9, omitted described metal interconnect structure 211.
Described colorized optical filtering stress film 220 is positioned at described interlayer dielectric layer 210 surfaces, in described colorized optical filtering stress film 220, comprise red (R), green (G) and blue (B) unit, and according to setting, described colour cell position is accurately corresponding with the pixel cell position of its below, makes pixel cell below different colour cells can receive the incident light of different wave length.
The Material shrinkage rate of described colorized optical filtering stress film 220 is greater than 0.5%, make after described interlayer dielectric layer 210 surfaces form colorized optical filtering stress film 220, described colorized optical filtering stress film 220 shrinks in cooling or room temperature situation, interlayer dielectric layer 210 to below produces horizontal compression, described horizontal compression can be passed through described interlayer dielectric layer 210 going downs to the photodiode 201 of below, make described photodiode 201 also be subject to the effect of transverse compressive stress, make the energy gap of described photodiode 201 materials become large, electron transition quantity in described photodiode 201 is reduced, thereby can reduce the dark current of imageing sensor, and then the performance of raising imageing sensor.
The material of described colorized optical filtering stress film 220 comprises: coloring agent and polymer, and described polymer is as film forming base material, and coloring agent is dispersed in polymeric layer, makes polymeric layer have color.Described coloring agent comprises red (R), green (G) and blue (B) three kinds, according to the COLOR COMPOSITION THROUGH DISTRIBUTION of colorized optical filtering stress film 220, relates to, and has each self-corresponding coloring agent in the polymeric layer above different pixel cells.
The material of described polymer can be the transparent polymers such as polymethyl methacrylate, Merlon, poly-the third ethene or polysulfones.Above-mentioned polymer has higher shrinkage, after shaping, volume is less than shaping front volume, so, the molded curing colorized optical filtering stress film 220 that is positioned at interlayer dielectric layer 210 surfaces can produce horizontal action of compressive stress to the photodiode 201 of the interlayer dielectric layer 210 of its below and below, and reduces the dark current of imageing sensor.When the shrinkage of described polymeric material is greater than 1%, can apply enough compression to reduce dark current to photodiode.But the shrinkage of described polymeric material can not be excessive, the colorized optical filtering stress film 220 of avoiding forming breaks or is out of shape the performance that affects on the contrary imageing sensor, and it is 30% better that the shrinkage of described polymeric material is less than.
The stress intensity of described colorized optical filtering stress film 220 is also relevant to its thickness, and the thickness of described colorized optical filtering stress film 220 is larger, and the stress that the other side's material layer applies is larger.In one embodiment of the invention, the thickness of described colorized optical filtering stress film 220 is 0.5 μ m～3 μ m, and the thickness of described colorized optical filtering stress film 220, more than 0.5 μ m, can produce enough action of compressive stress to photodiode 201; The thickness of described colorized optical filtering stress film 220, below 3 μ m, can avoid excessive colorized optical filtering stress film 220 internal stresss that cause of thickness excessive, and the problems such as buckling deformation occur and affects the performance of imageing sensor.
In the present embodiment, the metal interconnect structure 211 in described interlayer dielectric layer 210 also can adopt the heavier metal of atomic weight to form.Adopt Al to compare as the material of metal interconnect structure 211 with prior art, in the present embodiment, the metal material that can adopt atomic weight to be greater than the atomic weight of Al forms described metal interconnect structure 211 more.Described metal material can be Cu, Ta or Ti etc.Compared with prior art, in the present embodiment, the atomic weight of described metal material is larger, under Action of Gravity Field, can to the Semiconductor substrate 100 of interlayer dielectric layer 210 belows, apply larger action of compressive stress in vertical direction, thereby improve the energy gap of described photodiode 201, and then the dark current of minimizing imageing sensor, the performance of raising graphical sensory device.
The formation method that imageing sensor shown in a kind of Fig. 8 and Fig. 9 is also provided in the present embodiment, comprising: Semiconductor substrate is provided, and described Semiconductor substrate comprises pixel cell, in described pixel cell, comprises photodiode; On described pixel cell, form colorized optical filtering stress film, described colorized optical filtering stress film applies compression to photodiode.
Please refer to Figure 10 and Figure 11, Semiconductor substrate 200 is provided, described Semiconductor substrate 200 comprises pixel unit array, and described pixel cell comprises photodiode 201.Figure 10 is the schematic top plan view of described Semiconductor substrate 200, and Figure 11 is the generalized section along secant BB ' in Figure 10.
The formation method of the material of described Semiconductor substrate 100 and photodiode 201 please refer to previous embodiment, and therefore not to repeat here.In the present embodiment, described pixel cell comprises photodiode 201 and the semiconductor device that is positioned at photodiode 201 peripheries, comprising: described imageing sensor also comprises that reset transistor, reset transistor, source follow transistor, row gate transistor.Described semiconductor device can distribute according to the concrete layout designs of imageing sensor, and this is not restricted.In the present embodiment, with described photodiode 201 represent pixel unit.
Please refer to Figure 12, at described Semiconductor substrate 200 and the surperficial metal interconnect structure 211 that forms interlayer dielectric layers 210 and be positioned at described interlayer dielectric layer 210 of photodiode 201.
The material of described interlayer dielectric layer 210 can be silica, boron-doping silica, mix the dielectric materials such as phosphor silicon oxide, can adopt the methods such as atom layer deposition process, high-density plasma gas-phase deposition, low pressure plasma chemical vapor deposition method to form.In the present embodiment, the material of described interlayer dielectric layer 210 is silica.
At the interior formation metal interconnect structure 211 of described interlayer dielectric layer 210, described metal interconnect structure 211 comprises through-hole interconnection and metal interconnecting wires, can be by Damascus technics at the described metal interconnect structure 211 of the interior formation of described interlayer dielectric layer 210.At the interior formation through hole of described dielectric layer 210 and groove, then in described through hole and groove, fill metal material and carry out planarization, form described metal interconnect structure 211.
The material of described metal interconnect structure 211 is the metal material that atomic weight is larger.In prior art, the material of described metal interconnect structure 211 adopts Al conventionally, and cost is lower, and electrical efficiency is higher.In the present embodiment, the atomic weight of the material of described metal interconnect structure 211 is greater than the atomic weight of Al, can be Cu, Ta or Ti etc.Compared with prior art, in the present embodiment, the atomic weight of described metal material is larger, under Action of Gravity Field, can to the Semiconductor substrate 100 of interlayer dielectric layer 210 belows, apply larger action of compressive stress in vertical direction, thereby improve the energy gap of described photodiode 201, and then the dark current of minimizing imageing sensor, the performance of raising graphical sensory device.
Continue please refer to Fig. 8, on described interlayer dielectric layer 210, form colorized optical filtering stress film 220,220 pairs of photodiodes 201 of described colorized optical filtering stress film apply compression.
In described colorized optical filtering stress film 220, comprise red (R), green (G) and blue (B) unit, and according to setting, described colour cell position is accurately corresponding with the pixel cell position of its below, makes pixel cell below different colour cells can receive the incident light of different wave length.
The material of described colorized optical filtering stress film 220 comprises: coloring agent and polymer, and described polymer is as film forming base material, and coloring agent is dispersed in polymeric layer, makes polymeric layer have color.Described coloring agent comprises red (R), green (G) and blue (B) three kinds, according to the COLOR COMPOSITION THROUGH DISTRIBUTION of colorized optical filtering stress film 220, relates to, and has each self-corresponding coloring agent in the polymeric layer above different pixel cells.
The method that forms described colorized optical filtering stress film 220 comprises: at high temperature dispersion dyeing agent in the polymer of molten condition, form the colorized optical filtering stress film material of red (R), green (G) and blue (B), then adopt spin coating proceeding that described colorized optical filtering stress film material is coated on to interlayer dielectric layer surface, make solidified forming after described colorized optical filtering stress film material cooled, form colorized optical filtering stress film 220.
Concrete, in order to make the COLOR COMPOSITION THROUGH DISTRIBUTION of described colorized optical filtering stress film 220 corresponding with pixel cell position, described in need to forming respectively, there is the colorized optical filtering stress film 220 of different colours.Said method can adopted, after described interlayer dielectric layer 210 surfaces form red colorized optical filtering stress film 220, described red colorized optical filtering stress film 220 is carried out to red colorized optical filtering stress film 220 and carry out graphically, only the red units of reserve part pixel cell top; And then adopt said method on other pixel cells, to form green cell and blue cell; Above-mentioned red units, green cell and blue cell form colorized optical filtering stress film 220.
The shrinkage of the material of described colorized optical filtering stress film 220 is greater than 0.5%, make its volume under molten condition be greater than the volume after its cooling curing, and both differ larger, thereby make the colorized optical filtering stress film 220 of cooling rear formation there is tendencies toward shrinkage, thereby be subject to the horizontal tensile stress effect that interlayer dielectric layer 210 applies, accordingly, described interlayer dielectric layer 210 is also subject to the transverse compressive stress effect of described colorized optical filtering stress film 220, and by described interlayer dielectric layer 210, described transverse compressive stress is imposed on to the Semiconductor substrate 200 of below, make the photodiode 201 in described Semiconductor substrate 200 also be subject to action of compressive stress, thereby improve the energy gap of the material of described photodiode 201, and then reduce the dark current of described graphical sensory device, improve the performance of imageing sensor.
The shrinkage of described colorized optical filtering stress film 220, is embodied in the shrinkage of polymer.In the present embodiment, the material of described polymer can be that polymethyl methacrylate, Merlon, poly-the third ethene or polysulfones etc. are transparent and have a polymeric material compared with high shrinkage.The shrinkage of described colorized optical filtering stress film 220 can not be excessive, avoid that stress is excessive to break or problem on deformation owing to being subject in forming the process of described colorized optical filtering stress film 220, affect on the contrary the performance of imageing sensor, it is 30% better that the shrinkage of described polymeric material is less than.
In the present embodiment, the thickness that can also control described colorized optical filtering stress film 220 is 0.5 μ m～3 μ m, and the thickness of described colorized optical filtering stress film 220, more than 0.5 μ m, can produce enough action of compressive stress to photodiode 201; The thickness of described colorized optical filtering stress film 220, below 3 μ m, can avoid excessive colorized optical filtering stress film 220 internal stresss that cause of thickness excessive, and the problems such as buckling deformation occur and affects the performance of imageing sensor.
The colorized optical filtering stress film 220 of the imageing sensor that said method forms can apply compression to photodiode, thereby reduces the dark current of imageing sensor, improves the performance of imageing sensor.
Imageing sensor is easily subject to the pollution of external environment in the course of the work, so need to encapsulate imageing sensor, make imageing sensor under sealed environment, thereby avoid the impact of external environment on imageing sensor, thus the performance and used life of raising imageing sensor.
In embodiments of the invention, provide a kind of encapsulating structure of imageing sensor.
Please refer to Figure 13, described encapsulating structure comprises: imageing sensor, and described imageing sensor comprises: Semiconductor substrate 300, be positioned at the image sensing district 301 in Semiconductor substrate 300; Base plate for packaging 310, described base plate for packaging 310 sizes are corresponding with imageing sensor size; Assisting base plate 320, described assisting base plate 320 is between imageing sensor and base plate for packaging 310, between described assisting base plate 320 and part base plate for packaging 310, parts of images transducer, form annular seal space 302, described image sensing district 301 is positioned at described annular seal space 302; Be positioned at the clamping part 330 of described base plate for packaging 310 sidewalls and Semiconductor substrate 300 sidewall surfaces, 330 pairs of described imageing sensors of described clamping part apply compression; Adhesive layer 340 between described base plate for packaging 310 and imageing sensor.In the present embodiment, described Semiconductor substrate 300 is silicon substrate, in described image sensing district 201, comprises pixel unit array and circuit.
The material of described base plate for packaging 310 can be the transparent materials such as glass, plastics or sapphire, and the size of described base plate for packaging 310 and the size of imageing sensor corresponding.Described base plate for packaging 310 tops can be manufactured with infrared filtering film (IR), are manufactured with optical anti-reflective film (AR) in bottom, or make IR film in top, make AR film in bottom; Thereby increase light transmission and the anti-infrared jamming performance of base plate for packaging 310.The material of described assisting base plate 320 can be also the transparent materials such as glass, plastics or sapphire.Described image sensing district is positioned at described annular seal space 302, can avoid described image sensing district to be polluted.
Described clamping part 330 is organic polymer material, and described polymeric material has certain elasticity, can be poly-the third ethene, polymethyl methacrylate or Merlon etc.Described clamping part 330 is positioned at described base plate for packaging 310 sidewalls and Semiconductor substrate 300 sidewall surfaces, compress the Semiconductor substrate 300 of described imageing sensor, thereby can apply horizontal action of compressive stress to described Semiconductor substrate 100, thereby improve the energy gap of described Semiconductor substrate 100, the difficulty of the electronics generation spontaneous transition in the image sensing district of raising imageing sensor and interior photodiode, and then the dark current of reduction imageing sensor, the performance of raising imageing sensor.
Concrete, the size of described base plate for packaging 310 can be slightly less than the size of Semiconductor substrate 300, thereby makes distance between the clamping part 330 of described base plate for packaging 310 sidewall surfaces be less than the size of Semiconductor substrate 300.When form as described in Figure 13 encapsulating structure time, described clamping part 330 is positioned at Semiconductor substrate 300 sidewall surfaces, thereby make clamping part 330 there is certain deformation, make described clamping part 330 be subject to the action of compressive stress that Semiconductor substrate 300 applies, relative, described Semiconductor substrate 300 is also subject to the action of compressive stress that clamping part 330 applies naturally.In the present embodiment, the size difference between described base plate for packaging 310 and Semiconductor substrate 300 is 500nm～5 μ m, makes in described encapsulating structure, and described clamping part 330 has enough deformation, and Semiconductor substrate 300 is applied to enough stress.Described size difference can not be excessive, otherwise the deformation of described clamping part 330 is excessive, cannot fit tightly the sidewall of described Semiconductor substrate 300.
Described imageing sensor also comprises: be positioned at Semiconductor substrate 300 surfaces, be positioned at the pad of 301 peripheries, image sensing district and be bonded in the metal wire on described pad.Described clamping part 330 can be positioned at the part surface of base plate for packaging 310 and Semiconductor substrate 300, thereby makes the metal wire on described pad can extend to encapsulating structure outside, provides and inputs or outputs port.
Described clamping part 330 is polymeric material; there is good insulation characterisitic, not only can provide action of compressive stress to Semiconductor substrate 300, can also play certain buffer action; further the described imageing sensor of protection, avoids described imageing sensor to sustain damage.
Embodiments of the invention also provide the method for packing of above-mentioned imageing sensor.
Please refer to Figure 14, imageing sensor is provided, described imageing sensor comprises: Semiconductor substrate 300, be positioned at the image sensing district 301 in Semiconductor substrate 300.In described image sensing district 301, comprise pixel unit array, described pixel cell comprises photodiode.In the present embodiment, described Semiconductor substrate 300 has first size d1.
Please refer to Figure 15, base plate for packaging 310 is provided, on described base plate for packaging 310, is formed with assisting base plate 320, described assisting base plate 320 forms groove with base plate for packaging 310, described base plate for packaging 310 sidewall surfaces have clamping part 330, and described clamping part 330 is highly greater than the thickness of base plate for packaging 310.
The material of described base plate for packaging 310 can be the transparent materials such as glass, plastics or sapphire, and the size of described base plate for packaging 310 is corresponding with the size of imageing sensor, described base plate for packaging 310 tops can be manufactured with infrared filtering film (IR), in bottom, be manufactured with optical anti-reflective film (AR), or in top, make IR film, in bottom, make AR film; Thereby increase light transmission and the anti-infrared jamming performance of base plate for packaging 310.The material of described assisting base plate 320 can be also the transparent materials such as glass, plastics or sapphire.Described clamping part 330 is organic polymer material, and described polymeric material has certain elasticity, can be poly-the third ethene, polymethyl methacrylate or Merlon etc.
In the present embodiment, described base plate for packaging 310 has the second size d2, thereby make the spacing between the clamping part 330 of base plate for packaging 310 sidewall surfaces, is d2.Described in the present embodiment, the second size d2 is slightly less than first size d1, and concrete described d1 and the difference between d2 are 500nm～5 μ m.
Please continue to refer to Figure 13, to described clamping part 330 heating, make clamping part 330 softening, bonding described base plate for packaging 310 of while and imageing sensor, make the image sensing district 301 of described imageing sensor be positioned at groove, described imageing sensor, assisting base plate 320 and base plate for packaging 310 form annular seal spaces 302, and described imageing sensor is embedded between the part of described clamping part 330 higher than base plate for packaging 310, make the described clamping part 330 of part be positioned at Semiconductor substrate 300 sidewall surfaces.
Because described clamping part 330 is polymeric material, under heated condition, can occur to soften, although the distance d2 between clamping part 330 is slightly less than the size d1 of Semiconductor substrate 300,, in adhesion process, Semiconductor substrate 300 still can embed between described clamping part 330.To described clamping part 330 heating, the temperature that makes clamping part 330 is 100 ℃～200 ℃, makes described clamping part 330 have certain suppleness, and is unlikely to fusing.
Described imageing sensor also comprises the pad that is positioned at Semiconductor substrate 300 surfaces, is positioned at 301 peripheries, image sensing district; Described base plate for packaging 310 and imageing sensor are carried out bonding before, bonding metal wire on described pad.In adhesion process, between described base plate for packaging 310 and imageing sensor, fill adhesive glue, form adhesive layer 340.In bonding rear cooling procedure, described clamping part 330 solidifies setting, Semiconductor substrate 300 is applied to compression, thereby can improve the energy gap of described Semiconductor substrate 300, reduces the dark current of imageing sensor, improves the performance of imageing sensor.
Although the present invention discloses as above, the present invention is not defined in this.Any those skilled in the art, without departing from the spirit and scope of the present invention, all can make various changes or modifications, so protection scope of the present invention should be as the criterion with claim limited range.
Claims (20)
1. an imageing sensor, is characterized in that, comprising:
Semiconductor substrate;
Be positioned at the some discrete photodiode of described Semiconductor substrate, described photodiode is pressed matrix and is arranged;
Fleet plough groove isolation structure between adjacent photodiode;
Be positioned at the stressor layers of described fleet plough groove isolation structure, described stressor layers applies compression to the photodiode of both sides.
2. imageing sensor according to claim 1, it is characterized in that, in described Semiconductor substrate, comprise some pixel cells, described each pixel cell includes respectively photodiode, the photodiode of described fleet plough groove isolation structure isolation different pixels unit.
3. imageing sensor according to claim 1, is characterized in that, described semiconductor substrate materials is silicon, and the lattice constant of described stressor layers is greater than the lattice constant of silicon.
4. imageing sensor according to claim 1, is characterized in that, the mean atomic weight of described stressor layers is greater than the atomic weight of fleet plough groove isolation structure.
5. according to the imageing sensor described in claim 3 or 4, it is characterized in that, the material of described stressor layers is SiGe, Ge or SiN.
6. according to the imageing sensor described in claim 3 or 4, it is characterized in that between the sidewall of described stressor layers, bottom and Semiconductor substrate, also thering is part fleet plough groove isolation structure.
7. imageing sensor according to claim 6, is characterized in that, the distance between the sidewall of described stressor layers and the Semiconductor substrate of fleet plough groove isolation structure sidewall is
8. imageing sensor according to claim 1, it is characterized in that, in the fleet plough groove isolation structure of described stressor layers between the adjacent photodiode of same a line or in the fleet plough groove isolation structure of described stressor layers between the adjacent photodiode of same row.
9. imageing sensor according to claim 1, is characterized in that, in the fleet plough groove isolation structure of described stressor layers between the adjacent photodiode of same a line, and in the fleet plough groove isolation structure between the adjacent photodiode of same row.
10. a formation method for imageing sensor, is characterized in that, comprising:
Semiconductor substrate is provided;
The photodiode that forms fleet plough groove isolation structure and be positioned at fleet plough groove isolation structure both sides in described Semiconductor substrate;
In fleet plough groove isolation structure between described adjacent photodiode, form groove;
In described groove, form stressor layers, described stressor layers applies compression to the photodiode of both sides.
The formation method of 11. imageing sensors according to claim 10, is characterized in that, after forming described stressor layers, then described in forming, is positioned at the photodiode of fleet plough groove isolation structure both sides.
The formation method of 12. imageing sensors according to claim 10, is characterized in that, described semiconductor substrate materials is silicon, and the lattice constant of described stressor layers is greater than the lattice constant of silicon.
The formation method of 13. imageing sensors according to claim 10, is characterized in that, the mean atomic weight of described stressor layers is greater than the atomic weight of fleet plough groove isolation structure.
The formation method of 14. imageing sensors according to claim 10, is characterized in that, the material of described stressor layers is SiGe, Ge or SiN.
The formation method of 15. imageing sensors according to claim 10, is characterized in that, adopts epitaxy technique to form described stressor layers.
The formation method of 16. imageing sensors according to claim 10, it is characterized in that, the formation method of described groove comprises: at described Semiconductor substrate, photodiode and surface of shallow trench isolation structure, form pattern mask layer, described pattern mask layer exposes the surface of the part fleet plough groove isolation structure between adjacent photodiode; The described pattern mask layer of take is mask, and groove isolation construction described in etching forms groove.
The formation method of 17. imageing sensors according to claim 16, is characterized in that, the sidewall of described groove and bottom have part fleet plough groove isolation structure.
The formation method of 18. imageing sensors according to claim 17, is characterized in that, the distance between the sidewall of described stressor layers and the Semiconductor substrate of fleet plough groove isolation structure sidewall is
The formation method of 19. imageing sensors according to claim 10, it is characterized in that, in the fleet plough groove isolation structure of described groove between the adjacent photodiode of same row or in the fleet plough groove isolation structure of described stressor layers between the adjacent photodiode of same row.
The formation method of 20. imageing sensors according to claim 10, it is characterized in that, in the fleet plough groove isolation structure of described stressor layers between the adjacent photodiode of same a line, and in the fleet plough groove isolation structure between the adjacent photodiode of same row.
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