CN104201184B - Imageing sensor and forming method thereof - Google Patents
Imageing sensor and forming method thereof Download PDFInfo
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- CN104201184B CN104201184B CN201410494216.8A CN201410494216A CN104201184B CN 104201184 B CN104201184 B CN 104201184B CN 201410494216 A CN201410494216 A CN 201410494216A CN 104201184 B CN104201184 B CN 104201184B
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Abstract
A kind of imageing sensor and forming method thereof, described image sensor includes：Semiconductor substrate；Some discrete photodiode in the Semiconductor substrate, the photodiode are arranged in a matrix；Fleet plough groove isolation structure between adjacent photodiode；Stressor layers in the fleet plough groove isolation structure, the stressor layers apply compressive stress to the photodiode of both sides.The dark current of described image sensor reduces.
Description
Technical field
The present invention relates to technical field of semiconductors, more particularly to imageing sensor and forming method thereof.
Background technology
Imageing sensor is the semiconductor device that optical image signal is converted to the signal of telecommunication.Image taking sensor is used as pass
The product of key parts becomes the object of current and following industry concern, attracts numerous manufacturer's inputs.With product category area
Point, image sensor products are broadly divided into charge-coupled image sensor (Charge-coupled Device image
Sensor, abbreviation ccd image sensor), complementary metal oxide imageing sensor (Complementary Metal
Oxide Semiconductor image sensor, abbreviation cmos sensor).Cmos image sensor is a kind of fast-developing
Solid state image sensor, due to the image sensor portion in cmos image sensor and control circuit part be integrated in it is same
It is in chip therefore the small volume of cmos image sensor, low in energy consumption, cheap, compared to traditional CCD (Charged Couple) figure
As sensor has more advantage, popularization is also more easy to.
Fig. 1 is refer to, Fig. 1 is the electrical block diagram of the cmos image sensor of existing 4T structures, including：Transmission
Transistor M1, reset transistor M2, source follow transistor M3, row gating transistor M4.The 4T structure Cs mos image sensor
Operation principle be：Transmission transistor M1 resets for the photogenerated charge of light sensitive diode PD is transferred to floating diffusion region FD
For resetting to floating diffusion region FD, source follows transistor M3 and amplifies defeated for the signal of telecommunication by floating diffusion region FD transistor M2
Go out.Its course of work includes：Opened by reset signal R control reset transistor M2, floating diffusion region FD is set to into high potential；So
Reset transistor M2 is turned off afterwards, and transmission transistor M1 is opened by the control of transmission signal T, by the photoproduction electricity in light sensitive diode PD
Lotus is transferred to floating diffusion region FD, makes floating diffusion region FD produce pressure drop, and this pressure drop follows transistor M3 to be expert at choosing by source
The outfan out outputs of logical transistor M4, the pressure drop of the output are output signal.
There is larger dark current in existing imageing sensor, dark current refers to device under the reverse-biased condition,
The anti-phase DC current produced during without incident illumination, dark current can be mixed in signal code, be caused when imageing sensor works
Signal is disturbed, and causes image sensor performance to decline.
The content of the invention
The problem that the present invention is solved is to provide a kind of imageing sensor and forming method thereof, reduces the dark electricity of imageing sensor
Stream.
To solve the above problems, the present invention provides a kind of imageing sensor, including：Semiconductor substrate；Partly lead positioned at described
Some discrete photodiode in body substrate, the photodiode are arranged in a matrix；Positioned at adjacent photodiode it
Between fleet plough groove isolation structure；Stressor layers in the fleet plough groove isolation structure, photoelectricity two of the stressor layers to both sides
Pole pipe applies compressive stress.
Optionally, some pixel cells are included in the Semiconductor substrate, each pixel cell includes light respectively
Electric diode, the fleet plough groove isolation structure isolate the photodiode of different pixels unit.
Optionally, the semiconductor substrate materials are silicon, the lattice paprmeter of the lattice paprmeter of the stressor layers more than silicon.
Optionally, atomic weight of the mean atomic weight of the stressor layers more than fleet plough groove isolation structure.
Optionally, the material of the stressor layers is SiGe, Ge or SiN.
Optionally, the side wall of the stressor layers, between bottom and Semiconductor substrate also have part fleet plough groove isolation structure.
Optionally, the distance between the side wall of the stressor layers and Semiconductor substrate of fleet plough groove isolation structure side wall are
Optionally, in fleet plough groove isolation structure of the stressor layers between the adjacent photodiode of same a line or
The stressor layers are located in the fleet plough groove isolation structure between the adjacent photodiode of same row.
Optionally, in fleet plough groove isolation structure of the stressor layers between the adjacent photodiode of same a line, with
And in the fleet plough groove isolation structure between the adjacent photodiode of same row.
To solve the above problems, technical scheme also provides a kind of forming method of above-mentioned imageing sensor, bag
Include：Semiconductor substrate is provided；Fleet plough groove isolation structure is formed in the Semiconductor substrate and fleet plough groove isolation structure is located at
The photodiode of both sides；Groove is formed in fleet plough groove isolation structure between the adjacent photodiode；Described recessed
Stressor layers are formed in groove, the stressor layers apply compressive stress to the photodiode of both sides.
Optionally, after the stressor layers are formed, re-form the photoelectricity two for being located at fleet plough groove isolation structure both sides
Pole pipe.
Optionally, the semiconductor substrate materials are silicon, the lattice paprmeter of the lattice paprmeter of the stressor layers more than silicon.
Optionally, atomic weight of the mean atomic weight of the stressor layers more than fleet plough groove isolation structure.
Optionally, the material of the stressor layers is SiGe, Ge or SiN.
Optionally, the stressor layers are formed using epitaxy technique.
Optionally, the forming method of the groove includes：Isolate in the Semiconductor substrate, photodiode and shallow trench
Body structure surface forms Patterned masking layer, and the Patterned masking layer exposes the part shallow trench between adjacent photodiode
The surface of isolation structure；With the Patterned masking layer as mask, the groove isolation construction is etched, form groove.
Optionally, the side wall of the groove and bottom have part fleet plough groove isolation structure.
Optionally, the distance between the side wall of the stressor layers and Semiconductor substrate of fleet plough groove isolation structure side wall are
Optionally, the groove is located in the fleet plough groove isolation structure between the adjacent photodiode of same row or described
Stressor layers are located in the fleet plough groove isolation structure between the adjacent photodiode of same row.
Optionally, in fleet plough groove isolation structure of the stressor layers between the adjacent photodiode of same a line, with
And in the fleet plough groove isolation structure between the adjacent photodiode of same row.
Compared with prior art, technical scheme has advantages below：
A kind of imageing sensor that technical scheme is proposed, described image sensor include some discrete photoelectricity two
Pole pipe, has fleet plough groove isolation structure between adjacent photodiode；There are in the fleet plough groove isolation structure stressor layers, it is right
Photodiode applies compressive stress so that the energy gap increase of photodiode, the electronics that improve in photodiode are sent out
The difficulty of raw spontaneous transition, such that it is able to reduce the dark current of imageing sensor, improves the performance of imageing sensor.Also, institute
Stressor layers are stated in fleet plough groove isolation structure, it is not necessary to occupy the area of extra Semiconductor substrate, so as to not interfere with figure
As the area of sensor.
Further, lattice paprmeter of the material lattice constant of the stressor layers more than silicon, so as to be mismatched due to lattice,
Compressive stress can be applied to photodiode；Original of the mean atomic weight of the material of the stressor layers more than fleet plough groove isolation structure
Son amount, so as to due to action of gravity, also applying action of compressive stress to photodiode, further improve the property of imageing sensor
Energy.
Technical scheme also provides a kind of forming method of above-mentioned imageing sensor, is formed in Semiconductor substrate
After photodiode and the fleet plough groove isolation structure between adjacent photodiode, in the fleet plough groove isolation structure
Groove is formed, then stressor layers is formed in the groove.In the groove formation and fleet plough groove isolation structure, will not be to quasiconductor
Other regions on substrate impact, and the stressor layers formed in the groove also will not additionally occupy Semiconductor substrate
Area.
Description of the drawings
Fig. 1 is the electrical block diagram of the imageing sensor of the prior art of the present invention；
Fig. 2 to Fig. 7 is the structural representation of the imageing sensor and its forming process of one embodiment of the present of invention；
Fig. 8 to Figure 12 is the structural representation of the imageing sensor and its forming process of an alternative embodiment of the invention；
Figure 13 to Figure 15 is the knot of the encapsulating structure and method for packing of the imageing sensor of an alternative embodiment of the invention
Structure schematic diagram.
Specific embodiment
As described in the background art, the dark current of the imageing sensor of prior art is larger, affects the property of imageing sensor
Energy.
Research finds that the dark current of imageing sensor is typically caused by many different factors, mainly includes photoelectricity two
Energy gap of defect, photodiode material in pole pipe etc..For the defect in photodiode is typically noted by ion
Enter technique to cause, cannot typically be completely eliminated.And the energy gap of photodiode material is determined in photodiode
Electronics there is the difficulty of spontaneous transition, energy gap is bigger, and difficulty of the electronics from valence band spontaneous transition to conduction band is bigger, so as to
The difficulty for producing dark current is also larger.
Further study show that, when by compressive stress, energy gap can increase the material of photodiode such that it is able to
Effectively reduce dark current.
Based on above-mentioned discovery, in embodiments of the invention, by applying compressive stress to photodiode, the photoelectricity is improved
The energy gap of diode, and then improve the performance of imageing sensor.
It is understandable to enable the above objects, features and advantages of the present invention to become apparent from, below in conjunction with the accompanying drawings to the present invention
Specific embodiment be described in detail.
Fig. 2 is refer to, is the cross-sectional view of the imageing sensor of one embodiment of the present of invention.
Described image sensor includes：Semiconductor substrate 100；Some detached photoelectricity in the Semiconductor substrate
Diode 101, the photodiode 101 are arranged in a matrix；Fleet plough groove isolation structure between adjacent photodiode
110；Stressor layers in the fleet plough groove isolation structure, the stressor layers apply compressive stress to the photodiode of both sides.
Specifically, the Semiconductor substrate 100 is used to form device architecture or chip circuit, the Semiconductor substrate 100
Material include the semi-conducting materials such as silicon, germanium, SiGe, GaAs, the Semiconductor substrate 100 can be that body material can also
It is composite construction such as silicon-on-insulator.Those skilled in the art can be according to the semiconductor device formed in Semiconductor substrate 100
Part selects the type of the Semiconductor substrate 100, therefore the type of the Semiconductor substrate should not limit the protection model of the present invention
Enclose.
The Semiconductor substrate 100 can also be including substrate and be formed at the outer of substrate surface by epitaxy technique
Prolong layer, the substrate it is thicker, doping content is larger, and defect is a lot；And typically only several microns of the epitaxial layer of substrate surface, mix
Miscellaneous concentration is relatively low, and defect is little.The photodiode 101 is located in the epitaxial layer.Additionally, the Semiconductor substrate 100
It is interior to have well region.The epitaxial layer is the monocrystalline silicon layer of p-type doping.
In the present embodiment, the Semiconductor substrate 100 is the monocrystal silicon of p-type doping, is had in the Semiconductor substrate 100
P-well.
The photodiode 101 can produce photo-generated carrier, i.e. electricity in the case where being excited by extraneous light intensity
Son.The photodiode 101 can be formed by ion implantation technology, and, by controlling the energy of ion implanting and dense
Degree, can control the depth and injection scope of ion implanting, so as to control the depth and thickness of photodiode 101.
In the present embodiment, the photodiode 101 includes n-type doping area, and the dopant ion in the n-type doping area includes
One or more n-type doping ions in phosphonium ion, arsenic ion or antimony ion.The photodiode 101 is imageing sensor
Pixel cell light-sensitive device, for producing the surplus carrier of light.The photodiode 101 is pressed in Semiconductor substrate 100
Arrange according to matrix form.In the present embodiment, two adjacent pictures of the same a line in the pixel unit array in image taking sensor
Plain unit as an example, including two adjacent photodiodes 101.In other embodiments of the invention, the figure
As sensor can also include the photodiode of other quantity.
The Semiconductor substrate 100 includes some pixel cells, picture of the photodiode 101 as imageing sensor
A part for plain unit, the pixel cell also include being used in the Semiconductor substrate 100 around each photodiode 101
The image element circuit of the signal of telecommunication is obtained and exported, including transmission transistor, reset transistor, source follow transistor, row gating crystal
Pipe etc..Other regions of above-mentioned transistor and Semiconductor substrate 100 not shown in Fig. 2.
Isolated by fleet plough groove isolation structure isolation 110 between adjacent photodiode 101, while shallow trench isolation
As the isolation structure between unconnected pixels unit.In other embodiments of the invention, under the fleet plough groove isolation structure 110
Side or both sides can also have well region to isolate adjacent photodiode 101.The material of the fleet plough groove isolation structure 110 is
Material be silicon oxide.
There are in the fleet plough groove isolation structure 110 stressor layers 120.In the present embodiment, the stressor layers 120 are located at described
Shallow trench also has part fleet plough groove isolation structure inside structure 110, between the stressor layers 120 and Semiconductor substrate 100
110, the part fleet plough groove isolation structure 110 can avoid the stressor layers 120 from turning on stressor layers 120.If the stress
Layer 120 directly may cause to turn between adjacent photodiode 101 with the contact of Semiconductor substrate 100, so as to affect image
The performance of sensor.
In the present embodiment, the side wall of the stressor layers 120, the quasiconductor lining of 110 side wall of bottom and fleet plough groove isolation structure
The distance between bottom 100 isSo that the stressor layers 120 can with the Semiconductor substrate 100 every
From.
Lattice paprmeter of the lattice paprmeter of the stressor layers 120 more than silicon such that it is able to which the Semiconductor substrate 100 is applied
Pressurization stress, the compressive stress can be passed by the fleet plough groove isolation structure between the stressor layers 120 and Semiconductor substrate 100
Pass the photodiode 101 of both sides.The compressive stress can improve the energy gap of the photodiode 101, so that
The electronics obtained in the photodiode 101 cannot be by spontaneous transition to conduction band, such that it is able to reduce described image sensor
Dark current, improve imageing sensor performance.The material of the stressor layers 110 can be SiGe, Ge or SiN.Above-mentioned material
Lattice paprmeter be all higher than the lattice paprmeter of silicon, compressive stress can be applied to photodiode.
Also, the stressor layers 120 with inclined side wall, the top width of the stressor layers 120 is more than bottom width
Degree, the mean atomic weight of the stressor layers 120 formed using SiGe, Ge are more than the mean atomic weight of fleet plough groove isolation structure 110, from
And the stressor layers 120 are formed in institute's fleet plough groove isolation structure 110, due to action of gravity, the stressor layers 120 can be to which
The fleet plough groove isolation structure 110 of side wall and its bottom applies action of compressive stress, so as to further improve 120 pairs of light of the stressor layers
The compressive stress that electric diode 101 applies, further reduces the dark current of imageing sensor.In other embodiments of the invention,
Density of the density of the stressor layers 120 more than fleet plough groove isolation structure 110, in the case of volume identical so that formation
The gravity that stressor layers are subject to is more than the gravity suffered by the part fleet plough groove isolation structure for removing, so as to the stressor layers 120 can
Action of compressive stress is applied with the fleet plough groove isolation structure 110 of offside wall and bottom, the material of the stressor layers 120 can also be
SiN。
In the present embodiment, the material of the stressor layers 120 is SiGe.
In other embodiments of the invention, 101 array of photodiode, institute are formed with the Semiconductor substrate 100
Photodiode 101 is stated according to matrix arrangement.With between the adjacent photodiode 101 in a line have fleet plough groove isolation structure
110, also there is between the adjacent photodiode 101 of same row fleet plough groove isolation structure 101.In one embodiment of the present of invention
In, fleet plough groove isolation structure 110 of the stressor layers 120 between the adjacent photodiode 101 of same a line.In the present invention
Another embodiment in, the stressor layers 120 may be located at shallow trench isolation junction between the adjacent photodiode 101 of same row
Structure 110.In another embodiment of the invention, the stressor layers 120 are between the adjacent photodiode 101 of same a line
In fleet plough groove isolation structure 110, and the fleet plough groove isolation structure 110 between the adjacent photodiode 101 of same row
It is interior, can all apply compressive stress to all directions of photodiode 101, so as to improve the forbidden band of the photodiode 101
Width, so as to reduce the dark current of imageing sensor, and then improves the performance of described image sensor.
Fig. 3 is refer to, is the generalized section of the imageing sensor of another embodiment of the present invention.Wherein, two it is adjacent
There is in fleet plough groove isolation structure between photodiode 101 two stressor layers 121, and the side side of the stressor layers 121
Wall and 100 directly contact of Semiconductor substrate, still have the fleet plough groove isolation structure 110 of partial width between two stressor layers 121,
As the isolation structure between stressor layers 121, while as the isolation structure between adjacent photodiode 101.The embodiment
In, directly contact between the stressor layers 121 and Semiconductor substrate 100 reduces the stressor layers 121 and photodiode
The stress that lattice mismatch on the distance between 101, and the stressor layers 121 and 100 interface of Semiconductor substrate is produced can be straight
The photodiode 101 passed in Semiconductor substrate 100 is connect, and masterpiece is answered so as to improve that the photodiode 101 is subject to
With, and then it is more preferable to the minimizing effect of dark current.
The present embodiment additionally provides the forming method of above-mentioned imageing sensor, including：Semiconductor substrate is provided；Described half
Fleet plough groove isolation structure and the photodiode positioned at fleet plough groove isolation structure both sides are formed in conductor substrate；Described adjacent
Groove is formed in fleet plough groove isolation structure between photodiode；Stressor layers, the stressor layers pair are formed in the groove
The photodiode of both sides applies compressive stress.
Refer to Fig. 4, there is provided Semiconductor substrate 100, fleet plough groove isolation structure is formed in the Semiconductor substrate 100
110, and positioned at the photodiode 101 of the fleet plough groove isolation structure both sides.
The Semiconductor substrate 100 is used to form device architecture or chip circuit, the material bag of the Semiconductor substrate 100
The semi-conducting materials such as silicon, germanium, SiGe, GaAs are included, it can also be composite junction that the Semiconductor substrate 100 can be body material
Structure such as silicon-on-insulator.Those skilled in the art can select institute according to the semiconductor device formed in Semiconductor substrate 100
The type of Semiconductor substrate 100 is stated, therefore the type of the Semiconductor substrate should not be limited the scope of the invention.
Additionally, the Semiconductor substrate 100 can also include semiconductor base and be formed at by epitaxy technique partly leading
The epitaxial layer of body substrate surface, and the photodiode, fleet plough groove isolation structure are formed inside epitaxial layer or surface.This
Outward, there is well region in the Semiconductor substrate 100.In the present embodiment, the Semiconductor substrate 100 is the monocrystal silicon of p-type doping,
There is in the Semiconductor substrate 100 p-well.
The forming method of the fleet plough groove isolation structure 110 includes：Pattern mask is formed in the Semiconductor substrate 100
Layer, the Patterned masking layer cover active area, and exposing needs the region to form fleet plough groove isolation structure；With described graphical
Mask layer is Semiconductor substrate 100 described in mask etching, forms groove；Then the Patterned masking layer is removed, in the ditch
Fill insulant in groove, the insulant are filled the full groove and cover the surface of Semiconductor substrate 100；With described half
100 surface of conductor substrate is planarized to the insulant, or is etched back to as stop-layer, is removed and is served as a contrast positioned at quasiconductor
The insulant on 100 surface of bottom, forms the insulation material layer in Semiconductor substrate 100, as fleet plough groove isolation structure
110。
Can be formed using chemical vapor deposition method, flowable chemical deposition process, high-aspect-ratio depositing operation etc.
The insulating dielectric materials, the insulating dielectric materials are silicon oxide.Before the insulating dielectric materials are filled, can also adopt
One layer pad oxide is formed on the trench wall surface with thermal oxidation technology or atom layer deposition process, to repair the groove
The defect of inner wall surface, improves the deposition quality and isolation performance of insulating dielectric materials.
The forming method of the photodiode 101 includes：Mask layer is formed in the Semiconductor substrate 100, it is described
Mask layer defines the positions and dimensions of photoelectric diode 101, with the mask layer as mask, the Semiconductor substrate 100 is entered
Row ion implanting, forms the doped layer contrary with 100 doping type of Semiconductor substrate, as photodiode 101.The present embodiment
In, the Semiconductor substrate 100 is P type substrate, and N-type ion implanting is carried out to Semiconductor substrate 100, forms n-type doping layer, institute
Stating N-type ion includes phosphonium ion, arsenic ion or antimony ion.By the energy and concentration that control ion implanting, ion can be controlled
The depth and injection scope of injection, so as to control the depth and thickness of photodiode 101.
Pass through the fleet plough groove isolation structure 110 between the photodiode 101 of 110 both sides of fleet plough groove isolation structure
Isolation, in the present embodiment, the photodiode 101 of the fleet plough groove isolation structure both sides is positioned at same a line in pel array
Adjacent pixel unit photodiode.The photodiode 101 can be produced in the case where being excited by extraneous light intensity
Raw photo-generated carrier, i.e. electronics.
In other embodiments of the invention, it is also possible to p-type doped layer is formed in the Semiconductor substrate of N-type as photoelectricity
Diode, now, the photo-generated carrier of the photodiode mobile phone is hole.
As the material energy gap of Semiconductor substrate 100 is less, the electrons in the photodiode occur spontaneous
Conduction band is transitted to, when imageing sensor works, dark current is formed, is caused described image sensor output signal inaccurate, from
And affect the performance of imageing sensor.
Fig. 5 is refer to, in the fleet plough groove isolation structure 110 between the adjacent photodiode 101, groove is formed
111。
The forming method of the groove 111 includes：The Semiconductor substrate 100, photodiode 101 and shallow trench every
Patterned masking layer is formed from 110 surface of structure, the Patterned masking layer exposes the portion between adjacent photodiode 101
Divide the surface of fleet plough groove isolation structure 110；With the Patterned masking layer as mask, the groove isolation construction 110, shape are etched
Into groove 111.The groove 111 is formed using dry etch process, and the etching gas that the dry etch process is adopted include
CF4、C2F6Or C3F8Deng fluoro-gas.The groove 111 has sloped sidewall so that the top width of the groove 111 is more than
Bottom width.
In the present embodiment, the side wall of the groove 111 and bottom also have part fleet plough groove isolation structure 110.So as to can
So as to isolate between the stressor layers and photodiode 101 of the follow-up formation in the groove 111.The side wall of the groove 111
With the distance between bottom and Semiconductor substrate 100 it isSo that the follow-up formation in groove 111
Fleet plough groove isolation structure 110 between stressor layers and Semiconductor substrate 100 has enough thickness, plays buffer action.
In other embodiments of the invention, the array of photodiode 101 is formed in Semiconductor substrate 100, it is described
Photodiode 101 is arranged according to matrix form in Semiconductor substrate 100.With the adjacent photodiode 101 in a line it
Between have fleet plough groove isolation structure 110, between the adjacent photodiode 101 of same row also have fleet plough groove isolation structure 101.
In one embodiment of the invention, can be in the fleet plough groove isolation structure 110 between the adjacent photodiode 101 of same a line
It is interior to form the groove 111.In another embodiment of the invention, can be between the adjacent photodiode 101 of same row
The groove 111 is formed in fleet plough groove isolation structure 110.In another embodiment of the invention, also simultaneously in the phase of same a line
In fleet plough groove isolation structure 110 between adjacent photodiode 101, and between the adjacent photodiode 101 of same row
The groove 111 is formed in fleet plough groove isolation structure 110, the stressor layers for subsequently being formed in the groove 111 can be to photoelectricity
The all directions of diode 101 all apply compressive stress, so as to improve the energy gap of the photodiode 101, so as to reduce
The dark current of imageing sensor, and then improve the performance of described image sensor.
Fig. 6 is refer to, in the groove 111 (refer to Fig. 5) and Semiconductor substrate 100 and fleet plough groove isolation structure
110 surfaces form the stress material layer 120a of the full groove 111 of filling.
The stress material layer 120a is formed using epitaxy technique, the lattice paprmeter of the stress material layer 120a is more than silicon
Lattice paprmeter, the follow-up part stress material layer 120a being located in groove 111 can be served as a contrast to the quasiconductor as stressor layers
Bottom 100 applies compressive stress, and the compressive stress can be by the shallow trench isolation junction between the stressor layers and Semiconductor substrate 100
Structure 110 passes to the photodiode 101 of both sides.The compressive stress can improve the energy gap of the photodiode 101,
So that the electronics in the photodiode 101 cannot be by spontaneous transition to conduction band, such that it is able to reduce described image
The dark current of sensor, improves the performance of imageing sensor.The material of the stressor layers 110 can be SiGe, Ge or SiN.
The material of the stress material layer 120a is SiGe.The stress material layer 120a is formed using epitaxy technique.Tool
Body, the reacting gas that the epitaxy technique is adopted includes ge source gas, silicon source gas and H2, wherein, ge source gas is GeH4,
Silicon source gas includes SiH4Or SiH2Cl2, ge source gas, the gas flow of silicon source gas are 1sccm～1000sccm, H2Stream
Measure as 0.1slm～50slm, the temperature of the selective epitaxial process is 500 DEG C～800 DEG C, pressure be 1Torr～
100Torr。
Fig. 2 is refer to, the stress material layer 120a is planarized, removed positioned at photodiode 101, shallow trench
The stress material layer 120a on 110 surface of isolation structure, forms the stressor layers 120.
As the top width that the stressor layers 120 have inclined side wall, the stressor layers 120 is more than bottom width,
Mean atomic weight of the mean atomic weight of the stressor layers 120 formed using SiGe, Ge more than fleet plough groove isolation structure 110, so as to
The stressor layers 120 are formed in institute's fleet plough groove isolation structure 110, due to action of gravity, the stressor layers 120 can be to its side
The fleet plough groove isolation structure 110 of wall and its bottom applies action of compressive stress, so as to further improve the stressor layers 120 to photoelectricity
The compressive stress that diode 101 applies, further reduces the dark current of imageing sensor.In other embodiments of the invention, institute
State the density of the density of stressor layers 120 more than fleet plough groove isolation structure 110, in the case of volume identical so that formation should
The gravity that power layer is subject to more than the gravity suffered by the part fleet plough groove isolation structure for removing, so as to the stressor layers 120 can be with
The fleet plough groove isolation structure 110 of offside wall and bottom applies action of compressive stress, and the material of the stressor layers 120 can also be SiN.
In other embodiments of the invention, it is also possible to after the stressor layers 120 are formed using said method, re-form institute's rheme
In the photodiode 101 of fleet plough groove isolation structure both sides.
Fig. 7 is refer to, in being another enforcement of the invention, the groove 112 formed in the fleet plough groove isolation structure 110
Generalized section.
In the embodiment, in the fleet plough groove isolation structure between two adjacent photodiodes 101, formation two is recessed
Groove 112, and the side side wall of the groove 112 exposes Semiconductor substrate 100, also has part wide between two grooves 112
The fleet plough groove isolation structure 110 of degree, as the isolation structure between the stressor layers being subsequently formed, while as two pole of adjacent photo
Isolation structure between pipe 101.The follow-up stressor layers formed in the groove 112 can be directly connect with Semiconductor substrate 100
Touch, reduce the distance between stressor layers and photodiode 101, and the stressor layers and the crystalline substance on 100 interface of Semiconductor substrate
The stress that lattice mismatch is produced can be directly passed to the photodiode 101 in Semiconductor substrate 100, so as to improve the photoelectricity
The stress that diode 101 is subject to, so it is more preferable to the minimizing effect of dark current.
Fig. 3 is refer to, is the generalized section in groove 112 (refer to Fig. 7) after formation stressor layers 121.It is described
Stressor layers 121 can apply larger stress to photodiode 101, so as to improve the performance of imageing sensor.
The dot structure of imageing sensor itself is all do not have color sensing function, i.e., only sensitive to incident intensity,
It is insensitive to lambda1-wavelength.Therefore, in order to obtain colored perceptive function, the most frequently used way is the picture in imageing sensor
Colored filter (CFA, color filter film) array is covered in pixel array.In one embodiment of the present of invention, by institute
Colored filter is stated, stress is applied to the photodiode of described image sensor.
Fig. 8 and Fig. 9 is refer to, described image sensor includes：Semiconductor substrate 200, the Semiconductor substrate 200 include
Pixel unit array, the pixel cell include photodiode 101；Colorized optical filtering in the pixel unit array should
Power film 220, the colorized optical filtering stress film 220 apply compressive stress to photodiode 101.Fig. 9 is schematic top plan view, and Fig. 8 is
The generalized section of secant AA ' along Fig. 9.For the ease of representing the photodiode 101 in colorized optical filtering stress film 220
The queueing discipline of lower section, in described Fig. 9, colorized optical filtering stress film 220 has certain transparency, to illustrate photoelectricity below
Diode 101.
Therefore not to repeat here for the material of the Semiconductor substrate 200, and in the present embodiment, the Semiconductor substrate 100 is p-type
The monocrystalline substrate of doping.
Pixel cell in the Semiconductor substrate 200 includes photodiode 201 and is located at photodiode 201 weeks
The semiconductor device on side, including：Described image sensor also includes that reset transistor, reset transistor, source follow transistor, OK
Gating transistor.The semiconductor device can be distributed according to the concrete layout designs of imageing sensor, and here is not limited
System.
Fleet plough groove isolation structure can be passed through between the adjacent photodiode 201 or well region is isolated.The photoelectricity
Meeting carrier when by illumination of diode 201, in the present embodiment, the photodiode 201 includes n-type doping layer, the N
Type dopant ion includes phosphonium ion, arsenic ion or antimony ion.
The pixel unit array being arranged in a matrix is formed with the Semiconductor substrate 100, in the present embodiment Fig. 8, Fig. 9 with
And in subsequent drawings, pixel cell is represented with the photodiode 201.In the present embodiment, with 3 × 3 pixel unit array
For example.In other embodiments of the invention, there can be the pixel cell of other quantity in Semiconductor substrate 100, can be with
Set according to the pixel request of imageing sensor.
200 surface of the Semiconductor substrate has interlayer dielectric layer 210, and the material of the interlayer dielectric layer 210 is printing opacity
The higher insulating dielectric materials of rate, it is to avoid when imageing sensor works, cause larger absorption and reduce image to incident illumination
The photosensitivity of sensor.For example, the material of the interlayer dielectric layer 210 can be with silicon oxide, p-doped silicon oxide, boron-doping silicon oxide
Can be using atom layer deposition process, high-density plasma gas-phase deposition, low pressure etc. Deng, the interlayer dielectric layer 210
The methods such as gas ions chemical vapor deposition method are formed.The interlayer dielectric layer 210 can also be multilayer lamination structure, meanwhile,
Also there is in the interlayer dielectric layer 210 pixel cell of metal interconnection structure 211, the metal interconnection structure 211 and lower section
Circuit is constituted, for being controlled to pixel cell.The concrete distribution of the metal interconnection structure 211 and connected mode can be with roots
It is laid out according to the circuit structure design of imageing sensor, this is not restricted.In Fig. 9, the metal interconnection structure is eliminated
211。
The colorized optical filtering stress film 220 is located at 210 surface of the interlayer dielectric layer, the colorized optical filtering stress film 220
It is interior including red (R), green (G) and blue (B) unit, and according to setting, the colour cell position and pixel cell position below
Accurately correspondence is put, enables the pixel cell below different colour cells to receive the incident illumination of different wave length.
The Material shrinkage rate of the colorized optical filtering stress film 220 is more than 0.5% so that in 210 table of the interlayer dielectric layer
After face forms colorized optical filtering stress film 220, the colorized optical filtering stress film 220 is shunk under cooling or room ambient conditions,
Horizontal compressive stress is produced to the interlayer dielectric layer 210 of lower section, the horizontal compressive stress can pass through the interlayer dielectric layer
210 photodiodes 201 for being passed down to lower section, make the photodiode 201 also be acted on by transverse compressive stress, make
The energy gap for obtaining 201 material of the photodiode becomes big so that the electron transition quantity in the photodiode 201 subtracts
It is few, such that it is able to reduce the dark current of imageing sensor, and then improve the performance of imageing sensor.
The material of the colorized optical filtering stress film 220 includes：Stain and polymer, the polymer is used as film forming substrate
Material, stain are dispersed in polymeric layer, make polymeric layer have color.The stain includes red (R), green (G) and indigo plant
(B) three kinds, it is related to according to the COLOR COMPOSITION THROUGH DISTRIBUTION of colorized optical filtering stress film 220, in the polymeric layer above different pixel cells
With each self-corresponding stain.
The material of the polymer can be transparent for polymethyl methacrylate, Merlon, polystyrene or polysulfones etc.
Polymer.Above-mentioned polymer has higher shrinkage factor, and volume is accumulated less than forming precursor after forming, so, it is situated between positioned at interlayer
The colorized optical filtering stress film 220 of the molded solidification on 210 surface of matter layer can be to interlayer dielectric layer 210 below and lower section
Photodiode 201 produces horizontal action of compressive stress, and reduces the dark current of imageing sensor.The receipts of the polymeric material
When shrinkage is more than 1%, can photodiode be applied enough compressive stress to reduce dark current.But, the polymeric material
The shrinkage factor of material can not be excessive, it is to avoid the colorized optical filtering stress film 220 of formation ruptures or deforms and affect on the contrary imageing sensor
Performance, the shrinkage factor of the polymeric material is preferable less than 30%.
The stress intensity of the colorized optical filtering stress film 220 is also related to its thickness, the colorized optical filtering stress film 220
Thickness is bigger, and the stress that the material layer of other side applies is bigger.In one embodiment of the invention, the colorized optical filtering stress film
220 thickness is 0.5 μm～3 μm, and the thickness of the colorized optical filtering stress film 220, can be to photodiode more than 0.5 μm
201 produce enough action of compressive stress；The thickness of the colorized optical filtering stress film 220 can avoid thickness excessive below 3 μm
Cause 220 internal stress of colorized optical filtering stress film excessive, and the performance of imageing sensor is affected the problems such as generation buckling deformation.
In the present embodiment, the metal interconnection structure 211 in the interlayer dielectric layer 210 can also be heavier using atomic weight
Metal is formed.Compared with the material more than prior art using Al as metal interconnection structure 211, in the present embodiment, can adopt
Atomic weight forms the metal interconnection structure 211 more than the metal material of the atomic weight of Al.The metal material can be Cu, Ta
Or Ti etc..Compared with prior art, in due to the present embodiment, the atomic weight of the metal material is bigger, under gravity, energy
Enough in vertical direction, bigger action of compressive stress is applied to the Semiconductor substrate 100 below interlayer dielectric layer 210, so as to carry
The energy gap of the high photodiode 201, and then the dark current of imageing sensor is reduced, improve the property of image sensor
Energy.
The forming method of the imageing sensor shown in a kind of Fig. 8 and Fig. 9 is also provided in the present embodiment, including：Offer is partly led
Body substrate, the Semiconductor substrate include including photodiode in pixel cell, the pixel cell；In the pixel cell
Upper formation colorized optical filtering stress film, the colorized optical filtering stress film apply compressive stress to photodiode.
Refer to Figure 10 and Figure 11, there is provided Semiconductor substrate 200, the Semiconductor substrate 200 include pixel unit array,
The pixel cell includes photodiode 201.Figure 10 is the schematic top plan view of the Semiconductor substrate 200, and Figure 11 is along figure
The generalized section of secant BB ' in 10.
The forming method of the material and photodiode 201 of the Semiconductor substrate 100 refer to previous embodiment,
This does not repeat.In the present embodiment, the pixel cell includes photodiode 201 and is located at 201 periphery of photodiode
Semiconductor device, including：Described image sensor also includes that reset transistor, reset transistor, source follow transistor, row choosing
Logical transistor.The semiconductor device can be distributed according to the concrete layout designs of imageing sensor, and this is not restricted.
In the present embodiment, pixel cell is represented with the photodiode 201.
Figure 12 is refer to, and interlayer dielectric layer 210 is formed in the Semiconductor substrate 200 and 201 surface of photodiode
And the metal interconnection structure 211 in the interlayer dielectric layer 210.
The material of the interlayer dielectric layer 210 can be the dielectric materials such as silicon oxide, boron-doping silicon oxide, p-doped silicon oxide
Material, can adopt atom layer deposition process, high-density plasma gas-phase deposition, low-voltage plasma body chemical vapor phase growing
The methods such as technique are formed.In the present embodiment, the material of the interlayer dielectric layer 210 is silicon oxide.
Metal interconnection structure 211 is formed in the interlayer dielectric layer 210, the metal interconnection structure 211 includes interconnection
Through hole and metal interconnecting wires, in the interlayer dielectric layer 210 can form the metal by Damascus technics and mutually link
Structure 211.Through hole and groove are formed in the dielectric layer 210, then filler metal material is gone forward side by side in the through hole and groove
Row planarization, forms the metal interconnection structure 211.
The material of the metal interconnection structure 211 is the larger metal material of atomic weight.In prior art, the metal is mutual
The material for linking structure 211 generally adopts Al, and cost is relatively low, and electrical efficiency is higher.In the present embodiment, the metal interconnection structure
Atomic weight of the atomic weight of 211 material more than Al, can be Cu, Ta or Ti etc..Compared with prior art, due to the present embodiment
In, the atomic weight of the metal material is bigger, under gravity, can in vertical direction, below interlayer dielectric layer 210
Semiconductor substrate 100 apply bigger action of compressive stress, so as to improve the energy gap of the photodiode 201, and then
The dark current of imageing sensor is reduced, the performance of image sensor is improved.
Referring now to Fig. 8, colorized optical filtering stress film 220, the colorized optical filtering are formed on the interlayer dielectric layer 210
Stress film 220 applies compressive stress to photodiode 201.
Including red (R), green (G) and blue (B) unit in the colorized optical filtering stress film 220, and according to setting, the colour
Cell position is accurately corresponding with pixel cell position below, the pixel cell below different colour cells is received
The incident illumination of different wave length.
The material of the colorized optical filtering stress film 220 includes：Stain and polymer, the polymer is used as film forming substrate
Material, stain are dispersed in polymeric layer, make polymeric layer have color.The stain includes red (R), green (G) and indigo plant
(B) three kinds, it is related to according to the COLOR COMPOSITION THROUGH DISTRIBUTION of colorized optical filtering stress film 220, in the polymeric layer above different pixel cells
With each self-corresponding stain.
The method for forming the colorized optical filtering stress film 220 includes：In the polymer of molten condition, dispersion contaminates at high temperature
Toner, forms the colorized optical filtering stress membrane material of red (R), green (G) and blue (B), then filters the colour using spin coating proceeding
Photostress membrane material is coated on inter-level dielectric layer surface, makes the colorized optical filtering stress membrane material cooling solidify afterwards shaping, is formed
Colorized optical filtering stress film 220.
Specifically, in order that the COLOR COMPOSITION THROUGH DISTRIBUTION of the colorized optical filtering stress film 220 is corresponding with pixel cell position, need to divide
Xing Cheng not the colorized optical filtering stress film 220 with different colours.Said method can be being adopted, in the interlayer dielectric layer
After 210 surfaces form red color filter stress film 220, red color is carried out to the red color filter stress film 220
Optical filtering stress film 220 is patterned, only the red units above member-retaining portion pixel cell；Then existed using said method again
Green cell and blue cell are formed on other pixel cells；Above-mentioned red units, green cell and blue cell constitute colored
Optical filtering stress film 220.
The shrinkage factor of the material of the colorized optical filtering stress film 220 is more than 0.5% so that its volume in the molten state
More than the volume after its cooling and solidifying, and both differences are larger, so that the colorized optical filtering stress film 220 formed after cooling has
There is tendencies toward shrinkage, so as to the horizontal tensile stress effect for being subject to interlayer dielectric layer 210 to apply, accordingly, the interlayer dielectric layer
210 are also acted on by the transverse compressive stress of the colorized optical filtering stress film 220, and pass through the interlayer dielectric layer 210 by institute
The Semiconductor substrate 200 that transverse compressive stress is applied to lower section is stated, the photodiode 201 in the Semiconductor substrate 200 is made
By action of compressive stress, so as to improve the energy gap of the material of the photodiode 201, and then the graphical sensory is reduced
The dark current of device, improves the performance of imageing sensor.
The shrinkage factor of the colorized optical filtering stress film 220, is embodied in the shrinkage factor of polymer.It is in the present embodiment, described poly-
The material of compound can be that polymethyl methacrylate, Merlon, polystyrene or polysulfones etc. are transparent and with compared with high convergency
The polymeric material of rate.The shrinkage factor of the colorized optical filtering stress film 220 can not be excessive, it is to avoid is forming the colorized optical filtering
Due to being stressed the excessive performance that rupture or problem on deformation occur, imageing sensor is affected on the contrary during stress film 220,
The shrinkage factor of the polymeric material is preferable less than 30%.
In the present embodiment, the thickness that can also control the colorized optical filtering stress film 220 is 0.5 μm～3 μm, the colour
The thickness of optical filtering stress film 220 can produce enough action of compressive stress to photodiode 201 more than 0.5 μm；The coloured silk
The thickness of color optical filtering stress film 220 can avoid that thickness is excessive to cause 220 internal stress of colorized optical filtering stress film below 3 μm
It is excessive, and the performance of imageing sensor is affected the problems such as generation buckling deformation.
The colorized optical filtering stress film 220 of the imageing sensor that said method is formed can apply pressure to photodiode should
Power, so as to reduce the dark current of imageing sensor, improves the performance of imageing sensor.
Imageing sensor is easily polluted by external environment in the course of the work, so needing to carry out imageing sensor
Encapsulation, makes imageing sensor under sealed environment, so as to avoid impact of the external environment to imageing sensor, so as to improve figure
As the performance and used life of sensor.
In embodiments of the invention, there is provided a kind of encapsulating structure of imageing sensor.
Figure 13 is refer to, the encapsulating structure includes：Imageing sensor, described image sensor include：Semiconductor substrate
300th, the image sensing area 301 in Semiconductor substrate 300；Base plate for packaging 310,310 size of the base plate for packaging and image
Sensor size correspondence；Assisting base plate 320, the assisting base plate 320 are located between imageing sensor and base plate for packaging 310, institute
State composition annular seal space 302, described image induction zone between assisting base plate 320 and partial encapsulation substrate 310, parts of images sensor
301 are located in the annular seal space 302；Positioned at 310 side wall of the base plate for packaging and the clamping part of 300 sidewall surfaces of Semiconductor substrate
330, the clamping part 330 applies compressive stress to described image sensor；Positioned at the base plate for packaging 310 and imageing sensor it
Between adhesive layer 340.In the present embodiment, the Semiconductor substrate 300 is silicon substrate, includes picture in described image induction zone 201
Plain cell array and circuit.
The material of the base plate for packaging 310 can be the transparent materials such as glass, plastics or sapphire, and the encapsulation base
The size of plate 310 is corresponding with the size of imageing sensor.Infrared filtering film can have been made at the top of the base plate for packaging 310
(IR), making in bottom has optical anti-reflective film (AR), or makes IR films in top, makes AR films in bottom；So as to increase envelope
The light transmission and anti-infrared jamming performance of dress substrate 310.The material of the assisting base plate 320 can also be glass, plastics or indigo plant
The transparent materials such as gem.Described image induction zone is located in the annular seal space 302, and described image induction zone can be avoided to be subject to dirt
Dye.
The clamping part 330 is organic polymer material, and the polymeric material has certain elasticity, can be poly- third
Ethylene, polymethyl methacrylate or Merlon etc..The clamping part 330 is located at 310 side wall of the base plate for packaging and partly leads
300 sidewall surfaces of body substrate, compress the Semiconductor substrate 300 of described image sensor, so as to meeting is to the Semiconductor substrate 100
Apply horizontal action of compressive stress, so as to improve the energy gap of the Semiconductor substrate 100, improve the image of imageing sensor
There is the difficulty of spontaneous transition in the electronics in induction zone and interior photodiode, and then reduce the dark current of imageing sensor,
Improve the performance of imageing sensor.
Specifically, the size of the base plate for packaging 310 can be slightly less than the size of Semiconductor substrate 300, so that position
Size of the distance between the clamping part 330 in 310 sidewall surfaces of the base plate for packaging less than Semiconductor substrate 300.Work as formation
During encapsulating structure as described in Figure 13, the clamping part 330 is located at 300 sidewall surfaces of Semiconductor substrate, so that clamping part
330 have certain deformation so that the clamping part 330 is subject to the action of compressive stress that Semiconductor substrate 300 applies, relative,
The Semiconductor substrate 300 is also subject to the action of compressive stress that clamping part 330 applies naturally.In the present embodiment, the base plate for packaging
Size difference between 310 and Semiconductor substrate 300 is 500nm～5 μm so that in the encapsulating structure, the clamping part 330
With enough deformation, enough stress is applied to Semiconductor substrate 300.The size difference can not be excessive, otherwise described folder
The deformation for holding portion 330 is excessive, it is impossible to be brought into close contact the side wall of the Semiconductor substrate 300.
Described image sensor also includes：Positioned at 300 surface of Semiconductor substrate, positioned at the weldering of 301 periphery of image sensing area
Disk and the metal wire being bonded on the pad.The clamping part 330 may be located at base plate for packaging 310 and Semiconductor substrate
300 part surface, so that the metal wire on the pad can be extended to outside encapsulating structure, there is provided input is exported
Port.
The clamping part 330 is polymeric material, with preferable insulation characterisitic, can not only be to Semiconductor substrate 300
Action of compressive stress is provided, be may also operate as certain buffer action, further protected described image sensor, it is to avoid described image
Sensor sustains damage.
Embodiments of the invention also provide the method for packing of above-mentioned imageing sensor.
Refer to Figure 14, there is provided imageing sensor, described image sensor include：Semiconductor substrate 300, positioned at quasiconductor
Image sensing area 301 on substrate 300.Include pixel unit array in described image induction zone 301, the pixel cell includes
Photodiode.In the present embodiment, the Semiconductor substrate 300 has first size d1.
Refer to Figure 15, there is provided base plate for packaging 310, on the base plate for packaging 310, be formed with assisting base plate 320, it is described auxiliary
Substrate 320 is helped to constitute groove with base plate for packaging 310,310 sidewall surfaces of the base plate for packaging have clamping part 330, the clamping
Thickness of 330 height of portion more than base plate for packaging 310.
The material of the base plate for packaging 310 can be the transparent materials such as glass, plastics or sapphire, and the encapsulation base
The size of plate 310 is corresponding with the size of imageing sensor, and infrared filtering film can have been made at the top of the base plate for packaging 310
(IR), making in bottom has optical anti-reflective film (AR), or makes IR films in top, makes AR films in bottom；So as to increase envelope
The light transmission and anti-infrared jamming performance of dress substrate 310.The material of the assisting base plate 320 can also be glass, plastics or indigo plant
The transparent materials such as gem.The clamping part 330 is organic polymer material, and the polymeric material has certain elasticity, can
Think polystyrene, polymethyl methacrylate or Merlon etc..
In the present embodiment, the base plate for packaging 310 has the second size d2, so that being located at 310 side wall of base plate for packaging
Spacing between the clamping part 330 on surface is d2.Described in the present embodiment, the second size d2 is slightly less than first size d1, specifically
Difference between the d1 and d2 is 500nm～5 μm.
Please continue to refer to Figure 13, the clamping part 330 is heated, soften clamping part 330, while the bonding encapsulation base
Plate 310 and imageing sensor, make the image sensing area 301 of described image sensor be located in groove, described image sensor, auxiliary
Help substrate 320 and base plate for packaging 310 to constitute annular seal space 302, and described image sensor is embedded in the clamping part 330 higher than encapsulation
Between the part of substrate 310, the part clamping part 330 is made to be located at 300 sidewall surfaces of Semiconductor substrate.
Due to the clamping part 330 be polymeric material, can occur in a heated state soften, although clamping part 330 it
Between size d1 that Semiconductor substrate 300 is slightly less than apart from d2, but, in adhesion process, Semiconductor substrate 300 still can
Between the embedded clamping part 330.The clamping part 330 is heated, the temperature for making clamping part 330 is 100 DEG C～200 DEG C, is made
The clamping part 330 has certain suppleness, and is unlikely to fusing.
Described image sensor is also included positioned at 300 surface of Semiconductor substrate, positioned at the weldering of 301 periphery of image sensing area
Disk；Before bonding with imageing sensor to the base plate for packaging 310, the bond wire line on the pad.In bonding
During, adhesive glue is filled between the base plate for packaging 310 and imageing sensor, adhesive layer 340 is formed.Cool down after bonding
During, the solidification setting of the clamping part 330 applies compressive stress to Semiconductor substrate 300, such that it is able to improve the quasiconductor
The energy gap of substrate 300, reduces the dark current of imageing sensor, improves the performance of imageing sensor.
Although present disclosure is as above, the present invention is not limited to this.Any those skilled in the art, without departing from this
In the spirit and scope of invention, can make various changes or modifications, therefore protection scope of the present invention should be with claim institute
The scope of restriction is defined.
Claims (20)
1. a kind of imageing sensor, it is characterised in that include：
Semiconductor substrate；
Some discrete photodiode in the Semiconductor substrate, the photodiode are arranged in a matrix；
Fleet plough groove isolation structure between adjacent photodiode；
Two stressor layers in the fleet plough groove isolation structure, the stressor layers apply pressure to the photodiode of both sides should
Power, the side side wall of the stressor layers and the Semiconductor substrate directly contact, still have part between two stressor layers
The fleet plough groove isolation structure of width, the stressor layers are located at the top of the fleet plough groove isolation structure, below the stressor layers
Also there is the fleet plough groove isolation structure of segment thickness.
2. imageing sensor according to claim 1, it is characterised in that include some pixel lists in the Semiconductor substrate
Unit, each pixel cell include photodiode respectively, the fleet plough groove isolation structure isolation different pixels unit
Photodiode.
3. imageing sensor according to claim 1, it is characterised in that the semiconductor substrate materials are silicon, it is described should
Lattice paprmeter of the lattice paprmeter of power layer more than silicon.
4. imageing sensor according to claim 1, it is characterised in that the mean atomic weight of the stressor layers is more than shallow ridges
The molecular weight of recess isolating structure.
5. the imageing sensor according to claim 3 or 4, it is characterised in that the material of the stressor layers be SiGe, Ge or
SiN。
6. the imageing sensor according to claim 3 or 4, it is characterised in that the side wall of the stressor layers, bottom and partly lead
Also there is between body substrate part fleet plough groove isolation structure.
7. imageing sensor according to claim 6, it is characterised in that the side wall of the stressor layers and shallow trench isolation junction
The distance between Semiconductor substrate of structure side wall is
8. imageing sensor according to claim 1, it is characterised in that adjacent photo of the stressor layers positioned at same a line
In fleet plough groove isolation structure between diode or the stressor layers be located at it is shallow between the adjacent photodiode of same row
In groove isolation construction.
9. imageing sensor according to claim 1, it is characterised in that adjacent photo of the stressor layers positioned at same a line
In fleet plough groove isolation structure between diode, and the shallow trench isolation junction between the adjacent photodiode of same row
In structure.
10. a kind of forming method of imageing sensor, it is characterised in that include：
Semiconductor substrate is provided；
Fleet plough groove isolation structure and two pole of photoelectricity positioned at fleet plough groove isolation structure both sides are formed in the Semiconductor substrate
Pipe；
Two grooves, the side side wall of the groove are formed in fleet plough groove isolation structure between the adjacent photodiode
The Semiconductor substrate is exposed, also there is between two grooves the fleet plough groove isolation structure of partial width；
Stressor layers are formed in the groove, the stressor layers apply compressive stress, the stressor layers to the photodiode of both sides
At the top of the fleet plough groove isolation structure, also there is below the stressor layers fleet plough groove isolation structure of segment thickness.
The forming method of 11. imageing sensors according to claim 10, it is characterised in that formed the stressor layers it
Afterwards, re-form the photodiode for being located at fleet plough groove isolation structure both sides.
The forming method of 12. imageing sensors according to claim 10, it is characterised in that the semiconductor substrate materials
For silicon, the lattice paprmeter of the lattice paprmeter of the stressor layers more than silicon.
The forming method of 13. imageing sensors according to claim 10, it is characterised in that the average original of the stressor layers
Molecular weight of the son amount more than fleet plough groove isolation structure.
The forming method of 14. imageing sensors according to claim 10, it is characterised in that the material of the stressor layers is
SiGe, Ge or SiN.
The forming method of 15. imageing sensors according to claim 10, it is characterised in that institute is formed using epitaxy technique
State stressor layers.
The forming method of 16. imageing sensors according to claim 10, it is characterised in that the forming method of the groove
Including：Patterned masking layer, the figure are formed in the Semiconductor substrate, photodiode and surface of shallow trench isolation structure
Change the surface that mask layer exposes the part fleet plough groove isolation structure between adjacent photodiode；With the Patterned masking layer
For mask, the groove isolation construction is etched, form groove.
The forming method of 17. imageing sensors according to claim 16, it is characterised in that the side wall of the groove and bottom
Portion has part fleet plough groove isolation structure.
The forming method of 18. imageing sensors according to claim 17, it is characterised in that the side wall of the stressor layers with
The distance between Semiconductor substrate of fleet plough groove isolation structure side wall is
The forming method of 19. imageing sensors according to claim 10, it is characterised in that the groove is located at same row
Adjacent photodiode between fleet plough groove isolation structure in or the stressor layers be located at the adjacent photodiode of same row
Between fleet plough groove isolation structure in.
The forming method of 20. imageing sensors according to claim 10, it is characterised in that the stressor layers are located at same
In fleet plough groove isolation structure between capable adjacent photodiode, and between the adjacent photodiode of same row
In fleet plough groove isolation structure.
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| CN108892395A (en) * | 2018-09-11 | 2018-11-27 | 中国工程物理研究院激光聚变研究中心 | A kind of fused quartz element restorative procedure and fused quartz element |
| CN110211978B (en) * | 2019-05-28 | 2021-05-18 | 上海集成电路研发中心有限公司 | CMOS image sensor structure |
| CN112335050A (en) * | 2019-11-28 | 2021-02-05 | 深圳市大疆创新科技有限公司 | Photosensitive device, manufacturing method and device thereof, silicon substrate and manufacturing method and device thereof |
| CN113035980B (en) * | 2021-03-10 | 2022-04-15 | 联合微电子中心有限责任公司 | Near-infrared image sensor and preparation method thereof |
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| CN102456576A (en) * | 2010-10-29 | 2012-05-16 | 中国科学院微电子研究所 | Stress insulating groove semiconductor device and forming method thereof |
| CN102738190A (en) * | 2012-07-03 | 2012-10-17 | 上海华力微电子有限公司 | Cmos image sensor and manufacturing method thereof |
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| CN102456576A (en) * | 2010-10-29 | 2012-05-16 | 中国科学院微电子研究所 | Stress insulating groove semiconductor device and forming method thereof |
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