CN104185795A - 用于jtag系统的延期调度的方法和装置 - Google Patents

用于jtag系统的延期调度的方法和装置 Download PDF

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Publication number
CN104185795A
CN104185795A CN201280070890.2A CN201280070890A CN104185795A CN 104185795 A CN104185795 A CN 104185795A CN 201280070890 A CN201280070890 A CN 201280070890A CN 104185795 A CN104185795 A CN 104185795A
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CN
China
Prior art keywords
test
tisa
sut
vector
instruction
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CN201280070890.2A
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English (en)
Chinese (zh)
Inventor
米歇尔·波特兰
布拉德福德·范特鲁尤伦
苏雷什·戈雅尔
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Alcatel Lucent SAS
Alcatel Optical Networks Israel Ltd
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Alcatel Optical Networks Israel Ltd
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Application filed by Alcatel Optical Networks Israel Ltd filed Critical Alcatel Optical Networks Israel Ltd
Publication of CN104185795A publication Critical patent/CN104185795A/zh
Pending legal-status Critical Current

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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/3185Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318558Addressing or selecting of subparts of the device under test
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/3183Generation of test inputs, e.g. test vectors, patterns or sequences
    • G01R31/318314Tools, e.g. program interfaces, test suite, test bench, simulation hardware, test compiler, test program languages
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/3185Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318558Addressing or selecting of subparts of the device under test
    • G01R31/318563Multiple simultaneous testing of subparts
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/56External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor

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  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
CN201280070890.2A 2011-12-28 2012-10-25 用于jtag系统的延期调度的方法和装置 Pending CN104185795A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/338,581 US8719649B2 (en) 2009-03-04 2011-12-28 Method and apparatus for deferred scheduling for JTAG systems
PCT/US2012/061824 WO2013101336A1 (en) 2011-12-28 2012-10-25 Method and apparatus for deferred scheduling for jtag systems

Publications (1)

Publication Number Publication Date
CN104185795A true CN104185795A (zh) 2014-12-03

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN201280070890.2A Pending CN104185795A (zh) 2011-12-28 2012-10-25 用于jtag系统的延期调度的方法和装置

Country Status (6)

Country Link
US (1) US8719649B2 (enExample)
EP (1) EP2798360A1 (enExample)
JP (1) JP2015507743A (enExample)
KR (1) KR101545109B1 (enExample)
CN (1) CN104185795A (enExample)
WO (1) WO2013101336A1 (enExample)

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CN108896903A (zh) * 2018-06-13 2018-11-27 天津大学 基于逻辑加密的逐次验证型安全扫描链装置和方法
CN113312735A (zh) * 2021-05-19 2021-08-27 太原理工大学 一种城市供水管网dma分区方法
CN114860571A (zh) * 2022-03-30 2022-08-05 阿里云计算有限公司 数据处理方法、工具、存储介质以及计算机终端

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CN109697058B (zh) * 2018-12-11 2022-05-17 中国航空工业集团公司西安航空计算技术研究所 一种适用于嵌入式系统的网络建模方法、装置及存储介质
US11302412B2 (en) * 2019-06-03 2022-04-12 Advantest Corporation Systems and methods for simulated device testing using a memory-based communication protocol
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KR102583916B1 (ko) * 2021-10-26 2023-09-26 연세대학교 산학협력단 저전력 테스트를 위한 스캔 상관관계 기반 스캔 클러스터 리오더링 방법 및 장치
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108896903A (zh) * 2018-06-13 2018-11-27 天津大学 基于逻辑加密的逐次验证型安全扫描链装置和方法
CN113312735A (zh) * 2021-05-19 2021-08-27 太原理工大学 一种城市供水管网dma分区方法
CN114860571A (zh) * 2022-03-30 2022-08-05 阿里云计算有限公司 数据处理方法、工具、存储介质以及计算机终端
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Also Published As

Publication number Publication date
JP2015507743A (ja) 2015-03-12
KR101545109B1 (ko) 2015-08-17
WO2013101336A1 (en) 2013-07-04
US8719649B2 (en) 2014-05-06
US20120117436A1 (en) 2012-05-10
EP2798360A1 (en) 2014-11-05
KR20140136424A (ko) 2014-11-28

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Application publication date: 20141203