CN104134609B - The semiconductor devices and its manufacture method of multilayer epitaxial super junction framework - Google Patents

The semiconductor devices and its manufacture method of multilayer epitaxial super junction framework Download PDF

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CN104134609B
CN104134609B CN201310164000.0A CN201310164000A CN104134609B CN 104134609 B CN104134609 B CN 104134609B CN 201310164000 A CN201310164000 A CN 201310164000A CN 104134609 B CN104134609 B CN 104134609B
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epitaxial layer
normal
layer
doping type
epitaxial
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CN104134609A (en
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俞义长
孙晓儒
殷允超
周宏伟
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Wuxi China Resources Microelectronics Co Ltd
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Wuxi China Resources Microelectronics Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/265Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/266Bombardment with radiation with high-energy radiation producing ion implantation using masks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/063Reduced surface field [RESURF] pn-junction structures
    • H01L29/0634Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures

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  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
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Abstract

The invention discloses a kind of semiconductor devices of multilayer epitaxial super junction framework, the epitaxial layer of the first doping type on substrate and the substrate including the first doping type, the column structure of the second doping type is longitudinally formed with the epitaxial layer, the epitaxial layer includes the buffering epitaxial layer and normal epitaxial layer of multilayer, from the buffering epitaxial layer up, the buffering epitaxial layer and normal epitaxy layer thickness gradually successively decrease.The invention also discloses a kind of manufacture method of the semiconductor devices of multilayer epitaxial super junction framework.The present invention effectively reduces the extension number of plies, reduces production cycle and cost.And by controlling Impurity Distribution and corresponding junction depth, the stored charge of body diode, shortens reverse recovery time during reducing device work.

Description

The semiconductor devices and its manufacture method of multilayer epitaxial super junction framework
Technical field
The present invention relates to the manufacture method of semiconductor devices, a kind of more particularly to multilayer epitaxial super junction framework is partly led Body device, further relates to a kind of manufacture method of the semiconductor devices of multilayer epitaxial super junction framework.
Background technology
Current super junction(Super Junction)Framework mainly includes two major classes, a class be carry out after extension photoetching and Implanting p-type impurity, multiple process repeatedly obtain the superjunction post that NP interlocks;Another kind of once grown outside the N-type for needing thickness Prolong layer, then etching obtains deep trench in the epitaxial layer, P-type silicon is formed in groove, so as to obtain similar super-junction structures.
For foregoing former super-junction structures, it is internal to have an individual diodes, because storage is very high reverse extensive Send a telegram in reply lotus Qrr, causes the reverse recovery characteristic of device very poor.And the extension number of plies of the structure is relatively more, thus cause device Manufacturing cost is higher, the production cycle is longer.
The content of the invention
Based on this, in order to which the device reverse recovery characteristic for solving traditional multilayer epitaxial super-junction structures is poor, be manufactured into The problem of this is higher, the production cycle is longer, it is necessary to which a kind of manufacture of the semiconductor devices of multilayer epitaxial super junction framework is provided Method.
A kind of manufacture method of the semiconductor devices of multilayer epitaxial super junction framework, comprises the following steps:Step one, in crystalline substance The buffering epitaxial layer of the doping type of Grown first of the first round doping type;Step 2, is noted by photoetching and ion Enter the doped region that the second doping type is formed in the buffering epitaxial layer;Step 3, removes the light on the buffering epitaxial layer Photoresist and it is described buffering epitaxial layer on the doping type of growth regulation one normal epitaxial layer;Step 4, is noted by photoetching and ion Enter the doped region that the second doping type is formed in the normal epitaxial layer of previous step;Step 5, removes previous step formation Photoresist and on the normal epitaxial layer of previous step one layer of first doping type of regrowth normal epitaxial layer;Institute is repeated several times Step 4 and step 5 are stated, is obtained in the normal epitaxial layer of the doping type of multilayer first, each layer of the normal epitaxial layer Be formed with the doped region of second doping type, from the buffering epitaxial layer up, the buffering epitaxial layer and normal extension Thickness degree gradually successively decreases;The Implantation Energy of the ion implanting is 50 kiloelectron-volts~350 kiloelectron-volts;Step 6, from institute State one layer of farthest thermally grown field oxide of normal epi-layer surface of substrate, and pick into making all second doping types Doped region gone here and there in the vertical with the doped region of the second doping type in adjacent epitaxial layer together with the pillared super junction knot of shape Structure.
In one of the embodiments, first doping type is N-type, and second doping type is p-type;Described The substrate of one doping type is N+ substrates, and the injection ion of the ion implanting is boron ion.
In one of the embodiments, the normal epitaxial layer is of five storeys altogether, and the ion implanting is included outside to the buffering Prolong the once injection of layer and first 4 layers of the normal epitaxial layer each is once injected.
In one of the embodiments, the step of thermally grown field oxide is grown with boiler tube.
It there is a need to and a kind of semiconductor devices of multilayer epitaxial super junction framework is provided.
A kind of semiconductor devices of multilayer epitaxial super junction framework, including on the substrate and the substrate of the first doping type The first doping type epitaxial layer, the column structure of the second doping type is longitudinally formed with the epitaxial layer, The epitaxial layer includes the buffering epitaxial layer and normal epitaxial layer of multilayer, from the buffering epitaxial layer up, outside the buffering Prolong layer and normal epitaxy layer thickness gradually successively decreases.
In one of the embodiments, the normal epitaxial layer is of five storeys altogether.
In one of the embodiments, first doping type is N-type, and second doping type is p-type;Described The substrate of one doping type is N+ substrates.
In one of the embodiments, the Doped ions of the column structure of second doping type are boron ion.
The semiconductor devices manufactured using the manufacture method of the semiconductor devices of above-mentioned multilayer epitaxial super junction framework, due to Boron ion is injected using high-energy, by controlling Impurity Distribution and corresponding junction depth, body diode during reducing device work Stored charge, shortens reverse recovery time.Because what is injected is the boron of high-energy, foreign ion injection depth is bigger, adds The epitaxial layer structure gradually successively decreased using thickness, therefore the extension number of plies is effectively reduced, reduce production cycle and cost.
Brief description of the drawings
Fig. 1 is the flow chart of the manufacture method of the semiconductor devices of multilayer epitaxial super junction framework in an embodiment;
Fig. 2A~Fig. 2 G are manufacturing for the device of the manufacture method manufacture of the semiconductor devices of multilayer epitaxial super junction framework During diagrammatic cross-section.
Embodiment
It is understandable to enable objects, features and advantages of the present invention to become apparent, below in conjunction with the accompanying drawings to the tool of the present invention Body embodiment is described in detail.
Fig. 1 is the flow chart of the manufacture method of the semiconductor devices of multilayer epitaxial super junction framework in an embodiment, including The following steps:
S11, in the buffering epitaxial layer of the N+ Grown N-types of wafer.
Fig. 2A is referred to, N-type buffering epitaxial layer 120 one layer thicker is grown on N+ substrates 110.
S12, forms the doped region of p-type by photoetching and ion implanting in buffering epitaxial layer.
Fig. 2 B are referred to, the doped region 122 by ion implanting formation p-type after doped region window is lithographically formed(Photoresist Do not show in fig. 2b).It should be understood that actual device needs to form multiple doped regions 122 in N-type buffering epitaxial layer 120, And two shown in more than Fig. 2 B.
S13, removes the photoresist on buffering epitaxial layer and the first normal epitaxial layer of N-type is grown on buffering epitaxial layer.
S14, forms the doped region of p-type by photoetching and ion implanting in the first normal epitaxial layer.
Fig. 2 C are referred to, is lithographically formed after doped region window and is formed by ion implanting in the first normal epitaxial layer 130 The doped region 132 of multiple p-types(Photoresist does not show in fig. 2 c).Each doped region 132 is all located at one of previous epitaxial layer The surface of doped region 122.
S15, removes photoresist and the second normal epitaxial layer of N-type is grown on the first normal epitaxial layer.
The photoresist on the first normal epitaxial layer 130 is removed, the of N-type is then grown on the first normal epitaxial layer 130 Two normal epitaxial layers 140.
S16, forms the doped region of p-type by photoetching and ion implanting in the second normal epitaxial layer.
Fig. 2 D are referred to, is lithographically formed after doped region window and is formed by ion implanting in the second normal epitaxial layer 140 The doped region 142 of multiple p-types(Photoresist does not show in figure 2d).Each doped region 142 is all located at one of previous epitaxial layer The surface of doped region 132.
S17, removes photoresist and the 3rd normal epitaxial layer of N-type is grown on the second normal epitaxial layer.
The photoresist on the second normal epitaxial layer 140 is removed, the of N-type is then grown on the second normal epitaxial layer 140 Three normal epitaxial layers 150.
S18, forms the doped region of p-type by photoetching and ion implanting in the 3rd normal epitaxial layer.
Fig. 2 E are referred to, is lithographically formed after doped region window and is formed by ion implanting in the 3rd normal epitaxial layer 150 The doped region 152 of multiple p-types(Photoresist does not show in Fig. 2 E).Each doped region 152 is all located at one of previous epitaxial layer The surface of doped region 142.
S19, removes photoresist and the 4th normal epitaxial layer of N-type is grown on the 3rd normal epitaxial layer.
The photoresist on the 3rd normal epitaxial layer 150 is removed, the of N-type is then grown on the 3rd normal epitaxial layer 150 Four normal epitaxial layers 160.
S20, forms the doped region of p-type by photoetching and ion implanting in the 4th normal epitaxial layer.
Fig. 2 F are referred to, is lithographically formed after doped region window and is formed by ion implanting in the 4th normal epitaxial layer 160 The doped region 162 of multiple p-types(Photoresist does not show in fig. 2f).Each doped region 162 is all located at one of previous epitaxial layer The surface of doped region 152.
S21, in the 4th normal thermally grown field oxide of epi-layer surface, and picks mixing into the p-type for making adjacent epitaxial layer The pillared super-junction structures of shape together are gone here and there in miscellaneous area in the vertical.
In the present embodiment, it is that field oxide 180 is grown with furnace tube high temperature, picks into rear each epitaxial layer in the vertical One is conspired to create after each doped region diffusion of same straight line, multiple P posts 145 are formed, Fig. 2 G are shown in progradation Diagrammatic cross-section.First long field oxide carries out high temperature propulsion again, can just play certain propulsion to doped region during long field oxide Effect, at the same after the completion of easily controllable field oxygen in doped region forward step impurity diffusion.Extension can also effectively be protected Foreign ion in layer will not produce spilling in high temperature progradation.
In the present embodiment, the ion of injection is boron ion in each doped region, and 5 doped region photoetching and ion are carried out altogether Injection, forms 5 layers of normal epitaxial layer.It should be understood that the number of times of the epitaxial layer number of plies and ion implanting needs to reach with device Pressure voltage it is relevant, for the different device of pressure voltage, the epitaxial layer number of plies and ion implanting number of times can also be different.
Fig. 2 G are referred to, buffering epitaxial layer 120, the first normal epitaxial layer 130, the second normal epitaxial layer the 140, the 3rd are normal Epitaxial layer 150, the 4th normal epitaxial layer 160, the 5th normal epitaxial layer 170, thickness gradually successively decreases from the bottom up, while boron ion Injection uses high Implantation Energy(It is 50 kiloelectron-volts~350 kiloelectron-volts in the present embodiment).Because boron ion uses high-energy Injection, by controlling Impurity Distribution and corresponding junction depth, the stored charge of body diode during reducing device work makes reversely extensive The multiple time shortens.Because what is injected is the boron of high-energy, foreign ion injection depth is bigger, adds what is gradually successively decreased using thickness Epitaxial layer structure, therefore the extension number of plies is effectively reduced, reduce production cycle and cost.And the non-full super junction of the present invention Structure ensure that the smooth pattern of P posts, still remain the low-power consumption advantage of super-junction structures.
In one of the embodiments, the injection of doped region boron ion is adapted to successively decreasing for epitaxy layer thickness using corresponding Energy, demand is met with the pattern for ensuring P posts.
The manufacture method of the semiconductor devices of multilayer epitaxial super junction framework, both can be used for manufacture insulated gate bipolar brilliant Body pipe(IGBT), can be used for manufacturing metal oxide semiconductor field effect tube(MOSFET)Etc. other types of device.With Manufacture exemplified by IGBT, the P-body directly contacted with P posts 145 is formed on the top that epitaxial layer is additionally included in after the completion of above-mentioned steps Area, forms the source region of N-type in P-body areas, and in epi-layer surface formation gate oxide, polycrystalline is formed on gate oxide surface Silicon gate, in multi-crystal silicon grid side formation side wall, forms the dielectric layer of covering polysilicon gate, boron phosphorus is formed on dielectric layer The step of silica glass layer, metal level for forming covering borophosphosilicate glass layer and being contacted with P-body areas.
The present invention also provides a kind of semiconductor devices of multilayer epitaxial super junction framework, includes the substrate of the first doping type With the epitaxial layer of the first doping type on substrate, epitaxial layer includes buffering epitaxial layer and the normal epitaxial layer of multilayer, From buffering epitaxial layer up, the thickness of each layer of epitaxial layer gradually successively decreases.The second doping class is longitudinally formed with epitaxial layer The column structure of type.
In one of the embodiments, the first doping type is N-type, and the second doping type is p-type.First doping type Substrate is N+ substrates, and the column structure of super junction is P posts, and the Doped ions of P posts are boron ion.Normal epitaxial layer is of five storeys altogether, can With understanding, the number of times of the epitaxial layer number of plies and ion implanting needs the pressure voltage reached relevant with device, for pressure voltage not Same device, the epitaxial layer number of plies and ion implanting number of times can also be different.Implantation Energy of the boron ion in injection in P posts For 50 kiloelectron-volts~350 kiloelectron-volts.
The semiconductor devices of above-mentioned multilayer epitaxial super junction framework both can be insulated gate bipolar transistor(IGBT), It can be metal oxide semiconductor field effect tube(MOSFET)Etc. other types of device.
Embodiment described above only expresses the several embodiments of the present invention, and it describes more specific and detailed, but simultaneously Therefore the limitation to the scope of the claims of the present invention can not be interpreted as.It should be pointed out that for one of ordinary skill in the art For, without departing from the inventive concept of the premise, various modifications and improvements can be made, these belong to the guarantor of the present invention Protect scope.Therefore, the protection domain of patent of the present invention should be determined by the appended claims.

Claims (8)

1. a kind of manufacture method of the semiconductor devices of multilayer epitaxial super junction framework, comprises the following steps:
Step one, wafer the first doping type the doping type of Grown first buffering epitaxial layer;
Step 2, forms the doped region of multiple second doping types by photoetching and ion implanting in the buffering epitaxial layer;
Step 3, removes the photoresist on the buffering epitaxial layer and the doping type of growth regulation one on the buffering epitaxial layer Normal epitaxial layer;
Step 4, forms the doping of the second doping type by photoetching and ion implanting in the normal epitaxial layer of previous step Area;
Step 5, remove previous step formation photoresist and on the normal epitaxial layer of previous step regrowth one layer first mix The normal epitaxial layer of miscellany type;
The step 4 and step 5 is repeated several times, the normal epitaxial layer of the doping type of multilayer first, the normal extension is obtained The doped region of second doping type is each formed with each layer of layer, from the buffering epitaxial layer up, outside the buffering Prolong layer and normal epitaxy layer thickness gradually successively decreases;The Implantation Energy of the ion implanting is 50 kiloelectron-volts~350 kiloelectron-volts;
Step 6, in the one layer normal epi-layer surface thermally grown field oxide farthest from the substrate, and is picked into making to own Together with the doped region of second doping type is gone here and there in the vertical with the doped region of the second doping type in adjacent epitaxial layer The pillared super-junction structures of shape.
2. the manufacture method of the semiconductor devices of multilayer epitaxial super junction framework according to claim 1, it is characterised in that First doping type is N-type, and second doping type is p-type;The substrate of first doping type is N+ substrates, institute The injection ion for stating ion implanting is boron ion.
3. the manufacture method of the semiconductor devices of multilayer epitaxial super junction framework according to claim 1, it is characterised in that The normal epitaxial layer is of five storeys altogether, and the ion implanting includes the once injection to the buffering epitaxial layer and to described normal The each of first 4 layers of epitaxial layer is once injected.
4. the manufacture method of the semiconductor devices of multilayer epitaxial super junction framework according to claim 1, it is characterised in that The step of thermally grown field oxide, is grown with boiler tube.
5. a kind of semiconductor devices of multilayer epitaxial super junction framework, including on the substrate and the substrate of the first doping type The column knot of multiple second doping types is longitudinally formed with the epitaxial layer of first doping type, the epitaxial layer Structure, the epitaxial layer includes buffering epitaxial layer and the normal epitaxial layer of multilayer, it is characterised in that past from the buffering epitaxial layer Upper, described buffering epitaxial layer and normal epitaxy layer thickness gradually successively decrease.
6. the semiconductor devices of multilayer epitaxial super junction framework according to claim 5, it is characterised in that described normal outer Prolong layer to be of five storeys altogether.
7. the semiconductor devices of the multilayer epitaxial super junction framework according to claim 5 or 6, it is characterised in that described One doping type is N-type, and second doping type is p-type;The substrate of first doping type is N+ substrates.
8. the semiconductor devices of multilayer epitaxial super junction framework according to claim 7, it is characterised in that described second mixes The Doped ions of the column structure of miscellany type are boron ion.
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CN107123689A (en) * 2017-03-22 2017-09-01 中航(重庆)微电子有限公司 A kind of high pressure PIN diode structure and preparation method thereof
CN114122115B (en) * 2022-01-28 2022-04-29 绍兴中芯集成电路制造股份有限公司 Super junction semiconductor device and forming method thereof
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