CN101989553B - Method for manufacturing lengthwise region of supernode MOS - Google Patents
Method for manufacturing lengthwise region of supernode MOS Download PDFInfo
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- CN101989553B CN101989553B CN200910057736A CN200910057736A CN101989553B CN 101989553 B CN101989553 B CN 101989553B CN 200910057736 A CN200910057736 A CN 200910057736A CN 200910057736 A CN200910057736 A CN 200910057736A CN 101989553 B CN101989553 B CN 101989553B
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Abstract
The invention discloses a method for manufacturing a lengthwise region of a super junction MOS, and the lengthwise region is manufactured by two steps as follows: manufacturing a lengthwise region with a certain height by adopting a primary or repeated epitaxial growth technology and an ion implantation technology; and manufacturing a lengthwise region with the rest height by adopting an epitaxial growth technology, a groove etching technology and an epitaxial depositing and filling technology, thus finally forming a lengthwise region with a complete height. On the basis, polysilicon gate structures can be manufactured, and plasma implantation and ion source implantation are carried out to finally form a super junction MOS device. The method in the invention has high process efficiency, and no holes exist in the lengthwise region.
Description
Technical field
The present invention relates to a kind of production process of semiconductor device, particularly relate to a kind of manufacturing process of super junction metal-oxide-semiconductor.
Background technology
Super junction (Superjunction) metal-oxide-semiconductor is a kind of novel high-voltage MOS pipe, claims CoolMOS again.Its advantage is the conducting resistance that in high pressure resistant work, can provide than the little one magnitude of conventional high-tension metal-oxide-semiconductor; Except that low on-resistance, also has the advantage of low-power consumption and low switch time.
See also Fig. 1, this is the basic structure sketch map of super junction metal-oxide-semiconductor.Growth has one deck light dope N type epitaxial loayer 11 on heavy doping N type silicon substrate 10, has vertically district 12 of P type in the epitaxial loayer 11.This P type supports epitaxial loayer 11 upper surfaces in vertical district 12, assigns in the epitaxial loayer 11 or the interface of epitaxial loayers 11 and silicon substrate 10.Silicon dioxide layer 13 and polysilicon layer 14 are arranged on the epitaxial loayer 11.P type body injection region 15 and injection region, heavy doping N type source 16 are arranged in the epitaxial loayer 11 of silicon dioxide layer 13 both sides.The grid G of this super junction metal-oxide-semiconductor device is a polysilicon layer 14, and gate oxide is a silicon dioxide layer 13, and source S is injection region, source 16, and drain D is a silicon substrate 10.
The characteristic of super junction metal-oxide-semiconductor device is to have introduced from the upper surface of epitaxial loayer 11 at N type epitaxial loayer 11 vertically to distinguish 12 to the P type that extends below.The P type vertically bottom in district 12 can extend in the epitaxial loayer 11, also may extend to silicon substrate 10 upper surfaces.This structure cause metal-oxide-semiconductor under the high-pressure work state except producing longitudinally the longitudinal electric field from the source S to the drain D, also have the transverse electric field of horizontal PN district appearance.Causing electric field on horizontal and vertical, can evenly distribute under the acting in conjunction of two electric fields, making high withstand voltage metal-oxide-semiconductor on the low-resistivity epitaxial loayer thereby be implemented in.
Super junction metal-oxide-semiconductor shown in Figure 1 is based on PMOS's, and Fig. 2 has provided a kind of super junction metal-oxide-semiconductor basic structure based on NMOS, and the doping type of its each several part (P type, N type) is opposite fully with Fig. 1.
The difficult point of super junction metal-oxide-semiconductor device manufacturing is to form thicker epitaxial loayer and wherein higher vertical district.Typical super junction metal-oxide-semiconductor device is from high voltage bearing needs, and vertically the district highly is at least 30-40 μ m, and the epitaxial loayer height is more than or equal to vertically distinguishing height.
See also Fig. 3, this is a kind of manufacturing approach of vertical district of existing super junction metal-oxide-semiconductor, is example with the super junction metal-oxide-semiconductor based on PMOS, comprises the steps:
The 1st step, growth one deck N type epitaxial loayer 11 on N type silicon substrate 10.
The 2nd step, adopt photoetching process, in N type epitaxial loayer 11, define ion and inject window region 110, all the other zones are covered by photoresist 20, and the position that ion injects window 110 is exactly the vertically position in district of P type.
The 3rd step, inject window 110 at ion and adopt ion implantation technology to inject p type impurity, form vertically district 12 of P type.
Repeat the above-mentioned 1-3 step, until the thickness that reaches predetermined epitaxial loayer 11.At this moment, the P type has vertically also reached predetermined height in district 12.
A present grown epitaxial layer+ion injects vertical district that can only form 5-6 μ m height, and repeatedly the final epitaxial loayer that forms super junction metal-oxide-semiconductor device desired thickness of repeated growth epitaxial loayer+ion injection ability reaches wherein vertical district of desired height.So this method complex process, the process time is very long, and processing cost is very high.
See also Fig. 4, this is the manufacturing approach in vertical district of another kind of existing super junction metal-oxide-semiconductor, is example with the super junction metal-oxide-semiconductor based on PMOS still, comprises the steps:
The 1st ' step, growth one deck N type epitaxial loayer 11 on N type silicon substrate 10, the thickness of this epitaxial loayer 11 is exactly the thickness of the epitaxial loayer of super junction metal-oxide-semiconductor requirement on devices.
The 2nd ' step, adopt photoetching and etching technics, in N type epitaxial loayer 11, etch groove 110, the position of groove 110 is exactly the vertically position in district of P type, and the degree of depth of groove 110 is exactly the vertically height in district of P type.The bottom of groove 110 can also can arrive the upper surface of silicon substrate 10 in epitaxial loayer 11.
The 3rd ' step, in groove 110, adopt epitaxy technique deposit p type single crystal silicon, groove 110 is filled, form vertically district 12 of P type.
A present epitaxial growth+etching groove+epitaxial diposition is filled can fill the groove of 40-50 μ m, but the gash depth that can accomplish not have the cavity filling is below 30 μ m.When vertical district of height more than the super junction metal-oxide-semiconductor requirement on devices 30 μ m, adopting has empty 120 to have (as shown in Figure 4) in the formed vertical district 12 of this technology.
Summary of the invention
Technical problem to be solved by this invention provides a kind of manufacturing approach of vertical district of super junction metal-oxide-semiconductor, and the technology of this method is simple, does not have the cavity in formed vertical district.
For solving the problems of the technologies described above, the manufacturing approach in vertical district of super junction metal-oxide-semiconductor of the present invention comprises the steps:
In the 1st step, adopt epitaxy technique, growth one deck epitaxial loayer on silicon substrate;
The 2nd step, adopt photoetching process, on epitaxial loayer, define ion and inject window, it is exactly the vertically position in district of P type that ion injects position of window;
The 3rd step, adopt ion implantation technology, inject the window implanted dopant at ion, form vertically district;
Repeat the above-mentioned 1-3 step, reach thickness a ' until epitaxial loayer 11, total epitaxial loayer that form this moment is first epitaxial loayer, and total vertical district of formation is the first vertical district;
First vertically distinguishes the bottom at the epitaxial loayer lower surface or more;
The 4th step, adopt epitaxy technique, growth one deck second epitaxial loayer on silicon substrate, the thickness of second epitaxial loayer is b, a '+b is the thickness of the epitaxial loayer of super junction metal-oxide-semiconductor requirement on devices;
The 5th step, adopt photoetching and etching technics, in second epitaxial loayer, etch groove, the position of groove is exactly the vertically position in district of P type, and the bottom of groove is at first vertical district's upper surface or more;
In the 6th step, employing epitaxy technique deposit monocrystalline silicon in groove with trench fill, forms second and vertically distinguishes, and remaining first vertical total height of distinguishing is the height in vertical district of super junction metal-oxide-semiconductor requirement on devices behind second vertical district and the 5th step etching groove.
The manufacturing approach in vertical district of super junction metal-oxide-semiconductor of the present invention is in conjunction with ion injection and two kinds of technologies of trench fill.Compare with repeated using epitaxial growth+ion implantation technology purely, improved that technical process is too complicated, long defective of process time, promoted process efficiency.Compare with epitaxial growth+etching groove+epitaxial diposition fill process purely, overcome the defective that has the cavity in the filler.
Description of drawings
Fig. 1 is a kind of basic structure sketch map of the super junction metal-oxide-semiconductor based on PMOS;
Fig. 2 is a kind of basic structure sketch map of the super junction metal-oxide-semiconductor based on NMOS;
Fig. 3 is each step sketch map of manufacturing approach in a kind of vertical district of existing super junction metal-oxide-semiconductor;
Fig. 4 is each step sketch map of manufacturing approach in vertical district of another kind of existing super junction metal-oxide-semiconductor;
Fig. 5 is the part steps sketch map of manufacturing approach in vertical district of super junction metal-oxide-semiconductor of the present invention.
Description of reference numerals among the figure:
10 is silicon substrate; 11 is epitaxial loayer; 110 are ion injection window; 111 is groove; 12 is vertically to distinguish; 120 is the cavity; 13 is silicon dioxide; 14 is polysilicon; 15 is the body injection region; 16 is the injection region, source; 20 is photoresist; 21 is second epitaxial loayer; 210 is groove; 22 be second vertically the district.
Embodiment
Super junction metal-oxide-semiconductor device with based on PMOS is an example, and the manufacturing approach of super junction metal-oxide-semiconductor of the present invention comprises the steps:
In the 1st step, adopt epitaxy technique, growth one deck light dope N type epitaxial loayer 11 on heavy doping N type silicon substrate 10.Epitaxy technique is a deposited monocrystalline layer on single crystalline substrate, adopts chemical vapor deposition (CVD) equipment usually.
The 2nd step, adopt photoetching process, on epitaxial loayer 11, define ion and inject window 110, the position that ion injects window 110 is exactly the position in the vertical district of P type of super junction metal-oxide-semiconductor device.What is called defines ion and injects window 110, is meant behind coating photoresist 20 on the silicon chip, removes the photoresist 20 that ion injects window 110 tops through steps such as overexposure, developments, keeps all the other regional photoresists 20.
The 3rd step, adopt ion implantation technology, inject window 110 at ion and inject p type impurity, form vertically district 12 of P type, carry out annealing process then.
Repeat the above-mentioned 1-3 step, reach thickness a ' until epitaxial loayer 11, total epitaxial loayer that form this moment is first epitaxial loayer 11.Total vertical district that form this moment is first vertical district 12, highly is a.First vertically the bottom in district 12 at first epitaxial loayer, 11 lower surfaces or more, i.e. a≤a '.
The above-mentioned 1-3 step please refer to shown in Figure 3, below the 4-6 step see also Fig. 5.
The 4th step, adopt epitaxy technique, the thickness of growth one deck second epitaxial loayer (light dope N type) 21, the second epitaxial loayers 21 is b on first epitaxial loayer 11, a '+b is the thickness of the epitaxial loayer of super junction metal-oxide-semiconductor requirement on devices.
The 5th step; Adopt photoetching and etching technics; In second epitaxial loayer 21, etch groove 210; The position of groove 210 is exactly the vertically position in district of P type, the bottom of groove 210 or at the vertical upper surface (as shown in Figure 5) in district 12 of a P type, perhaps a P type vertically district's 12 upper surfaces more below (a P type that promptly can etch away part is district 12 vertically).
The 6th step; In groove 210, adopt epitaxy technique deposit p type single crystal silicon; Groove 210 is filled; The p type single crystal silicon of institute's deposit forms vertical district 22 of 22, the two P types, the vertical district of the 2nd P type and the vertical district 21 of a remaining P type in groove 210 total height is the height in the vertical district of P type of super junction metal-oxide-semiconductor requirement on devices.
At this moment; Vertical district of super junction metal-oxide-semiconductor device has made completion; Then deposit layer of silicon dioxide layer is as gate oxide on second epitaxial loayer 21, and deposit one deck polysilicon layer on silicon dioxide layer etches polysilicon gate with photoetching and etching technics more again.Then adopt ion implantation technology to form P type body injection region in the polysilicon gate both sides.Adopt ion implantation technology to form injection region, N type source at last in the polysilicon gate both sides.Polysilicon grating structure in this step and the CMOS technology is made, the P trap injects, the source injection technology is identical.Finally (vertically) all forms N type, super junction metal-oxide-semiconductor device that the P type is alternate in silicon chip surface (laterally) and body.
Said method 1-3 is in the step, and repeatedly epitaxially grown epitaxial loayer 11 has identical N type impurity concentration, and it is whole uniformly that such first epitaxial loayer 11 just becomes an impurity concentration.Said method is in the 4th step; Epitaxially grown second epitaxial loayer 21 has the N type impurity concentration identical with first epitaxial loayer 11; It is whole uniformly that such second epitaxial loayer 21 and first epitaxial loayer 11 just become an impurity concentration, constituted the complete epitaxial loayer of super junction metal-oxide-semiconductor device.
Said method 1-3 is in the step, and repeatedly the P type of ion injection vertically has identical p type impurity concentration in district 12, and such P type vertically district 12 just becomes impurity concentration integral body uniformly.Said method is in the 4th step; The 2nd P type of epitaxial diposition vertically district 22 has and the vertical identical p type impurity concentration in district 12 of a P type; Such the 2nd P type vertically district's the 22 and the one P type vertically just becomes impurity concentration integral body uniformly in district 12, and the complete P type that has constituted super junction metal-oxide-semiconductor device is vertically distinguished.
For the super junction metal-oxide-semiconductor device that arbitrary height is vertically distinguished, the present invention considers earlier to adopt epitaxial growth+etching groove+epitaxial diposition fill process manufacturing vertically to distinguish in principle.If this technology is not enough to form complete and does not have vertical district in cavity, then after deducting the maximum height that this technology can form the empty vertical district of nothing, by one or many epitaxial growth+ion implantation technology manufacturing.
In the actual production; The present invention carries out pre-determined number (being confirmed by result of calculation) epitaxial growth+ion implantation technology earlier and makes vertical district of part height; Adopt epitaxial growth+etching groove+epitaxial diposition fill process to make vertical district of remainder height again, finally form vertical district of full height.
If vertical district of super junction metal-oxide-semiconductor requirement on devices highly is x; Δ a is vertical district height that epitaxial growth+ion implantation technology can be made; B is that vertical district in a nothing cavity that epitaxial growth+etching groove+the epitaxial diposition fill process can be made highly establishes, and c is for adopting the number of times of epitaxial growth+ion implantation technology.Then for any x, when x≤b, the vertical district that then adopts epitaxial growth+etching groove+epitaxial diposition fill process to make the super junction metal-oxide-semiconductor.As x＞b, then c=(x-b)/Δ a then rounds up when c has decimal, is 3.01 c=4 that round up as calculating c.For example, x=46 μ m, Δ a=5 μ m, b=30 μ m, then c=4.When actual manufacturing has the super junction metal-oxide-semiconductor device in 46 μ m vertical district highly; Adopt first of 4 epitaxial growths+ion implantation technology manufacturing 16-20 μ m height vertically to distinguish earlier, adopt an epitaxial growth+etching groove+epitaxial diposition fill process to make second of 26-30 μ m height again and vertically distinguish.
Super junction metal-oxide-semiconductor device in the foregoing description is based on PMOS, and the present invention can be applied to make the vertical district based on the super junction metal-oxide-semiconductor of NMOS equally, and difference only is that each several part doping type (P type, N type) is exchanged.
Claims (6)
1. the manufacturing approach in vertical district of a super junction metal-oxide-semiconductor is characterized in that, comprises the steps:
In the 1st step, adopt epitaxy technique, growth one deck epitaxial loayer on silicon substrate;
The 2nd step, adopt photoetching process, on epitaxial loayer, define ion and inject window, it is exactly the position in vertical district of super junction metal-oxide-semiconductor that ion injects position of window;
The 3rd step, adopt ion implantation technology, inject the window implanted dopant at ion, form vertically district;
Repeat the above-mentioned 1-3 step, reach thickness a ' until epitaxial loayer, the epitaxial loayer summation that form this moment is first epitaxial loayer, and vertical district summation of formation is the first vertical district;
The bottom in first vertical district is at the epitaxial loayer lower surface or more;
The 4th step, adopt epitaxy technique, growth one deck second epitaxial loayer on silicon substrate, the thickness of second epitaxial loayer is b, a '+b is the thickness of the epitaxial loayer of super junction metal-oxide-semiconductor requirement on devices;
The 5th step, adopt photoetching and etching technics, in second epitaxial loayer, etch groove, the position of groove is exactly the position of vertically distinguishing, and the bottom of groove is at first vertical district's upper surface or more;
In the 6th step, employing epitaxy technique deposit monocrystalline silicon in groove with trench fill, forms second and vertically distinguishes, and remaining first vertical total height of distinguishing is the height in vertical district of super junction metal-oxide-semiconductor requirement on devices behind second vertical district and the 5th step etching groove.
2. the manufacturing approach in vertical district of super junction metal-oxide-semiconductor according to claim 1 is characterized in that,
Said method 1-3 is in the step, the silicon substrate doped N-type of attaching most importance to; The epitaxial loayer of repeated growth is light dope N type, and finally forming first epitaxial loayer is light dope N type; Repeat the ion injection and be p type impurity, the vertical district that repeats to form is the P type and vertically distinguishes, and finally forms first vertical district and is the P type;
Said method 4-6 is in the step, and second epitaxial loayer is a light dope N type; Fill p type single crystal silicon in the groove, form second vertical district and be the P type.
3. the manufacturing approach in vertical district of super junction metal-oxide-semiconductor according to claim 1 is characterized in that,
Said method 1-3 is in the step, and silicon substrate is a heavy doping P type; The epitaxial loayer of repeated growth is the doped with P type, and finally forming first epitaxial loayer is the doped with P type; Repeat the ion injection and be N type impurity, the vertical district that repeats to form is the N type and vertically distinguishes, and finally forms first vertical district and is the N type;
Said method 4-6 is in the step, and second epitaxial loayer is the doped with P type; Fill n type single crystal silicon in the groove, form second vertical district and be the N type.
4. according to the manufacturing approach in vertical district of claim 2 or 3 described super junction metal-oxide-semiconductors, it is characterized in that,
Said method 1-3 is in the step, and the epitaxial loayer of repeated growth all has identical dopant type and impurity concentration, finally forms first epitaxial loayer;
Said method is in the 4th step, and second epitaxial loayer has identical dopant type and impurity concentration with first epitaxial loayer, constitutes the complete epitaxial loayer of super junction metal-oxide-semiconductor jointly.
5. according to the manufacturing approach in vertical district of claim 2 or 3 described super junction metal-oxide-semiconductors, it is characterized in that,
Said method 1-3 is in the step, and the vertical district that repeats ion injection formation has identical dopant type and impurity concentration, finally forms first and vertically distinguishes;
Said method is in the 6th step, and second vertical district and first vertically district has identical dopant type and impurity concentration, has constituted the complete vertical district of super junction metal-oxide-semiconductor jointly.
6. the manufacturing approach in vertical district of super junction metal-oxide-semiconductor according to claim 1; It is characterized in that the vertical district that establishes the super junction metal-oxide-semiconductor highly is x, the maximum vertically district that an epitaxial growth and ion implantation technology are made highly is Δ a; Adopting the number of times of epitaxial growth and ion implantation technology is c; C is a positive integer, and the maximum vertically district in the nothing cavity that an epitaxial growth and etching groove and epitaxial diposition fill process are made highly is b, then as x＞b; Get c=(x-b)/Δ a, then round up when c has decimal.
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| CN102254828A (en) * | 2011-07-18 | 2011-11-23 | 无锡新洁能功率半导体有限公司 | Method for making semiconductor device with super junction structure and rapid reverse recovery characteristic |
| CN103178110B (en) * | 2011-12-21 | 2016-06-08 | 上海华虹宏力半导体制造有限公司 | A kind of deep groove structure in super junction technique and preparation method thereof |
| CN103515242A (en) * | 2012-06-29 | 2014-01-15 | 无锡维赛半导体有限公司 | Power transistor and manufacturing method thereof |
| CN103633116B (en) * | 2012-08-20 | 2017-02-15 | 朱江 | Charge compensation structure semiconductor chip and preparation method thereof |
| CN104201099B (en) * | 2014-09-17 | 2018-05-29 | 中航（重庆）微电子有限公司 | Superjunction devices preparation process |
| CN104485285B (en) * | 2014-12-25 | 2017-08-29 | 中航（重庆）微电子有限公司 | A kind of superjunction devices preparation technology |
| CN106328488B (en) * | 2015-06-25 | 2020-10-16 | 北大方正集团有限公司 | Super junction power device and preparation method thereof |
| CN113299739A (en) * | 2021-05-21 | 2021-08-24 | 江苏东海半导体科技有限公司 | Power device epitaxial structure and manufacturing method thereof |
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| DE10018371A1 (en) * | 2000-04-13 | 2001-10-25 | Infineon Technologies Ag | Semiconductor substrate manufacturing method e.g. for multiple-epitaxy device |
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