CN114843192B - Method for improving epitaxial growth stability of super junction structure and method for preparing semiconductor device - Google Patents
Method for improving epitaxial growth stability of super junction structure and method for preparing semiconductor device Download PDFInfo
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Abstract
The invention provides a method for improving the epitaxial growth stability of a super-junction structure and the preparation of a semiconductor device, wherein a second conductive type doping column of the super-junction structure is formed by combining multi-layer epitaxial deposition growth and ion implantation, and the semiconductor substrates of the same batch are alternately sent into an epitaxial growth machine table in sequence from small to large and from large to small according to the number of the semiconductor substrates of the same batch, so that the complementary first conductive type epitaxial layers prepared by odd and even layers can be realized by adjusting the run sequence of the odd and even layers in the process of preparing the first conductive type epitaxial layers of the semiconductor substrates of the same batch, the total thickness and quality stability of the prepared epitaxial doping layers can be improved, and the uniform stability of the electrical BVDS of the semiconductor device can be further realized.
Description
Technical Field
The invention belongs to the technical field of semiconductor manufacturing, and relates to a method for improving the epitaxial growth stability of a super junction structure and preparing a semiconductor device.
Background
In the field of power devices, breakdown Voltage (BV) and on-resistance (Ron) are two most important performance parameters of a power device, and for the two performance parameters, a common design requirement is that the power device not only has high breakdown voltage, but also has low on-resistance so as to reduce power consumption.
The restriction relationship between the breakdown voltage and the on-resistance of the conventional power device hinders further improvement of the device performance, and the SJMOSFET is a transistor with a Super Junction structure (Super Junction) to optimize the trade-off relationship between the breakdown voltage and the on-resistance, and has attracted extensive attention in the industry due to the advantages of small on-resistance, high on-speed, low switching loss and the like. The super junction structure is formed by performing multiple times of epitaxy and implantation doping in an epitaxial layer to form a plurality of P _ pilars or N _ pilars, a P region and an N region can be completely depleted before reverse voltage breakdown, a drift layer is equivalent to an intrinsic epitaxial layer (EPI), the withstand voltage is only related to the thickness and quality of the EPI and is unrelated to the doping concentration, and therefore the drift region can use very high doping concentration, and the on-resistance is greatly reduced. Therefore, the uniform stability of EPI thickness and quality determines the uniform stability of source-drain Breakdown Voltage (BVDS).
The existing EPI growth machine is in a single-wafer mode, and the same batch of wafers gradually tends to be stable from the first wafer due to the fluctuation of parameters of some machines and the influence of external environment. In addition, since the SJMOSFET requires EPI growth for multiple times, small differences in each layer gradually accumulate and eventually react to the BVDS of the semiconductor device being fabricated, resulting in a low BVDS of the first few wafers of the same batch, even the first wafer being poor.
Therefore, it is necessary to provide a method for improving the stability of the epitaxial growth of the super junction structure and the preparation of the semiconductor device.
Disclosure of Invention
In view of the above drawbacks of the prior art, an object of the present invention is to provide a method for improving stability of superjunction epitaxial growth and semiconductor device fabrication, so as to solve the problem of poor stability when an epitaxial layer is grown by using a single-wafer EPI growth stage in the prior art.
In order to achieve the above objects and other related objects, the present invention provides a method for improving stability of epitaxial growth of a super junction structure, comprising the steps of:
providing an epitaxial growth machine and a semiconductor substrate to be subjected to epitaxial growth, wherein the semiconductor substrate at least comprises the 1 st to the Nth wafers in one batch, and N is more than or equal to 2;
carrying out epitaxial deposition growth on the semiconductor substrate to form a first conductive type epitaxial layer, and carrying out ion implantation in the first conductive type epitaxial layer to form a second conductive type doped region in the first conductive type epitaxial layer; repeating the steps of epitaxial deposition growth and ion implantation to form a stacked epitaxial doped layer on the semiconductor substrate; when the epitaxial deposition growth is carried out to form the adjacent first conduction type epitaxial layers, the semiconductor substrates of the same batch are alternately sent into the epitaxial growth machine station in the sequence from small to large according to the sequence from large to small;
and carrying out annealing treatment to connect the second conductive type doped regions so as to form a second conductive type doped column in the epitaxial doped layer.
Optionally, the semiconductor substrate includes a first conductivity type semiconductor substrate, and the step of performing the ion implantation on the semiconductor substrate is further included before the epitaxial deposition growth is performed.
Optionally, after the step of performing the epitaxial deposition growth and the ion implantation repeatedly to form the epitaxial doping layer, a step of forming the first conductivity type epitaxial layer on the epitaxial doping layer is further included.
Optionally, the first conductivity type is an N type, and the second conductivity type is a P type; or the first conduction type is P type, and the second conduction type is N type.
Optionally, the value of N of the semiconductor substrates in one batch is 50 or more and 2 or more.
Optionally, in the vertical direction, the second conductivity type doped region in each epitaxial doped layer is located in the middle of the corresponding first conductivity type epitaxial layer.
Optionally, the number of layers of the first conductivity type epitaxial layer formed by epitaxial deposition growth on the semiconductor substrate is 2M, and M is greater than or equal to 1.
Optionally, the size of the semiconductor substrate comprises one of 4 inches, 6 inches, 8 inches, and 12 inches.
The invention also provides a preparation method of the semiconductor device, which comprises the step of preparing the semiconductor device by adopting any method for improving the epitaxial growth stability of the super junction structure.
Optionally, the semiconductor device comprises a VDMOSFET.
As described above, according to the method for improving the epitaxial growth stability of the super-junction structure and the manufacturing of the semiconductor device, the second conductive type doped column of the super-junction structure is formed by combining the multi-layer epitaxial deposition growth and the ion implantation, and the semiconductor substrates of the same batch are alternately sent into the epitaxial growth machine in the order of the sheet numbers from small to large and in the order of the sheet numbers from large to small, so that the first conductive type epitaxial layers manufactured by the odd-even layers can be complemented by adjusting the run sequence of the odd-even layers in the manufacturing process of the first conductive type epitaxial layers of the semiconductor substrates of the same batch, so that the stability of the total thickness and quality of the manufactured epitaxial doped layers is improved, and the uniform stability of the electrical property BVDS of the semiconductor device is further realized.
Drawings
Fig. 1 is a schematic flow chart illustrating a method for improving stability of epitaxial growth of a super junction structure in an embodiment of the present invention.
Fig. 2 is a schematic structural diagram after epitaxial growth and ion implantation are performed according to an embodiment of the present invention.
Fig. 3 is a schematic structural diagram of the embodiment of the present invention after annealing treatment.
Fig. 4 is a BVDS comparison graph of the semiconductor device prepared in the example of the present invention and the semiconductor device prepared in the comparative example.
Description of the element reference
110. Semiconductor substrate
210. 220, 230, 240, 250, 260, 270 epitaxial layer of a first conductivity type
111. 211, 221, 231, 241, 251, 261 second-conductivity-type-doped region
300. Second conductive type doped column
S1 to S3
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention.
As in the detailed description of the embodiments of the present invention, the cross-sectional views illustrating the device structures are not partially enlarged in general scale for convenience of illustration, and the schematic views are only examples, which should not limit the scope of the present invention. In addition, the three-dimensional dimensions of length, width and depth should be included in the actual fabrication.
Spatially relative terms, such as "under," "below," "lower," "below," "over," "upper," and the like, may be used herein for convenience in describing the relationship of one element or feature to another element or feature illustrated in the figures. It will be understood that these terms of spatial relationship are intended to encompass other orientations of the device in use or operation in addition to the orientation depicted in the figures. Further, when a layer is referred to as being "between" two layers, it can be the only layer between the two layers, or one or more intervening layers may also be present. As used herein, "between … …" is meant to include both endpoints.
In the context of this application, a structure described as having a first feature "on" a second feature may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features are formed in between the first and second features, such that the first and second features may not be in direct contact.
It should be noted that the drawings provided in the present embodiment are only for illustrating the basic idea of the present invention, and the drawings only show the components related to the present invention rather than being drawn according to the number, shape and size of the components in actual implementation, and the type, quantity and proportion of each component in actual implementation may be changed freely, and the layout of the components may be more complicated.
As shown in fig. 1, the present embodiment provides a method for improving stability of epitaxial growth of a super junction structure, including the following steps:
s1: providing an epitaxial growth machine and a semiconductor substrate to be subjected to epitaxial growth, wherein the semiconductor substrate at least comprises the 1 st to the Nth wafers in one batch, and N is more than or equal to 2;
s2: carrying out epitaxial deposition growth on the semiconductor substrate to form a first conductive type epitaxial layer, and carrying out ion implantation in the first conductive type epitaxial layer to form a second conductive type doped region in the first conductive type epitaxial layer; repeating the steps of epitaxial deposition growth and ion implantation to form a stacked epitaxial doped layer on the semiconductor substrate; when the epitaxial deposition growth is carried out to form the adjacent first conduction type epitaxial layers, the semiconductor substrates in the same batch are alternately sent into the epitaxial growth machine station in sequence from small to large and in sequence from large to small;
s3: and carrying out annealing treatment to connect the second conductive type doped regions so as to form a second conductive type doped column in the epitaxial doped layer.
In this embodiment, the epitaxial deposition growth and the ion implantation are performed on the semiconductor substrate in multiple layers to form the first conductive type epitaxial layer and the second conductive type doped region, and during the epitaxial deposition growth, the semiconductor substrates of the same batch are alternately sent into the epitaxial growth machine from small to large and from large to small in order of wafer number, so that the first conductive type epitaxial layers prepared by the odd-even layers can be complemented by adjusting the run sequence of the odd-even layers in the process of preparing the first conductive type epitaxial layer of the semiconductor substrates of the same batch, the stability problems of thickness difference and quality difference of the first conductive type epitaxial layers epitaxially deposited and grown on the semiconductor substrates of the same batch due to the stability of the epitaxial growth machine are solved, the stability of the total thickness and quality of the prepared epitaxial doped layers is improved, and the uniform stability of the electrical BVDS of the prepared semiconductor device is further realized.
The method for improving the stability of the superjunction structure in epitaxial growth is further described below with reference to fig. 1 to 3.
As an example, the first conductivity type is N-type, and the second conductivity type is P-type; or the first conduction type is a P type, and the second conduction type is an N type.
Specifically, in the present embodiment, the first conductive type is an N type, and the second conductive type is a P type, but the present invention is not limited thereto.
First, as shown in fig. 1 and 2, step S1 is performed to provide an epitaxial growth machine and a semiconductor substrate 110 to be epitaxially grown, where the semiconductor substrate 110 at least includes the 1 st to nth wafers in a batch, and N is greater than or equal to 2.
Specifically, the epitaxial growth machine is a relatively commonly used single-wafer type epitaxial growth machine, the semiconductor substrate 110 is a batch type semiconductor substrate, and multiple semiconductor substrates 110 are sequentially subjected to epitaxial growth through the single-wafer type epitaxial growth machine to prepare a dielectric layer required by a subsequent process, but due to the restriction of the single-wafer type epitaxial growth machine, such as fluctuation of parameters of the machine and influence of an external environment, when the single-wafer type epitaxial growth machine is used for epitaxial deposition growth, the epitaxial layer formed by growth tends to gradually become stable in the semiconductor substrate 110 of the same batch from the first semiconductor substrate 110 to the later semiconductor substrate 110, that is, the epitaxial layer formed on each semiconductor substrate 110 is different, so that, in the same batch, the thickness of the epitaxial layer formed on the semiconductor substrate 110 when the first semiconductor substrate enters the epitaxial growth machine is different from the thickness of the epitaxial layer formed on the later semiconductor substrate 110 when the first semiconductor substrate enters the epitaxial growth machine, and the thickness of the epitaxial layer formed on the later semiconductor substrate 110 when the later semiconductor substrate is fed into the same batch are different, and if the first batch of the semiconductor substrate is accumulated, the epitaxial growth machine is a tiny difference is accumulated, and the BVDS (BVDS) produced by the initial low-batch process of the semiconductor devices, and even the BVDS produced by the initial batch process is enlarged.
In this embodiment, the number N of the semiconductor substrates 110 in a batch is only 25, that is, a batch includes 25 semiconductor substrates 110, but the value of N in a batch is not limited thereto, for example, the value of N of the semiconductor substrates 110 in a batch may be 50 ≧ N ≧ 2, that is, 2, 5, 10, 25, 30, 50, and the like, and the value of N is not limited herein.
The semiconductor substrate 110 may comprise one of 4 inches, 6 inches, 8 inches and 12 inches, and the size of the semiconductor substrate 110 may be selected according to specific needs, which is not limited herein.
As an example, the semiconductor substrate 110 includes a first conductive type semiconductor substrate, and the step of performing the ion implantation on the semiconductor substrate 110 is further included before the epitaxial deposition growth is performed.
Specifically, as shown in fig. 2, the semiconductor substrate 110 is a first conductive type semiconductor substrate, and a material of the first conductive type semiconductor substrate may be a doped semiconductor material such as silicon (Si), silicon germanium (SiGe), gallium nitride (GaN), or silicon carbide (SiC), which may be specifically selected according to needs and is not limited herein.
The ion implantation may be performed on the semiconductor substrate 110 before the epitaxial deposition growth is performed, and the ion implantation may include a step of depositing on a surface of the semiconductor substrate 110, wherein the deposition method may include chemical vapor deposition, and then an opening defining the second conductive type doping region 111 may be formed through a photolithography process to form a patterned mask layer, and second conductive type impurities may be implanted into the semiconductor substrate 110 through the mask layer to form the second conductive type doping region 111, and then the mask layer is removed.
Next, referring to fig. 2, step S2 is performed to perform epitaxial deposition growth on the semiconductor substrate 110 to form a first conductive type epitaxial layer 210, and perform ion implantation in the first conductive type epitaxial layer 210 to form a second conductive type doped region 211 in the first conductive type epitaxial layer 210; repeating the steps of epitaxial deposition growth and ion implantation to form a stacked epitaxial doped layer on the semiconductor substrate 110; when the epitaxial deposition growth is performed to form the adjacent first conductive type epitaxial layer 210, first conductive type epitaxial layer 220, first conductive type epitaxial layer 230, first conductive type epitaxial layer 240, first conductive type epitaxial layer 250, first conductive type epitaxial layer 260, and first conductive type epitaxial layer 270, the semiconductor substrates 110 of the same batch are alternately sent into the epitaxial growth machine in the order of the sheet numbers from small to large and in the order of the sheet numbers from large to small.
Specifically, when the epitaxial doping layer of the first layer is formed, the semiconductor substrates 110 may be sequentially fed into the epitaxial growth machine from small to large, that is, the 1 st to nth substrates may be sequentially fed into the epitaxial growth machine, so as to form the first conductivity type epitaxial layer 210 on each semiconductor substrate 110, where the first conductivity type epitaxial layer 210 formed on each semiconductor substrate 110 may have a slight difference due to the limitation of the epitaxial growth machine. Then, the ion implantation is performed on each first conductive type epitaxial layer 210 to form the second conductive type doped region 211 in the first conductive type epitaxial layer 210.
The step of performing the ion implantation may include a step of depositing a mask on the surface of the first conductive type epitaxial layer 210, where the deposition method may include chemical vapor deposition, and then an opening defining the second conductive type doping region 211 may be formed through a photolithography process to form a patterned mask layer, and through the mask layer, a second conductive type impurity is implanted into the first conductive type epitaxial layer 210 to form the second conductive type doping region 211, and then the mask layer is removed.
Thus, the preparation of the epitaxial doped layer of the first layer is completed, and then the preparation of the epitaxial doped layer of the second layer is carried out.
Specifically, when the epitaxial doping layer of the second layer is formed, the semiconductor substrate 110 needs to be correspondingly and sequentially fed into the epitaxial growth machine from large to small, that is, the semiconductor substrate 110 needs to be sequentially fed into the epitaxial growth machine from the nth to the 1 st, so as to form the first conductive type epitaxial layer 220 on each first conductive type epitaxial layer 210, wherein due to the limitation of the epitaxial growth machine, the first conductive type epitaxial layers 220 formed on each semiconductor substrate 110 have a slight difference, so that the total thickness of the formed 2 first conductive type epitaxial layers 210 and 220 tends to be neutralized by combining the first conductive type epitaxial layer 210 formed on the semiconductor substrate 110, so as to reduce the total thickness difference of the first conductive type epitaxial layers on the semiconductor substrate 110, and improve the quality stability.
Then, the ion implantation is performed on the first conductive type epitaxial layer 220 to form the second conductive type doped region 221 in the first conductive type epitaxial layer 220. The step of performing ion implantation may include a step of depositing a mask on the surface of the first conductive type epitaxial layer 220, wherein the deposition method may include chemical vapor deposition, and then an opening defining the second conductive type doping region 221 may be formed through a photolithography process to form a patterned mask layer, and through the mask layer, the second conductive type impurity may be implanted into the first conductive type epitaxial layer 220 to form the second conductive type doping region 221, and then the mask layer may be removed.
The preparation of the epitaxial doping layer of the second layer is completed, and then, the preparation of the epitaxial doping layer of the third layer, the fourth layer, the fifth layer, the sixth layer, etc. may be performed as required to form the first conductive type epitaxial layers 230, 240, 250, 260 and the corresponding second conductive type doping regions 231, 241, 251, 261.
When the third layer and the fifth layer are formed, the sequence of the numbers of the semiconductor substrate 110 fed into the epitaxial growth machine is the same as that of the first layer and is from 1 st to nth, and when the fourth layer and the sixth layer are correspondingly formed, the sequence of the numbers of the semiconductor substrate 110 fed into the epitaxial growth machine is the same as that of the second layer and is from nth to 1 st. This completes the epitaxial doping layer of the 6-layer stack.
As an example, after the epitaxial deposition growth and the ion implantation are repeated to form the epitaxial doping layer, a step of forming the first conductivity type epitaxial layer on the epitaxial doping layer is further included to prepare for the subsequent preparation of the semiconductor device.
As shown in fig. 2, in this embodiment, after the 6-layer stacked epitaxial doping layer is prepared, a step of forming a 7 th first conductive type epitaxial layer 270 on the epitaxial doping layer is further included, wherein when the first conductive type epitaxial layer 270 is formed, the order of the number of the semiconductor substrate 110 fed into the epitaxial growth machine is the same as that of the first layer, and all of the number is from 1 to nth.
As an example, the number of layers of the first conductive type epitaxial layer formed by epitaxial deposition growth on the semiconductor substrate 110 is 2M, and M ≧ 1.
Specifically, when the number of the first conductive type epitaxial layers formed by epitaxial deposition growth on the semiconductor substrate 110 is an even number, the semiconductor substrate 110 can complement the first conductive type epitaxial layers prepared by the odd-even layers according to the running sequence of the odd-even layers, so that the problem of stability of the first conductive type epitaxial layers epitaxially deposited and grown on the semiconductor substrate 110 of the same batch due to the stability of the epitaxial growth machine is solved, the total thickness and quality of the prepared epitaxial doped layers are more stable, and uniform stability of the electrical BVDS is further realized.
Next, referring to fig. 3, step S3 is performed to perform an annealing process to connect the second-conductivity-type-doped regions 111, 211, 221, 231, 241, 251, and 261 to form a second-conductivity-type-doped column 300 in the epitaxial doped layer.
As an example, the second conductive-type doped region 211, 221, 231, 241, 251, 261 in each of the epitaxial doped layers is preferably located at a middle position of the corresponding first conductive- type epitaxial layer 210, 220, 230, 240, 250, 260, 270 in a vertical direction.
Specifically, when the second-conductivity-type doped region 211, the second-conductivity-type doped region 221, the second-conductivity-type doped region 231, the second-conductivity-type doped region 241, the second-conductivity-type doped region 251, and the second-conductivity-type doped region 261 are formed, it is preferable that each second-conductivity-type doped region is located in a middle position of the corresponding first-conductivity-type epitaxial layer so as to form a second-conductivity-type doped column 300 through an annealing process, as shown in fig. 3, and it is preferable that centers of the second-conductivity-type doped region 111, the second-conductivity-type doped region 211, the second-conductivity-type doped region 221, the second-conductivity-type doped region 231, the second-conductivity-type doped region 241, the second-conductivity-type doped region 251, and the second-conductivity-type doped region 261 are vertically located on the same vertical line so as to form the second-conductivity-type doped column 300 which is relatively straight.
The embodiment also provides a preparation method of the semiconductor device, which comprises the step of preparing the semiconductor device by adopting the method for improving the epitaxial growth stability of the super junction structure. Wherein the semiconductor device may comprise a VDMOSFET.
Specifically, after the super junction structure is prepared by the method for improving the epitaxial growth stability of the super junction structure, a source electrode, a drain electrode, a gate electrode and the like can be prepared in the super junction structure as required to prepare the semiconductor device, wherein the semiconductor device can include, but is not limited to, a VDMOSFET, and can be selected as required, which is not limited herein.
BVDS was compared between the semiconductor device prepared in the present example and the semiconductor device prepared in the comparative example, with reference to table 1 and fig. 4.
Table 1:
| item | BSL_LOT | CIP_LOT |
| Standard deviation of BVDS | 18.42 | 4.39 |
Wherein CIP _ LOT represents the semiconductor device manufactured by the method of the present embodiment, and BSL _ LOT represents the semiconductor device in the comparative example which was not manufactured by the method of the present embodiment.
As can be seen from table 1, the standard deviation of BVDS between the semiconductor devices of the same lot prepared in this example is reduced from 18.42V to 4.39V, the uniformity is improved by 320%, and the effect is very significant; in fig. 4, the BSL _ LOT has a stability difference and a serious problem with the first slice, and the CIP _ LOT improves the stability problem from slice to slice and the first slice problem is significantly improved.
According to the method for improving the epitaxial growth stability of the super-junction structure and the preparation of the semiconductor device, the second conductive type doping column of the super-junction structure is formed by combining multi-layer epitaxial deposition growth and ion implantation, and the semiconductor substrates in the same batch are alternately sent into an epitaxial growth machine table from small to large and from large to small in sequence, so that the complementary first conductive type epitaxial layers prepared by the odd-even layers can be realized by adjusting the run sequence of the odd-even layers in the process of preparing the first conductive type epitaxial layers by the semiconductor substrates in the same batch, the stability of the total thickness and quality of the prepared epitaxial doping layers is improved, and the uniform stability of the electrical property BVDS of the semiconductor device is further realized.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which may be made by those skilled in the art without departing from the spirit and scope of the present invention as defined in the appended claims.
Claims (10)
1. A method for improving the epitaxial growth stability of a super junction structure is characterized by comprising the following steps:
providing an epitaxial growth machine and a semiconductor substrate to be subjected to epitaxial growth, wherein the semiconductor substrate at least comprises the 1 st to the Nth wafers in one batch, and N is more than or equal to 2;
carrying out epitaxial deposition growth on the semiconductor substrate to form a first conductive type epitaxial layer, and carrying out ion implantation in the first conductive type epitaxial layer to form a second conductive type doped region in the first conductive type epitaxial layer; repeating the steps of epitaxial deposition growth and ion implantation to form a stacked epitaxial doped layer on the semiconductor substrate; when the epitaxial deposition growth is carried out to form the adjacent first conduction type epitaxial layers, the semiconductor substrates in the same batch are alternately sent into the epitaxial growth machine station in sequence from small to large and in sequence from large to small;
and carrying out annealing treatment to connect the second conductive type doped regions so as to form a second conductive type doped column in the epitaxial doped layer.
2. The method for improving the epitaxial growth stability of the super junction structure according to claim 1, wherein: the semiconductor substrate comprises a first conductive type semiconductor substrate, and the step of performing the ion implantation on the semiconductor substrate is further included before the epitaxial deposition growth is performed.
3. The method for improving the epitaxial growth stability of the super junction structure according to claim 1, wherein: and after the epitaxial deposition growth and the ion implantation are repeatedly carried out to form the epitaxial doping layer, the method further comprises the step of forming the first conductive type epitaxial layer on the epitaxial doping layer.
4. The method for improving the epitaxial growth stability of the super junction structure according to claim 1, wherein: the first conduction type is an N type, and the second conduction type is a P type; or the first conduction type is P type, and the second conduction type is N type.
5. The method for improving the epitaxial growth stability of the super junction structure according to claim 1, wherein: the value of N of the semiconductor substrates in one batch is more than or equal to 50 and more than or equal to 2.
6. The method for improving the epitaxial growth stability of the super junction structure according to claim 1, wherein: in the vertical direction, the second conductive type doping area in each epitaxial doping layer is located in the middle of the corresponding first conductive type epitaxial layer.
7. The method for improving the epitaxial growth stability of the super junction structure according to claim 1, wherein: the number of layers of the first conductive type epitaxial layer formed by epitaxial deposition growth on the semiconductor substrate is 2M, and M is more than or equal to 1.
8. The method for improving the epitaxial growth stability of the super junction structure according to claim 1, wherein: the semiconductor substrate includes one of 4 inches, 6 inches, 8 inches, and 12 inches in size.
9. A method for manufacturing a semiconductor device, comprising manufacturing the semiconductor device by using the method for improving the stability of the epitaxial growth of the super junction structure according to any one of claims 1 to 8.
10. The method for manufacturing a semiconductor device according to claim 9, wherein: the semiconductor device includes a VDMOSFET.
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| PCT/CN2023/072918 WO2023216648A1 (en) | 2022-05-09 | 2023-01-18 | Method for improving epitaxial growth stability of super-junction structure and preparing semiconductor device |
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| JP5532758B2 (en) * | 2009-08-31 | 2014-06-25 | 富士電機株式会社 | Semiconductor device manufacturing method and semiconductor device |
| CN102479805A (en) * | 2010-11-30 | 2012-05-30 | 比亚迪股份有限公司 | Super junction semiconductor element and manufacture method thereof |
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