CN104011869B - 具有带有下面的扩散阻挡层的锗有源层的半导体器件 - Google Patents
具有带有下面的扩散阻挡层的锗有源层的半导体器件 Download PDFInfo
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- CN104011869B CN104011869B CN201180075742.5A CN201180075742A CN104011869B CN 104011869 B CN104011869 B CN 104011869B CN 201180075742 A CN201180075742 A CN 201180075742A CN 104011869 B CN104011869 B CN 104011869B
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- 229910052732 germanium Inorganic materials 0.000 title claims abstract description 132
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 title claims abstract description 129
- 238000009792 diffusion process Methods 0.000 title claims abstract description 104
- 239000004065 semiconductor Substances 0.000 title claims abstract description 93
- 239000000758 substrate Substances 0.000 claims abstract description 84
- 230000005764 inhibitory process Effects 0.000 claims abstract description 58
- 229910052710 silicon Inorganic materials 0.000 claims description 61
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 59
- 239000010703 silicon Substances 0.000 claims description 56
- 229910000577 Silicon-germanium Inorganic materials 0.000 claims description 46
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 29
- 229910052698 phosphorus Inorganic materials 0.000 claims description 29
- 239000011574 phosphorus Substances 0.000 claims description 29
- 239000000203 mixture Substances 0.000 claims description 17
- 230000006835 compression Effects 0.000 claims description 12
- 238000007906 compression Methods 0.000 claims description 12
- 229910006990 Si1-xGex Inorganic materials 0.000 claims description 9
- 229910007020 Si1−xGex Inorganic materials 0.000 claims description 9
- 238000002955 isolation Methods 0.000 claims description 8
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 claims description 2
- 239000010410 layer Substances 0.000 description 228
- 239000002070 nanowire Substances 0.000 description 40
- 239000000463 material Substances 0.000 description 28
- 238000000034 method Methods 0.000 description 19
- 238000004519 manufacturing process Methods 0.000 description 16
- 238000004891 communication Methods 0.000 description 15
- 229910052751 metal Inorganic materials 0.000 description 12
- 239000002184 metal Substances 0.000 description 12
- 230000008569 process Effects 0.000 description 8
- 230000004888 barrier function Effects 0.000 description 7
- 230000015572 biosynthetic process Effects 0.000 description 7
- 239000002019 doping agent Substances 0.000 description 7
- 238000005516 engineering process Methods 0.000 description 7
- 238000001039 wet etching Methods 0.000 description 6
- 238000013461 design Methods 0.000 description 5
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 229910052785 arsenic Inorganic materials 0.000 description 4
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 4
- 229910052796 boron Inorganic materials 0.000 description 4
- 238000005530 etching Methods 0.000 description 4
- 239000011229 interlayer Substances 0.000 description 4
- WGTYBPLFGIVFAS-UHFFFAOYSA-M tetramethylammonium hydroxide Chemical compound [OH-].C[N+](C)(C)C WGTYBPLFGIVFAS-UHFFFAOYSA-M 0.000 description 4
- KWYUFKZDYYNOTN-UHFFFAOYSA-M Potassium hydroxide Chemical compound [OH-].[K+] KWYUFKZDYYNOTN-UHFFFAOYSA-M 0.000 description 3
- 239000002800 charge carrier Substances 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 230000006870 function Effects 0.000 description 3
- 229910052735 hafnium Inorganic materials 0.000 description 3
- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical compound [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 description 3
- 239000012212 insulator Substances 0.000 description 3
- 239000002127 nanobelt Substances 0.000 description 3
- VHUUQVKOLVNVRT-UHFFFAOYSA-N Ammonium hydroxide Chemical compound [NH4+].[OH-] VHUUQVKOLVNVRT-UHFFFAOYSA-N 0.000 description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 2
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 2
- 230000002411 adverse Effects 0.000 description 2
- 238000000137 annealing Methods 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 230000001808 coupling effect Effects 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 229910000449 hafnium oxide Inorganic materials 0.000 description 2
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 description 2
- MRELNEQAGSRDBK-UHFFFAOYSA-N lanthanum(3+);oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[La+3].[La+3] MRELNEQAGSRDBK-UHFFFAOYSA-N 0.000 description 2
- 229910052757 nitrogen Inorganic materials 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- -1 planar device Chemical compound 0.000 description 2
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 125000006850 spacer group Chemical group 0.000 description 2
- 230000001629 suppression Effects 0.000 description 2
- 229910000951 Aluminide Inorganic materials 0.000 description 1
- 241000208340 Araliaceae Species 0.000 description 1
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- 229910002601 GaN Inorganic materials 0.000 description 1
- 229910005540 GaP Inorganic materials 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 1
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 description 1
- BPQQTUXANYXVAA-UHFFFAOYSA-N Orthosilicate Chemical compound [O-][Si]([O-])([O-])[O-] BPQQTUXANYXVAA-UHFFFAOYSA-N 0.000 description 1
- 235000005035 Panax pseudoginseng ssp. pseudoginseng Nutrition 0.000 description 1
- 235000003140 Panax quinquefolius Nutrition 0.000 description 1
- KJTLSVCANCCWHF-UHFFFAOYSA-N Ruthenium Chemical compound [Ru] KJTLSVCANCCWHF-UHFFFAOYSA-N 0.000 description 1
- BUGBHKTXTAQXES-UHFFFAOYSA-N Selenium Chemical compound [Se] BUGBHKTXTAQXES-UHFFFAOYSA-N 0.000 description 1
- NINIDFKCEFEMDL-UHFFFAOYSA-N Sulfur Chemical compound [S] NINIDFKCEFEMDL-UHFFFAOYSA-N 0.000 description 1
- 239000005864 Sulphur Substances 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- QCWXUUIWCKQGHC-UHFFFAOYSA-N Zirconium Chemical compound [Zr] QCWXUUIWCKQGHC-UHFFFAOYSA-N 0.000 description 1
- PXNDALNSUJQINT-UHFFFAOYSA-N [Sc].[Ta] Chemical compound [Sc].[Ta] PXNDALNSUJQINT-UHFFFAOYSA-N 0.000 description 1
- WOIHABYNKOEWFG-UHFFFAOYSA-N [Sr].[Ba] Chemical compound [Sr].[Ba] WOIHABYNKOEWFG-UHFFFAOYSA-N 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- FTWRSWRBSVXQPI-UHFFFAOYSA-N alumanylidynearsane;gallanylidynearsane Chemical compound [As]#[Al].[As]#[Ga] FTWRSWRBSVXQPI-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 239000004411 aluminium Substances 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 239000000908 ammonium hydroxide Substances 0.000 description 1
- JRPBQTZRNDNNOP-UHFFFAOYSA-N barium titanate Chemical compound [Ba+2].[Ba+2].[O-][Ti]([O-])([O-])[O-] JRPBQTZRNDNNOP-UHFFFAOYSA-N 0.000 description 1
- 229910002113 barium titanate Inorganic materials 0.000 description 1
- 230000033228 biological regulation Effects 0.000 description 1
- 230000003139 buffering effect Effects 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 229910017052 cobalt Inorganic materials 0.000 description 1
- 239000010941 cobalt Substances 0.000 description 1
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 description 1
- 230000000994 depressogenic effect Effects 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 235000013399 edible fruits Nutrition 0.000 description 1
- 230000005670 electromagnetic radiation Effects 0.000 description 1
- 230000002708 enhancing effect Effects 0.000 description 1
- 238000000407 epitaxy Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- HZXMRANICFIONG-UHFFFAOYSA-N gallium phosphide Chemical compound [Ga]#P HZXMRANICFIONG-UHFFFAOYSA-N 0.000 description 1
- 235000008434 ginseng Nutrition 0.000 description 1
- 230000012010 growth Effects 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-M hydroxide Chemical compound [OH-] XLYOFNOQVPJJNP-UHFFFAOYSA-M 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- WPYVAWXEWQSOGY-UHFFFAOYSA-N indium antimonide Chemical compound [Sb]#[In] WPYVAWXEWQSOGY-UHFFFAOYSA-N 0.000 description 1
- 229910000464 lead oxide Inorganic materials 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 150000001247 metal acetylides Chemical class 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- YEXPOXQUZXUXJW-UHFFFAOYSA-N oxolead Chemical compound [Pb]=O YEXPOXQUZXUXJW-UHFFFAOYSA-N 0.000 description 1
- BPUBBGLMJRNUCC-UHFFFAOYSA-N oxygen(2-);tantalum(5+) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ta+5].[Ta+5] BPUBBGLMJRNUCC-UHFFFAOYSA-N 0.000 description 1
- RVTZCBVAJQQJTK-UHFFFAOYSA-N oxygen(2-);zirconium(4+) Chemical compound [O-2].[O-2].[Zr+4] RVTZCBVAJQQJTK-UHFFFAOYSA-N 0.000 description 1
- 238000012856 packing Methods 0.000 description 1
- 239000003973 paint Substances 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 230000024241 parasitism Effects 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 239000011513 prestressed concrete Substances 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
- 229910052707 ruthenium Inorganic materials 0.000 description 1
- 229910052711 selenium Inorganic materials 0.000 description 1
- 239000011669 selenium Substances 0.000 description 1
- 229910021332 silicide Inorganic materials 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 230000007480 spreading Effects 0.000 description 1
- 238000003892 spreading Methods 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 229910052712 strontium Inorganic materials 0.000 description 1
- CIOAGBVUUVVLOB-UHFFFAOYSA-N strontium atom Chemical compound [Sr] CIOAGBVUUVVLOB-UHFFFAOYSA-N 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 1
- 229910001936 tantalum oxide Inorganic materials 0.000 description 1
- 229910052714 tellurium Inorganic materials 0.000 description 1
- PORWMNRCUJJQNO-UHFFFAOYSA-N tellurium atom Chemical compound [Te] PORWMNRCUJJQNO-UHFFFAOYSA-N 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
- 229910052727 yttrium Inorganic materials 0.000 description 1
- VWQVUPCCIRVNHF-UHFFFAOYSA-N yttrium atom Chemical compound [Y] VWQVUPCCIRVNHF-UHFFFAOYSA-N 0.000 description 1
- RPEUFVJJAJYJSS-UHFFFAOYSA-N zinc;oxido(dioxo)niobium Chemical compound [Zn+2].[O-][Nb](=O)=O.[O-][Nb](=O)=O RPEUFVJJAJYJSS-UHFFFAOYSA-N 0.000 description 1
- 229910052726 zirconium Inorganic materials 0.000 description 1
- 229910001928 zirconium oxide Inorganic materials 0.000 description 1
- GFQYVLUOOAAOGM-UHFFFAOYSA-N zirconium(iv) silicate Chemical compound [Zr+4].[O-][Si]([O-])([O-])[O-] GFQYVLUOOAAOGM-UHFFFAOYSA-N 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/107—Substrate region of field-effect devices
- H01L29/1075—Substrate region of field-effect devices of field-effect transistors
- H01L29/1079—Substrate region of field-effect devices of field-effect transistors with insulated gate
- H01L29/1083—Substrate region of field-effect devices of field-effect transistors with insulated gate with an inactive supplementary region, e.g. for preventing punch-through, improving capacity effect or leakage current
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28255—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor belonging to Group IV and not being elemental silicon, e.g. Ge, SiGe, SiGeC
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
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- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
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- H01L29/0669—Nanowires or nanotubes
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1025—Channel region of field-effect devices
- H01L29/1029—Channel region of field-effect devices of field-effect transistors
- H01L29/1033—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
- H01L29/1054—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with a variation of the composition, e.g. channel with strained layer for increasing the mobility
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System
- H01L29/161—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System including two or more of the elements provided for in group H01L29/16, e.g. alloys
- H01L29/165—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System including two or more of the elements provided for in group H01L29/16, e.g. alloys in different semiconductor regions, e.g. heterojunctions
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42384—Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
- H01L29/42392—Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor fully surrounding the channel, e.g. gate-all-around
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Abstract
描述了具有带有下面的扩散阻挡层的锗有源层的半导体器件。例如,半导体器件包括设置在衬底上的栅极电极堆叠体。锗有源层设置在衬底上,在栅极电极堆叠体下。扩散阻挡层设置在衬底的上方,在锗有源层的下方。结漏抑制层设置在衬底的上方,在扩散阻挡层的下方。源极和漏极区域设置在结漏抑制层的上方,位于栅极电极堆叠体的任一侧上。
Description
技术领域
本发明的实施例涉及半导体器件领域,特别是具有带有下面的扩散阻挡层的锗有源(active)层的半导体器件。
背景技术
在过去几十年中,集成电路中的特征的缩放已经成为不断壮大的半导体产业背后的驱动力。缩放到越来越小的特征使能在半导体芯片的有限的不动产上增大的功能单元的密度。例如,缩小晶体管尺寸允许芯片上包含的存储器设备的数量增加,实现具有增大的容量的产品的制造。然而,对于越来越大容量的驱动并不是没有问题。对每个器件的性能进行最优化的必要性变得越发显著。
在集成电路器件的制造中,多栅极晶体管(例如三栅极晶体管)已经随着器件尺寸不断缩小而变得更普遍。在常规工艺中,通常在体硅衬底或绝缘体上硅衬底上制造三栅极晶体管。在一些实例中,由于体硅衬底的较低成本并且因为它们使能较不复杂的三栅极制造工艺,所以体硅衬底是优选的。在其它实例中,由于绝缘体上硅衬底能够提供减小的泄漏,绝缘体上硅衬底是优选的。
在体硅衬底上,在将金属栅极电极的底部与晶体管主体(即,“鳍状物”)的底部处的源极和漏极延长尖端对齐时,用于三栅极晶体管的制造工艺通常遇到问题。当在体衬底上形成三栅极晶体管时,为了最优的栅极控制并减少短沟道效应而需要适当的对齐。例如,如果源极和漏极延长尖端比金属栅极电极深,则可能发生穿通现象。替代地,如果金属栅极电极比源极和漏极延长尖端深,则结果可能是不期望的栅极电容寄生效应。
已经尝试了许多不同的技术以减小晶体管的结漏。然而,在结漏抑制方面仍需要显著改进。
发明内容
本发明的实施例包括具有带有下面的扩散阻挡层的锗有源层的半导体器件。
在一个实施例中,半导体器件包括设置在衬底上的栅极电极堆叠体。锗有源层设置在衬底上方,在栅电极堆叠体的下面。扩散阻挡层设置在衬底的上方,在锗有源层的下方。结漏抑制层设置在衬底的上方,在扩散阻挡层的下方。源极和漏极区域设置在结漏抑制层的上方,位于栅极电极堆叠体的任一侧上。
在另一实施例中,半导体器件包括设置在衬底上方的栅极电极堆叠体。三维锗有源体设置在衬底上方并与衬底耦合,位于栅极电极堆叠体下面。隔离区域设置在衬底上方并暴露出三维锗有源体。扩散阻挡层设置在衬底上方,在三维锗有源体的下方。结漏抑制层设置在衬底的上方,在扩散阻挡层的下方。源极和漏极区域设置在结漏抑制层的上方,位于栅极电极堆叠体的任一侧上。
在另一实施例中,半导体器件包括设置在衬底上的一个或多个锗纳米线。结漏抑制层设置在衬底的上方,在一个或多个锗纳米线的下方。栅极电极堆叠体设置在泄漏抑制层上,并完全包围一个或多个锗纳米线中的每一个的至少一部分。间隔体被设置为邻近栅极电极堆叠体。扩散阻挡层设置在泄漏抑制层上方,在间隔体的下方。源极和漏极区域设置在结漏抑制层上,位于栅极电极堆叠体的间隔体的任一侧上。
附图说明
图1A和1B示出了常规半导体器件的截面图。
图2A示出了常规半导体层堆叠体的截面图。
图2B示出了根据本发明的实施例的另一个半导体层堆叠体的截面图。
图3A示出了根据本发明的实施例的具有带有下面的扩散阻挡层的锗有源层的半导体器件的截面图。
图3B和3C示出了根据本发明的另一实施例的具有带有下面的扩散阻挡层锗的有源层的另一半导体器件的制造的截面图。
图4A-4C示出了根据本发明实施例的制造具有三维体的各种半导体器件的方法中的各种操作的成角度的视图。
图5A示出了根据本发明的实施例的基于纳米线的半导体结构的三维截面图。
图5B示出了根据本发明的实施例的如沿着a-a'轴截取的图5A的基于纳米线的半导体结构的截面沟道视图。
图5C示出了根据本发明的实施例的沿着b-b'轴截取的图5A的基于纳米线的半导体结构的截面间隔体视图。
图6A-6D示出了根据本发明的实施例的制造具有(至少在工艺的一个点处)带有下面的扩散阻挡层的锗有源层的纳米线半导体器件的方法中的各种操作的三维截面图。
图7示出了根据本发明的实施例的高温退火后的磷浓度的深度分布的曲线仿真结果。
图8示出了根据本发明的一个实施方式的计算器件。
具体实施方式
描述了具有带有下面的扩散阻挡层的锗有源层的半导体器件。在下面的说明书中,阐述了许多具体细节,如具体集成和材料方案,以便提供对本发明实施例的全面理解。对于本领域技术人员显而易见的是,可以在没有这些具体细节的情况下实践本发明的实施例。在其它情况下,公知的特征,诸如集成电路设计布局没有被详细描述,以便不非必要地使本发明实施例混淆。此外,应理解的是,图中所示各个实施例是说明性的表示,而不一定按比例绘制。
在此描述的一个或多个实施例是针对具有N型掺杂扩散阻挡层的硅上锗(Ge-on-Si)衬底布置。这种布置可被包括,以形成基于锗的晶体管,如平面器件、基于鳍状物或三栅极的器件,以及栅极全环绕的器件,包括基于纳米线的器件。在基于纳米线的器件中,N型掺杂扩散阻挡层在制造中被使用,但可以不被包括在最终的结构中(或者可以仅在较小范围上被包括,例如在某些区域执行不完全蚀刻)。在此所描述的实施例可以有效地用于金属-氧化物-半导体场效应晶体管(MOSFET)中的结隔离。
一个或多个实施例涉及Ge-on-Si衬底设计,以控制通过缓冲层的寄生泄漏。为了举例说明在此描述的概念,图1A和1B示出了常规半导体器件的截面图。参照图1A,常规器件100包括经由弛豫的硅锗(SiGe)缓冲层106(例如,70%SiGe缓冲层)生长在硅(Si)衬底104(例如,作为硅晶片的一部分)上的锗(Ge)沟道区102,以控制Ge和Si之间的晶格失配。然而,这些SiGe缓冲层106是非常导电的,因为它们允许在沟道区102下面的区域内,至少在SiGe缓冲层106内的平行传导。该平行传导可以导致器件100中从源极区110到漏极区112的寄生泄漏,如箭头108所描绘那样。应该指出的是,图1A还示出了隔离区114和栅极电极堆叠体116,例如氮化钛(TiN)栅极电极堆叠体。
参考图1B,一种泄漏抑制的方法涉及例如器件150的器件的形成。器件150包括经由弛豫的硅锗(SiGe)缓冲层156(例如,70%SiGe缓冲层)生长在硅(Si)衬底154(例如,作为硅晶片的一部分)上的锗(Ge)沟道区152,以控制Ge和Si之间的晶格失配。磷掺杂的SiGe层170被合并到上缓冲层部分156中,以最小化平行传导,从而截断有源Ge层152下的从源极区160与到漏极区162的泄漏路径,如阻断的箭头158所描绘那样。应该指出的是,图1B还示出了隔离区164和栅极电极堆叠体166,例如氮化钛(TiN)栅极电极堆叠体。
考虑到参考图1A和1B的以上讨论,磷和其它N型掺杂(例如砷)不幸地快速扩散在SiGe和Ge中,而且其扩散率随着SiGe中Ge含量的增加而增加。然后,典型地,磷掺杂SiGe层置于远低于Ge层,以防止N型掺杂剂扩散进入Ge沟道层中。目前,这样的磷掺杂层置于Ge沟道下方约100纳米处,以使能器件的工作。然而,这样的布置仍提供了Ge沟道下面的显著量的传导SiGe材料,使得具有小栅极长度的器件仍然能呈现差的短沟道效应(例如在器件关断时泄漏)。
根据本发明的一个实施例,通过在磷掺杂的SiGe层和Ge有源层之间并入薄Si或相对低浓度锗的SiGe层,解决了上述的问题。在一个实施例中,薄Si或相对低浓度锗的SiGe层用作磷(或砷)的扩散阻挡层,因为较低锗含量的层中的扩散较慢。此外,在一个实施例中,扩散阻挡层是有张应力的,因为它夹在较大的晶格常数的材料之间。在特定的如此实施例中,有张应力的层能使得到的多层Ge结构生长,同时仍维持薄膜中的高应变,例如,提供压缩应力至Ge沟道层。此外,在一个实施例中,增强了Ge纳米线/纳米带器件的制造中所需的蚀刻选择性。
作为常规Ge-on-Si衬底设计与根据本发明实施例的设计的比较,图2A示出了常规半导体层堆叠体的截面图。图2B示出了根据本发明一个实施例的另一个半导体层堆叠体的截面图。
参考图2A,传统的堆叠体200包括经由硅锗(SiGe)缓冲层206(例如,由大约0.5-1微米的Si0.3Ge0.7构成的层206A,由大约0.3-1微米的Si0.3Ge0.7构成的层206B,由弛豫的本征Si0.3Ge0.7构成的层206D)生长在硅(Si)衬底204(例如,作为硅晶片的一部分)上的锗(Ge)有源层202(例如压缩应力锗层),以控制Ge和Si之间的晶格失配。磷掺杂的SiGe层206C(例如,弛豫的磷掺杂Si0.3Ge0.7的层)被包括在层206B和206D之间。
参考图2B,根据本发明的一个或多个实施例,堆叠体250包括经由硅锗(SiGe)缓冲层256(例如,由大约0.5-1微米的Si0.7Ge0.3构成的层256A和由大约0.3-1微米的Si0.3Ge0.7构成的层256B)生长在硅(Si)衬底254(例如,作为硅晶片的一部分)上的锗(Ge)有源层252(例如压应力锗层),以控制Ge和Si之间的晶格失配。磷掺杂的SiGe层256C(例如,弛豫的磷掺杂Si0.3Ge0.7的层)被包括在层256B上。然而,代替图2A中的层206D,将扩散阻挡层270包括在磷掺杂的SiGe层256C和Ge有源层252之间,如图2B所描绘那样。
在一个实施例中,再次参考图2B,扩散阻挡层270由硅锗组成,具有小于层256C的锗含量的锗含量。在一个这样的实施例中,扩散阻挡层270由硅锗组成,具有至少比层256C的锗含量小一个数量级的锗含量。在另一个这样的实施例中,扩散阻挡层270基本上完全由硅组成。在一个实施例中,扩散阻挡层270是有张应力的,而锗有源层252是有压缩应力的。
在此描述的一个或多个实施例利用了一个或多个以下特征的优点:(1)磷或其它N型掺杂剂结层,用来抑制子鳍状物泄漏,(2)将磷结逆流(setback)缩放到锗沟道层,使能栅极长度(Lg)缩放,(3)低锗含量的SiGe或硅层,以抑制或阻止N型掺杂剂扩散,或(4)低锗含量SiGe或硅层,以增强Ge纳米线释放工艺的湿蚀刻选择性(例如,通过电流耦合效应)。在一个实施例中,低锗含量的SiGe或硅层可集成有常规的平面的或三栅极器件。这里描述的实施例也适用于纳米线和纳米带器件。
作为示例,图3A示出了根据本发明一实施例的具有带有下面的扩散阻挡层的锗有源层的半导体器件的截面图。参考图3A,半导体器件300包括设置在衬底302上的栅极电极堆叠体304。锗有源层306设置在衬底302上方,在栅电极堆叠体304的下面。扩散阻挡层308设置在衬底302的上方,在锗有源层306的下方。结漏抑制层310设置在衬底302的上方,在扩散阻挡层308的下方。源极312和漏极314区域设置在结漏抑制层310的上方,位于栅极电极堆叠体304的任一侧上。
在一个实施例中,栅极电极堆叠体304直接地设置在锗有源层306上,锗有源层306被直接设置在扩散阻挡层308上,扩散阻挡层308被直接地设置在结漏抑制层310上,源极312和漏极区域314直接设置在结漏抑制层310上,如图3A所描绘那样。在一个这样的实施例中,锗有源层306的厚度约在10-500埃的范围内,扩散阻挡层308的厚度约在5-500埃的范围内。在一实施例中,半导体器件300还包括直接设置在衬底302和结漏抑制层310之间的分级堆叠体316。在一个这样的实施例中,分级堆叠体316由两个层316A和316B组成(如图3A所描绘的),两个层316A和316B例如是由大约0.5-1微米的Si0.7Ge0.3构成的层316A和由大约0.3-1微米的Si0.3Ge0.7构成的层316B。
在一个实施例中,锗有源层306基本上由锗构成,结漏抑制层310由具有锗与硅之比Si1-yGey的掺杂磷的硅锗组成。在一个这样的实施例中,磷浓度是在约1e17-1e19原子/cm3的范围内。在一个实施例中,y约为0.7。在一个实施例中,将砷掺杂原子或一些其它N型掺杂原子,用来代替磷掺杂原子。在一实施例中,器件300是PMOS器件。
在一实施例中,扩散阻挡层308由具有锗与硅之比Si1-xGex的硅锗组成,其中x小于y。在一个这样的实施例中,扩散阻挡层由硅锗组成,具有锗与硅之比Si1-xGex,其中x至少比y小一个数量级。在另一实施例中,扩散阻挡层308基本上由硅组成。在一实施例中,扩散阻挡层308是未掺杂的或轻掺杂的,但一般不直接掺杂。
在一实施例中,扩散阻挡层308阻止磷从结漏抑制层310扩散到锗有源层306。在一实施例中,由于扩散阻挡层308的组合物被更多地加重有硅,较薄的层可以用于对来自结漏抑制层310的掺杂剂的扩散抑制。在一个实施例中,扩散阻挡层308是有张应力的,而锗有源层306是有压缩应力的。
半导体器件300可以是合并了栅极、沟道区及一对源极/漏极区域的任何半导体器件。在一实施例中,半导体器件300是例如但不限于MOSFET或微机电系统(MEMS)中的一个。在一实施例中,半导体器件300是平面的或三维MOSFET,并且是隔离的器件或者是多个嵌套器件中的一个器件。可以理解的是,对于一般的集成电路,N和P沟道晶体管均可以被制造在单个衬底上,以形成CMOS集成电路。
衬底302可以由可耐受制造工艺并且电荷能够在其中迁移的半导体材料组成。在一个实施例中,衬底302是体衬底,例如如半导体工业中经常使用的P型硅衬底。在一实施例中,衬底302由掺杂有电荷载流子的结晶硅、硅/锗或锗层组成,电荷载流子例如但不限于磷、砷、硼或其组合。在一个实施例中,衬底302中硅原子的浓度大于97%,或者可替换地,掺杂原子的浓度小于1%。在另一个实施例中,衬底302由生长在单独的晶体衬底上的外延层(例如生长在硼掺杂的体硅单晶衬底上的硅外延层)组成。
衬底302还可以包括设置在体结晶衬底和外延层之间的绝缘层,以形成例如绝缘体上硅衬底。在一实施例中,绝缘层由以下材料组成,该材料例如但不限于:二氧化硅、氮化硅、氮氧化硅或高-k介电层。衬底302替代地可以由III-V族材料构成。在一实施例中,衬底102由III-V材料构成,III-V材料例如但不限于,氮化镓、磷化镓、砷化镓、磷化铟、锑化铟、砷化铟镓、砷化铝镓、磷化铟镓、或其组合。在另一个实施例中,衬底302由III-V族材料和电荷载流子掺杂杂质原子组成,该杂质原子例如但不限于碳、硅、锗、氧、硫、硒或碲。
在一实施例中,半导体器件300是平面器件,栅极电极堆叠体304仅设置在锗有源层306的单个表面上。但是,在另一实施例中,半导体器件300是非平面的器件,例如,但不限于,fin-FET或三栅极器件。在这一的实施例中,锗有源层306包含三维体或形成在三维体中。在一个这样的实施例中,栅极电极堆叠体304围绕三维体的至少顶表面和一对侧壁,如在下面更详细地描述那样。在另一个实施例中,锗有源层306被制成是分立的三维体,例如在纳米线器件中的分立的三维体,如下面更详细地描述的那样。在一个这样的实施例中,栅极电极堆叠体304完全包围锗有源层306。
栅极电极堆叠体304可以包括栅极电极304A和下面的栅极介电层304B,如图3A所示那样。在一实施例中,栅极电极堆叠体304的栅极电极是由金属栅极组成,栅极介电层由高-K材料组成。例如,在一个实施例中,栅极介电层由下列材料组成,该材料例如但不限于:氧化铪、氮氧化铪、硅酸铪、氧化镧、氧化锆、硅酸锆、氧化钽、钛酸钡锶,钛酸钡、钛酸锶、氧化钇、氧化铝、氧化铅钪钽、铌酸锌铅,或它们的组合。此外,栅极介电层的一部分可包括从锗有源层306的上面几层形成的天然氧化物层。在一实施例中,栅极介电层包括顶部的高k部分和由半导体材料氧化物组成的下部。在一个实施例中,栅极介电层由氧化铪的顶部和二氧化硅或氮氧化硅的底部组成。
在一实施例中,栅极电极是由金属层构成,金属层例如但不局限于,金属氮化物、金属碳化物、金属硅化物、金属铝化物、铪、锆、钛、钽、铝、钌、钯、铂、钴、镍或导电金属氧化物。在特定实施例中,栅极电极由形成在金属功函数设定层上的非功函数设定填充材料构成。在一实施例中,栅极电极由P型材料组成。栅极电极堆叠体304还可以包括介电间隔体318,如图3A所描绘的那样。
在一实施例中,源极312和漏极314区域是由锗有源层306的掺杂部分和可能的扩散阻挡层308的部分形成。例如,可添加P型掺杂剂(如硼),以形成源极312和漏极314区域。然而,在另一个实施例中,源极和漏极区域是嵌入式的源极和漏极区域。例如,图3B和3C示出了根据本发明另一个实施例的具有带有下面的扩散阻挡层的锗有源层的另一半导体器件的制造的截面图。
参考图3B,去除锗有源层306的部分和可能的扩散阻挡层308的部分,以在栅极电极堆叠体304的任一侧上提供凹陷区域320。凹陷区域320可以通过任何合适的技术来形成,该任何合适的技术除去了锗有源层306的部分和可能的扩散阻挡层308的部分,而不会有害地影响存在的其它半导体特征,如干蚀刻或湿蚀刻工艺。在一个实施例中,通过使用NF3、HBr、SF6/Cl或Cl2的干法等离子体蚀刻或使用NH4OH或四甲基氢氧化铵的湿法蚀刻来形成凹陷区域320。在一个实施例中,栅极电极堆叠体304引导凹陷区域320的形成,形成了自对准的凹陷区域320。在一个实施例中,凹陷区域320形成有圆角,如图3B所示那样。然而,在另一个实施例中,凹陷区域320形成有带小平面的拐角。在一实施例中,锗有源层306的部分和扩散阻挡层308的部分使用层310作为蚀刻终止层。
参考图3C,一对嵌入式半导体区域322形成在凹陷区域320中,例如,外延地形成在栅极电极堆叠体304的任一侧上。在一个实施例中,该对半导体区域322对锗有源层306单轴地施加压缩应力,并且由晶格常数大于锗的材料组成,该材料例如是晶格常数大于锗的III-V材料。在一个这样的实施例中,最终形成的半导体器件350是P型半导体器件。在一实施例中,该对半导体区域322是直接形成在层310上,如图3C所描绘那样。
如上所述,本发明的实施例可被应用到非平面的MOSFET。例如,具有三维架构的器件(诸如三栅极器件)也可得益于以上描述的工艺。图4A-4C示出了表示根据本发明实施例的制造具有三维体的各种半导体器件的方法中的各种操作的成角度视图。
参照图4A,半导体器件400包括设置在衬底402上的栅极电极堆叠体404。三维锗有源体406设置在衬底402上且与衬底402耦合,并且在栅极电极堆叠体404的下面。隔离区域408设置在衬底402之上,并暴露出三维锗有源体406。扩散阻挡层410设置在衬底402上方,在三维锗有源体406下方。结漏抑制层412设置在衬底402上方,在扩散阻挡层410下方。源极414和漏极区域416设置在结漏抑制层上,在栅极电极堆叠体404的任一侧上。根据本发明的一实施例,隔离区域408被设定在三维锗有源体406和扩散阻挡层410的界面上,如图4A中所描绘那样。然而,其它实施例可以包括将隔离区域408的高度设置为高于或低于三维锗有源体406和扩散阻挡层410的界面。在一实施例中,栅极电极堆叠体还包括栅极隔离间隔体418,如图4A中所描绘那样。
在一实施例中,栅极电极堆叠体404直接设置在三维锗有源体406上,三维锗有源体406直接设置在扩散阻挡层410上,扩散阻挡层410直接设置在结漏抑制层412上,源极414和漏极416区域直接设置在结漏抑制层412上,如图4A中所描绘那样。在一实施例中,半导体器件400还包括直接设置在衬底402和结漏抑制层412之间的分级堆叠体420,分级堆叠体420例如由两个分级层形成,也如图4A中所描绘那样。在一实施例中,器件400是PMOS器件。材料组成和尺寸可以与针对半导体器件300描述的那样相同或类似。
在一实施例中,三维锗有源体406基本上由锗组成,结漏抑制层412由具有锗与硅之比Si1-yGey的掺杂磷的硅锗组成。在一个这样的实施例中,扩散阻挡层410由具有锗与硅之比Si1-xGex的硅锗组成,其中x小于y。在特定的如此实施例中,扩散阻挡层410由具有锗与硅之比Si1-xGex的硅锗组成,其中x至少比y小一个数量级。在另一实施例中,扩散阻挡层410基本上由硅组成。
在一实施例中,扩散阻挡层410阻止磷从结漏抑制层412扩散到三维锗有源体406。在一实施例中,扩散阻挡层410是有张应力的,而三维锗有源体406是有压缩应力的。
在一实施例中,源极414和漏极416区域是由三维锗有源体406的掺杂部分和可能的扩散阻挡层410的部分形成。例如,可添加P型掺杂剂(如硼),以形成源极414和漏极416区域。然而,在另一个实施例中,源极和漏极区域是嵌入式的源极和漏极区域。例如,图4B和4C示出了根据本发明另一个实施例的具有带有下面的扩散阻挡层的锗有源层的另一半导体器件的制造的截面图。
参考图4B,除去三维锗有源体406的部分和可能的扩散阻挡层410的部分,以在栅极电极堆叠体404的任一侧上提供凹陷区域422。凹陷区域422可以通过任何合适的技术形成,该任何合适的技术除去了三维锗有源体406的部分和可能的扩散阻挡层410的部分,而不会有害地影响存在的其它半导体特征,如干蚀刻或湿蚀刻工艺。在一个实施例中,凹陷区域422通过使用NF3、HBr、SF6/Cl或Cl2的干法等离子体蚀刻或使用NH4OH或四甲基氢氧化铵的湿法蚀刻形成。在一个实施例中,栅极电极堆叠体404引导凹陷区域422的形成,形成了自对准的凹陷区域422。在一实施例中,三维锗有源体406的部分和扩散阻挡层410的部分使用层412作为蚀刻终止层。
参考图4C,一对嵌入式半导体区域424形成在凹陷区域422中,例如,外延地形成在栅极电极堆叠体404的任一侧上。在一实施例中,该对半导体区域424对锗有源层406单轴地施加压缩应力,并且由晶格常数大于锗的材料组成,该材料例如是晶格常数大于锗的III-V材料。在一个这样的实施例中,最终形成的半导体器件450是P型半导体器件。在一实施例中,该对半导体区域424是直接形成在层412上,如图4C所描绘那样。
在另一方面,图5A示出了根据本发明一个实施例的基于纳米线的半导体结构的三维截面图。图5B示出了如沿着a-a'轴截取的图5A的基于纳米线的半导体结构的截面沟道视图。图5C示出了如沿着b-b'轴截取的图5A的基于纳米线的半导体结构的截面间隔体视图。
参考图5A,半导体器件500包括设置在衬底502上的一个或多个垂直堆叠的锗纳米线(504组)。此处的各实施例是针对单线器件和多线器件。作为示例,为了说明目的,示出基于三个纳米线的器件,具有纳米线504A、504B和504C。为了方便说明,纳米线504A被用作示例,其中描绘仅聚焦于纳米线中的一个。应当理解的是,当描述一个纳米线的属性时,基于多个纳米线的实施例可针对每个纳米线具有相同的属性。
每个锗纳米线504包括设置在纳米线中的沟道区506。沟道区506具有长度(L)。参考图5B,该沟道区还具有正交于该长度(L)的周长。参考图5A和5B,栅极电极堆叠体508围绕每个沟道区506的整个周长。栅极电极堆叠体508包括栅极电极以及设置在沟道区506和栅极电极之间的栅极介电层(未单独示出)。沟道区506是分立的,因为它完全由栅极电极堆叠体508围绕,而不具有任何中间材料(例如下面的衬底材料或上覆的沟道制造材料)。因此,在具有多个纳米线504的实施例中,纳米线的沟道区506也是相对于彼此分立的,如图5B所描绘那样。结漏抑制层550设置在衬底502上,在一个或多个锗纳米线504下。栅极电极堆叠体508设置在泄漏抑制层550上。虽然没有描绘,但是在一实施例中,分级堆叠体直接设置在衬底502和结漏抑制层550之间。
再次参照图5A,每个纳米线504还包括设置在沟道区104任一侧上的纳米线中的源极区域510和漏极区域512。源极和漏极区域510/512设置在结漏抑制层550上。在一实施例中,源极和漏极区域510/512是嵌入式的源极和漏极区域,例如,纳米线的至少一部分被移除并替换为源极/漏极材料区域。然而,在另一个实施例中,源极和漏极区域510/512包含一个或多个锗纳米线504的部分。
一对触点514设置在源极和漏极区域510/512上。在一实施例中,半导体器件500还包括一对间隔体516。间隔体516设置在栅极电极堆叠体508和该对触点514之间。如上所述,在至少几个实施例中,沟道区和源极/漏极区域被制成是分立的。然而,并非所有的纳米线区域504需要被制成是分立的或甚至可以被制成是分立的。例如,参考图5C,纳米线504A-504C在间隔体516下面的位置上不是分立的。在一个实施例中,纳米线504A-504C的堆叠体之间具有中间半导体材料518,例如夹在锗纳米线之间的硅锗或硅。在一个实施例中,底部的纳米线504A仍然与扩散阻挡层的一部分506接触,例如,用于如下所述的制造中。因此,在一实施例中,在一个或两个间隔体516下的多个垂直堆叠的纳米线504的一部分不是分立的。该扩散阻挡层最初设置在泄漏抑制层550上,如结合图6A-6D描述的那样。
在一实施例中,一个或多个锗纳米线504基本上由锗组成,结漏抑制层550由具有锗与硅之比Si1-yGey的掺杂磷的硅锗组成。在一个这样的实施例中,无论其是完全或部分牺牲或永久的,扩散阻挡层是由具有锗与硅之比Si1-xGex的硅锗组成,其中x小于y。在特定的如此实施例中,扩散阻挡层是由具有锗与硅之比Si1-xGex的硅锗组成,其中x至少比y小一个数量级。在另一实施例中,扩散阻挡层基本由硅组成。在一实施例中,扩散阻挡层是有张应力的,并且一个或多个锗纳米线504是有压缩应力的。
虽然器件500是针对单个器件,例如PMOS器件,但是也可形成CMOS架构以包括设置在同一衬底上或上方的NMOS和PMOS的基于纳米线的器件。在一实施例中,纳米线504可以为线或带,并且可以具有方形角或圆角。材料组成和尺寸可以是相同或类似于针对半导体器件300或400所描述的那些。
在另一个方面,提供了制造纳米线半导体结构的方法。例如,图6A-6D示出了三维截面图,三维截面图表示根据本发明一个实施例的,制造具有(至少在工艺中的一个点处)带有下面的扩散阻挡层的锗有源层的纳米线半导体器件的方法中的各种操作。
参考图6A,鳍状物612形成在衬底602上。鳍状物包括锗线形成层604和608,以及中间材料层606(例如硅或硅锗层)。鳍状物还包括扩散阻挡层610的图案化部分(例如上述的扩散阻挡层)。该鳍状物设置在泄漏抑制层650上。虽然没有描绘,但是在一实施例中,将分级堆叠体直接设置在衬底602和结漏抑制层650之间。
在示出了三栅极结构的形成的特定示例中,图6B示出了具有设置在其上的三个牺牲栅极614A、614B和614C的鳍状物式结构612。在一个这样的实施例中,三个牺牲栅极614A、614B和614C由牺牲栅极氧化物层616和牺牲多晶硅栅极层618组成,牺牲栅极氧化物层616和牺牲多晶硅栅极层618例如是层状沉积的并被以等离子体蚀刻工艺进行图案化。
在进行图案化以形成三个牺牲栅极614A、614B和614C之后,可将间隔体形成在三个牺牲栅极614A、614B和614C的侧壁上,可以在图6B所示的鳍状物式结构612的区域620中实施掺杂(例如,尖端和/或源极和漏极型掺杂),并且可将层间介电层形成为覆盖三个牺牲栅极614A、614B和614C并然后再暴露出三个牺牲栅极614A、614B和614C。针对替代栅极或后栅极的工艺,然后可以抛光层间介电层,以露出三个牺牲栅极614A、614B和614C。参考图6C,与间隔体622和层间介电层624一起暴露三个牺牲栅极614A、614B和614C。
然后可以除去牺牲栅极614A、614B和614C(例如,在替换栅极或后栅极的工艺流程中),以暴露出鳍状物式结构612的沟道部分。参考图6D,牺牲栅极614A、614B和614C被除去,以提供沟槽626,并因此露出纳米线的沟道部分。去除通过沟槽626暴露的中间层606的部分,以留下锗层604和608的分立部分。
在一实施例中,利用湿法蚀刻选择性地蚀刻含硅层606,其选择性地去除硅,而不蚀刻锗纳米线结构604和608。在一实施例中,尽管未示出,也可以去除该扩散阻挡层610,例如在去除中间层606之前、之后或同时。而且,扩散阻挡层可以完全被去除或仅部分去除(例如,在间隔体之下留下剩余部分),或者替代地可以保持原样不变。在一个实施例中,通过在扩散阻挡层610中使用较低的锗含量,例如通过电流耦合效应,来增强Ge纳米线/纳米带器件的制造中所需的蚀刻选择性。诸如水性氢氧化物化学物质(包括氢氧化铵和氢氧化钾)之类的蚀刻化学物质例如可以被用来选择性地蚀刻层606和/或610。随后可以完成器件的制造。在一个实施例中,环绕的栅极电极可以形成在锗纳米线604和608周围,以及在抑制层650上,如上面结合图5A所述那样。
因此,在一个实施例中,锗层604与608的分立部分将最终变成基于纳米线的结构中的沟道区。因此,在图6D所描绘的工艺阶段,可以执行沟道工程设计或调节。例如,在一个实施例中,使用氧化和刻蚀工艺来减薄锗层604与608的分立部分。这种蚀刻工艺可以在线被分离或个体化的同一时间执行。因此,由锗层604和608形成的初始线可以开始时较厚,然后被减薄为适合于纳米线器件中的沟道区域的尺寸,而独立于器件源极和漏极区域的尺寸调整。
在如图6D所描绘的分立沟道区域的形成之后,可以执行高k栅极电介质和金属栅极处理,而且可以加入源极和漏极触点。触点可形成于在图6D中保留的层间介电层624部分的位置。
关于上面描述的一般概念,图7示出了根据本发明一个实施例的根据高温退火后的磷浓度深度分布曲线图700的仿真结果。参照顶部的图700,相对于富含锗的Si0.3Ge0.7的扩散特性,表明了硅和Si0.7Ge0.3(例如,富硅层)作为对磷扩散的阻挡层的有效性。
图8示出了根据本发明一个实施方式的计算器件800。该计算器件800容纳板802。板802可包括多个部件,该部件包括但不限于处理器804和至少一个通信芯片806。该处理器804物理地和电气地耦合到板802上。在一些实施方案中,至少一个通信芯片806也物理地和电气地耦合到板802上。在进一步的实施方案中,通信芯片806是处理器804的一部分。
根据其应用,计算器件800可以包括其它部件,这些部件可以或不可以在物理地和电气地耦合到板802。这些其它部件包括但不限于易失性存储器(例如,DRAM),非易失性存储器(例如,ROM)、闪存、图形处理器、数字信号处理器、加密处理器、芯片组、天线、显示器、触摸屏显示器、触摸屏控制器、电池、音频编解码器、视频编解码器、功率放大器、全球定位系统(GPS)装置、罗盘、加速计、陀螺仪、扬声器、照相机、和大容量存储器件(例如硬盘驱动器、光盘(CD)、数字多功能盘(DVD)等)。
通信芯片806使能用于往来于计算器件800的数据传输的无线通信。术语“无线”及其派生词可用于描述可以通过使用经调制的电磁辐射经由非固态介质来传送数据的电路、设备、系统、方法、技术、通信信道等。该术语并不暗示相关的设备不包含任何线路,尽管在一些实施方案中它们可能是这样的。通信芯片806可以实现任何数量的无线标准或协议,该无线标准或协议包括但不限于Wi-Fi(IEEE802.11系列),WiMAX(IEEE802.16系列)、IEEE802.20、长期演进(LTE)、Ev-DO、HSPA+、HSDPA+、HSUPA+、EDGE、GSM、GPRS、CDMA、TDMA、DECT、蓝牙、其衍生物、以及被指定为3G、4G、5G以及更多的任何其它的无线协议。计算器件800可以包括多个通信芯片806。例如,第一通信芯片806可以是专用于较短距的无线通信,诸如Wi-Fi和蓝牙,第二通信芯片806可以是专用于较长距的无线通信,诸如GPS、EDGE、GPRS、CDMA、WiMAX、LTE、Ev-DO等。
计算器件800的处理器804包括封装在处理器804内的集成电路管芯。在本发明的某些实施方案中,处理器的集成电路管芯包括一个或多个器件,诸如根据本发明实施方案构建的MOSFET晶体管。术语“处理器”可以指处理来自寄存器和/或存储器的电子数据以将该电子数据转换成可存储在寄存器和/或存储器中的其他电子数据的任何器件或器件的一部分。
通信芯片806还包括封装在通信芯片806内的集成电路管芯。根据本发明的另一个实施方案,通信芯片的集成电路管芯包括一个或多个器件,诸如根据本发明实施方案构建的MOSFET晶体管。
在进一步的实施方案中,容纳在计算器件800中的另一部件可包含集成电路管芯,该管芯包括一个或多个器件,诸如根据本发明实施方案构建的MOSFET晶体管。
在各个实施方案中,计算器件800可以是膝上型电脑、上网本、笔记本、超级本、智能电话、平板电脑、个人数字助理(PDA)、超移动PC、移动电话、台式计算机、服务器、打印机、扫描仪、监视器、机顶盒、娱乐控制单元、数码摄像机、便携式音乐播放器或数字视频记录器。在进一步的实施方案中,计算器件800可以是处理数据的任何其他电子器件。
因此,公开了具有带有下面的扩散阻挡层的锗有源层的半导体器件。在一实施例中,半导体器件包括设置在衬底上的栅极电极堆叠体。锗有源层设置在衬底上,在栅极电极堆叠体下。扩散阻挡层设置在衬底的上方,在锗有源层的下方。结漏抑制层设置在衬底的上方,在扩散阻挡层的下方。源极和漏极区域设置在结漏抑制层的上方,位于栅极电极堆叠体的任一侧上。在一个这样的实施例中,栅极电极堆叠体直接地设置在锗有源层上,锗有源层直接设置在扩散阻挡层上,扩散阻挡层直接地设置在结漏抑制层上,并且源极和漏极区域直接设置在结漏抑制层上。
Claims (25)
1.一种半导体器件,包括:
设置在衬底上方的栅极电极堆叠体;
锗有源层,其设置在所述衬底上方、在栅极电极堆叠体的下面;
扩散阻挡层,其设置在所述衬底的上方、在所述锗有源层的下方;
结漏抑制层,其设置在所述衬底的上方、在所述扩散阻挡层的下方;
设置在所述锗有源层和所述扩散阻挡层中、位于所述栅极电极堆叠体的相应侧上的一对凹陷,所述一对凹陷暴露出所述结漏抑制层的最上部表面,其中所述结漏抑制层的所暴露出的最上部表面是平坦的;以及
外延源极区域和漏极区域,其设置在所述一对凹陷中、直接地设置在所述结漏抑制层的所暴露出的平坦的最上部表面上且与所述锗有源层和所述扩散阻挡层直接横向相邻,所述外延源极区域和漏极区域在所述外延源极区域和漏极区域与所述结漏抑制层之间的界面处具有完全平坦的最底部表面,其中所述界面是两种不同半导体材料组成之间的界面。
2.如权利要求1所述的半导体器件,其中,所述栅极电极堆叠体直接地设置在所述锗有源层上,所述锗有源层直接设置在所述扩散阻挡层上,所述扩散阻挡层直接地设置在所述结漏抑制层上。
3.如权利要求2所述的半导体器件,还包括:
直接设置在所述衬底和所述结漏抑制层之间的分级堆叠体。
4.如权利要求1所述的半导体器件,其中,所述锗有源层由锗组成,并且所述结漏抑制层包含具有锗与硅之比Si1-yGey的磷掺杂的硅锗。
5.如权利要求4所述的半导体器件,其中,扩散阻挡层包括具有锗与硅之比Si1-xGex的硅锗,其中x小于y。
6.如权利要求5所述的半导体器件,其中,所述扩散阻挡层包括具有锗与硅之比Si1-xGex的硅锗,其中x至少比y小一个数量级。
7.如权利要求4所述的半导体器件,其中,所述扩散阻挡层由硅组成。
8.如权利要求4所述的半导体器件,其中,所述扩散阻挡层阻止磷从所述结漏抑制层扩散到所述锗有源层。
9.如权利要求1所述的半导体器件,其中,所述扩散阻挡层是带张应力的,而所述锗有源层是带压缩应力的。
10.一种半导体器件,包括:
设置在衬底上方的栅极电极堆叠体;
三维锗有源体,其设置在所述衬底上方并与所述衬底耦合、在所述栅极电极堆叠体下面;
隔离区域,其设置在所述衬底上方并暴露出所述三维锗有源体;
扩散阻挡层,其设置在所述衬底上方、在所述三维锗有源体的下方;
结漏抑制层,其设置在所述衬底的上方、在所述扩散阻挡层的下方;
设置在所述三维锗有源体和所述扩散阻挡层中、位于所述栅极电极堆叠体的相应侧上的一对凹陷,所述一对凹陷暴露出所述结漏抑制层的最上部表面,其中所述结漏抑制层的所暴露出的最上部表面是平坦的;以及
外延源极区域和漏极区域,其设置在所述一对凹陷中、直接地设置在所述结漏抑制层的所暴露出的平坦的最上部表面上且与所述三维锗有源体和所述扩散阻挡层直接横向相邻,所述外延源极区域和漏极区域在所述外延源极区域和漏极区域与所述结漏抑制层之间的界面处具有完全平坦的最底部表面,其中所述界面是两种不同半导体材料组成之间的界面。
11.如权利要求10所述的半导体器件,其中,所述栅极电极堆叠体直接地设置在所述三维锗有源体上,所述三维锗有源体直接设置在所述扩散阻挡层上,所述扩散阻挡层直接地设置在所述结漏抑制层上。
12.如权利要求11所述的半导体器件,还包括:
直接设置在所述衬底和所述结漏抑制层之间的分级堆叠体。
13.如权利要求10所述的半导体器件,其中,所述三维锗有源体由锗组成,并且所述结漏抑制层包括具有锗与硅之比Si1-yGey的磷掺杂的硅锗。
14.如权利要求13所述的半导体器件,其中,所述扩散阻挡层包括具有锗与硅之比Si1- xGex的硅锗,其中x小于y。
15.如权利要求14所述的半导体器件,其中扩散阻挡层包括具有锗与硅之比Si1-xGex的硅锗,其中x至少比y小一个数量级。
16.如权利要求13所述的半导体器件,其中,所述扩散阻挡层由硅组成。
17.如权利要求13所述的半导体器件,其中,所述扩散阻挡层阻止磷从所述结漏抑制层扩散到所述三维锗有源体。
18.如权利要求10所述的半导体器件,其中,所述扩散阻挡层是带张应力的,而所述三维锗有源体是带压缩应力的。
19.一种半导体器件,包括:
多个锗纳米线,其在衬底上方被布置在垂直对齐的堆叠体中;
结漏抑制层,其设置在所述衬底上方,在所述多个锗纳米线的下方;
栅极电极堆叠体,其设置在所述结漏抑制层上,并完全包围所述多个锗纳米线中的每一个锗纳米线的至少一部分;
间隔体,其设置为邻近所述栅极电极堆叠体;
扩散阻挡层,其设置在所述结漏抑制层上,在所述间隔体下方;以及
外延源极区域和漏极区域,其直接地设置在所述结漏抑制层上且与所述多个锗纳米线横向相邻,位于所述栅极电极堆叠体的所述间隔体的任一侧上,所述外延源极区域和漏极区域包括与所述多个锗纳米线不同的半导体材料。
20.如权利要求19所述的半导体器件,还包括:
直接设置在所述衬底和所述结漏抑制层之间的分级堆叠体。
21.如权利要求19所述的半导体器件,其中,所述多个锗纳米线由锗组成,并且所述结漏抑制层包括具有锗与硅之比Si1-yGey的磷掺杂的硅锗。
22.如权利要求21所述的半导体器件,其中,所述扩散阻挡层包括具有锗与硅之比Si1- xGex的硅锗,其中x小于y。
23.如权利要求22所述的半导体器件,其中,所述扩散阻挡层包括具有锗与硅之比Si1- xGex的硅锗,其中x至少比y小一个数量级。
24.如权利要求21所述的半导体器件,其中,所述扩散阻挡层由硅组成。
25.如权利要求19所述的半导体器件,其中,所述扩散阻挡层是带张应力的,而所述多个锗纳米线是带压缩应力的。
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