CN103999215B - 用于微电子管芯、含有微电子管芯的微电子组件、微电子系统的封装,以及降低微电子封装中的管芯应力的方法 - Google Patents

用于微电子管芯、含有微电子管芯的微电子组件、微电子系统的封装,以及降低微电子封装中的管芯应力的方法 Download PDF

Info

Publication number
CN103999215B
CN103999215B CN201180075511.4A CN201180075511A CN103999215B CN 103999215 B CN103999215 B CN 103999215B CN 201180075511 A CN201180075511 A CN 201180075511A CN 103999215 B CN103999215 B CN 103999215B
Authority
CN
China
Prior art keywords
substrate
contact
heat sink
die
contact area
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201180075511.4A
Other languages
English (en)
Chinese (zh)
Other versions
CN103999215A (zh
Inventor
D·马利克
S·纳拉辛汉
M·J·曼努沙洛
T·A·博伊德
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of CN103999215A publication Critical patent/CN103999215A/zh
Application granted granted Critical
Publication of CN103999215B publication Critical patent/CN103999215B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367Cooling facilitated by shape of device
    • H01L23/3675Cooling facilitated by shape of device characterised by the shape of the housing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/42Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49833Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the chip support structure consisting of a plurality of insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73253Bump and layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/03Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00
    • H01L25/0655Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00 the devices being arranged next to each other
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/0132Binary Alloys
    • H01L2924/01327Intermediate phases, i.e. intermetallics compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/162Disposition
    • H01L2924/16251Connecting to an item not being a semiconductor or solid-state body, e.g. cap-to-substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Combinations Of Printed Boards (AREA)
CN201180075511.4A 2011-12-16 2011-12-16 用于微电子管芯、含有微电子管芯的微电子组件、微电子系统的封装,以及降低微电子封装中的管芯应力的方法 Active CN103999215B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/US2011/065512 WO2013089780A1 (en) 2011-12-16 2011-12-16 Package for a microelectronic die, microelectronic assembly containing same, microelectronic system, and method of reducing die stress in a microelectronic package

Publications (2)

Publication Number Publication Date
CN103999215A CN103999215A (zh) 2014-08-20
CN103999215B true CN103999215B (zh) 2017-06-13

Family

ID=48613051

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201180075511.4A Active CN103999215B (zh) 2011-12-16 2011-12-16 用于微电子管芯、含有微电子管芯的微电子组件、微电子系统的封装,以及降低微电子封装中的管芯应力的方法

Country Status (5)

Country Link
US (1) US9478476B2 (enExample)
KR (1) KR101584471B1 (enExample)
CN (1) CN103999215B (enExample)
IN (1) IN2014CN03370A (enExample)
WO (1) WO2013089780A1 (enExample)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8728872B2 (en) * 2011-08-18 2014-05-20 DY 4 Systems, Inc. Manufacturing process and heat dissipating device for forming interface for electronic component
CN103999215B (zh) 2011-12-16 2017-06-13 英特尔公司 用于微电子管芯、含有微电子管芯的微电子组件、微电子系统的封装,以及降低微电子封装中的管芯应力的方法
KR101983142B1 (ko) * 2013-06-28 2019-08-28 삼성전기주식회사 반도체 패키지
FR3012670A1 (fr) * 2013-10-30 2015-05-01 St Microelectronics Grenoble 2 Systeme electronique comprenant des dispositifs electroniques empiles munis de puces de circuits integres
KR20150072846A (ko) * 2013-12-20 2015-06-30 삼성전기주식회사 반도체 패키지 모듈
US9892990B1 (en) * 2014-07-24 2018-02-13 Amkor Technology, Inc. Semiconductor package lid thermal interface material standoffs
KR101753181B1 (ko) 2014-12-20 2017-07-03 인텔 코포레이션 소켓 어셈블리용 땜납 콘택트
JP2016225413A (ja) * 2015-05-28 2016-12-28 株式会社ジェイテクト 半導体モジュール
WO2018125254A1 (en) * 2016-12-31 2018-07-05 Intel Corporation Electronic device package
US9899305B1 (en) * 2017-04-28 2018-02-20 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor package structure
US10424527B2 (en) * 2017-11-14 2019-09-24 International Business Machines Corporation Electronic package with tapered pedestal
EP3693991B1 (en) * 2019-02-08 2024-04-03 Marvell Asia Pte, Ltd. Heat sink design for flip chip ball grid array
US11195779B2 (en) * 2019-08-09 2021-12-07 Raytheon Company Electronic module for motherboard
US11948855B1 (en) 2019-09-27 2024-04-02 Rockwell Collins, Inc. Integrated circuit (IC) package with cantilever multi-chip module (MCM) heat spreader
US11158596B2 (en) 2020-03-20 2021-10-26 Advanced Semiconductor Engineering, Inc. Semiconductor device package comprising power module and passive elements
JP7528557B2 (ja) * 2020-06-19 2024-08-06 日本電気株式会社 量子デバイス及びその製造方法
US12183650B2 (en) 2020-12-22 2024-12-31 Intel Corporation Heat extraction path from a laser die using a highly conductive thermal interface material in an optical transceiver
US12061371B2 (en) * 2020-12-22 2024-08-13 Intel Corporation Patch on interposer architecture for low cost optical co-packaging
US20220291462A1 (en) * 2021-03-11 2022-09-15 Intel Corporation Method to couple light using integrated heat spreader
US12362245B2 (en) * 2021-07-15 2025-07-15 Taiwan Semiconductor Manufacturing Company Limited Package assembly including a package lid having an inner foot and methods of making the same
CN114823549B (zh) * 2022-06-27 2022-11-11 北京升宇科技有限公司 一种纵向场效应晶体管vdmos芯片的封装结构及封装方法
CN118335763B (zh) * 2024-06-12 2024-10-25 甬矽电子(宁波)股份有限公司 传感器封装结构和传感器封装制作方法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6212074B1 (en) * 2000-01-31 2001-04-03 Sun Microsystems, Inc. Apparatus for dissipating heat from a circuit board having a multilevel surface

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6229216B1 (en) * 1999-01-11 2001-05-08 Intel Corporation Silicon interposer and multi-chip-module (MCM) with through substrate vias
US6882535B2 (en) * 2003-03-31 2005-04-19 Intel Corporation Integrated heat spreader with downset edge, and method of making same
US7462506B2 (en) * 2006-06-15 2008-12-09 International Business Machines Corporation Carbon dioxide gettering method for a chip module assembly
US7429792B2 (en) 2006-06-29 2008-09-30 Hynix Semiconductor Inc. Stack package with vertically formed heat sink
US7781883B2 (en) * 2008-08-19 2010-08-24 International Business Machines Corporation Electronic package with a thermal interposer and method of manufacturing the same
CN103999215B (zh) 2011-12-16 2017-06-13 英特尔公司 用于微电子管芯、含有微电子管芯的微电子组件、微电子系统的封装,以及降低微电子封装中的管芯应力的方法

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6212074B1 (en) * 2000-01-31 2001-04-03 Sun Microsystems, Inc. Apparatus for dissipating heat from a circuit board having a multilevel surface

Also Published As

Publication number Publication date
WO2013089780A1 (en) 2013-06-20
IN2014CN03370A (enExample) 2015-07-03
US9478476B2 (en) 2016-10-25
KR101584471B1 (ko) 2016-01-22
CN103999215A (zh) 2014-08-20
US20130270691A1 (en) 2013-10-17
KR20140094612A (ko) 2014-07-30

Similar Documents

Publication Publication Date Title
CN103999215B (zh) 用于微电子管芯、含有微电子管芯的微电子组件、微电子系统的封装,以及降低微电子封装中的管芯应力的方法
US10879219B2 (en) Lower IC package structure for coupling with an upper IC package to form a package-on-package (PoP) assembly and PoP assembly including such a lower IC package structure
US10553548B2 (en) Methods of forming multi-chip package structures
US10228735B2 (en) Methods of direct cooling of packaged devices and structures formed thereby
US9089052B2 (en) Multichip module with stiffening frame and associated covers
CN102150262B (zh) 包括覆盖直接附着于主板的管芯的封装的主板组件
US9209106B2 (en) Thermal management circuit board for stacked semiconductor chip device
CN103688353B (zh) 微电子器件、层叠管芯封装及包含层叠管芯封装的计算系统、制造层叠管芯封装中的多通道通信路径的方法以及实现层叠管芯封装的部件之间的电通信的方法
CN104160497B (zh) 微电子封装和层叠微电子组件以及包括该封装和组件的计算系统
US11791315B2 (en) Semiconductor assemblies including thermal circuits and methods of manufacturing the same
KR20190122133A (ko) 이방성 열 전도 섹션 및 등방성 열 전도 섹션을 갖는 방열 디바이스
US20190311983A1 (en) Stacking multiple dies having dissimilar interconnect structure layout and pitch
US11996346B2 (en) Semiconductor device and manufacturing method thereof
JP2021027334A (ja) 超薄型ブリッジ及びマルチダイ・ウルトラファイン・ピッチ・パッチ・アーキテクチャ及び製造方法
US20190006259A1 (en) Cooling solution designs for microelectronic packages
US11923264B2 (en) Semiconductor apparatus for discharging heat
CN104335341A (zh) 具有布置在内插器与衬底之间的微电子装置的微电子结构

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant