CN103987191A

CN103987191A - Method for reducing influence of AC coupling capacitor PAD on transmission of high-speed serial signals

Info

Publication number: CN103987191A
Application number: CN201410207339.9A
Authority: CN
Inventors: 王素华
Original assignee: Inspur Electronic Information Industry Co Ltd
Current assignee: Inspur Electronic Information Industry Co Ltd
Priority date: 2014-05-16
Filing date: 2014-05-16
Publication date: 2014-08-13

Abstract

The invention discloses a method for reducing influence of an AC coupling capacitor PAD on transmission of high-speed serial signals. An AC coupling capacitor additionally arranged on a high-speed serial bus is designed to be in small package so that the line width of a FDR bus passing through the capacitor can approximate the width of the PAD as much as possible to reduce sudden impedance change caused by change from a bonding pad of the capacitor to a transmission line body capacitor structure. Two-layer hollowing-out treatment is carried out on the FDR bus through the bonding pad of the AC coupling capacitor, so that the impedance of the FDR bus at the position of the AC coupling capacitor is kept unchanged, unnecessary reflection is avoided, the loss of a transmission line is reduced, and signal transmission stability is guaranteed.

Description

A kind of method of AC coupling capacitance PAD on high-speed serial signals transmission impact that reduce

Technical field

The present invention relates to electronic applications, PCB LAYOUT design and emulation field, relate in particular to the method for a kind of AC of reducing coupling capacitance PAD on high-speed serial signals transmission impact.

Background technology

Along with the transmission speed of signal is more and more faster, the QPI of a new generation and PCIE3.0 are up to 8Gpbs, and FDR bus is especially up to 14Gbps.FDR bus is as a kind of bussing technique of current high speed switch, and what relate to is straddle interconnected systems mostly, and transmission range is longer.Bus design is to insertion loss, and return loss index request is very high.The FDR signal quality criterion that MELLANOX chip producer provides is labeled in before 7Ghz frequency, be more than or equal to-25.03dB of insertion loss (IL), and return loss (RL) is less than-10 dB.And many plates interconnected systems generally need to pass through mainboard, backboard, a plurality of boards such as daughter board, total link length may be up to more than ten inches.In many plates are interconnected, FDR signal need be through sending, the multiple loss factors such as receiving terminal chip package, via hole, AC coupling capacitance, connector, transmission line.In FDR bus design, any one factor all will reach the optimal design of signal integrity as far as possible, crosstalk reduction as far as possible, and reflection, the factors such as decay, could realize the optimal design of whole link.Various key elements on many plates of high speed serialization Difference signal pair transmission link have proposed higher performance requirement, the LAYOUT mode that comprises device package, PAD, connector, transmission line, via hole etc., weaken various loss factors is signal stabilizations as far as possible, the assurance of transmitting.

General PCIE, SATA, SAS, QDR, the universal serial bus interconnecting between the chip chambers such as FDR and plate, has the design of AC coupling capacitance.The purpose of design of this coupling capacitance is logical high frequency resistance low frequency, but AC electric capacity also can bring harmful effect to high speed transmission of signals except producing useful electronic action.For example electric capacity place change in the instantaneous impedance, increases loss of signal.So the bus that speed is higher, requires stricter during AC Coupling Design.QDR for example, FDR bus, on chip SEPC, clearly mark need to be used the electric capacity of 0201 encapsulation, because little encapsulation is favourable to impedance matching.But encapsulation PAD place still can cause the change in the instantaneous impedance of transmission line and increase loss, so need process capacitor P AD when PCBLAYOUT designs, reduces the impact that electric capacity brings change in the instantaneous impedance and loss of signal.

Summary of the invention

The weak point existing for prior art, the invention provides the method for a kind of AC of reducing coupling capacitance PAD on high-speed serial signals transmission impact.

The invention provides the method for a kind of AC of reducing coupling capacitance PAD on high-speed serial signals transmission impact, its technical scheme that solve the technical problem employing is as follows: described in reduce the method for AC coupling capacitance PAD on high-speed serial signals transmission impact, by the AC coupling capacitance that high-speed serial bus is added, select little encapsulation electric capacity as far as possible, for example O201 encapsulation, make the live width of the FDR bus (FDR differential signal line) through electric capacity approach the width of PAD as far as possible, can reduce the change in the instantaneous impedance bringing to the structural change of transmission line body capacitance from electric capacity pad, thereby cause reflection, the method is that FDR bus has been done to the two-layer processing that hollows out through the pad of AC coupling capacitance, FDR bus impedance is 100 ohm, in the place's impedance of AC coupling capacitance, is still 100 ohm, does not bring unnecessary reflection, thereby also reduced the loss of transmission line, ensured stable signal transmission.

The AC of reducing coupling capacitance PAD disclosed by the invention on the beneficial effect of the method for high-speed serial signals transmission impact is: by the bright described method of we, FDR bus has been done and hollowed out processing through the pad of AC coupling capacitance, find out best pad processing mode, reduce impedance mismatch that capacitor P AD brings and the impact of loss, guaranteed signal quality, for signal stabilization, transmitting provides guarantee, has optimized system.

Accompanying drawing explanation

Accompanying drawing 1 is the system configuration schematic diagram of bus process;

Accompanying drawing 2 is that in the present invention, PAD below one layer plane hollows out into the large schematic diagrames such as PAD;

Accompanying drawing 3 hollows out into the schematic diagram with PAD Deng great Qie Liang PAD UNICOM for PAD below one layer plane in the present invention;

Accompanying drawing 4 is that in the present invention, PAD below one layer plane hollows out into the foursquare schematic diagram larger than PAD;

Accompanying drawing 5 is that in the present invention, PAD lower two layers plane hollows out into the large schematic diagrames such as PAD;

Accompanying drawing 6 hollows out into the schematic diagram with PAD Deng great Qie Liang PAD UNICOM for PAD lower two layers plane in the present invention;

Accompanying drawing 7 is that in the present invention, PAD lower two layers plane hollows out into the foursquare schematic diagram larger than PAD;

Description of reference numerals: 1, PAD; 2, ground floor hollows out gap; 3, the second layer hollows out gap.

Embodiment

Below by embodiment and accompanying drawing, the AC of reducing coupling capacitance PAD of the present invention is described in further details the method for high-speed serial signals transmission impact, do not cause limitation of the present invention.

Bright a kind of with regard in the multiple loss factor of system bus of we, capacitor P AD is research object on the impact of bus.In length is transmitted apart from universal serial bus, the impedance of the anti-pad design of AC capacitor P AD, via hole, connector, transmission line PCB processing is inconsistent, is all the reason of bringing impedance mismatch.Described in we are bright, reduce the method for AC coupling capacitance PAD on high-speed serial signals transmission impact, the AC coupling capacitance of adding by high-speed serial bus, select little encapsulation electric capacity as far as possible, for example O201 encapsulation, make the live width of the FDR bus (FDR differential signal line) through electric capacity approach the width of PAD as far as possible, can reduce the change in the instantaneous impedance bringing to the structural change of transmission line body capacitance from electric capacity pad, thereby cause reflection; The method of the invention is that FDR bus has been done to the two-layer processing that hollows out through the pad of AC coupling capacitance, FDR bus impedance is 100 ohm, in the place's impedance of AC coupling capacitance, is still 100 ohm, does not bring unnecessary reflection, thereby also reduced the loss of transmission line, optimized system.

Embodiment:

Below by embodiment, understand in detail design content and the advantage of the method for the invention:

Accompanying drawing 1 is the system configuration schematic diagram of bus process, as shown in Figure 1, in the blade server system of design, calculate mainboard and daughter board and be all plugged on backboard, the chip that calculates mainboard is connected with sub-chip on board by the FDR bus designing on backboard, carries out signal transmission; From sending to the transmission range that receives tens inches, each reflection loss factor all must strictly be controlled.With TOP layer transmission line, middle through 0201 encapsulation 100nf electric capacity, transmission line impedance is 100 ohm, and transmission length 2000Mil is example.If capacitor P AD below does not process, transmission line is 95 ohm through electric capacity place change in the instantaneous impedance, and during signal frequency 7Ghz, Insertion Loss is that this change in the instantaneous impedance amplitude of 1.367dB. and extent of deterioration are still larger for the high speed signal impact of long Distance Transmission.

In order to reduce impedance mismatch that capacitor P AD brings and the impact of loss, PAD below reference planes are hollowed out, reduce PAD parasitic capacitance, increase impedance, six kinds of pad processing modes as shown in accompanying drawing 2,3,4,5,6,7: accompanying drawing 2 is that PAD below one layer plane hollows out into the large modes such as PAD; Accompanying drawing 3 hollows out into the mode with PAD Deng great Qie Liang PAD UNICOM for PAD below one layer plane; Accompanying drawing 4 is that PAD below one layer plane hollows out into the foursquare mode larger than PAD; Accompanying drawing 5 hollows out into the large modes such as PAD for PAD lower two layers plane; Accompanying drawing 6 hollows out into the mode with PAD Deng great Qie Liang PAD UNICOM for PAD lower two layers plane; Accompanying drawing 7 hollows out into the foursquare mode larger than PAD for PAD lower two layers plane;

Wherein shown in accompanying drawing 6, PAD below two adjacent layers are hollowed out into the mode with PAD Deng great Qie Liang PAD UNICOM, this kind of capacitor P AD processing mode compared with other 5 kinds of pad processing modes, and change in the instantaneous impedance is minimum, and loss is minimum; The method electric capacity place change in the instantaneous impedance is 100 ohm, during signal frequency 7Ghz, Insertion Loss is 1.329dB, electric capacity pad does not bring change in the instantaneous impedance, adopt accompanying drawing 6 pad processing modes, 2000Mil link load has reduced by 0.38 dB, compared with electric capacity pad below reference planes do not hollow out and other 5 kinds hollow out mode, improving aspect change in the instantaneous impedance and loss, effect is comparatively obvious.

In the bright middle processing method of studying several capacitor P AD of we, find out best pad processing mode, reduce impedance mismatch that capacitor P AD brings and the impact of loss, guaranteed signal quality, be signal stabilization, transmitting provides guarantee.

Above-mentioned embodiment is only concrete case of the present invention; scope of patent protection of the present invention includes but not limited to above-mentioned embodiment; any suitable variation or replacements claims and that any person of an ordinary skill in the technical field does it that meet the AC of the reducing coupling capacitance PAD of the present invention method that transmission affects on high-speed serial signals, all should fall into scope of patent protection of the present invention.

Claims

1. one kind reduces the method for AC coupling capacitance PAD on high-speed serial signals transmission impact, it is characterized in that, the method is by the AC coupling capacitance that high-speed serial bus is added, select little encapsulation electric capacity, the width that makes as far as possible to approach through the live width of the FDR bus of electric capacity PAD, can reduce the change in the instantaneous impedance bringing to the structural change of transmission line body capacitance from electric capacity pad; Meanwhile, the method has been done and has been hollowed out processing through the pad of AC coupling capacitance FDR bus, makes to remain unchanged in the AC coupling capacitance FDR of place bus impedance.

2. the method for AC coupling capacitance PAD on high-speed serial signals transmission impact that reduce according to claim 1, is characterized in that, the method has been done the two-layer processing that hollows out to FDR bus through the pad of AC coupling capacitance.

3. the AC coupling capacitance PAD that reduces according to claim 2 transmits the method for impact on high-speed serial signals, it is characterized in that, described FDR bus has been done to the two-layer processing that hollows out through the pad of AC coupling capacitance, adopted capacitor P AD lower two layers plane to hollow out into the mode of and two capacitor P AD UNICOMs large with capacitor P AD etc.

4. the method for AC coupling capacitance PAD on high-speed serial signals transmission impact that reduce according to claim 1, is characterized in that, described little encapsulation electric capacity adopts O201 encapsulation.