CN103985715B - 一种阵列基板及其制作方法、液晶显示装置 - Google Patents
一种阵列基板及其制作方法、液晶显示装置 Download PDFInfo
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Abstract
本发明公开了一种阵列基板及其制作方法、液晶显示装置,用以解决TFT因公共电极与TFT之间存在耦合电压导致TFT开启的问题,且避免液晶层液晶错相的问题。本发明提供的阵列基板,包括:衬底基板,位于所述衬底基板上由栅线和数据线围设而成的多个子像素区域,每一子像素区域设置有:薄膜晶体管TFT、位于所述TFT上方的公共电极,以及位于所述公共电极上方的取向膜;所述取向膜的取向方向与所述栅线的延伸方向具有设定夹角,所述公共电极上与所述TFT对应的区域设置有沿设定方向延伸的镂空区域,所述镂空区域的延伸方向与所述取向膜的取向方向一致。
Description
技术领域
本发明涉及薄膜晶体管液晶显示(Thin Film Transistor Liquid CrystalDisplay,TFT-LCD)技术领域,尤其涉及一种阵列基板及其制作方法、液晶显示装置。
背景技术
随着个人计算机的日渐普及,液晶显示技术在21世纪迅速发展,并成为目前工业界的新星和经济发展的亮点。在液晶显示蓬勃发展的同时,视角宽、能耗低和响应速度快成为液晶显示器件的迫切要求。目前,高级超维场转换技术(ADvanced Super Dimension Switch,ADS)型液晶显示技术具有高速反应、高画质与大视角的特性,非常适合应用于各种动态影像用液晶显示领域。ADS通过同一平面内狭缝电极边缘所产生的电场以及狭缝电极层与板状电极层间产生的电场形成多维电场,使液晶盒内狭缝电极间、电极正上方所有取向液晶分子都能够产生旋转,从而提高了液晶工作效率并增大了透光效率。针对不同应用,ADS技术的改进技术有高透过率I-ADS技术、高开口率H-ADS和高分辨率S-ADS技术等。
TFT-LCD的主体结构包括阵列基板、彩膜基板以及位于二者之间的液晶层,ADS模式的阵列基板上设置公共电极和像素电极,TFT-LCD工作时,为公共电极施加恒定电压,当需要开启某一像素时,控制栅线将对应的TFT开启,数据线通过开启的TFT将数据信号传送到像素电极,公共电极和像素电极之间因电压差形成电场,电场控制液晶分子偏转实现图像的亮暗显示。
当公共电极位于TFT上方时,公共电极和TFT的有源层之间存在绝缘层,公共电极在图像显示阶段一致施加有电压,因此,TFT的有源层中会耦合出一部分电荷,形成耦合电压,该耦合电压可能会使得TFT的源极和漏极导通,在TFT不需要开启时开启,造成图像显示不良。
发明内容
本发明实施例提供了一种阵列基板及其制作方法、液晶显示装置,用以解决TFT因公共电极与TFT之间存在耦合电压导致TFT开启的问题,且避免液晶层液晶错相的问题。
本发明实施例提供的阵列基板,包括:衬底基板,位于所述衬底基板上由栅线和数据线围设而成的多个子像素区域,每一子像素区域设置有:薄膜晶体管TFT、位于所述TFT上方的公共电极,以及位于所述公共电极上方的取向膜;
所述取向膜的取向方向与所述栅线的延伸方向具有设定夹角,所述公共电极上与所述TFT对应的区域设置有沿设定方向延伸的镂空区域,所述镂空区域的延伸方向与所述取向膜的取向方向一致。
较佳地,所述TFT包括有源层,所述镂空区域位于所述有源层上方,所述有源层在所述衬底基板上的投影位于所述镂空区域在所述衬底基板上的投影内。
较佳地,所述镂空区域的纵截面的形状为倒梯形。
较佳地,所述镂空区域的横截面为平行四边形。
较佳地,所述镂空区域为倒置四棱台结构。
较佳地,所述倒置四棱台状的镂空区域具有靠近所述取向膜的第一开口和远离所述取向膜的第二开口,所述第一开口图形的任意一边与所述第二开口图形中相平行的一边在衬底基板上的投影之间的距离为1-3μm。
较佳地,所述第一开口图形的任意一边与所述第二开口图形中相平行的一边在衬底基板上的投影之间的距离为1.5μm。
较佳地,所述公共电极为面状电极或狭缝状电极;
所述狭缝状电极的狭缝在公共电极上的分布区域与所述子像素区域中除TFT之外的区域相对应。
较佳地,还包括位于所述子像素区域的像素电极,所述像素电极位于所述公共电极的下方与所述公共电极相绝缘,所述像素电极为狭缝状电极层。
本发明实施例提供一种液晶显示装置,包括上述任一方式的阵列基板。
本发明实施例提供一种阵列基板的制作方法,包括:
在衬底基板上的每一像素区域形成薄膜晶体管TFT,以及形成与所述TFT的栅极相连的沿第一方向延伸的栅线;
在形成有所述TFT和栅线的衬底基板上形成覆盖每一像素区域的公共电极;
在所述公共电极上与所述TFT对应的区域形成沿与所述第一方向具有设定夹角的第二方向延伸的镂空区域;
在形成有所述镂空区域的公共电极上形成取向方向与所述第二方向一致的取向层。
较佳地,在所述公共电极上形成所述镂空区域,具体为:在所述公共电极上与所述TFT的有源层对应的区域形成沿与所述第一方向具有设定夹角的第二方向延伸的镂空区域。
较佳地,在所述公共电极上形成所述镂空区域,具体为:
通过对所述公共电极进行掩模、曝光、显影、刻蚀工艺形成纵截面为倒梯形、横截面为平行四边形的镂空区域。
较佳地,在所述公共电极上形成所述镂空区域,具体为:通过对所述公共电极进行掩模、曝光、显影、刻蚀工艺形成倒置四棱台结构的镂空区域,所述四棱台状的镂空区域具有靠近所述取向膜的第一开口和远离所述取向膜的第二开口,所述第一开口图形的任意一边与所述第二开口图形中相平行的一边在衬底基板上的投影之间的距离为1-3μm。
本发明实施例提供的阵列基板,针对薄膜晶体管TFT像素阵列,且针对公共电极位于TFT上方的情况,在公共电极上与TFT对应的区域设置镂空区域,该镂空区域可以减少或完全避免公共电极与TFT有源层之间的交叠,避免或降低了公共电极与TFT之间的耦合电压,解决了TFT因公共电极与TFT之间存在耦合电压导致TFT开启的问题。并且,所述镂空区域的延伸方向与所述取向膜的取向方向一致,公共电极上在镂空区域对应的区域形成段差,取向膜依照公共电极的表面形状设置于其上,与所述段差对应的区域形成凹陷区域,该凹陷区域在水平面内的延伸方向与取向膜的取向方向一致,靠近取向膜与镂空区域对应区域的所有液晶分子的初始排列方向与取向膜的取向方向一致,不会造成液晶分子错相的问题,避免因液晶分子初始排列错相导致液晶显示装置漏光的问题。
附图说明
图1为本发明实施例提供的阵列基板的俯视示意图;
图2为图1在AA向的截面图;
图3为图1所示的公共电极上镂空区域的延伸方向与取向膜的取向方向的关系示意图;
图4为图1所示的镂空区域和TFT有源层在衬底基板上投影关系示意图;
图5为图1所示的镂空区域上的第一开口和第二开口图形相对位置;
图6为本发明实施例提供的液晶显示装置光透过率和驱动电压关系与现有液晶显示装置光透过率和驱动电压关系对比示意图;
图7为本发明实施例提供的阵列基板的制作方法总体流程示意图。
具体实施方式
本发明实施例提供了一种阵列基板及其制作方法、液晶显示装置,用以解决TFT因公共电极与TFT之间存在耦合电压导致TFT开启的问题,且避免液晶层液晶错相的问题。
本发明在公共电极上与TFT对应的区域设置镂空区域,解决TFT因公共电极与TFT之间存在耦合电压导致TFT自动开启的问题。并且,所述镂空区域的延伸方向与所述取向膜的取向方向一致,避免因液晶分子初始排列错相导致液晶显示装置漏光的问题。
本发明所述错相即液晶显示面板中的液晶分子在未经电场驱动时初始排列状态下液晶分子的排列方向偏离取向层的取向方向。
以下将结合附图具体说明本发明实施例提供的技术方案。
参见图1和图2,图1为阵列基板的俯视示意图,图2为图1所示的阵列基板在AA向的截面图,本发明实施例提供的阵列基板包括:
衬底基板(图1中未示出);
位于衬底基板上由交叉排列的栅线10和数据线11围设而成的多个子像素区域(子像素区域如图1中虚线框围设的区域所示),栅线10沿第一方向延伸;
每一子像素区域设置有:薄膜晶体管TFT2、位于TFT2上方的公共电极3,以及位于公共电极3上方取向方向为与所述第一方向具有设定夹角的第二方向的取向膜(图1中未示出);
公共电极3上与TFT2对应的区域设置有沿第二方向延伸的镂空区域31,镂空区域31的延伸方向与取向膜的取向方向一致。
为了进一步说明图1所示的TFT2与公共电极3的位置关系,如图2所示,为图1在AA向的截面局部放大示意图;
如图2所示,闭合的虚线内的结构为TFT2的基本结构,其中一种实施方式为底栅型TFT;
TFT2包括:衬底基板1上的栅极21,栅极21上方的有源层23,位于栅极21和有源层23之间的栅极绝缘层22,位于有源层23上的源极24和漏极25;源极24和漏极25与其上的公共电极3之间设置有钝化层26。
TFT2位于公共电极3的下方,取向膜4位于公共电极3的上方,公共电极3上与TFT2对应的区域设置有镂空区域31。公共电极3的厚度为h,也就是说,镂空区域31的厚度为h。
为了进一步说明图2所示的公共电极3上镂空区域31的延伸方向与公共电极3上的取向膜4的取向方向的关系,如图3所示,为公共电极3上镂空区域31的延伸方向与取向膜4的取向方向的关系示意图,以及与栅线10的位置关系图;
由图3可知,取向膜的取向方向(如箭头所示的方向)与栅线10之间的夹角为α,镂空区域13的延伸方向与取向膜的取向方向一致,也就是说,镂空区域13的延伸方向与栅线10之间的夹角为α。
本发明上述实施例提供的阵列基板,首先,公共电极上与TFT对应的区域设置有镂空区域,减少了公共电极与TFT之间的交叠面,TFT中因施加有恒定电压Vcom的公共电极产生的耦合电荷减少,TFT上的耦合电压较小,在与TFT相连的栅线未施加开启电压Von时,TFT不会因较大的耦合电压自动开启而导致TFT的源极和漏极导通。进一步,所述镂空区域的延伸方向与所述取向膜的取向方向一致,公共电极上在镂空区域对应的区域形成段差,取向膜依照公共电极的表面形状设置于其上,与所述段差对应的区域形成凹陷区域,该凹陷区域在水平面内的延伸方向与取向膜的取向方向一致,靠近取向膜与镂空区域对应区域的所有液晶分子的初始排列方向与取向膜的取向方向一致,不会造成液晶分子错相的问题,避免因液晶分子初始排列错相导致液晶显示装置漏光的问题。此外,本发明实施例提供的取向膜的取向方向与栅线具有一定夹角,也就是说,液晶分子长轴的排列方向与栅线具有一定夹角。可以提高液晶分子的开启响应速度和关闭响应速度。这是因为,栅线与矩形状的亚像素单元的某一边缘平行,所述液晶分子长轴的排列方向与亚像素单元的边缘具有设定夹角,这样的设置方向可以适用于阵列基板与彩膜基板之间的液晶分子在与衬底基板平行的平面内旋转的情况,例如,其中一种实施方式为:阵列基板与彩膜基板之间填充负性液晶分子,负性液晶分子的长轴在横向电场的作用下,由初始排列方向向与横向电场方向垂直的方向排列,这样的设置方式使得液晶分子的长轴在平行于衬底基板的平面内旋转,长轴不受彩膜基板和阵列基板之间垂直电场的影响,可以提高液晶分子的开启响应速度和关闭响应速度。
也就是说,本发明实施例提供的阵列基板在避免TFT因公共电极与TFT之间存在耦合电压导致TFT自动开启的问题的同时,还可以避免液晶层液晶错相导致漏光的问题,此外还可以提高液晶分子的开启响应速度和关闭响应速度,综合提高了阵列基板的良品率。
由于图2所示的TFT的源极24和漏极25是通过TFT2中处于导电沟道状态的有源层23导通,有源层23上具有较大耦合电压时,有源层23形成导电沟道,源极24和漏极25通过导电沟道导通。
本发明提供的阵列基板,为了使得所述镂空区域尽可能小,避免镂空区域过大影响镂空区域对应区域液晶分子的取向,还需要保证有源层上的耦合电压小到不足以开启TFT,因此,在上述实施例提供的阵列基板的基础上,即图1和图2所示的阵列基板的基础上,进一步地,参见图2,镂空区域31位于有源层23上方,参见图4,有源层23在衬底基板1上的投影位于镂空区域31在衬底基板1上的投影内。
本发明提供的阵列基板,由于镂空区域31位于公共电极3上,公共电极3具有设定厚度,因此,参见图2,镂空区域31的垂直深度h为公共电极3的厚度,为了避免镂空区域对应区域的取向膜因镂空区域的孔壁较陡形成断层,较佳地,参见图2,镂空区域31的纵截面的形状为倒梯形,可以理解为镂空区域31的侧壁为坡面状,即镂空区域31靠近衬底基板1的横截面小于远离衬底基板1的横截面。
具体地,当取向膜4形成于公共电极3上时,因镂空区域31的纵截面的形状为倒梯形,取向膜4在镂空区域31对应区域依照镂空区域的形状形成在其上,取向膜4在镂空区域31对应区域形成具有坡面状结构的凹陷区域,取向膜4不会发生断层的危险,且液晶分子分布在所述凹陷区域时,该凹陷区域具有类似于取向膜上摩擦后可为液晶分子取向的功能,取向方向与取向层上的取向方向一致。
较佳地,所述镂空区域的横截面可以为条状、矩形状或平行四边形状等。当所述镂空区域的横截面为矩形状或平行四边形状时,优选地,所述镂空区域为倒置四棱台结构。
更优选地,所述倒置四棱台状的镂空区域具有靠近所述取向膜的第一开口和远离所述取向膜的第二开口,所述第一开口图形的任意一边与所述第二开口图形中相平行的一边在衬底基板上的投影之间的距离为1-3μm。
具体地,在上述实施例的基础上,参见图2,镂空区域31靠近取向膜4的一端为第一开口,靠近TFT2的一端为第二开口,第一开口和第二开口的图形为矩形,镂空区域31为倒置四棱台结构。这样的设置方式可以保证镂空区域31孔壁为规则的结构,进一步可以保证取向膜4在镂空区域31对应区域形成倒锥台结构的凹陷区域,一方面进一步保证取向膜不会发生断层的危险,另一方面还可以保证镂空区域的结构更规则,从而使得所述取向膜上的凹陷区域结构更规则,更加有效地避免液晶分子错相的问题,避免因液晶分子初始排列错相导致液晶显示装置漏光的问题。
进一步地,在上述实施例的基础上,参见图5,所述第一开口图形上的任一边和所述第二开口图形中相平行的边在衬底基板上的投影之间的距离w为1-3μm,在公共电极的厚度h一定的前提下,确定了镂空区域31孔壁的坡度角。
较佳地,所述第一开口图形上的任一边和所述第二开口图形中相平行的边在衬底基板上的投影之间的距离为1.5μm。
上述实施例,由于有源层23在衬底基板1上的投影位于镂空区域31在衬底基板1上的投影内,即有源层23在衬底基板1上的投影位于第二开口图形的投影内,有源层23与镂空区域31无交叠区域,保证有源层23上无公共电极引起的耦合电压。第一开口靠近第二开口1-3μm处,既可以保证第一开口较小还保证镂空区域的孔壁具有一定坡度还可以避免取向膜断层不良现象的发生。
本发明上述任一实施方式提供的公共电极可以为面状电极或狭缝状电极;例如,图1所示的公共电极3为狭缝状电极。所述狭缝状电极的狭缝在公共电极上的分布区域与所述子像素区域中除TFT之外的区域相对应。即公共电极上的狭缝与TFT无重叠区域,TFT正上方无狭缝。
本发明实施例提供的阵列基板还包括与TFT的漏极电性相连的像素电极,述像素电极位于所述公共电极的下方与所述公共电极相绝缘,所述像素电极为狭缝状电极。
当像素电极层和公共电极均施加有电压时,产生横向电场,控制彩膜基板和阵列基板之间的液晶分子偏转,控制光线的透过率。
像素电极层和公共电极均为狭缝状时,产生的电场为多维电场,使液晶盒内狭缝电极间、电极正上方所有取向液晶分子都能够产生旋转,从而提高了液晶工作效率并增大了透光效率。
本发明实施例提供的阵列基板,附图2所示的结构仅用于说明各结构之间的相对位置,并不说明每一功能膜层的具体结构。
本发明实施例提供一种液晶显示装置,包括上述任一方式的阵列基板。
具体地,所述液晶显示装置包括阵列基板,还可以包括彩膜基板,以及二者之间的液晶层;或者所述液晶显示装置仅包括所述阵列基板,其中所述阵列基板至少还包括彩色滤光膜。
所述液晶显示装置可以为液晶显示面板、液晶显示器、液晶电视等。
本发明上述任一实施方式提供的阵列基板,由于了避免液晶层液晶错相的问题,因此,液晶显示装置的光透光率也相比较现有技术得到提高。参见图6,为通过软件模拟得到的本发明提供的液晶显示装置的像素驱动电压V(即像素的灰阶电压)和光透过率T的关系示意图;由图6可知,相同驱动电压下本发明提供的液晶显示装置的光透过率高于现有技术液晶显示装置的光透过率。
本发明实施例还提供一种阵列基板的制作方法,参见图7,主要包括以下步骤:
S11、在衬底基板上的每一像素区域形成薄膜晶体管TFT,以及形成与所述TFT的栅极相连的沿第一方向延伸的栅线;
S12、在形成有所述TFT和栅线的衬底基板上形成覆盖每一像素区域的公共电极;
S13、在所述公共电极上与所述TFT对应的区域形成沿与所述第一方向具有设定夹角的第二方向延伸的镂空区域;
具体地,在所述公共电极上与所述TFT的有源层对应的区域形成沿与所述第一方向具有设定夹角的第二方向延伸的镂空区域。
具体地,通过对所述公共电极进行掩模、曝光、显影、刻蚀工艺形成纵截面为倒梯形、横截面为平行四边形的镂空区域;具体可以通过控制曝光程度控制公共电极上形成纵截面为倒梯形的镂空区域,通过设置掩模板的图形形成横截面为平行四边形的镂空区域。
进一步地,通过对所述公共电极进行掩模、曝光、显影、刻蚀工艺形成倒置四棱台结构的镂空区域,所述四棱台状的镂空区域具有靠近所述取向膜的第一开口和远离所述取向膜的第二开口,所述第一开口图形的任意一边与所述第二开口图形中相平行的一边在衬底基板上的投影之间的距离为1-3μm。
进一步地,还包括在所述公共电极上像素的开口区域形成狭缝,提高液晶显示装置光线的透过率。
进一步地,在形成所述公共电极之前,形成所述TFT之后,还包括:
在衬底基板的每一像素区域形成像素电极,该像素电极与所述公共电极通过绝缘层相绝缘。
本发明实施例提供的阵列基板,其制作工艺流程简单介绍如下:
以图2所示的阵列基板为例说明;
步骤1:在衬底基板1上形成金属薄膜,通过构图工艺形成栅极图形和眼第一方向延伸的栅线图形。
步骤2:在完成步骤1的衬底基板上依次形成栅极绝缘层、半导体薄膜,通过对所述半导体薄膜进行构图工艺形成有源层图形,该有源层图形为规则的图形,例如可以为矩形等。
步骤3:在完成步骤2的衬底基板上形成金属薄膜,通过构图工艺形成源极和漏极图形。
步骤4:在完成步骤3的基础上沉积钝化层,通过构图工艺在钝化层上形成用于连接像素电极和漏极的过孔,所述过孔位于漏极上方。
步骤5:在完成步骤4的基础上沉积透明导电薄膜,通过构图工艺形成像素电极、有镂空区域的公共电极,公共电极通过钝化层过孔与漏电极连接,所形成的公共电极的镂空区域的最大开口为比TFT有源层大1.5um左右沿与第一方向成设定夹角的第二方向延伸的镂空区域,镂空区域延伸方向与取向层上的液晶摩擦方向(即取向方向)相同。当加电压后,此时形成的公共电极形状有利于段差处液晶分子的取向排列。
步骤6:在步骤5的基础上形成取向层,取向层的取向方向与所述第二方向一致。
本发明实施例提供的阵列基板,针对薄膜晶体管TFT像素阵列,且针对公共电极位于TFT上方的情况,在公共电极上与TFT对应的区域设置镂空区域,该镂空区域可以减少或完全避免公共电极与TFT有源层之间的交叠,避免或降低了公共电极与TFT之间的耦合电压,解决了TFT因公共电极与TFT之间存在耦合电压导致TFT开启的问题。并且,所述镂空区域的延伸方向与所述取向膜的取向方向一致,公共电极上在镂空区域对应的区域形成段差,取向膜依照公共电极的表面形状设置于其上,与所述段差对应的区域形成凹陷区域,该凹陷区域在水平面内的延伸方向与取向膜的取向方向一致,靠近取向膜与镂空区域对应区域的所有液晶分子的初始排列方向与取向膜的取向方向一致,不会造成液晶分子错相的问题,避免因液晶分子初始排列错相导致液晶显示装置漏光的问题。并且,包括本发明实施例提供的阵列基板的液晶显示装置因无错相其光透过率也得到提高,实现了一种光透过率较高、无漏光的液晶显示装置。
显然,本领域的技术人员可以对本发明进行各种改动和变型而不脱离本发明的精神和范围。这样,倘若本发明的这些修改和变型属于本发明权利要求及其等同技术的范围之内,则本发明也意图包含这些改动和变型在内。
Claims (14)
1.一种阵列基板,其特征在于,包括:衬底基板,位于所述衬底基板上由栅线和数据线围设而成的多个子像素区域,每一子像素区域设置有:薄膜晶体管TFT、位于所述TFT上方的公共电极,以及位于所述公共电极上方的取向膜;
所述取向膜的取向方向与所述栅线的延伸方向具有设定夹角,所述公共电极上与所述TFT对应的区域设置有沿设定方向延伸的镂空区域,所述镂空区域的延伸方向与所述取向膜的取向方向一致。
2.根据权利要求1所述的阵列基板,其特征在于,所述TFT包括有源层,所述镂空区域位于所述有源层上方,所述有源层在所述衬底基板上的投影位于所述镂空区域在所述衬底基板上的投影内。
3.根据权利要求2所述的阵列基板,其特征在于,所述镂空区域的纵截面的形状为倒梯形。
4.根据权利要求3所述的阵列基板,其特征在于,所述镂空区域的横截面为平行四边形。
5.根据权利要求4所述的阵列基板,其特征在于,所述镂空区域为倒置四棱台结构。
6.根据权利要求5所述的阵列基板,其特征在于,所述倒置四棱台结构的镂空区域具有靠近所述取向膜的第一开口和远离所述取向膜的第二开口,所述第一开口图形的任意一边与所述第二开口图形中相平行且位于同一侧的一边在衬底基板上的投影之间的距离为1-3μm。
7.根据权利要求6所述的阵列基板,其特征在于,所述第一开口图形的任意一边与所述第二开口图形中相平行且位于同一侧的一边在衬底基板上的投影之间的距离为1.5μm。
8.根据权利要求1所述的阵列基板,其特征在于,所述公共电极为面状电极或狭缝状电极;
所述狭缝状电极的狭缝在公共电极上的分布区域与所述子像素区域中除TFT之外的区域相对应。
9.根据权利要求1所述的阵列基板,其特征在于,还包括位于所述子像素区域的像素电极,所述像素电极位于所述公共电极的下方与所述公共电极相绝缘,所述像素电极为狭缝状电极。
10.一种液晶显示装置,其特征在于,包括权利要求1-9任一权项所述的阵列基板。
11.一种阵列基板的制作方法,其特征在于,包括:
在衬底基板上的每一像素区域形成薄膜晶体管TFT,以及形成与所述TFT的栅极相连的沿第一方向延伸的栅线;
在形成有所述TFT和栅线的衬底基板上形成覆盖每一像素区域的公共电极;
在所述公共电极上与所述TFT对应的区域形成沿与所述第一方向具有设定夹角的第二方向延伸的镂空区域;
在形成有所述镂空区域的公共电极上形成取向方向与所述第二方向一致的取向层。
12.根据权利要求11所述的制作方法,其特征在于,在所述公共电极上形成所述镂空区域,具体为:在所述公共电极上与所述TFT的有源层对应的区域形成沿与所述第一方向具有设定夹角的第二方向延伸的镂空区域。
13.根据权利要求11所述的制作方法,其特征在于,在所述公共电极上形成所述镂空区域,具体为:
通过对所述公共电极进行掩模、曝光、显影、刻蚀工艺形成纵截面为倒梯形、横截面为平行四边形的镂空区域。
14.根据权利要求11所述的制作方法,其特征在于,在所述公共电极上形成所述镂空区域,具体为:通过对所述公共电极进行掩模、曝光、显影、刻蚀工艺形成倒置四棱台结构的镂空区域,所述四棱台结构的镂空区域具有靠近所述取向层的第一开口和远离所述取向层的第二开口,所述第一开口图形的任意一边与所述第二开口图形中相平行且位于同一侧的一边在衬底基板上的投影之间的距离为1-3μm。
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